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path: root/drivers/net/wireless/iwlwifi/iwl-csr.h
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Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-csr.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 3d50ef99f88d..34c123ea1d3e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -97,6 +97,7 @@
97#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c) 97#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c)
98#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060) 98#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060)
99#define CSR_LED_REG (CSR_BASE+0x094) 99#define CSR_LED_REG (CSR_BASE+0x094)
100#define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0)
100#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100) 101#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
101 102
102/* Analog phase-lock-loop configuration */ 103/* Analog phase-lock-loop configuration */
@@ -256,6 +257,11 @@
256 257
257/* HPET MEM debug */ 258/* HPET MEM debug */
258#define CSR_DBG_HPET_MEM_REG_VAL (0xFFFF0000) 259#define CSR_DBG_HPET_MEM_REG_VAL (0xFFFF0000)
260
261/* DRAM INT TABLE */
262#define CSR_DRAM_INT_TBL_ENABLE (1 << 31)
263#define CSR_DRAM_INIT_TBL_WRAP_CHECK (1 << 27)
264
259/*=== HBUS (Host-side Bus) ===*/ 265/*=== HBUS (Host-side Bus) ===*/
260#define HBUS_BASE (0x400) 266#define HBUS_BASE (0x400)
261/* 267/*