diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-5000.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-5000.c | 130 |
1 files changed, 102 insertions, 28 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index b3c648ce8c7b..87957c052839 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -91,7 +91,7 @@ static int iwl5000_apm_stop_master(struct iwl_priv *priv) | |||
91 | } | 91 | } |
92 | 92 | ||
93 | 93 | ||
94 | static int iwl5000_apm_init(struct iwl_priv *priv) | 94 | int iwl5000_apm_init(struct iwl_priv *priv) |
95 | { | 95 | { |
96 | int ret = 0; | 96 | int ret = 0; |
97 | 97 | ||
@@ -137,7 +137,7 @@ static int iwl5000_apm_init(struct iwl_priv *priv) | |||
137 | } | 137 | } |
138 | 138 | ||
139 | /* FIXME: this is identical to 4965 */ | 139 | /* FIXME: this is identical to 4965 */ |
140 | static void iwl5000_apm_stop(struct iwl_priv *priv) | 140 | void iwl5000_apm_stop(struct iwl_priv *priv) |
141 | { | 141 | { |
142 | unsigned long flags; | 142 | unsigned long flags; |
143 | 143 | ||
@@ -156,7 +156,7 @@ static void iwl5000_apm_stop(struct iwl_priv *priv) | |||
156 | } | 156 | } |
157 | 157 | ||
158 | 158 | ||
159 | static int iwl5000_apm_reset(struct iwl_priv *priv) | 159 | int iwl5000_apm_reset(struct iwl_priv *priv) |
160 | { | 160 | { |
161 | int ret = 0; | 161 | int ret = 0; |
162 | 162 | ||
@@ -198,7 +198,8 @@ out: | |||
198 | } | 198 | } |
199 | 199 | ||
200 | 200 | ||
201 | static void iwl5000_nic_config(struct iwl_priv *priv) | 201 | /* NIC configuration for 5000 series and up */ |
202 | void iwl5000_nic_config(struct iwl_priv *priv) | ||
202 | { | 203 | { |
203 | unsigned long flags; | 204 | unsigned long flags; |
204 | u16 radio_cfg; | 205 | u16 radio_cfg; |
@@ -239,11 +240,11 @@ static void iwl5000_nic_config(struct iwl_priv *priv) | |||
239 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | 240 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, |
240 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | 241 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); |
241 | 242 | ||
243 | |||
242 | spin_unlock_irqrestore(&priv->lock, flags); | 244 | spin_unlock_irqrestore(&priv->lock, flags); |
243 | } | 245 | } |
244 | 246 | ||
245 | 247 | ||
246 | |||
247 | /* | 248 | /* |
248 | * EEPROM | 249 | * EEPROM |
249 | */ | 250 | */ |
@@ -283,7 +284,7 @@ static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address) | |||
283 | return (address & ADDRESS_MSK) + (offset << 1); | 284 | return (address & ADDRESS_MSK) + (offset << 1); |
284 | } | 285 | } |
285 | 286 | ||
286 | static u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv) | 287 | u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv) |
287 | { | 288 | { |
288 | struct iwl_eeprom_calib_hdr { | 289 | struct iwl_eeprom_calib_hdr { |
289 | u8 version; | 290 | u8 version; |
@@ -388,7 +389,7 @@ void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info, | |||
388 | 389 | ||
389 | static struct iwl_sensitivity_ranges iwl5000_sensitivity = { | 390 | static struct iwl_sensitivity_ranges iwl5000_sensitivity = { |
390 | .min_nrg_cck = 95, | 391 | .min_nrg_cck = 95, |
391 | .max_nrg_cck = 0, | 392 | .max_nrg_cck = 0, /* not used, set to 0 */ |
392 | .auto_corr_min_ofdm = 90, | 393 | .auto_corr_min_ofdm = 90, |
393 | .auto_corr_min_ofdm_mrc = 170, | 394 | .auto_corr_min_ofdm_mrc = 170, |
394 | .auto_corr_min_ofdm_x1 = 120, | 395 | .auto_corr_min_ofdm_x1 = 120, |
@@ -407,7 +408,29 @@ static struct iwl_sensitivity_ranges iwl5000_sensitivity = { | |||
407 | .nrg_th_ofdm = 95, | 408 | .nrg_th_ofdm = 95, |
408 | }; | 409 | }; |
409 | 410 | ||
410 | static const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv, | 411 | static struct iwl_sensitivity_ranges iwl5150_sensitivity = { |
412 | .min_nrg_cck = 95, | ||
413 | .max_nrg_cck = 0, /* not used, set to 0 */ | ||
414 | .auto_corr_min_ofdm = 90, | ||
415 | .auto_corr_min_ofdm_mrc = 170, | ||
416 | .auto_corr_min_ofdm_x1 = 105, | ||
417 | .auto_corr_min_ofdm_mrc_x1 = 220, | ||
418 | |||
419 | .auto_corr_max_ofdm = 120, | ||
420 | .auto_corr_max_ofdm_mrc = 210, | ||
421 | /* max = min for performance bug in 5150 DSP */ | ||
422 | .auto_corr_max_ofdm_x1 = 105, | ||
423 | .auto_corr_max_ofdm_mrc_x1 = 220, | ||
424 | |||
425 | .auto_corr_min_cck = 125, | ||
426 | .auto_corr_max_cck = 200, | ||
427 | .auto_corr_min_cck_mrc = 170, | ||
428 | .auto_corr_max_cck_mrc = 400, | ||
429 | .nrg_th_cck = 95, | ||
430 | .nrg_th_ofdm = 95, | ||
431 | }; | ||
432 | |||
433 | const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv, | ||
411 | size_t offset) | 434 | size_t offset) |
412 | { | 435 | { |
413 | u32 address = eeprom_indirect_address(priv, offset); | 436 | u32 address = eeprom_indirect_address(priv, offset); |
@@ -418,7 +441,7 @@ static const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv, | |||
418 | static void iwl5150_set_ct_threshold(struct iwl_priv *priv) | 441 | static void iwl5150_set_ct_threshold(struct iwl_priv *priv) |
419 | { | 442 | { |
420 | const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF; | 443 | const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF; |
421 | s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD) - | 444 | s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) - |
422 | iwl_temp_calib_to_offset(priv); | 445 | iwl_temp_calib_to_offset(priv); |
423 | 446 | ||
424 | priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef; | 447 | priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef; |
@@ -427,7 +450,7 @@ static void iwl5150_set_ct_threshold(struct iwl_priv *priv) | |||
427 | static void iwl5000_set_ct_threshold(struct iwl_priv *priv) | 450 | static void iwl5000_set_ct_threshold(struct iwl_priv *priv) |
428 | { | 451 | { |
429 | /* want Celsius */ | 452 | /* want Celsius */ |
430 | priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD; | 453 | priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY; |
431 | } | 454 | } |
432 | 455 | ||
433 | /* | 456 | /* |
@@ -602,7 +625,7 @@ static int iwl5000_load_given_ucode(struct iwl_priv *priv, | |||
602 | return ret; | 625 | return ret; |
603 | } | 626 | } |
604 | 627 | ||
605 | static int iwl5000_load_ucode(struct iwl_priv *priv) | 628 | int iwl5000_load_ucode(struct iwl_priv *priv) |
606 | { | 629 | { |
607 | int ret = 0; | 630 | int ret = 0; |
608 | 631 | ||
@@ -629,7 +652,7 @@ static int iwl5000_load_ucode(struct iwl_priv *priv) | |||
629 | return ret; | 652 | return ret; |
630 | } | 653 | } |
631 | 654 | ||
632 | static void iwl5000_init_alive_start(struct iwl_priv *priv) | 655 | void iwl5000_init_alive_start(struct iwl_priv *priv) |
633 | { | 656 | { |
634 | int ret = 0; | 657 | int ret = 0; |
635 | 658 | ||
@@ -705,7 +728,7 @@ static int iwl5000_send_wimax_coex(struct iwl_priv *priv) | |||
705 | sizeof(coex_cmd), &coex_cmd); | 728 | sizeof(coex_cmd), &coex_cmd); |
706 | } | 729 | } |
707 | 730 | ||
708 | static int iwl5000_alive_notify(struct iwl_priv *priv) | 731 | int iwl5000_alive_notify(struct iwl_priv *priv) |
709 | { | 732 | { |
710 | u32 a; | 733 | u32 a; |
711 | unsigned long flags; | 734 | unsigned long flags; |
@@ -792,7 +815,7 @@ static int iwl5000_alive_notify(struct iwl_priv *priv) | |||
792 | return 0; | 815 | return 0; |
793 | } | 816 | } |
794 | 817 | ||
795 | static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | 818 | int iwl5000_hw_set_hw_params(struct iwl_priv *priv) |
796 | { | 819 | { |
797 | if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) || | 820 | if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) || |
798 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { | 821 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { |
@@ -826,8 +849,6 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
826 | BIT(IEEE80211_BAND_5GHZ); | 849 | BIT(IEEE80211_BAND_5GHZ); |
827 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | 850 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
828 | 851 | ||
829 | priv->hw_params.sens = &iwl5000_sensitivity; | ||
830 | |||
831 | priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant); | 852 | priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant); |
832 | priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant); | 853 | priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant); |
833 | priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant; | 854 | priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant; |
@@ -836,9 +857,11 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
836 | if (priv->cfg->ops->lib->temp_ops.set_ct_kill) | 857 | if (priv->cfg->ops->lib->temp_ops.set_ct_kill) |
837 | priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); | 858 | priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); |
838 | 859 | ||
860 | /* Set initial sensitivity parameters */ | ||
839 | /* Set initial calibration set */ | 861 | /* Set initial calibration set */ |
840 | switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { | 862 | switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { |
841 | case CSR_HW_REV_TYPE_5150: | 863 | case CSR_HW_REV_TYPE_5150: |
864 | priv->hw_params.sens = &iwl5150_sensitivity; | ||
842 | priv->hw_params.calib_init_cfg = | 865 | priv->hw_params.calib_init_cfg = |
843 | BIT(IWL_CALIB_DC) | | 866 | BIT(IWL_CALIB_DC) | |
844 | BIT(IWL_CALIB_LO) | | 867 | BIT(IWL_CALIB_LO) | |
@@ -847,6 +870,7 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
847 | 870 | ||
848 | break; | 871 | break; |
849 | default: | 872 | default: |
873 | priv->hw_params.sens = &iwl5000_sensitivity; | ||
850 | priv->hw_params.calib_init_cfg = | 874 | priv->hw_params.calib_init_cfg = |
851 | BIT(IWL_CALIB_XTAL) | | 875 | BIT(IWL_CALIB_XTAL) | |
852 | BIT(IWL_CALIB_LO) | | 876 | BIT(IWL_CALIB_LO) | |
@@ -862,7 +886,7 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
862 | /** | 886 | /** |
863 | * iwl5000_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array | 887 | * iwl5000_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array |
864 | */ | 888 | */ |
865 | static void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv, | 889 | void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv, |
866 | struct iwl_tx_queue *txq, | 890 | struct iwl_tx_queue *txq, |
867 | u16 byte_cnt) | 891 | u16 byte_cnt) |
868 | { | 892 | { |
@@ -902,7 +926,7 @@ static void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv, | |||
902 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; | 926 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; |
903 | } | 927 | } |
904 | 928 | ||
905 | static void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv, | 929 | void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv, |
906 | struct iwl_tx_queue *txq) | 930 | struct iwl_tx_queue *txq) |
907 | { | 931 | { |
908 | struct iwl5000_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr; | 932 | struct iwl5000_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr; |
@@ -957,7 +981,7 @@ static void iwl5000_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id) | |||
957 | (1 << IWL50_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); | 981 | (1 << IWL50_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); |
958 | } | 982 | } |
959 | 983 | ||
960 | static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id, | 984 | int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id, |
961 | int tx_fifo, int sta_id, int tid, u16 ssn_idx) | 985 | int tx_fifo, int sta_id, int tid, u16 ssn_idx) |
962 | { | 986 | { |
963 | unsigned long flags; | 987 | unsigned long flags; |
@@ -1018,7 +1042,7 @@ static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
1018 | return 0; | 1042 | return 0; |
1019 | } | 1043 | } |
1020 | 1044 | ||
1021 | static int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | 1045 | int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, |
1022 | u16 ssn_idx, u8 tx_fifo) | 1046 | u16 ssn_idx, u8 tx_fifo) |
1023 | { | 1047 | { |
1024 | if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || | 1048 | if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || |
@@ -1061,7 +1085,7 @@ u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data) | |||
1061 | * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask | 1085 | * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask |
1062 | * must be called under priv->lock and mac access | 1086 | * must be called under priv->lock and mac access |
1063 | */ | 1087 | */ |
1064 | static void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask) | 1088 | void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask) |
1065 | { | 1089 | { |
1066 | iwl_write_prph(priv, IWL50_SCD_TXFACT, mask); | 1090 | iwl_write_prph(priv, IWL50_SCD_TXFACT, mask); |
1067 | } | 1091 | } |
@@ -1282,13 +1306,13 @@ u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len) | |||
1282 | return len; | 1306 | return len; |
1283 | } | 1307 | } |
1284 | 1308 | ||
1285 | static void iwl5000_setup_deferred_work(struct iwl_priv *priv) | 1309 | void iwl5000_setup_deferred_work(struct iwl_priv *priv) |
1286 | { | 1310 | { |
1287 | /* in 5000 the tx power calibration is done in uCode */ | 1311 | /* in 5000 the tx power calibration is done in uCode */ |
1288 | priv->disable_tx_power_cal = 1; | 1312 | priv->disable_tx_power_cal = 1; |
1289 | } | 1313 | } |
1290 | 1314 | ||
1291 | static void iwl5000_rx_handler_setup(struct iwl_priv *priv) | 1315 | void iwl5000_rx_handler_setup(struct iwl_priv *priv) |
1292 | { | 1316 | { |
1293 | /* init calibration handlers */ | 1317 | /* init calibration handlers */ |
1294 | priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] = | 1318 | priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] = |
@@ -1299,7 +1323,7 @@ static void iwl5000_rx_handler_setup(struct iwl_priv *priv) | |||
1299 | } | 1323 | } |
1300 | 1324 | ||
1301 | 1325 | ||
1302 | static int iwl5000_hw_valid_rtc_data_addr(u32 addr) | 1326 | int iwl5000_hw_valid_rtc_data_addr(u32 addr) |
1303 | { | 1327 | { |
1304 | return (addr >= IWL50_RTC_DATA_LOWER_BOUND) && | 1328 | return (addr >= IWL50_RTC_DATA_LOWER_BOUND) && |
1305 | (addr < IWL50_RTC_DATA_UPPER_BOUND); | 1329 | (addr < IWL50_RTC_DATA_UPPER_BOUND); |
@@ -1351,7 +1375,7 @@ static int iwl5000_send_rxon_assoc(struct iwl_priv *priv) | |||
1351 | 1375 | ||
1352 | return ret; | 1376 | return ret; |
1353 | } | 1377 | } |
1354 | static int iwl5000_send_tx_power(struct iwl_priv *priv) | 1378 | int iwl5000_send_tx_power(struct iwl_priv *priv) |
1355 | { | 1379 | { |
1356 | struct iwl5000_tx_power_dbm_cmd tx_power_cmd; | 1380 | struct iwl5000_tx_power_dbm_cmd tx_power_cmd; |
1357 | u8 tx_ant_cfg_cmd; | 1381 | u8 tx_ant_cfg_cmd; |
@@ -1371,10 +1395,11 @@ static int iwl5000_send_tx_power(struct iwl_priv *priv) | |||
1371 | NULL); | 1395 | NULL); |
1372 | } | 1396 | } |
1373 | 1397 | ||
1374 | static void iwl5000_temperature(struct iwl_priv *priv) | 1398 | void iwl5000_temperature(struct iwl_priv *priv) |
1375 | { | 1399 | { |
1376 | /* store temperature from statistics (in Celsius) */ | 1400 | /* store temperature from statistics (in Celsius) */ |
1377 | priv->temperature = le32_to_cpu(priv->statistics.general.temperature); | 1401 | priv->temperature = le32_to_cpu(priv->statistics.general.temperature); |
1402 | iwl_tt_handler(priv); | ||
1378 | } | 1403 | } |
1379 | 1404 | ||
1380 | static void iwl5150_temperature(struct iwl_priv *priv) | 1405 | static void iwl5150_temperature(struct iwl_priv *priv) |
@@ -1426,6 +1451,44 @@ int iwl5000_calc_rssi(struct iwl_priv *priv, | |||
1426 | return max_rssi - agc - IWL49_RSSI_OFFSET; | 1451 | return max_rssi - agc - IWL49_RSSI_OFFSET; |
1427 | } | 1452 | } |
1428 | 1453 | ||
1454 | #define IWL5000_UCODE_GET(item) \ | ||
1455 | static u32 iwl5000_ucode_get_##item(const struct iwl_ucode_header *ucode,\ | ||
1456 | u32 api_ver) \ | ||
1457 | { \ | ||
1458 | if (api_ver <= 2) \ | ||
1459 | return le32_to_cpu(ucode->u.v1.item); \ | ||
1460 | return le32_to_cpu(ucode->u.v2.item); \ | ||
1461 | } | ||
1462 | |||
1463 | static u32 iwl5000_ucode_get_header_size(u32 api_ver) | ||
1464 | { | ||
1465 | if (api_ver <= 2) | ||
1466 | return UCODE_HEADER_SIZE(1); | ||
1467 | return UCODE_HEADER_SIZE(2); | ||
1468 | } | ||
1469 | |||
1470 | static u32 iwl5000_ucode_get_build(const struct iwl_ucode_header *ucode, | ||
1471 | u32 api_ver) | ||
1472 | { | ||
1473 | if (api_ver <= 2) | ||
1474 | return 0; | ||
1475 | return le32_to_cpu(ucode->u.v2.build); | ||
1476 | } | ||
1477 | |||
1478 | static u8 *iwl5000_ucode_get_data(const struct iwl_ucode_header *ucode, | ||
1479 | u32 api_ver) | ||
1480 | { | ||
1481 | if (api_ver <= 2) | ||
1482 | return (u8 *) ucode->u.v1.data; | ||
1483 | return (u8 *) ucode->u.v2.data; | ||
1484 | } | ||
1485 | |||
1486 | IWL5000_UCODE_GET(inst_size); | ||
1487 | IWL5000_UCODE_GET(data_size); | ||
1488 | IWL5000_UCODE_GET(init_size); | ||
1489 | IWL5000_UCODE_GET(init_data_size); | ||
1490 | IWL5000_UCODE_GET(boot_size); | ||
1491 | |||
1429 | struct iwl_hcmd_ops iwl5000_hcmd = { | 1492 | struct iwl_hcmd_ops iwl5000_hcmd = { |
1430 | .rxon_assoc = iwl5000_send_rxon_assoc, | 1493 | .rxon_assoc = iwl5000_send_rxon_assoc, |
1431 | .commit_rxon = iwl_commit_rxon, | 1494 | .commit_rxon = iwl_commit_rxon, |
@@ -1441,6 +1504,17 @@ struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = { | |||
1441 | .calc_rssi = iwl5000_calc_rssi, | 1504 | .calc_rssi = iwl5000_calc_rssi, |
1442 | }; | 1505 | }; |
1443 | 1506 | ||
1507 | struct iwl_ucode_ops iwl5000_ucode = { | ||
1508 | .get_header_size = iwl5000_ucode_get_header_size, | ||
1509 | .get_build = iwl5000_ucode_get_build, | ||
1510 | .get_inst_size = iwl5000_ucode_get_inst_size, | ||
1511 | .get_data_size = iwl5000_ucode_get_data_size, | ||
1512 | .get_init_size = iwl5000_ucode_get_init_size, | ||
1513 | .get_init_data_size = iwl5000_ucode_get_init_data_size, | ||
1514 | .get_boot_size = iwl5000_ucode_get_boot_size, | ||
1515 | .get_data = iwl5000_ucode_get_data, | ||
1516 | }; | ||
1517 | |||
1444 | struct iwl_lib_ops iwl5000_lib = { | 1518 | struct iwl_lib_ops iwl5000_lib = { |
1445 | .set_hw_params = iwl5000_hw_set_hw_params, | 1519 | .set_hw_params = iwl5000_hw_set_hw_params, |
1446 | .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl, | 1520 | .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl, |
@@ -1542,12 +1616,14 @@ static struct iwl_lib_ops iwl5150_lib = { | |||
1542 | }; | 1616 | }; |
1543 | 1617 | ||
1544 | struct iwl_ops iwl5000_ops = { | 1618 | struct iwl_ops iwl5000_ops = { |
1619 | .ucode = &iwl5000_ucode, | ||
1545 | .lib = &iwl5000_lib, | 1620 | .lib = &iwl5000_lib, |
1546 | .hcmd = &iwl5000_hcmd, | 1621 | .hcmd = &iwl5000_hcmd, |
1547 | .utils = &iwl5000_hcmd_utils, | 1622 | .utils = &iwl5000_hcmd_utils, |
1548 | }; | 1623 | }; |
1549 | 1624 | ||
1550 | static struct iwl_ops iwl5150_ops = { | 1625 | static struct iwl_ops iwl5150_ops = { |
1626 | .ucode = &iwl5000_ucode, | ||
1551 | .lib = &iwl5150_lib, | 1627 | .lib = &iwl5150_lib, |
1552 | .hcmd = &iwl5000_hcmd, | 1628 | .hcmd = &iwl5000_hcmd, |
1553 | .utils = &iwl5000_hcmd_utils, | 1629 | .utils = &iwl5000_hcmd_utils, |
@@ -1664,8 +1740,6 @@ MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX)); | |||
1664 | module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444); | 1740 | module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444); |
1665 | MODULE_PARM_DESC(swcrypto50, | 1741 | MODULE_PARM_DESC(swcrypto50, |
1666 | "using software crypto engine (default 0 [hardware])\n"); | 1742 | "using software crypto engine (default 0 [hardware])\n"); |
1667 | module_param_named(debug50, iwl50_mod_params.debug, uint, 0444); | ||
1668 | MODULE_PARM_DESC(debug50, "50XX debug output mask"); | ||
1669 | module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, 0444); | 1743 | module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, 0444); |
1670 | MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series"); | 1744 | MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series"); |
1671 | module_param_named(11n_disable50, iwl50_mod_params.disable_11n, int, 0444); | 1745 | module_param_named(11n_disable50, iwl50_mod_params.disable_11n, int, 0444); |