diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-4965.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-4965.c | 88 |
1 files changed, 23 insertions, 65 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index a98ff4ead720..a0b29411a4b3 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -163,10 +163,6 @@ static int iwl4965_load_bsm(struct iwl_priv *priv) | |||
163 | inst_len = priv->ucode_init.len; | 163 | inst_len = priv->ucode_init.len; |
164 | data_len = priv->ucode_init_data.len; | 164 | data_len = priv->ucode_init_data.len; |
165 | 165 | ||
166 | ret = iwl_grab_nic_access(priv); | ||
167 | if (ret) | ||
168 | return ret; | ||
169 | |||
170 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); | 166 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
171 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | 167 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); |
172 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | 168 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); |
@@ -179,10 +175,8 @@ static int iwl4965_load_bsm(struct iwl_priv *priv) | |||
179 | _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image)); | 175 | _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image)); |
180 | 176 | ||
181 | ret = iwl4965_verify_bsm(priv); | 177 | ret = iwl4965_verify_bsm(priv); |
182 | if (ret) { | 178 | if (ret) |
183 | iwl_release_nic_access(priv); | ||
184 | return ret; | 179 | return ret; |
185 | } | ||
186 | 180 | ||
187 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | 181 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ |
188 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); | 182 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
@@ -211,7 +205,6 @@ static int iwl4965_load_bsm(struct iwl_priv *priv) | |||
211 | * (e.g. when powering back up after power-save shutdown) */ | 205 | * (e.g. when powering back up after power-save shutdown) */ |
212 | iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); | 206 | iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); |
213 | 207 | ||
214 | iwl_release_nic_access(priv); | ||
215 | 208 | ||
216 | return 0; | 209 | return 0; |
217 | } | 210 | } |
@@ -229,20 +222,12 @@ static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) | |||
229 | { | 222 | { |
230 | dma_addr_t pinst; | 223 | dma_addr_t pinst; |
231 | dma_addr_t pdata; | 224 | dma_addr_t pdata; |
232 | unsigned long flags; | ||
233 | int ret = 0; | 225 | int ret = 0; |
234 | 226 | ||
235 | /* bits 35:4 for 4965 */ | 227 | /* bits 35:4 for 4965 */ |
236 | pinst = priv->ucode_code.p_addr >> 4; | 228 | pinst = priv->ucode_code.p_addr >> 4; |
237 | pdata = priv->ucode_data_backup.p_addr >> 4; | 229 | pdata = priv->ucode_data_backup.p_addr >> 4; |
238 | 230 | ||
239 | spin_lock_irqsave(&priv->lock, flags); | ||
240 | ret = iwl_grab_nic_access(priv); | ||
241 | if (ret) { | ||
242 | spin_unlock_irqrestore(&priv->lock, flags); | ||
243 | return ret; | ||
244 | } | ||
245 | |||
246 | /* Tell bootstrap uCode where to find image to load */ | 231 | /* Tell bootstrap uCode where to find image to load */ |
247 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); | 232 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
248 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | 233 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); |
@@ -253,10 +238,6 @@ static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) | |||
253 | * that all new ptr/size info is in place */ | 238 | * that all new ptr/size info is in place */ |
254 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, | 239 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
255 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); | 240 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
256 | iwl_release_nic_access(priv); | ||
257 | |||
258 | spin_unlock_irqrestore(&priv->lock, flags); | ||
259 | |||
260 | IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); | 241 | IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); |
261 | 242 | ||
262 | return ret; | 243 | return ret; |
@@ -312,10 +293,12 @@ restart: | |||
312 | queue_work(priv->workqueue, &priv->restart); | 293 | queue_work(priv->workqueue, &priv->restart); |
313 | } | 294 | } |
314 | 295 | ||
315 | static int is_fat_channel(__le32 rxon_flags) | 296 | static bool is_fat_channel(__le32 rxon_flags) |
316 | { | 297 | { |
317 | return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) || | 298 | int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) |
318 | (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK); | 299 | >> RXON_FLG_CHANNEL_MODE_POS; |
300 | return ((chan_mod == CHANNEL_MODE_PURE_40) || | ||
301 | (chan_mod == CHANNEL_MODE_MIXED)); | ||
319 | } | 302 | } |
320 | 303 | ||
321 | /* | 304 | /* |
@@ -358,10 +341,6 @@ static int iwl4965_apm_init(struct iwl_priv *priv) | |||
358 | goto out; | 341 | goto out; |
359 | } | 342 | } |
360 | 343 | ||
361 | ret = iwl_grab_nic_access(priv); | ||
362 | if (ret) | ||
363 | goto out; | ||
364 | |||
365 | /* enable DMA */ | 344 | /* enable DMA */ |
366 | iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT | | 345 | iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT | |
367 | APMG_CLK_VAL_BSM_CLK_RQT); | 346 | APMG_CLK_VAL_BSM_CLK_RQT); |
@@ -372,7 +351,6 @@ static int iwl4965_apm_init(struct iwl_priv *priv) | |||
372 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, | 351 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, |
373 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | 352 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
374 | 353 | ||
375 | iwl_release_nic_access(priv); | ||
376 | out: | 354 | out: |
377 | return ret; | 355 | return ret; |
378 | } | 356 | } |
@@ -454,11 +432,9 @@ static void iwl4965_apm_stop(struct iwl_priv *priv) | |||
454 | static int iwl4965_apm_reset(struct iwl_priv *priv) | 432 | static int iwl4965_apm_reset(struct iwl_priv *priv) |
455 | { | 433 | { |
456 | int ret = 0; | 434 | int ret = 0; |
457 | unsigned long flags; | ||
458 | 435 | ||
459 | iwl4965_apm_stop_master(priv); | 436 | iwl4965_apm_stop_master(priv); |
460 | 437 | ||
461 | spin_lock_irqsave(&priv->lock, flags); | ||
462 | 438 | ||
463 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); | 439 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
464 | 440 | ||
@@ -475,9 +451,6 @@ static int iwl4965_apm_reset(struct iwl_priv *priv) | |||
475 | 451 | ||
476 | udelay(10); | 452 | udelay(10); |
477 | 453 | ||
478 | ret = iwl_grab_nic_access(priv); | ||
479 | if (ret) | ||
480 | goto out; | ||
481 | /* Enable DMA and BSM Clock */ | 454 | /* Enable DMA and BSM Clock */ |
482 | iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT | | 455 | iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT | |
483 | APMG_CLK_VAL_BSM_CLK_RQT); | 456 | APMG_CLK_VAL_BSM_CLK_RQT); |
@@ -488,14 +461,10 @@ static int iwl4965_apm_reset(struct iwl_priv *priv) | |||
488 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, | 461 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, |
489 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | 462 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
490 | 463 | ||
491 | iwl_release_nic_access(priv); | ||
492 | |||
493 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | 464 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); |
494 | wake_up_interruptible(&priv->wait_command_queue); | 465 | wake_up_interruptible(&priv->wait_command_queue); |
495 | 466 | ||
496 | out: | 467 | out: |
497 | spin_unlock_irqrestore(&priv->lock, flags); | ||
498 | |||
499 | return ret; | 468 | return ret; |
500 | } | 469 | } |
501 | 470 | ||
@@ -681,18 +650,11 @@ static int iwl4965_alive_notify(struct iwl_priv *priv) | |||
681 | { | 650 | { |
682 | u32 a; | 651 | u32 a; |
683 | unsigned long flags; | 652 | unsigned long flags; |
684 | int ret; | ||
685 | int i, chan; | 653 | int i, chan; |
686 | u32 reg_val; | 654 | u32 reg_val; |
687 | 655 | ||
688 | spin_lock_irqsave(&priv->lock, flags); | 656 | spin_lock_irqsave(&priv->lock, flags); |
689 | 657 | ||
690 | ret = iwl_grab_nic_access(priv); | ||
691 | if (ret) { | ||
692 | spin_unlock_irqrestore(&priv->lock, flags); | ||
693 | return ret; | ||
694 | } | ||
695 | |||
696 | /* Clear 4965's internal Tx Scheduler data base */ | 658 | /* Clear 4965's internal Tx Scheduler data base */ |
697 | priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR); | 659 | priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR); |
698 | a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET; | 660 | a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET; |
@@ -759,10 +721,9 @@ static int iwl4965_alive_notify(struct iwl_priv *priv) | |||
759 | iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); | 721 | iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); |
760 | } | 722 | } |
761 | 723 | ||
762 | iwl_release_nic_access(priv); | ||
763 | spin_unlock_irqrestore(&priv->lock, flags); | 724 | spin_unlock_irqrestore(&priv->lock, flags); |
764 | 725 | ||
765 | return ret; | 726 | return 0; |
766 | } | 727 | } |
767 | 728 | ||
768 | static struct iwl_sensitivity_ranges iwl4965_sensitivity = { | 729 | static struct iwl_sensitivity_ranges iwl4965_sensitivity = { |
@@ -788,6 +749,12 @@ static struct iwl_sensitivity_ranges iwl4965_sensitivity = { | |||
788 | .nrg_th_ofdm = 100, | 749 | .nrg_th_ofdm = 100, |
789 | }; | 750 | }; |
790 | 751 | ||
752 | static void iwl4965_set_ct_threshold(struct iwl_priv *priv) | ||
753 | { | ||
754 | /* want Kelvin */ | ||
755 | priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD); | ||
756 | } | ||
757 | |||
791 | /** | 758 | /** |
792 | * iwl4965_hw_set_hw_params | 759 | * iwl4965_hw_set_hw_params |
793 | * | 760 | * |
@@ -822,7 +789,8 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |||
822 | priv->hw_params.rx_chains_num = 2; | 789 | priv->hw_params.rx_chains_num = 2; |
823 | priv->hw_params.valid_tx_ant = ANT_A | ANT_B; | 790 | priv->hw_params.valid_tx_ant = ANT_A | ANT_B; |
824 | priv->hw_params.valid_rx_ant = ANT_A | ANT_B; | 791 | priv->hw_params.valid_rx_ant = ANT_A | ANT_B; |
825 | priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD); | 792 | if (priv->cfg->ops->lib->temp_ops.set_ct_kill) |
793 | priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); | ||
826 | 794 | ||
827 | priv->hw_params.sens = &iwl4965_sensitivity; | 795 | priv->hw_params.sens = &iwl4965_sensitivity; |
828 | 796 | ||
@@ -1524,7 +1492,7 @@ static int iwl4965_send_tx_power(struct iwl_priv *priv) | |||
1524 | struct iwl4965_txpowertable_cmd cmd = { 0 }; | 1492 | struct iwl4965_txpowertable_cmd cmd = { 0 }; |
1525 | int ret; | 1493 | int ret; |
1526 | u8 band = 0; | 1494 | u8 band = 0; |
1527 | u8 is_fat = 0; | 1495 | bool is_fat = false; |
1528 | u8 ctrl_chan_high = 0; | 1496 | u8 ctrl_chan_high = 0; |
1529 | 1497 | ||
1530 | if (test_bit(STATUS_SCANNING, &priv->status)) { | 1498 | if (test_bit(STATUS_SCANNING, &priv->status)) { |
@@ -1602,7 +1570,7 @@ static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel) | |||
1602 | { | 1570 | { |
1603 | int rc; | 1571 | int rc; |
1604 | u8 band = 0; | 1572 | u8 band = 0; |
1605 | u8 is_fat = 0; | 1573 | bool is_fat = false; |
1606 | u8 ctrl_chan_high = 0; | 1574 | u8 ctrl_chan_high = 0; |
1607 | struct iwl4965_channel_switch_cmd cmd = { 0 }; | 1575 | struct iwl4965_channel_switch_cmd cmd = { 0 }; |
1608 | const struct iwl_channel_info *ch_info; | 1576 | const struct iwl_channel_info *ch_info; |
@@ -1833,8 +1801,6 @@ static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv, | |||
1833 | static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | 1801 | static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, |
1834 | u16 ssn_idx, u8 tx_fifo) | 1802 | u16 ssn_idx, u8 tx_fifo) |
1835 | { | 1803 | { |
1836 | int ret = 0; | ||
1837 | |||
1838 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || | 1804 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || |
1839 | (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { | 1805 | (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { |
1840 | IWL_WARN(priv, | 1806 | IWL_WARN(priv, |
@@ -1844,10 +1810,6 @@ static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | |||
1844 | return -EINVAL; | 1810 | return -EINVAL; |
1845 | } | 1811 | } |
1846 | 1812 | ||
1847 | ret = iwl_grab_nic_access(priv); | ||
1848 | if (ret) | ||
1849 | return ret; | ||
1850 | |||
1851 | iwl4965_tx_queue_stop_scheduler(priv, txq_id); | 1813 | iwl4965_tx_queue_stop_scheduler(priv, txq_id); |
1852 | 1814 | ||
1853 | iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); | 1815 | iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); |
@@ -1861,8 +1823,6 @@ static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | |||
1861 | iwl_txq_ctx_deactivate(priv, txq_id); | 1823 | iwl_txq_ctx_deactivate(priv, txq_id); |
1862 | iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); | 1824 | iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); |
1863 | 1825 | ||
1864 | iwl_release_nic_access(priv); | ||
1865 | |||
1866 | return 0; | 1826 | return 0; |
1867 | } | 1827 | } |
1868 | 1828 | ||
@@ -1904,7 +1864,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
1904 | int tx_fifo, int sta_id, int tid, u16 ssn_idx) | 1864 | int tx_fifo, int sta_id, int tid, u16 ssn_idx) |
1905 | { | 1865 | { |
1906 | unsigned long flags; | 1866 | unsigned long flags; |
1907 | int ret; | ||
1908 | u16 ra_tid; | 1867 | u16 ra_tid; |
1909 | 1868 | ||
1910 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || | 1869 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || |
@@ -1922,11 +1881,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
1922 | iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); | 1881 | iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); |
1923 | 1882 | ||
1924 | spin_lock_irqsave(&priv->lock, flags); | 1883 | spin_lock_irqsave(&priv->lock, flags); |
1925 | ret = iwl_grab_nic_access(priv); | ||
1926 | if (ret) { | ||
1927 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1928 | return ret; | ||
1929 | } | ||
1930 | 1884 | ||
1931 | /* Stop this Tx queue before configuring it */ | 1885 | /* Stop this Tx queue before configuring it */ |
1932 | iwl4965_tx_queue_stop_scheduler(priv, txq_id); | 1886 | iwl4965_tx_queue_stop_scheduler(priv, txq_id); |
@@ -1959,7 +1913,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
1959 | /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ | 1913 | /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ |
1960 | iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); | 1914 | iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); |
1961 | 1915 | ||
1962 | iwl_release_nic_access(priv); | ||
1963 | spin_unlock_irqrestore(&priv->lock, flags); | 1916 | spin_unlock_irqrestore(&priv->lock, flags); |
1964 | 1917 | ||
1965 | return 0; | 1918 | return 0; |
@@ -2331,9 +2284,13 @@ static struct iwl_lib_ops iwl4965_lib = { | |||
2331 | }, | 2284 | }, |
2332 | .send_tx_power = iwl4965_send_tx_power, | 2285 | .send_tx_power = iwl4965_send_tx_power, |
2333 | .update_chain_flags = iwl_update_chain_flags, | 2286 | .update_chain_flags = iwl_update_chain_flags, |
2334 | .temperature = iwl4965_temperature_calib, | ||
2335 | .post_associate = iwl_post_associate, | 2287 | .post_associate = iwl_post_associate, |
2336 | .config_ap = iwl_config_ap, | 2288 | .config_ap = iwl_config_ap, |
2289 | .isr = iwl_isr_legacy, | ||
2290 | .temp_ops = { | ||
2291 | .temperature = iwl4965_temperature_calib, | ||
2292 | .set_ct_kill = iwl4965_set_ct_threshold, | ||
2293 | }, | ||
2337 | }; | 2294 | }; |
2338 | 2295 | ||
2339 | static struct iwl_ops iwl4965_ops = { | 2296 | static struct iwl_ops iwl4965_ops = { |
@@ -2354,6 +2311,7 @@ struct iwl_cfg iwl4965_agn_cfg = { | |||
2354 | .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, | 2311 | .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, |
2355 | .ops = &iwl4965_ops, | 2312 | .ops = &iwl4965_ops, |
2356 | .mod_params = &iwl4965_mod_params, | 2313 | .mod_params = &iwl4965_mod_params, |
2314 | .use_isr_legacy = true | ||
2357 | }; | 2315 | }; |
2358 | 2316 | ||
2359 | /* Module firmware */ | 2317 | /* Module firmware */ |