aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/iwlegacy/iwl-3945.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/iwlegacy/iwl-3945.c')
-rw-r--r--drivers/net/wireless/iwlegacy/iwl-3945.c786
1 files changed, 393 insertions, 393 deletions
diff --git a/drivers/net/wireless/iwlegacy/iwl-3945.c b/drivers/net/wireless/iwlegacy/iwl-3945.c
index 6d1740b051df..c9b5dcf446b4 100644
--- a/drivers/net/wireless/iwlegacy/iwl-3945.c
+++ b/drivers/net/wireless/iwlegacy/iwl-3945.c
@@ -108,7 +108,7 @@ static inline u8 il3945_get_prev_ieee_rate(u8 rate_index)
108 * Use for only special debugging. This function is just a placeholder as-is, 108 * Use for only special debugging. This function is just a placeholder as-is,
109 * you'll need to provide the special bits! ... 109 * you'll need to provide the special bits! ...
110 * ... and set IL_EVT_DISABLE to 1. */ 110 * ... and set IL_EVT_DISABLE to 1. */
111void il3945_disable_events(struct il_priv *priv) 111void il3945_disable_events(struct il_priv *il)
112{ 112{
113 int i; 113 int i;
114 u32 base; /* SRAM address of event log header */ 114 u32 base; /* SRAM address of event log header */
@@ -164,27 +164,27 @@ void il3945_disable_events(struct il_priv *priv)
164 0x00000000, /* 1503 - 1472 */ 164 0x00000000, /* 1503 - 1472 */
165 }; 165 };
166 166
167 base = le32_to_cpu(priv->card_alive.log_event_table_ptr); 167 base = le32_to_cpu(il->card_alive.log_event_table_ptr);
168 if (!il3945_hw_valid_rtc_data_addr(base)) { 168 if (!il3945_hw_valid_rtc_data_addr(base)) {
169 IL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); 169 IL_ERR(il, "Invalid event log pointer 0x%08X\n", base);
170 return; 170 return;
171 } 171 }
172 172
173 disable_ptr = il_read_targ_mem(priv, base + (4 * sizeof(u32))); 173 disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32)));
174 array_size = il_read_targ_mem(priv, base + (5 * sizeof(u32))); 174 array_size = il_read_targ_mem(il, base + (5 * sizeof(u32)));
175 175
176 if (IL_EVT_DISABLE && (array_size == IL_EVT_DISABLE_SIZE)) { 176 if (IL_EVT_DISABLE && (array_size == IL_EVT_DISABLE_SIZE)) {
177 IL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n", 177 IL_DEBUG_INFO(il, "Disabling selected uCode log events at 0x%x\n",
178 disable_ptr); 178 disable_ptr);
179 for (i = 0; i < IL_EVT_DISABLE_SIZE; i++) 179 for (i = 0; i < IL_EVT_DISABLE_SIZE; i++)
180 il_write_targ_mem(priv, 180 il_write_targ_mem(il,
181 disable_ptr + (i * sizeof(u32)), 181 disable_ptr + (i * sizeof(u32)),
182 evt_disable[i]); 182 evt_disable[i]);
183 183
184 } else { 184 } else {
185 IL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n"); 185 IL_DEBUG_INFO(il, "Selected uCode log events may be disabled\n");
186 IL_DEBUG_INFO(priv, " by writing \"1\"s into disable bitmap\n"); 186 IL_DEBUG_INFO(il, " by writing \"1\"s into disable bitmap\n");
187 IL_DEBUG_INFO(priv, " in SRAM at 0x%x, size %d u32s\n", 187 IL_DEBUG_INFO(il, " in SRAM at 0x%x, size %d u32s\n",
188 disable_ptr, array_size); 188 disable_ptr, array_size);
189 } 189 }
190 190
@@ -240,11 +240,11 @@ static inline const char *il3945_get_tx_fail_reason(u32 status)
240 * for A and B mode we need to overright prev 240 * for A and B mode we need to overright prev
241 * value 241 * value
242 */ 242 */
243int il3945_rs_next_rate(struct il_priv *priv, int rate) 243int il3945_rs_next_rate(struct il_priv *il, int rate)
244{ 244{
245 int next_rate = il3945_get_prev_ieee_rate(rate); 245 int next_rate = il3945_get_prev_ieee_rate(rate);
246 246
247 switch (priv->band) { 247 switch (il->band) {
248 case IEEE80211_BAND_5GHZ: 248 case IEEE80211_BAND_5GHZ:
249 if (rate == IL_RATE_12M_INDEX) 249 if (rate == IL_RATE_12M_INDEX)
250 next_rate = IL_RATE_9M_INDEX; 250 next_rate = IL_RATE_9M_INDEX;
@@ -252,8 +252,8 @@ int il3945_rs_next_rate(struct il_priv *priv, int rate)
252 next_rate = IL_RATE_6M_INDEX; 252 next_rate = IL_RATE_6M_INDEX;
253 break; 253 break;
254 case IEEE80211_BAND_2GHZ: 254 case IEEE80211_BAND_2GHZ:
255 if (!(priv->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) && 255 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
256 il_is_associated(priv, IL_RXON_CTX_BSS)) { 256 il_is_associated(il, IL_RXON_CTX_BSS)) {
257 if (rate == IL_RATE_11M_INDEX) 257 if (rate == IL_RATE_11M_INDEX)
258 next_rate = IL_RATE_5M_INDEX; 258 next_rate = IL_RATE_5M_INDEX;
259 } 259 }
@@ -274,10 +274,10 @@ int il3945_rs_next_rate(struct il_priv *priv, int rate)
274 * need to be reclaimed. As result, some free space forms. If there is 274 * need to be reclaimed. As result, some free space forms. If there is
275 * enough free space (> low mark), wake the stack that feeds us. 275 * enough free space (> low mark), wake the stack that feeds us.
276 */ 276 */
277static void il3945_tx_queue_reclaim(struct il_priv *priv, 277static void il3945_tx_queue_reclaim(struct il_priv *il,
278 int txq_id, int index) 278 int txq_id, int index)
279{ 279{
280 struct il_tx_queue *txq = &priv->txq[txq_id]; 280 struct il_tx_queue *txq = &il->txq[txq_id];
281 struct il_queue *q = &txq->q; 281 struct il_queue *q = &txq->q;
282 struct il_tx_info *tx_info; 282 struct il_tx_info *tx_info;
283 283
@@ -288,28 +288,28 @@ static void il3945_tx_queue_reclaim(struct il_priv *priv,
288 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { 288 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
289 289
290 tx_info = &txq->txb[txq->q.read_ptr]; 290 tx_info = &txq->txb[txq->q.read_ptr];
291 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb); 291 ieee80211_tx_status_irqsafe(il->hw, tx_info->skb);
292 tx_info->skb = NULL; 292 tx_info->skb = NULL;
293 priv->cfg->ops->lib->txq_free_tfd(priv, txq); 293 il->cfg->ops->lib->txq_free_tfd(il, txq);
294 } 294 }
295 295
296 if (il_queue_space(q) > q->low_mark && (txq_id >= 0) && 296 if (il_queue_space(q) > q->low_mark && (txq_id >= 0) &&
297 (txq_id != IWL39_CMD_QUEUE_NUM) && 297 (txq_id != IWL39_CMD_QUEUE_NUM) &&
298 priv->mac80211_registered) 298 il->mac80211_registered)
299 il_wake_queue(priv, txq); 299 il_wake_queue(il, txq);
300} 300}
301 301
302/** 302/**
303 * il3945_rx_reply_tx - Handle Tx response 303 * il3945_rx_reply_tx - Handle Tx response
304 */ 304 */
305static void il3945_rx_reply_tx(struct il_priv *priv, 305static void il3945_rx_reply_tx(struct il_priv *il,
306 struct il_rx_mem_buffer *rxb) 306 struct il_rx_mem_buffer *rxb)
307{ 307{
308 struct il_rx_packet *pkt = rxb_addr(rxb); 308 struct il_rx_packet *pkt = rxb_addr(rxb);
309 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 309 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
310 int txq_id = SEQ_TO_QUEUE(sequence); 310 int txq_id = SEQ_TO_QUEUE(sequence);
311 int index = SEQ_TO_INDEX(sequence); 311 int index = SEQ_TO_INDEX(sequence);
312 struct il_tx_queue *txq = &priv->txq[txq_id]; 312 struct il_tx_queue *txq = &il->txq[txq_id];
313 struct ieee80211_tx_info *info; 313 struct ieee80211_tx_info *info;
314 struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 314 struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
315 u32 status = le32_to_cpu(tx_resp->status); 315 u32 status = le32_to_cpu(tx_resp->status);
@@ -317,7 +317,7 @@ static void il3945_rx_reply_tx(struct il_priv *priv,
317 int fail; 317 int fail;
318 318
319 if ((index >= txq->q.n_bd) || (il_queue_used(&txq->q, index) == 0)) { 319 if ((index >= txq->q.n_bd) || (il_queue_used(&txq->q, index) == 0)) {
320 IL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " 320 IL_ERR(il, "Read index for DMA queue txq_id (%d) index %d "
321 "is out of range [0-%d] %d %d\n", txq_id, 321 "is out of range [0-%d] %d %d\n", txq_id,
322 index, txq->q.n_bd, txq->q.write_ptr, 322 index, txq->q.n_bd, txq->q.write_ptr,
323 txq->q.read_ptr); 323 txq->q.read_ptr);
@@ -342,15 +342,15 @@ static void il3945_rx_reply_tx(struct il_priv *priv,
342 info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ? 342 info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
343 IEEE80211_TX_STAT_ACK : 0; 343 IEEE80211_TX_STAT_ACK : 0;
344 344
345 IL_DEBUG_TX(priv, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n", 345 IL_DEBUG_TX(il, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
346 txq_id, il3945_get_tx_fail_reason(status), status, 346 txq_id, il3945_get_tx_fail_reason(status), status,
347 tx_resp->rate, tx_resp->failure_frame); 347 tx_resp->rate, tx_resp->failure_frame);
348 348
349 IL_DEBUG_TX_REPLY(priv, "Tx queue reclaim %d\n", index); 349 IL_DEBUG_TX_REPLY(il, "Tx queue reclaim %d\n", index);
350 il3945_tx_queue_reclaim(priv, txq_id, index); 350 il3945_tx_queue_reclaim(il, txq_id, index);
351 351
352 if (status & TX_ABORT_REQUIRED_MSK) 352 if (status & TX_ABORT_REQUIRED_MSK)
353 IL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); 353 IL_ERR(il, "TODO: Implement Tx ABORT REQUIRED!!!\n");
354} 354}
355 355
356 356
@@ -363,7 +363,7 @@ static void il3945_rx_reply_tx(struct il_priv *priv,
363 * 363 *
364 *****************************************************************************/ 364 *****************************************************************************/
365#ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS 365#ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
366static void il3945_accumulative_statistics(struct il_priv *priv, 366static void il3945_accumulative_statistics(struct il_priv *il,
367 __le32 *stats) 367 __le32 *stats)
368{ 368{
369 int i; 369 int i;
@@ -371,10 +371,10 @@ static void il3945_accumulative_statistics(struct il_priv *priv,
371 u32 *accum_stats; 371 u32 *accum_stats;
372 u32 *delta, *max_delta; 372 u32 *delta, *max_delta;
373 373
374 prev_stats = (__le32 *)&priv->_3945.statistics; 374 prev_stats = (__le32 *)&il->_3945.statistics;
375 accum_stats = (u32 *)&priv->_3945.accum_statistics; 375 accum_stats = (u32 *)&il->_3945.accum_statistics;
376 delta = (u32 *)&priv->_3945.delta_statistics; 376 delta = (u32 *)&il->_3945.delta_statistics;
377 max_delta = (u32 *)&priv->_3945.max_delta; 377 max_delta = (u32 *)&il->_3945.max_delta;
378 378
379 for (i = sizeof(__le32); i < sizeof(struct il3945_notif_statistics); 379 for (i = sizeof(__le32); i < sizeof(struct il3945_notif_statistics);
380 i += sizeof(__le32), stats++, prev_stats++, delta++, 380 i += sizeof(__le32), stats++, prev_stats++, delta++,
@@ -389,29 +389,29 @@ static void il3945_accumulative_statistics(struct il_priv *priv,
389 } 389 }
390 390
391 /* reset accumulative statistics for "no-counter" type statistics */ 391 /* reset accumulative statistics for "no-counter" type statistics */
392 priv->_3945.accum_statistics.general.temperature = 392 il->_3945.accum_statistics.general.temperature =
393 priv->_3945.statistics.general.temperature; 393 il->_3945.statistics.general.temperature;
394 priv->_3945.accum_statistics.general.ttl_timestamp = 394 il->_3945.accum_statistics.general.ttl_timestamp =
395 priv->_3945.statistics.general.ttl_timestamp; 395 il->_3945.statistics.general.ttl_timestamp;
396} 396}
397#endif 397#endif
398 398
399void il3945_hw_rx_statistics(struct il_priv *priv, 399void il3945_hw_rx_statistics(struct il_priv *il,
400 struct il_rx_mem_buffer *rxb) 400 struct il_rx_mem_buffer *rxb)
401{ 401{
402 struct il_rx_packet *pkt = rxb_addr(rxb); 402 struct il_rx_packet *pkt = rxb_addr(rxb);
403 403
404 IL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n", 404 IL_DEBUG_RX(il, "Statistics notification received (%d vs %d).\n",
405 (int)sizeof(struct il3945_notif_statistics), 405 (int)sizeof(struct il3945_notif_statistics),
406 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK); 406 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
407#ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS 407#ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
408 il3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw); 408 il3945_accumulative_statistics(il, (__le32 *)&pkt->u.raw);
409#endif 409#endif
410 410
411 memcpy(&priv->_3945.statistics, pkt->u.raw, sizeof(priv->_3945.statistics)); 411 memcpy(&il->_3945.statistics, pkt->u.raw, sizeof(il->_3945.statistics));
412} 412}
413 413
414void il3945_reply_statistics(struct il_priv *priv, 414void il3945_reply_statistics(struct il_priv *il,
415 struct il_rx_mem_buffer *rxb) 415 struct il_rx_mem_buffer *rxb)
416{ 416{
417 struct il_rx_packet *pkt = rxb_addr(rxb); 417 struct il_rx_packet *pkt = rxb_addr(rxb);
@@ -419,16 +419,16 @@ void il3945_reply_statistics(struct il_priv *priv,
419 419
420 if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) { 420 if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) {
421#ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS 421#ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
422 memset(&priv->_3945.accum_statistics, 0, 422 memset(&il->_3945.accum_statistics, 0,
423 sizeof(struct il3945_notif_statistics)); 423 sizeof(struct il3945_notif_statistics));
424 memset(&priv->_3945.delta_statistics, 0, 424 memset(&il->_3945.delta_statistics, 0,
425 sizeof(struct il3945_notif_statistics)); 425 sizeof(struct il3945_notif_statistics));
426 memset(&priv->_3945.max_delta, 0, 426 memset(&il->_3945.max_delta, 0,
427 sizeof(struct il3945_notif_statistics)); 427 sizeof(struct il3945_notif_statistics));
428#endif 428#endif
429 IL_DEBUG_RX(priv, "Statistics have been cleared\n"); 429 IL_DEBUG_RX(il, "Statistics have been cleared\n");
430 } 430 }
431 il3945_hw_rx_statistics(priv, rxb); 431 il3945_hw_rx_statistics(il, rxb);
432} 432}
433 433
434 434
@@ -439,24 +439,24 @@ void il3945_reply_statistics(struct il_priv *priv,
439 ******************************************************************************/ 439 ******************************************************************************/
440 440
441/* This is necessary only for a number of statistics, see the caller. */ 441/* This is necessary only for a number of statistics, see the caller. */
442static int il3945_is_network_packet(struct il_priv *priv, 442static int il3945_is_network_packet(struct il_priv *il,
443 struct ieee80211_hdr *header) 443 struct ieee80211_hdr *header)
444{ 444{
445 /* Filter incoming packets to determine if they are targeted toward 445 /* Filter incoming packets to determine if they are targeted toward
446 * this network, discarding packets coming from ourselves */ 446 * this network, discarding packets coming from ourselves */
447 switch (priv->iw_mode) { 447 switch (il->iw_mode) {
448 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */ 448 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
449 /* packets to our IBSS update information */ 449 /* packets to our IBSS update information */
450 return !compare_ether_addr(header->addr3, priv->bssid); 450 return !compare_ether_addr(header->addr3, il->bssid);
451 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */ 451 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
452 /* packets to our IBSS update information */ 452 /* packets to our IBSS update information */
453 return !compare_ether_addr(header->addr2, priv->bssid); 453 return !compare_ether_addr(header->addr2, il->bssid);
454 default: 454 default:
455 return 1; 455 return 1;
456 } 456 }
457} 457}
458 458
459static void il3945_pass_packet_to_mac80211(struct il_priv *priv, 459static void il3945_pass_packet_to_mac80211(struct il_priv *il,
460 struct il_rx_mem_buffer *rxb, 460 struct il_rx_mem_buffer *rxb,
461 struct ieee80211_rx_status *stats) 461 struct ieee80211_rx_status *stats)
462{ 462{
@@ -470,43 +470,43 @@ static void il3945_pass_packet_to_mac80211(struct il_priv *priv,
470 470
471 /* We received data from the HW, so stop the watchdog */ 471 /* We received data from the HW, so stop the watchdog */
472 if (unlikely(len + IWL39_RX_FRAME_SIZE > 472 if (unlikely(len + IWL39_RX_FRAME_SIZE >
473 PAGE_SIZE << priv->hw_params.rx_page_order)) { 473 PAGE_SIZE << il->hw_params.rx_page_order)) {
474 IL_DEBUG_DROP(priv, "Corruption detected!\n"); 474 IL_DEBUG_DROP(il, "Corruption detected!\n");
475 return; 475 return;
476 } 476 }
477 477
478 /* We only process data packets if the interface is open */ 478 /* We only process data packets if the interface is open */
479 if (unlikely(!priv->is_open)) { 479 if (unlikely(!il->is_open)) {
480 IL_DEBUG_DROP_LIMIT(priv, 480 IL_DEBUG_DROP_LIMIT(il,
481 "Dropping packet while interface is not open.\n"); 481 "Dropping packet while interface is not open.\n");
482 return; 482 return;
483 } 483 }
484 484
485 skb = dev_alloc_skb(128); 485 skb = dev_alloc_skb(128);
486 if (!skb) { 486 if (!skb) {
487 IL_ERR(priv, "dev_alloc_skb failed\n"); 487 IL_ERR(il, "dev_alloc_skb failed\n");
488 return; 488 return;
489 } 489 }
490 490
491 if (!il3945_mod_params.sw_crypto) 491 if (!il3945_mod_params.sw_crypto)
492 il_set_decrypted_flag(priv, 492 il_set_decrypted_flag(il,
493 (struct ieee80211_hdr *)rxb_addr(rxb), 493 (struct ieee80211_hdr *)rxb_addr(rxb),
494 le32_to_cpu(rx_end->status), stats); 494 le32_to_cpu(rx_end->status), stats);
495 495
496 skb_add_rx_frag(skb, 0, rxb->page, 496 skb_add_rx_frag(skb, 0, rxb->page,
497 (void *)rx_hdr->payload - (void *)pkt, len); 497 (void *)rx_hdr->payload - (void *)pkt, len);
498 498
499 il_update_stats(priv, false, fc, len); 499 il_update_stats(il, false, fc, len);
500 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats)); 500 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
501 501
502 ieee80211_rx(priv->hw, skb); 502 ieee80211_rx(il->hw, skb);
503 priv->alloc_rxb_page--; 503 il->alloc_rxb_page--;
504 rxb->page = NULL; 504 rxb->page = NULL;
505} 505}
506 506
507#define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) 507#define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
508 508
509static void il3945_rx_reply_rx(struct il_priv *priv, 509static void il3945_rx_reply_rx(struct il_priv *il,
510 struct il_rx_mem_buffer *rxb) 510 struct il_rx_mem_buffer *rxb)
511{ 511{
512 struct ieee80211_hdr *header; 512 struct ieee80211_hdr *header;
@@ -539,14 +539,14 @@ static void il3945_rx_reply_rx(struct il_priv *priv,
539 rx_status.flag |= RX_FLAG_SHORTPRE; 539 rx_status.flag |= RX_FLAG_SHORTPRE;
540 540
541 if ((unlikely(rx_stats->phy_count > 20))) { 541 if ((unlikely(rx_stats->phy_count > 20))) {
542 IL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n", 542 IL_DEBUG_DROP(il, "dsp size out of range [0,20]: %d/n",
543 rx_stats->phy_count); 543 rx_stats->phy_count);
544 return; 544 return;
545 } 545 }
546 546
547 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR) 547 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
548 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) { 548 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
549 IL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n", rx_end->status); 549 IL_DEBUG_RX(il, "Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
550 return; 550 return;
551 } 551 }
552 552
@@ -555,34 +555,34 @@ static void il3945_rx_reply_rx(struct il_priv *priv,
555 /* Convert 3945's rssi indicator to dBm */ 555 /* Convert 3945's rssi indicator to dBm */
556 rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET; 556 rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET;
557 557
558 IL_DEBUG_STATS(priv, "Rssi %d sig_avg %d noise_diff %d\n", 558 IL_DEBUG_STATS(il, "Rssi %d sig_avg %d noise_diff %d\n",
559 rx_status.signal, rx_stats_sig_avg, 559 rx_status.signal, rx_stats_sig_avg,
560 rx_stats_noise_diff); 560 rx_stats_noise_diff);
561 561
562 header = (struct ieee80211_hdr *)IL_RX_DATA(pkt); 562 header = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
563 563
564 network_packet = il3945_is_network_packet(priv, header); 564 network_packet = il3945_is_network_packet(il, header);
565 565
566 IL_DEBUG_STATS_LIMIT(priv, "[%c] %d RSSI:%d Signal:%u, Rate:%u\n", 566 IL_DEBUG_STATS_LIMIT(il, "[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
567 network_packet ? '*' : ' ', 567 network_packet ? '*' : ' ',
568 le16_to_cpu(rx_hdr->channel), 568 le16_to_cpu(rx_hdr->channel),
569 rx_status.signal, rx_status.signal, 569 rx_status.signal, rx_status.signal,
570 rx_status.rate_idx); 570 rx_status.rate_idx);
571 571
572 il_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len), 572 il_dbg_log_rx_data_frame(il, le16_to_cpu(rx_hdr->len),
573 header); 573 header);
574 574
575 if (network_packet) { 575 if (network_packet) {
576 priv->_3945.last_beacon_time = 576 il->_3945.last_beacon_time =
577 le32_to_cpu(rx_end->beacon_timestamp); 577 le32_to_cpu(rx_end->beacon_timestamp);
578 priv->_3945.last_tsf = le64_to_cpu(rx_end->timestamp); 578 il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
579 priv->_3945.last_rx_rssi = rx_status.signal; 579 il->_3945.last_rx_rssi = rx_status.signal;
580 } 580 }
581 581
582 il3945_pass_packet_to_mac80211(priv, rxb, &rx_status); 582 il3945_pass_packet_to_mac80211(il, rxb, &rx_status);
583} 583}
584 584
585int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *priv, 585int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il,
586 struct il_tx_queue *txq, 586 struct il_tx_queue *txq,
587 dma_addr_t addr, u16 len, u8 reset, u8 pad) 587 dma_addr_t addr, u16 len, u8 reset, u8 pad)
588{ 588{
@@ -600,7 +600,7 @@ int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *priv,
600 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags)); 600 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
601 601
602 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) { 602 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
603 IL_ERR(priv, "Error can not send more than %d chunks\n", 603 IL_ERR(il, "Error can not send more than %d chunks\n",
604 NUM_TFD_CHUNKS); 604 NUM_TFD_CHUNKS);
605 return -EINVAL; 605 return -EINVAL;
606 } 606 }
@@ -621,19 +621,19 @@ int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *priv,
621 * 621 *
622 * Does NOT advance any indexes 622 * Does NOT advance any indexes
623 */ 623 */
624void il3945_hw_txq_free_tfd(struct il_priv *priv, struct il_tx_queue *txq) 624void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
625{ 625{
626 struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds; 626 struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds;
627 int index = txq->q.read_ptr; 627 int index = txq->q.read_ptr;
628 struct il3945_tfd *tfd = &tfd_tmp[index]; 628 struct il3945_tfd *tfd = &tfd_tmp[index];
629 struct pci_dev *dev = priv->pci_dev; 629 struct pci_dev *dev = il->pci_dev;
630 int i; 630 int i;
631 int counter; 631 int counter;
632 632
633 /* sanity check */ 633 /* sanity check */
634 counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags)); 634 counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
635 if (counter > NUM_TFD_CHUNKS) { 635 if (counter > NUM_TFD_CHUNKS) {
636 IL_ERR(priv, "Too many chunks: %i\n", counter); 636 IL_ERR(il, "Too many chunks: %i\n", counter);
637 /* @todo issue fatal error, it is quite serious situation */ 637 /* @todo issue fatal error, it is quite serious situation */
638 return; 638 return;
639 } 639 }
@@ -669,13 +669,13 @@ void il3945_hw_txq_free_tfd(struct il_priv *priv, struct il_tx_queue *txq)
669 * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD: 669 * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
670 * 670 *
671*/ 671*/
672void il3945_hw_build_tx_cmd_rate(struct il_priv *priv, 672void il3945_hw_build_tx_cmd_rate(struct il_priv *il,
673 struct il_device_cmd *cmd, 673 struct il_device_cmd *cmd,
674 struct ieee80211_tx_info *info, 674 struct ieee80211_tx_info *info,
675 struct ieee80211_hdr *hdr, 675 struct ieee80211_hdr *hdr,
676 int sta_id, int tx_id) 676 int sta_id, int tx_id)
677{ 677{
678 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value; 678 u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value;
679 u16 rate_index = min(hw_value & 0xffff, IL_RATE_COUNT_3945); 679 u16 rate_index = min(hw_value & 0xffff, IL_RATE_COUNT_3945);
680 u16 rate_mask; 680 u16 rate_mask;
681 int rate; 681 int rate;
@@ -718,13 +718,13 @@ void il3945_hw_build_tx_cmd_rate(struct il_priv *priv,
718 /* CCK */ 718 /* CCK */
719 tx_cmd->supp_rates[1] = (rate_mask & 0xF); 719 tx_cmd->supp_rates[1] = (rate_mask & 0xF);
720 720
721 IL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X " 721 IL_DEBUG_RATE(il, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
722 "cck/ofdm mask: 0x%x/0x%x\n", sta_id, 722 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
723 tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags), 723 tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
724 tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]); 724 tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
725} 725}
726 726
727static u8 il3945_sync_sta(struct il_priv *priv, int sta_id, u16 tx_rate) 727static u8 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate)
728{ 728{
729 unsigned long flags_spin; 729 unsigned long flags_spin;
730 struct il_station_entry *station; 730 struct il_station_entry *station;
@@ -732,52 +732,52 @@ static u8 il3945_sync_sta(struct il_priv *priv, int sta_id, u16 tx_rate)
732 if (sta_id == IL_INVALID_STATION) 732 if (sta_id == IL_INVALID_STATION)
733 return IL_INVALID_STATION; 733 return IL_INVALID_STATION;
734 734
735 spin_lock_irqsave(&priv->sta_lock, flags_spin); 735 spin_lock_irqsave(&il->sta_lock, flags_spin);
736 station = &priv->stations[sta_id]; 736 station = &il->stations[sta_id];
737 737
738 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK; 738 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
739 station->sta.rate_n_flags = cpu_to_le16(tx_rate); 739 station->sta.rate_n_flags = cpu_to_le16(tx_rate);
740 station->sta.mode = STA_CONTROL_MODIFY_MSK; 740 station->sta.mode = STA_CONTROL_MODIFY_MSK;
741 il_send_add_sta(priv, &station->sta, CMD_ASYNC); 741 il_send_add_sta(il, &station->sta, CMD_ASYNC);
742 spin_unlock_irqrestore(&priv->sta_lock, flags_spin); 742 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
743 743
744 IL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n", 744 IL_DEBUG_RATE(il, "SCALE sync station %d to rate %d\n",
745 sta_id, tx_rate); 745 sta_id, tx_rate);
746 return sta_id; 746 return sta_id;
747} 747}
748 748
749static void il3945_set_pwr_vmain(struct il_priv *priv) 749static void il3945_set_pwr_vmain(struct il_priv *il)
750{ 750{
751/* 751/*
752 * (for documentation purposes) 752 * (for documentation purposes)
753 * to set power to V_AUX, do 753 * to set power to V_AUX, do
754 754
755 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) { 755 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) {
756 il_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 756 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
757 APMG_PS_CTRL_VAL_PWR_SRC_VAUX, 757 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
758 ~APMG_PS_CTRL_MSK_PWR_SRC); 758 ~APMG_PS_CTRL_MSK_PWR_SRC);
759 759
760 il_poll_bit(priv, CSR_GPIO_IN, 760 il_poll_bit(il, CSR_GPIO_IN,
761 CSR_GPIO_IN_VAL_VAUX_PWR_SRC, 761 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
762 CSR_GPIO_IN_BIT_AUX_POWER, 5000); 762 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
763 } 763 }
764 */ 764 */
765 765
766 il_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 766 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
767 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, 767 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
768 ~APMG_PS_CTRL_MSK_PWR_SRC); 768 ~APMG_PS_CTRL_MSK_PWR_SRC);
769 769
770 il_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, 770 il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
771 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */ 771 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
772} 772}
773 773
774static int il3945_rx_init(struct il_priv *priv, struct il_rx_queue *rxq) 774static int il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
775{ 775{
776 il_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->bd_dma); 776 il_write_direct32(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
777 il_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), 777 il_write_direct32(il, FH39_RCSR_RPTR_ADDR(0),
778 rxq->rb_stts_dma); 778 rxq->rb_stts_dma);
779 il_write_direct32(priv, FH39_RCSR_WPTR(0), 0); 779 il_write_direct32(il, FH39_RCSR_WPTR(0), 0);
780 il_write_direct32(priv, FH39_RCSR_CONFIG(0), 780 il_write_direct32(il, FH39_RCSR_CONFIG(0),
781 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE | 781 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
782 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE | 782 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
783 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN | 783 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
@@ -788,32 +788,32 @@ static int il3945_rx_init(struct il_priv *priv, struct il_rx_queue *rxq)
788 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH); 788 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
789 789
790 /* fake read to flush all prev I/O */ 790 /* fake read to flush all prev I/O */
791 il_read_direct32(priv, FH39_RSSR_CTRL); 791 il_read_direct32(il, FH39_RSSR_CTRL);
792 792
793 return 0; 793 return 0;
794} 794}
795 795
796static int il3945_tx_reset(struct il_priv *priv) 796static int il3945_tx_reset(struct il_priv *il)
797{ 797{
798 798
799 /* bypass mode */ 799 /* bypass mode */
800 il_write_prph(priv, ALM_SCD_MODE_REG, 0x2); 800 il_write_prph(il, ALM_SCD_MODE_REG, 0x2);
801 801
802 /* RA 0 is active */ 802 /* RA 0 is active */
803 il_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01); 803 il_write_prph(il, ALM_SCD_ARASTAT_REG, 0x01);
804 804
805 /* all 6 fifo are active */ 805 /* all 6 fifo are active */
806 il_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f); 806 il_write_prph(il, ALM_SCD_TXFACT_REG, 0x3f);
807 807
808 il_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000); 808 il_write_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
809 il_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002); 809 il_write_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
810 il_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004); 810 il_write_prph(il, ALM_SCD_TXF4MF_REG, 0x000004);
811 il_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005); 811 il_write_prph(il, ALM_SCD_TXF5MF_REG, 0x000005);
812 812
813 il_write_direct32(priv, FH39_TSSR_CBB_BASE, 813 il_write_direct32(il, FH39_TSSR_CBB_BASE,
814 priv->_3945.shared_phys); 814 il->_3945.shared_phys);
815 815
816 il_write_direct32(priv, FH39_TSSR_MSG_CONFIG, 816 il_write_direct32(il, FH39_TSSR_MSG_CONFIG,
817 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON | 817 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
818 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON | 818 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
819 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B | 819 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
@@ -831,31 +831,31 @@ static int il3945_tx_reset(struct il_priv *priv)
831 * 831 *
832 * Destroys all DMA structures and initialize them again 832 * Destroys all DMA structures and initialize them again
833 */ 833 */
834static int il3945_txq_ctx_reset(struct il_priv *priv) 834static int il3945_txq_ctx_reset(struct il_priv *il)
835{ 835{
836 int rc; 836 int rc;
837 int txq_id, slots_num; 837 int txq_id, slots_num;
838 838
839 il3945_hw_txq_ctx_free(priv); 839 il3945_hw_txq_ctx_free(il);
840 840
841 /* allocate tx queue structure */ 841 /* allocate tx queue structure */
842 rc = il_alloc_txq_mem(priv); 842 rc = il_alloc_txq_mem(il);
843 if (rc) 843 if (rc)
844 return rc; 844 return rc;
845 845
846 /* Tx CMD queue */ 846 /* Tx CMD queue */
847 rc = il3945_tx_reset(priv); 847 rc = il3945_tx_reset(il);
848 if (rc) 848 if (rc)
849 goto error; 849 goto error;
850 850
851 /* Tx queue(s) */ 851 /* Tx queue(s) */
852 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) { 852 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
853 slots_num = (txq_id == IWL39_CMD_QUEUE_NUM) ? 853 slots_num = (txq_id == IWL39_CMD_QUEUE_NUM) ?
854 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; 854 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
855 rc = il_tx_queue_init(priv, &priv->txq[txq_id], 855 rc = il_tx_queue_init(il, &il->txq[txq_id],
856 slots_num, txq_id); 856 slots_num, txq_id);
857 if (rc) { 857 if (rc) {
858 IL_ERR(priv, "Tx %d queue init failed\n", txq_id); 858 IL_ERR(il, "Tx %d queue init failed\n", txq_id);
859 goto error; 859 goto error;
860 } 860 }
861 } 861 }
@@ -863,7 +863,7 @@ static int il3945_txq_ctx_reset(struct il_priv *priv)
863 return rc; 863 return rc;
864 864
865 error: 865 error:
866 il3945_hw_txq_ctx_free(priv); 866 il3945_hw_txq_ctx_free(il);
867 return rc; 867 return rc;
868} 868}
869 869
@@ -873,127 +873,127 @@ static int il3945_txq_ctx_reset(struct il_priv *priv)
873 * (e.g. after platform boot, or shutdown via il_apm_stop()) 873 * (e.g. after platform boot, or shutdown via il_apm_stop())
874 * NOTE: This does not load uCode nor start the embedded processor 874 * NOTE: This does not load uCode nor start the embedded processor
875 */ 875 */
876static int il3945_apm_init(struct il_priv *priv) 876static int il3945_apm_init(struct il_priv *il)
877{ 877{
878 int ret = il_apm_init(priv); 878 int ret = il_apm_init(il);
879 879
880 /* Clear APMG (NIC's internal power management) interrupts */ 880 /* Clear APMG (NIC's internal power management) interrupts */
881 il_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0); 881 il_write_prph(il, APMG_RTC_INT_MSK_REG, 0x0);
882 il_write_prph(priv, APMG_RTC_INT_STT_REG, 0xFFFFFFFF); 882 il_write_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
883 883
884 /* Reset radio chip */ 884 /* Reset radio chip */
885 il_set_bits_prph(priv, APMG_PS_CTRL_REG, 885 il_set_bits_prph(il, APMG_PS_CTRL_REG,
886 APMG_PS_CTRL_VAL_RESET_REQ); 886 APMG_PS_CTRL_VAL_RESET_REQ);
887 udelay(5); 887 udelay(5);
888 il_clear_bits_prph(priv, APMG_PS_CTRL_REG, 888 il_clear_bits_prph(il, APMG_PS_CTRL_REG,
889 APMG_PS_CTRL_VAL_RESET_REQ); 889 APMG_PS_CTRL_VAL_RESET_REQ);
890 890
891 return ret; 891 return ret;
892} 892}
893 893
894static void il3945_nic_config(struct il_priv *priv) 894static void il3945_nic_config(struct il_priv *il)
895{ 895{
896 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 896 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
897 unsigned long flags; 897 unsigned long flags;
898 u8 rev_id = priv->pci_dev->revision; 898 u8 rev_id = il->pci_dev->revision;
899 899
900 spin_lock_irqsave(&priv->lock, flags); 900 spin_lock_irqsave(&il->lock, flags);
901 901
902 /* Determine HW type */ 902 /* Determine HW type */
903 IL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id); 903 IL_DEBUG_INFO(il, "HW Revision ID = 0x%X\n", rev_id);
904 904
905 if (rev_id & PCI_CFG_REV_ID_BIT_RTP) 905 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
906 IL_DEBUG_INFO(priv, "RTP type\n"); 906 IL_DEBUG_INFO(il, "RTP type\n");
907 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) { 907 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
908 IL_DEBUG_INFO(priv, "3945 RADIO-MB type\n"); 908 IL_DEBUG_INFO(il, "3945 RADIO-MB type\n");
909 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 909 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
910 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB); 910 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
911 } else { 911 } else {
912 IL_DEBUG_INFO(priv, "3945 RADIO-MM type\n"); 912 IL_DEBUG_INFO(il, "3945 RADIO-MM type\n");
913 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 913 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
914 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM); 914 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
915 } 915 }
916 916
917 if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) { 917 if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
918 IL_DEBUG_INFO(priv, "SKU OP mode is mrc\n"); 918 IL_DEBUG_INFO(il, "SKU OP mode is mrc\n");
919 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 919 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
920 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC); 920 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
921 } else 921 } else
922 IL_DEBUG_INFO(priv, "SKU OP mode is basic\n"); 922 IL_DEBUG_INFO(il, "SKU OP mode is basic\n");
923 923
924 if ((eeprom->board_revision & 0xF0) == 0xD0) { 924 if ((eeprom->board_revision & 0xF0) == 0xD0) {
925 IL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n", 925 IL_DEBUG_INFO(il, "3945ABG revision is 0x%X\n",
926 eeprom->board_revision); 926 eeprom->board_revision);
927 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 927 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
928 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); 928 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
929 } else { 929 } else {
930 IL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n", 930 IL_DEBUG_INFO(il, "3945ABG revision is 0x%X\n",
931 eeprom->board_revision); 931 eeprom->board_revision);
932 il_clear_bit(priv, CSR_HW_IF_CONFIG_REG, 932 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
933 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); 933 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
934 } 934 }
935 935
936 if (eeprom->almgor_m_version <= 1) { 936 if (eeprom->almgor_m_version <= 1) {
937 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 937 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
938 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A); 938 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
939 IL_DEBUG_INFO(priv, "Card M type A version is 0x%X\n", 939 IL_DEBUG_INFO(il, "Card M type A version is 0x%X\n",
940 eeprom->almgor_m_version); 940 eeprom->almgor_m_version);
941 } else { 941 } else {
942 IL_DEBUG_INFO(priv, "Card M type B version is 0x%X\n", 942 IL_DEBUG_INFO(il, "Card M type B version is 0x%X\n",
943 eeprom->almgor_m_version); 943 eeprom->almgor_m_version);
944 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 944 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
945 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B); 945 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
946 } 946 }
947 spin_unlock_irqrestore(&priv->lock, flags); 947 spin_unlock_irqrestore(&il->lock, flags);
948 948
949 if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE) 949 if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
950 IL_DEBUG_RF_KILL(priv, "SW RF KILL supported in EEPROM.\n"); 950 IL_DEBUG_RF_KILL(il, "SW RF KILL supported in EEPROM.\n");
951 951
952 if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE) 952 if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
953 IL_DEBUG_RF_KILL(priv, "HW RF KILL supported in EEPROM.\n"); 953 IL_DEBUG_RF_KILL(il, "HW RF KILL supported in EEPROM.\n");
954} 954}
955 955
956int il3945_hw_nic_init(struct il_priv *priv) 956int il3945_hw_nic_init(struct il_priv *il)
957{ 957{
958 int rc; 958 int rc;
959 unsigned long flags; 959 unsigned long flags;
960 struct il_rx_queue *rxq = &priv->rxq; 960 struct il_rx_queue *rxq = &il->rxq;
961 961
962 spin_lock_irqsave(&priv->lock, flags); 962 spin_lock_irqsave(&il->lock, flags);
963 priv->cfg->ops->lib->apm_ops.init(priv); 963 il->cfg->ops->lib->apm_ops.init(il);
964 spin_unlock_irqrestore(&priv->lock, flags); 964 spin_unlock_irqrestore(&il->lock, flags);
965 965
966 il3945_set_pwr_vmain(priv); 966 il3945_set_pwr_vmain(il);
967 967
968 priv->cfg->ops->lib->apm_ops.config(priv); 968 il->cfg->ops->lib->apm_ops.config(il);
969 969
970 /* Allocate the RX queue, or reset if it is already allocated */ 970 /* Allocate the RX queue, or reset if it is already allocated */
971 if (!rxq->bd) { 971 if (!rxq->bd) {
972 rc = il_rx_queue_alloc(priv); 972 rc = il_rx_queue_alloc(il);
973 if (rc) { 973 if (rc) {
974 IL_ERR(priv, "Unable to initialize Rx queue\n"); 974 IL_ERR(il, "Unable to initialize Rx queue\n");
975 return -ENOMEM; 975 return -ENOMEM;
976 } 976 }
977 } else 977 } else
978 il3945_rx_queue_reset(priv, rxq); 978 il3945_rx_queue_reset(il, rxq);
979 979
980 il3945_rx_replenish(priv); 980 il3945_rx_replenish(il);
981 981
982 il3945_rx_init(priv, rxq); 982 il3945_rx_init(il, rxq);
983 983
984 984
985 /* Look at using this instead: 985 /* Look at using this instead:
986 rxq->need_update = 1; 986 rxq->need_update = 1;
987 il_rx_queue_update_write_ptr(priv, rxq); 987 il_rx_queue_update_write_ptr(il, rxq);
988 */ 988 */
989 989
990 il_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7); 990 il_write_direct32(il, FH39_RCSR_WPTR(0), rxq->write & ~7);
991 991
992 rc = il3945_txq_ctx_reset(priv); 992 rc = il3945_txq_ctx_reset(il);
993 if (rc) 993 if (rc)
994 return rc; 994 return rc;
995 995
996 set_bit(STATUS_INIT, &priv->status); 996 set_bit(STATUS_INIT, &il->status);
997 997
998 return 0; 998 return 0;
999} 999}
@@ -1003,40 +1003,40 @@ int il3945_hw_nic_init(struct il_priv *priv)
1003 * 1003 *
1004 * Destroy all TX DMA queues and structures 1004 * Destroy all TX DMA queues and structures
1005 */ 1005 */
1006void il3945_hw_txq_ctx_free(struct il_priv *priv) 1006void il3945_hw_txq_ctx_free(struct il_priv *il)
1007{ 1007{
1008 int txq_id; 1008 int txq_id;
1009 1009
1010 /* Tx queues */ 1010 /* Tx queues */
1011 if (priv->txq) 1011 if (il->txq)
1012 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; 1012 for (txq_id = 0; txq_id < il->hw_params.max_txq_num;
1013 txq_id++) 1013 txq_id++)
1014 if (txq_id == IWL39_CMD_QUEUE_NUM) 1014 if (txq_id == IWL39_CMD_QUEUE_NUM)
1015 il_cmd_queue_free(priv); 1015 il_cmd_queue_free(il);
1016 else 1016 else
1017 il_tx_queue_free(priv, txq_id); 1017 il_tx_queue_free(il, txq_id);
1018 1018
1019 /* free tx queue structure */ 1019 /* free tx queue structure */
1020 il_txq_mem(priv); 1020 il_txq_mem(il);
1021} 1021}
1022 1022
1023void il3945_hw_txq_ctx_stop(struct il_priv *priv) 1023void il3945_hw_txq_ctx_stop(struct il_priv *il)
1024{ 1024{
1025 int txq_id; 1025 int txq_id;
1026 1026
1027 /* stop SCD */ 1027 /* stop SCD */
1028 il_write_prph(priv, ALM_SCD_MODE_REG, 0); 1028 il_write_prph(il, ALM_SCD_MODE_REG, 0);
1029 il_write_prph(priv, ALM_SCD_TXFACT_REG, 0); 1029 il_write_prph(il, ALM_SCD_TXFACT_REG, 0);
1030 1030
1031 /* reset TFD queues */ 1031 /* reset TFD queues */
1032 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) { 1032 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
1033 il_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0); 1033 il_write_direct32(il, FH39_TCSR_CONFIG(txq_id), 0x0);
1034 il_poll_direct_bit(priv, FH39_TSSR_TX_STATUS, 1034 il_poll_direct_bit(il, FH39_TSSR_TX_STATUS,
1035 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id), 1035 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1036 1000); 1036 1000);
1037 } 1037 }
1038 1038
1039 il3945_hw_txq_ctx_free(priv); 1039 il3945_hw_txq_ctx_free(il);
1040} 1040}
1041 1041
1042/** 1042/**
@@ -1056,36 +1056,36 @@ static inline int il3945_hw_reg_temp_out_of_range(int temperature)
1056 return ((temperature < -260) || (temperature > 25)) ? 1 : 0; 1056 return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1057} 1057}
1058 1058
1059int il3945_hw_get_temperature(struct il_priv *priv) 1059int il3945_hw_get_temperature(struct il_priv *il)
1060{ 1060{
1061 return il_read32(priv, CSR_UCODE_DRV_GP2); 1061 return il_read32(il, CSR_UCODE_DRV_GP2);
1062} 1062}
1063 1063
1064/** 1064/**
1065 * il3945_hw_reg_txpower_get_temperature 1065 * il3945_hw_reg_txpower_get_temperature
1066 * get the current temperature by reading from NIC 1066 * get the current temperature by reading from NIC
1067*/ 1067*/
1068static int il3945_hw_reg_txpower_get_temperature(struct il_priv *priv) 1068static int il3945_hw_reg_txpower_get_temperature(struct il_priv *il)
1069{ 1069{
1070 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 1070 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1071 int temperature; 1071 int temperature;
1072 1072
1073 temperature = il3945_hw_get_temperature(priv); 1073 temperature = il3945_hw_get_temperature(il);
1074 1074
1075 /* driver's okay range is -260 to +25. 1075 /* driver's okay range is -260 to +25.
1076 * human readable okay range is 0 to +285 */ 1076 * human readable okay range is 0 to +285 */
1077 IL_DEBUG_INFO(priv, "Temperature: %d\n", temperature + IL_TEMP_CONVERT); 1077 IL_DEBUG_INFO(il, "Temperature: %d\n", temperature + IL_TEMP_CONVERT);
1078 1078
1079 /* handle insane temp reading */ 1079 /* handle insane temp reading */
1080 if (il3945_hw_reg_temp_out_of_range(temperature)) { 1080 if (il3945_hw_reg_temp_out_of_range(temperature)) {
1081 IL_ERR(priv, "Error bad temperature value %d\n", temperature); 1081 IL_ERR(il, "Error bad temperature value %d\n", temperature);
1082 1082
1083 /* if really really hot(?), 1083 /* if really really hot(?),
1084 * substitute the 3rd band/group's temp measured at factory */ 1084 * substitute the 3rd band/group's temp measured at factory */
1085 if (priv->last_temperature > 100) 1085 if (il->last_temperature > 100)
1086 temperature = eeprom->groups[2].temperature; 1086 temperature = eeprom->groups[2].temperature;
1087 else /* else use most recent "sane" value from driver */ 1087 else /* else use most recent "sane" value from driver */
1088 temperature = priv->last_temperature; 1088 temperature = il->last_temperature;
1089 } 1089 }
1090 1090
1091 return temperature; /* raw, not "human readable" */ 1091 return temperature; /* raw, not "human readable" */
@@ -1102,33 +1102,33 @@ static int il3945_hw_reg_txpower_get_temperature(struct il_priv *priv)
1102 * records new temperature in tx_mgr->temperature. 1102 * records new temperature in tx_mgr->temperature.
1103 * replaces tx_mgr->last_temperature *only* if calib needed 1103 * replaces tx_mgr->last_temperature *only* if calib needed
1104 * (assumes caller will actually do the calibration!). */ 1104 * (assumes caller will actually do the calibration!). */
1105static int il3945_is_temp_calib_needed(struct il_priv *priv) 1105static int il3945_is_temp_calib_needed(struct il_priv *il)
1106{ 1106{
1107 int temp_diff; 1107 int temp_diff;
1108 1108
1109 priv->temperature = il3945_hw_reg_txpower_get_temperature(priv); 1109 il->temperature = il3945_hw_reg_txpower_get_temperature(il);
1110 temp_diff = priv->temperature - priv->last_temperature; 1110 temp_diff = il->temperature - il->last_temperature;
1111 1111
1112 /* get absolute value */ 1112 /* get absolute value */
1113 if (temp_diff < 0) { 1113 if (temp_diff < 0) {
1114 IL_DEBUG_POWER(priv, "Getting cooler, delta %d,\n", temp_diff); 1114 IL_DEBUG_POWER(il, "Getting cooler, delta %d,\n", temp_diff);
1115 temp_diff = -temp_diff; 1115 temp_diff = -temp_diff;
1116 } else if (temp_diff == 0) 1116 } else if (temp_diff == 0)
1117 IL_DEBUG_POWER(priv, "Same temp,\n"); 1117 IL_DEBUG_POWER(il, "Same temp,\n");
1118 else 1118 else
1119 IL_DEBUG_POWER(priv, "Getting warmer, delta %d,\n", temp_diff); 1119 IL_DEBUG_POWER(il, "Getting warmer, delta %d,\n", temp_diff);
1120 1120
1121 /* if we don't need calibration, *don't* update last_temperature */ 1121 /* if we don't need calibration, *don't* update last_temperature */
1122 if (temp_diff < IL_TEMPERATURE_LIMIT_TIMER) { 1122 if (temp_diff < IL_TEMPERATURE_LIMIT_TIMER) {
1123 IL_DEBUG_POWER(priv, "Timed thermal calib not needed\n"); 1123 IL_DEBUG_POWER(il, "Timed thermal calib not needed\n");
1124 return 0; 1124 return 0;
1125 } 1125 }
1126 1126
1127 IL_DEBUG_POWER(priv, "Timed thermal calib needed\n"); 1127 IL_DEBUG_POWER(il, "Timed thermal calib needed\n");
1128 1128
1129 /* assume that caller will actually do calib ... 1129 /* assume that caller will actually do calib ...
1130 * update the "last temperature" value */ 1130 * update the "last temperature" value */
1131 priv->last_temperature = priv->temperature; 1131 il->last_temperature = il->temperature;
1132 return 1; 1132 return 1;
1133} 1133}
1134 1134
@@ -1317,7 +1317,7 @@ static inline u8 il3945_hw_reg_fix_power_index(int index)
1317 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK) 1317 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1318 * or 6 Mbit (OFDM) rates. 1318 * or 6 Mbit (OFDM) rates.
1319 */ 1319 */
1320static void il3945_hw_reg_set_scan_power(struct il_priv *priv, u32 scan_tbl_index, 1320static void il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_index,
1321 s32 rate_index, const s8 *clip_pwrs, 1321 s32 rate_index, const s8 *clip_pwrs,
1322 struct il_channel_info *ch_info, 1322 struct il_channel_info *ch_info,
1323 int band_index) 1323 int band_index)
@@ -1333,7 +1333,7 @@ static void il3945_hw_reg_set_scan_power(struct il_priv *priv, u32 scan_tbl_inde
1333 * based on eeprom channel data) for this channel. */ 1333 * based on eeprom channel data) for this channel. */
1334 power = min(ch_info->scan_power, clip_pwrs[IL_RATE_6M_INDEX_TABLE]); 1334 power = min(ch_info->scan_power, clip_pwrs[IL_RATE_6M_INDEX_TABLE]);
1335 1335
1336 power = min(power, priv->tx_power_user_lmt); 1336 power = min(power, il->tx_power_user_lmt);
1337 scan_power_info->requested_power = power; 1337 scan_power_info->requested_power = power;
1338 1338
1339 /* find difference between new scan *power* and current "normal" 1339 /* find difference between new scan *power* and current "normal"
@@ -1370,32 +1370,32 @@ static void il3945_hw_reg_set_scan_power(struct il_priv *priv, u32 scan_tbl_inde
1370 * Configures power settings for all rates for the current channel, 1370 * Configures power settings for all rates for the current channel,
1371 * using values from channel info struct, and send to NIC 1371 * using values from channel info struct, and send to NIC
1372 */ 1372 */
1373static int il3945_send_tx_power(struct il_priv *priv) 1373static int il3945_send_tx_power(struct il_priv *il)
1374{ 1374{
1375 int rate_idx, i; 1375 int rate_idx, i;
1376 const struct il_channel_info *ch_info = NULL; 1376 const struct il_channel_info *ch_info = NULL;
1377 struct il3945_txpowertable_cmd txpower = { 1377 struct il3945_txpowertable_cmd txpower = {
1378 .channel = priv->contexts[IL_RXON_CTX_BSS].active.channel, 1378 .channel = il->contexts[IL_RXON_CTX_BSS].active.channel,
1379 }; 1379 };
1380 u16 chan; 1380 u16 chan;
1381 1381
1382 if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->status), 1382 if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &il->status),
1383 "TX Power requested while scanning!\n")) 1383 "TX Power requested while scanning!\n"))
1384 return -EAGAIN; 1384 return -EAGAIN;
1385 1385
1386 chan = le16_to_cpu(priv->contexts[IL_RXON_CTX_BSS].active.channel); 1386 chan = le16_to_cpu(il->contexts[IL_RXON_CTX_BSS].active.channel);
1387 1387
1388 txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1; 1388 txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1389 ch_info = il_get_channel_info(priv, priv->band, chan); 1389 ch_info = il_get_channel_info(il, il->band, chan);
1390 if (!ch_info) { 1390 if (!ch_info) {
1391 IL_ERR(priv, 1391 IL_ERR(il,
1392 "Failed to get channel info for channel %d [%d]\n", 1392 "Failed to get channel info for channel %d [%d]\n",
1393 chan, priv->band); 1393 chan, il->band);
1394 return -EINVAL; 1394 return -EINVAL;
1395 } 1395 }
1396 1396
1397 if (!il_is_channel_valid(ch_info)) { 1397 if (!il_is_channel_valid(ch_info)) {
1398 IL_DEBUG_POWER(priv, "Not calling TX_PWR_TABLE_CMD on " 1398 IL_DEBUG_POWER(il, "Not calling TX_PWR_TABLE_CMD on "
1399 "non-Tx channel.\n"); 1399 "non-Tx channel.\n");
1400 return 0; 1400 return 0;
1401 } 1401 }
@@ -1408,7 +1408,7 @@ static int il3945_send_tx_power(struct il_priv *priv)
1408 txpower.power[i].tpc = ch_info->power_info[i].tpc; 1408 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1409 txpower.power[i].rate = il3945_rates[rate_idx].plcp; 1409 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1410 1410
1411 IL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n", 1411 IL_DEBUG_POWER(il, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1412 le16_to_cpu(txpower.channel), 1412 le16_to_cpu(txpower.channel),
1413 txpower.band, 1413 txpower.band,
1414 txpower.power[i].tpc.tx_gain, 1414 txpower.power[i].tpc.tx_gain,
@@ -1421,7 +1421,7 @@ static int il3945_send_tx_power(struct il_priv *priv)
1421 txpower.power[i].tpc = ch_info->power_info[i].tpc; 1421 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1422 txpower.power[i].rate = il3945_rates[rate_idx].plcp; 1422 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1423 1423
1424 IL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n", 1424 IL_DEBUG_POWER(il, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1425 le16_to_cpu(txpower.channel), 1425 le16_to_cpu(txpower.channel),
1426 txpower.band, 1426 txpower.band,
1427 txpower.power[i].tpc.tx_gain, 1427 txpower.power[i].tpc.tx_gain,
@@ -1429,7 +1429,7 @@ static int il3945_send_tx_power(struct il_priv *priv)
1429 txpower.power[i].rate); 1429 txpower.power[i].rate);
1430 } 1430 }
1431 1431
1432 return il_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, 1432 return il_send_cmd_pdu(il, REPLY_TX_PWR_TABLE_CMD,
1433 sizeof(struct il3945_txpowertable_cmd), 1433 sizeof(struct il3945_txpowertable_cmd),
1434 &txpower); 1434 &txpower);
1435 1435
@@ -1451,7 +1451,7 @@ static int il3945_send_tx_power(struct il_priv *priv)
1451 * properly fill out the scan powers, and actual h/w gain settings, 1451 * properly fill out the scan powers, and actual h/w gain settings,
1452 * and send changes to NIC 1452 * and send changes to NIC
1453 */ 1453 */
1454static int il3945_hw_reg_set_new_power(struct il_priv *priv, 1454static int il3945_hw_reg_set_new_power(struct il_priv *il,
1455 struct il_channel_info *ch_info) 1455 struct il_channel_info *ch_info)
1456{ 1456{
1457 struct il3945_channel_power_info *power_info; 1457 struct il3945_channel_power_info *power_info;
@@ -1461,7 +1461,7 @@ static int il3945_hw_reg_set_new_power(struct il_priv *priv,
1461 int power; 1461 int power;
1462 1462
1463 /* Get this chnlgrp's rate-to-max/clip-powers table */ 1463 /* Get this chnlgrp's rate-to-max/clip-powers table */
1464 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers; 1464 clip_pwrs = il->_3945.clip_groups[ch_info->group_index].clip_powers;
1465 1465
1466 /* Get this channel's rate-to-current-power settings table */ 1466 /* Get this channel's rate-to-current-power settings table */
1467 power_info = ch_info->power_info; 1467 power_info = ch_info->power_info;
@@ -1542,10 +1542,10 @@ static int il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info)
1542 * 1542 *
1543 * If RxOn is "associated", this sends the new Txpower to NIC! 1543 * If RxOn is "associated", this sends the new Txpower to NIC!
1544 */ 1544 */
1545static int il3945_hw_reg_comp_txpower_temp(struct il_priv *priv) 1545static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il)
1546{ 1546{
1547 struct il_channel_info *ch_info = NULL; 1547 struct il_channel_info *ch_info = NULL;
1548 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 1548 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1549 int delta_index; 1549 int delta_index;
1550 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */ 1550 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1551 u8 a_band; 1551 u8 a_band;
@@ -1553,16 +1553,16 @@ static int il3945_hw_reg_comp_txpower_temp(struct il_priv *priv)
1553 u8 scan_tbl_index; 1553 u8 scan_tbl_index;
1554 u8 i; 1554 u8 i;
1555 int ref_temp; 1555 int ref_temp;
1556 int temperature = priv->temperature; 1556 int temperature = il->temperature;
1557 1557
1558 if (priv->disable_tx_power_cal || 1558 if (il->disable_tx_power_cal ||
1559 test_bit(STATUS_SCANNING, &priv->status)) { 1559 test_bit(STATUS_SCANNING, &il->status)) {
1560 /* do not perform tx power calibration */ 1560 /* do not perform tx power calibration */
1561 return 0; 1561 return 0;
1562 } 1562 }
1563 /* set up new Tx power info for each and every channel, 2.4 and 5.x */ 1563 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1564 for (i = 0; i < priv->channel_count; i++) { 1564 for (i = 0; i < il->channel_count; i++) {
1565 ch_info = &priv->channel_info[i]; 1565 ch_info = &il->channel_info[i];
1566 a_band = il_is_channel_a_band(ch_info); 1566 a_band = il_is_channel_a_band(ch_info);
1567 1567
1568 /* Get this chnlgrp's factory calibration temperature */ 1568 /* Get this chnlgrp's factory calibration temperature */
@@ -1592,43 +1592,43 @@ static int il3945_hw_reg_comp_txpower_temp(struct il_priv *priv)
1592 } 1592 }
1593 1593
1594 /* Get this chnlgrp's rate-to-max/clip-powers table */ 1594 /* Get this chnlgrp's rate-to-max/clip-powers table */
1595 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers; 1595 clip_pwrs = il->_3945.clip_groups[ch_info->group_index].clip_powers;
1596 1596
1597 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ 1597 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1598 for (scan_tbl_index = 0; 1598 for (scan_tbl_index = 0;
1599 scan_tbl_index < IL_NUM_SCAN_RATES; scan_tbl_index++) { 1599 scan_tbl_index < IL_NUM_SCAN_RATES; scan_tbl_index++) {
1600 s32 actual_index = (scan_tbl_index == 0) ? 1600 s32 actual_index = (scan_tbl_index == 0) ?
1601 IL_RATE_1M_INDEX_TABLE : IL_RATE_6M_INDEX_TABLE; 1601 IL_RATE_1M_INDEX_TABLE : IL_RATE_6M_INDEX_TABLE;
1602 il3945_hw_reg_set_scan_power(priv, scan_tbl_index, 1602 il3945_hw_reg_set_scan_power(il, scan_tbl_index,
1603 actual_index, clip_pwrs, 1603 actual_index, clip_pwrs,
1604 ch_info, a_band); 1604 ch_info, a_band);
1605 } 1605 }
1606 } 1606 }
1607 1607
1608 /* send Txpower command for current channel to ucode */ 1608 /* send Txpower command for current channel to ucode */
1609 return priv->cfg->ops->lib->send_tx_power(priv); 1609 return il->cfg->ops->lib->send_tx_power(il);
1610} 1610}
1611 1611
1612int il3945_hw_reg_set_txpower(struct il_priv *priv, s8 power) 1612int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power)
1613{ 1613{
1614 struct il_channel_info *ch_info; 1614 struct il_channel_info *ch_info;
1615 s8 max_power; 1615 s8 max_power;
1616 u8 a_band; 1616 u8 a_band;
1617 u8 i; 1617 u8 i;
1618 1618
1619 if (priv->tx_power_user_lmt == power) { 1619 if (il->tx_power_user_lmt == power) {
1620 IL_DEBUG_POWER(priv, "Requested Tx power same as current " 1620 IL_DEBUG_POWER(il, "Requested Tx power same as current "
1621 "limit: %ddBm.\n", power); 1621 "limit: %ddBm.\n", power);
1622 return 0; 1622 return 0;
1623 } 1623 }
1624 1624
1625 IL_DEBUG_POWER(priv, "Setting upper limit clamp to %ddBm.\n", power); 1625 IL_DEBUG_POWER(il, "Setting upper limit clamp to %ddBm.\n", power);
1626 priv->tx_power_user_lmt = power; 1626 il->tx_power_user_lmt = power;
1627 1627
1628 /* set up new Tx powers for each and every channel, 2.4 and 5.x */ 1628 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1629 1629
1630 for (i = 0; i < priv->channel_count; i++) { 1630 for (i = 0; i < il->channel_count; i++) {
1631 ch_info = &priv->channel_info[i]; 1631 ch_info = &il->channel_info[i];
1632 a_band = il_is_channel_a_band(ch_info); 1632 a_band = il_is_channel_a_band(ch_info);
1633 1633
1634 /* find minimum power of all user and regulatory constraints 1634 /* find minimum power of all user and regulatory constraints
@@ -1639,19 +1639,19 @@ int il3945_hw_reg_set_txpower(struct il_priv *priv, s8 power)
1639 ch_info->curr_txpow = max_power; 1639 ch_info->curr_txpow = max_power;
1640 1640
1641 /* this considers the h/w clipping limitations */ 1641 /* this considers the h/w clipping limitations */
1642 il3945_hw_reg_set_new_power(priv, ch_info); 1642 il3945_hw_reg_set_new_power(il, ch_info);
1643 } 1643 }
1644 } 1644 }
1645 1645
1646 /* update txpower settings for all channels, 1646 /* update txpower settings for all channels,
1647 * send to NIC if associated. */ 1647 * send to NIC if associated. */
1648 il3945_is_temp_calib_needed(priv); 1648 il3945_is_temp_calib_needed(il);
1649 il3945_hw_reg_comp_txpower_temp(priv); 1649 il3945_hw_reg_comp_txpower_temp(il);
1650 1650
1651 return 0; 1651 return 0;
1652} 1652}
1653 1653
1654static int il3945_send_rxon_assoc(struct il_priv *priv, 1654static int il3945_send_rxon_assoc(struct il_priv *il,
1655 struct il_rxon_context *ctx) 1655 struct il_rxon_context *ctx)
1656{ 1656{
1657 int rc = 0; 1657 int rc = 0;
@@ -1670,7 +1670,7 @@ static int il3945_send_rxon_assoc(struct il_priv *priv,
1670 (rxon1->filter_flags == rxon2->filter_flags) && 1670 (rxon1->filter_flags == rxon2->filter_flags) &&
1671 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) && 1671 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1672 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) { 1672 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1673 IL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n"); 1673 IL_DEBUG_INFO(il, "Using current RXON_ASSOC. Not resending.\n");
1674 return 0; 1674 return 0;
1675 } 1675 }
1676 1676
@@ -1680,17 +1680,17 @@ static int il3945_send_rxon_assoc(struct il_priv *priv,
1680 rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates; 1680 rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1681 rxon_assoc.reserved = 0; 1681 rxon_assoc.reserved = 0;
1682 1682
1683 rc = il_send_cmd_sync(priv, &cmd); 1683 rc = il_send_cmd_sync(il, &cmd);
1684 if (rc) 1684 if (rc)
1685 return rc; 1685 return rc;
1686 1686
1687 pkt = (struct il_rx_packet *)cmd.reply_page; 1687 pkt = (struct il_rx_packet *)cmd.reply_page;
1688 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { 1688 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1689 IL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n"); 1689 IL_ERR(il, "Bad return from REPLY_RXON_ASSOC command\n");
1690 rc = -EIO; 1690 rc = -EIO;
1691 } 1691 }
1692 1692
1693 il_free_pages(priv, cmd.reply_page); 1693 il_free_pages(il, cmd.reply_page);
1694 1694
1695 return rc; 1695 return rc;
1696} 1696}
@@ -1703,7 +1703,7 @@ static int il3945_send_rxon_assoc(struct il_priv *priv,
1703 * function correctly transitions out of the RXON_ASSOC_MSK state if 1703 * function correctly transitions out of the RXON_ASSOC_MSK state if
1704 * a HW tune is required based on the RXON structure changes. 1704 * a HW tune is required based on the RXON structure changes.
1705 */ 1705 */
1706int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx) 1706int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1707{ 1707{
1708 /* cast away the const for active_rxon in this function */ 1708 /* cast away the const for active_rxon in this function */
1709 struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active; 1709 struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active;
@@ -1711,10 +1711,10 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1711 int rc = 0; 1711 int rc = 0;
1712 bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK); 1712 bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK);
1713 1713
1714 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 1714 if (test_bit(STATUS_EXIT_PENDING, &il->status))
1715 return -EINVAL; 1715 return -EINVAL;
1716 1716
1717 if (!il_is_alive(priv)) 1717 if (!il_is_alive(il))
1718 return -1; 1718 return -1;
1719 1719
1720 /* always get timestamp with Rx frame */ 1720 /* always get timestamp with Rx frame */
@@ -1723,23 +1723,23 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1723 /* select antenna */ 1723 /* select antenna */
1724 staging_rxon->flags &= 1724 staging_rxon->flags &=
1725 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); 1725 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1726 staging_rxon->flags |= il3945_get_antenna_flags(priv); 1726 staging_rxon->flags |= il3945_get_antenna_flags(il);
1727 1727
1728 rc = il_check_rxon_cmd(priv, ctx); 1728 rc = il_check_rxon_cmd(il, ctx);
1729 if (rc) { 1729 if (rc) {
1730 IL_ERR(priv, "Invalid RXON configuration. Not committing.\n"); 1730 IL_ERR(il, "Invalid RXON configuration. Not committing.\n");
1731 return -EINVAL; 1731 return -EINVAL;
1732 } 1732 }
1733 1733
1734 /* If we don't need to send a full RXON, we can use 1734 /* If we don't need to send a full RXON, we can use
1735 * il3945_rxon_assoc_cmd which is used to reconfigure filter 1735 * il3945_rxon_assoc_cmd which is used to reconfigure filter
1736 * and other flags for the current radio configuration. */ 1736 * and other flags for the current radio configuration. */
1737 if (!il_full_rxon_required(priv, 1737 if (!il_full_rxon_required(il,
1738 &priv->contexts[IL_RXON_CTX_BSS])) { 1738 &il->contexts[IL_RXON_CTX_BSS])) {
1739 rc = il_send_rxon_assoc(priv, 1739 rc = il_send_rxon_assoc(il,
1740 &priv->contexts[IL_RXON_CTX_BSS]); 1740 &il->contexts[IL_RXON_CTX_BSS]);
1741 if (rc) { 1741 if (rc) {
1742 IL_ERR(priv, "Error setting RXON_ASSOC " 1742 IL_ERR(il, "Error setting RXON_ASSOC "
1743 "configuration (%d).\n", rc); 1743 "configuration (%d).\n", rc);
1744 return rc; 1744 return rc;
1745 } 1745 }
@@ -1749,7 +1749,7 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1749 * We do not commit tx power settings while channel changing, 1749 * We do not commit tx power settings while channel changing,
1750 * do it now if tx power changed. 1750 * do it now if tx power changed.
1751 */ 1751 */
1752 il_set_tx_power(priv, priv->tx_power_next, false); 1752 il_set_tx_power(il, il->tx_power_next, false);
1753 return 0; 1753 return 0;
1754 } 1754 }
1755 1755
@@ -1757,8 +1757,8 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1757 * an RXON_ASSOC and the new config wants the associated mask enabled, 1757 * an RXON_ASSOC and the new config wants the associated mask enabled,
1758 * we must clear the associated from the active configuration 1758 * we must clear the associated from the active configuration
1759 * before we apply the new config */ 1759 * before we apply the new config */
1760 if (il_is_associated(priv, IL_RXON_CTX_BSS) && new_assoc) { 1760 if (il_is_associated(il, IL_RXON_CTX_BSS) && new_assoc) {
1761 IL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n"); 1761 IL_DEBUG_INFO(il, "Toggling associated bit on current RXON\n");
1762 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 1762 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1763 1763
1764 /* 1764 /*
@@ -1767,25 +1767,25 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1767 */ 1767 */
1768 active_rxon->reserved4 = 0; 1768 active_rxon->reserved4 = 0;
1769 active_rxon->reserved5 = 0; 1769 active_rxon->reserved5 = 0;
1770 rc = il_send_cmd_pdu(priv, REPLY_RXON, 1770 rc = il_send_cmd_pdu(il, REPLY_RXON,
1771 sizeof(struct il3945_rxon_cmd), 1771 sizeof(struct il3945_rxon_cmd),
1772 &priv->contexts[IL_RXON_CTX_BSS].active); 1772 &il->contexts[IL_RXON_CTX_BSS].active);
1773 1773
1774 /* If the mask clearing failed then we set 1774 /* If the mask clearing failed then we set
1775 * active_rxon back to what it was previously */ 1775 * active_rxon back to what it was previously */
1776 if (rc) { 1776 if (rc) {
1777 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; 1777 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1778 IL_ERR(priv, "Error clearing ASSOC_MSK on current " 1778 IL_ERR(il, "Error clearing ASSOC_MSK on current "
1779 "configuration (%d).\n", rc); 1779 "configuration (%d).\n", rc);
1780 return rc; 1780 return rc;
1781 } 1781 }
1782 il_clear_ucode_stations(priv, 1782 il_clear_ucode_stations(il,
1783 &priv->contexts[IL_RXON_CTX_BSS]); 1783 &il->contexts[IL_RXON_CTX_BSS]);
1784 il_restore_stations(priv, 1784 il_restore_stations(il,
1785 &priv->contexts[IL_RXON_CTX_BSS]); 1785 &il->contexts[IL_RXON_CTX_BSS]);
1786 } 1786 }
1787 1787
1788 IL_DEBUG_INFO(priv, "Sending RXON\n" 1788 IL_DEBUG_INFO(il, "Sending RXON\n"
1789 "* with%s RXON_FILTER_ASSOC_MSK\n" 1789 "* with%s RXON_FILTER_ASSOC_MSK\n"
1790 "* channel = %d\n" 1790 "* channel = %d\n"
1791 "* bssid = %pM\n", 1791 "* bssid = %pM\n",
@@ -1800,38 +1800,38 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1800 staging_rxon->reserved4 = 0; 1800 staging_rxon->reserved4 = 0;
1801 staging_rxon->reserved5 = 0; 1801 staging_rxon->reserved5 = 0;
1802 1802
1803 il_set_rxon_hwcrypto(priv, ctx, !il3945_mod_params.sw_crypto); 1803 il_set_rxon_hwcrypto(il, ctx, !il3945_mod_params.sw_crypto);
1804 1804
1805 /* Apply the new configuration */ 1805 /* Apply the new configuration */
1806 rc = il_send_cmd_pdu(priv, REPLY_RXON, 1806 rc = il_send_cmd_pdu(il, REPLY_RXON,
1807 sizeof(struct il3945_rxon_cmd), 1807 sizeof(struct il3945_rxon_cmd),
1808 staging_rxon); 1808 staging_rxon);
1809 if (rc) { 1809 if (rc) {
1810 IL_ERR(priv, "Error setting new configuration (%d).\n", rc); 1810 IL_ERR(il, "Error setting new configuration (%d).\n", rc);
1811 return rc; 1811 return rc;
1812 } 1812 }
1813 1813
1814 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); 1814 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1815 1815
1816 if (!new_assoc) { 1816 if (!new_assoc) {
1817 il_clear_ucode_stations(priv, 1817 il_clear_ucode_stations(il,
1818 &priv->contexts[IL_RXON_CTX_BSS]); 1818 &il->contexts[IL_RXON_CTX_BSS]);
1819 il_restore_stations(priv, 1819 il_restore_stations(il,
1820 &priv->contexts[IL_RXON_CTX_BSS]); 1820 &il->contexts[IL_RXON_CTX_BSS]);
1821 } 1821 }
1822 1822
1823 /* If we issue a new RXON command which required a tune then we must 1823 /* If we issue a new RXON command which required a tune then we must
1824 * send a new TXPOWER command or we won't be able to Tx any frames */ 1824 * send a new TXPOWER command or we won't be able to Tx any frames */
1825 rc = il_set_tx_power(priv, priv->tx_power_next, true); 1825 rc = il_set_tx_power(il, il->tx_power_next, true);
1826 if (rc) { 1826 if (rc) {
1827 IL_ERR(priv, "Error setting Tx power (%d).\n", rc); 1827 IL_ERR(il, "Error setting Tx power (%d).\n", rc);
1828 return rc; 1828 return rc;
1829 } 1829 }
1830 1830
1831 /* Init the hardware's rate fallback order based on the band */ 1831 /* Init the hardware's rate fallback order based on the band */
1832 rc = il3945_init_hw_rate_table(priv); 1832 rc = il3945_init_hw_rate_table(il);
1833 if (rc) { 1833 if (rc) {
1834 IL_ERR(priv, "Error setting HW rate table: %02X\n", rc); 1834 IL_ERR(il, "Error setting HW rate table: %02X\n", rc);
1835 return -EIO; 1835 return -EIO;
1836 } 1836 }
1837 1837
@@ -1848,34 +1848,34 @@ int il3945_commit_rxon(struct il_priv *priv, struct il_rxon_context *ctx)
1848 * -- send new set of gain settings to NIC 1848 * -- send new set of gain settings to NIC
1849 * NOTE: This should continue working, even when we're not associated, 1849 * NOTE: This should continue working, even when we're not associated,
1850 * so we can keep our internal table of scan powers current. */ 1850 * so we can keep our internal table of scan powers current. */
1851void il3945_reg_txpower_periodic(struct il_priv *priv) 1851void il3945_reg_txpower_periodic(struct il_priv *il)
1852{ 1852{
1853 /* This will kick in the "brute force" 1853 /* This will kick in the "brute force"
1854 * il3945_hw_reg_comp_txpower_temp() below */ 1854 * il3945_hw_reg_comp_txpower_temp() below */
1855 if (!il3945_is_temp_calib_needed(priv)) 1855 if (!il3945_is_temp_calib_needed(il))
1856 goto reschedule; 1856 goto reschedule;
1857 1857
1858 /* Set up a new set of temp-adjusted TxPowers, send to NIC. 1858 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1859 * This is based *only* on current temperature, 1859 * This is based *only* on current temperature,
1860 * ignoring any previous power measurements */ 1860 * ignoring any previous power measurements */
1861 il3945_hw_reg_comp_txpower_temp(priv); 1861 il3945_hw_reg_comp_txpower_temp(il);
1862 1862
1863 reschedule: 1863 reschedule:
1864 queue_delayed_work(priv->workqueue, 1864 queue_delayed_work(il->workqueue,
1865 &priv->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ); 1865 &il->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ);
1866} 1866}
1867 1867
1868static void il3945_bg_reg_txpower_periodic(struct work_struct *work) 1868static void il3945_bg_reg_txpower_periodic(struct work_struct *work)
1869{ 1869{
1870 struct il_priv *priv = container_of(work, struct il_priv, 1870 struct il_priv *il = container_of(work, struct il_priv,
1871 _3945.thermal_periodic.work); 1871 _3945.thermal_periodic.work);
1872 1872
1873 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 1873 if (test_bit(STATUS_EXIT_PENDING, &il->status))
1874 return; 1874 return;
1875 1875
1876 mutex_lock(&priv->mutex); 1876 mutex_lock(&il->mutex);
1877 il3945_reg_txpower_periodic(priv); 1877 il3945_reg_txpower_periodic(il);
1878 mutex_unlock(&priv->mutex); 1878 mutex_unlock(&il->mutex);
1879} 1879}
1880 1880
1881/** 1881/**
@@ -1889,10 +1889,10 @@ static void il3945_bg_reg_txpower_periodic(struct work_struct *work)
1889 * on A-band, EEPROM's "group frequency" entries represent the top 1889 * on A-band, EEPROM's "group frequency" entries represent the top
1890 * channel in each group 1-4. Group 5 All B/G channels are in group 0. 1890 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
1891 */ 1891 */
1892static u16 il3945_hw_reg_get_ch_grp_index(struct il_priv *priv, 1892static u16 il3945_hw_reg_get_ch_grp_index(struct il_priv *il,
1893 const struct il_channel_info *ch_info) 1893 const struct il_channel_info *ch_info)
1894{ 1894{
1895 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 1895 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1896 struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0]; 1896 struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
1897 u8 group; 1897 u8 group;
1898 u16 group_index = 0; /* based on factory calib frequencies */ 1898 u16 group_index = 0; /* based on factory calib frequencies */
@@ -1913,7 +1913,7 @@ static u16 il3945_hw_reg_get_ch_grp_index(struct il_priv *priv,
1913 } else 1913 } else
1914 group_index = 0; /* 2.4 GHz, group 0 */ 1914 group_index = 0; /* 2.4 GHz, group 0 */
1915 1915
1916 IL_DEBUG_POWER(priv, "Chnl %d mapped to grp %d\n", ch_info->channel, 1916 IL_DEBUG_POWER(il, "Chnl %d mapped to grp %d\n", ch_info->channel,
1917 group_index); 1917 group_index);
1918 return group_index; 1918 return group_index;
1919} 1919}
@@ -1924,12 +1924,12 @@ static u16 il3945_hw_reg_get_ch_grp_index(struct il_priv *priv,
1924 * Interpolate to get nominal (i.e. at factory calibration temperature) index 1924 * Interpolate to get nominal (i.e. at factory calibration temperature) index
1925 * into radio/DSP gain settings table for requested power. 1925 * into radio/DSP gain settings table for requested power.
1926 */ 1926 */
1927static int il3945_hw_reg_get_matched_power_index(struct il_priv *priv, 1927static int il3945_hw_reg_get_matched_power_index(struct il_priv *il,
1928 s8 requested_power, 1928 s8 requested_power,
1929 s32 setting_index, s32 *new_index) 1929 s32 setting_index, s32 *new_index)
1930{ 1930{
1931 const struct il3945_eeprom_txpower_group *chnl_grp = NULL; 1931 const struct il3945_eeprom_txpower_group *chnl_grp = NULL;
1932 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 1932 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1933 s32 index0, index1; 1933 s32 index0, index1;
1934 s32 power = 2 * requested_power; 1934 s32 power = 2 * requested_power;
1935 s32 i; 1935 s32 i;
@@ -1973,14 +1973,14 @@ static int il3945_hw_reg_get_matched_power_index(struct il_priv *priv,
1973 return 0; 1973 return 0;
1974} 1974}
1975 1975
1976static void il3945_hw_reg_init_channel_groups(struct il_priv *priv) 1976static void il3945_hw_reg_init_channel_groups(struct il_priv *il)
1977{ 1977{
1978 u32 i; 1978 u32 i;
1979 s32 rate_index; 1979 s32 rate_index;
1980 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 1980 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1981 const struct il3945_eeprom_txpower_group *group; 1981 const struct il3945_eeprom_txpower_group *group;
1982 1982
1983 IL_DEBUG_POWER(priv, "Initializing factory calib info from EEPROM\n"); 1983 IL_DEBUG_POWER(il, "Initializing factory calib info from EEPROM\n");
1984 1984
1985 for (i = 0; i < IL_NUM_TX_CALIB_GROUPS; i++) { 1985 for (i = 0; i < IL_NUM_TX_CALIB_GROUPS; i++) {
1986 s8 *clip_pwrs; /* table of power levels for each rate */ 1986 s8 *clip_pwrs; /* table of power levels for each rate */
@@ -1989,7 +1989,7 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *priv)
1989 1989
1990 /* sanity check on factory saturation power value */ 1990 /* sanity check on factory saturation power value */
1991 if (group->saturation_power < 40) { 1991 if (group->saturation_power < 40) {
1992 IL_WARN(priv, "Error: saturation power is %d, " 1992 IL_WARN(il, "Error: saturation power is %d, "
1993 "less than minimum expected 40\n", 1993 "less than minimum expected 40\n",
1994 group->saturation_power); 1994 group->saturation_power);
1995 return; 1995 return;
@@ -2004,7 +2004,7 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *priv)
2004 * power peaks, without too much distortion (clipping). 2004 * power peaks, without too much distortion (clipping).
2005 */ 2005 */
2006 /* we'll fill in this array with h/w max power levels */ 2006 /* we'll fill in this array with h/w max power levels */
2007 clip_pwrs = (s8 *) priv->_3945.clip_groups[i].clip_powers; 2007 clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers;
2008 2008
2009 /* divide factory saturation power by 2 to find -3dB level */ 2009 /* divide factory saturation power by 2 to find -3dB level */
2010 satur_pwr = (s8) (group->saturation_power >> 1); 2010 satur_pwr = (s8) (group->saturation_power >> 1);
@@ -2042,7 +2042,7 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *priv)
2042/** 2042/**
2043 * il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM 2043 * il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2044 * 2044 *
2045 * Second pass (during init) to set up priv->channel_info 2045 * Second pass (during init) to set up il->channel_info
2046 * 2046 *
2047 * Set up Tx-power settings in our channel info database for each VALID 2047 * Set up Tx-power settings in our channel info database for each VALID
2048 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values 2048 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
@@ -2054,11 +2054,11 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *priv)
2054 * 2054 *
2055 * This does *not* write values to NIC, just sets up our internal table. 2055 * This does *not* write values to NIC, just sets up our internal table.
2056 */ 2056 */
2057int il3945_txpower_set_from_eeprom(struct il_priv *priv) 2057int il3945_txpower_set_from_eeprom(struct il_priv *il)
2058{ 2058{
2059 struct il_channel_info *ch_info = NULL; 2059 struct il_channel_info *ch_info = NULL;
2060 struct il3945_channel_power_info *pwr_info; 2060 struct il3945_channel_power_info *pwr_info;
2061 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)priv->eeprom; 2061 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
2062 int delta_index; 2062 int delta_index;
2063 u8 rate_index; 2063 u8 rate_index;
2064 u8 scan_tbl_index; 2064 u8 scan_tbl_index;
@@ -2071,13 +2071,13 @@ int il3945_txpower_set_from_eeprom(struct il_priv *priv)
2071 2071
2072 /* save temperature reference, 2072 /* save temperature reference,
2073 * so we can determine next time to calibrate */ 2073 * so we can determine next time to calibrate */
2074 temperature = il3945_hw_reg_txpower_get_temperature(priv); 2074 temperature = il3945_hw_reg_txpower_get_temperature(il);
2075 priv->last_temperature = temperature; 2075 il->last_temperature = temperature;
2076 2076
2077 il3945_hw_reg_init_channel_groups(priv); 2077 il3945_hw_reg_init_channel_groups(il);
2078 2078
2079 /* initialize Tx power info for each and every channel, 2.4 and 5.x */ 2079 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2080 for (i = 0, ch_info = priv->channel_info; i < priv->channel_count; 2080 for (i = 0, ch_info = il->channel_info; i < il->channel_count;
2081 i++, ch_info++) { 2081 i++, ch_info++) {
2082 a_band = il_is_channel_a_band(ch_info); 2082 a_band = il_is_channel_a_band(ch_info);
2083 if (!il_is_channel_valid(ch_info)) 2083 if (!il_is_channel_valid(ch_info))
@@ -2085,10 +2085,10 @@ int il3945_txpower_set_from_eeprom(struct il_priv *priv)
2085 2085
2086 /* find this channel's channel group (*not* "band") index */ 2086 /* find this channel's channel group (*not* "band") index */
2087 ch_info->group_index = 2087 ch_info->group_index =
2088 il3945_hw_reg_get_ch_grp_index(priv, ch_info); 2088 il3945_hw_reg_get_ch_grp_index(il, ch_info);
2089 2089
2090 /* Get this chnlgrp's rate->max/clip-powers table */ 2090 /* Get this chnlgrp's rate->max/clip-powers table */
2091 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers; 2091 clip_pwrs = il->_3945.clip_groups[ch_info->group_index].clip_powers;
2092 2092
2093 /* calculate power index *adjustment* value according to 2093 /* calculate power index *adjustment* value according to
2094 * diff between current temperature and factory temperature */ 2094 * diff between current temperature and factory temperature */
@@ -2096,7 +2096,7 @@ int il3945_txpower_set_from_eeprom(struct il_priv *priv)
2096 eeprom->groups[ch_info->group_index]. 2096 eeprom->groups[ch_info->group_index].
2097 temperature); 2097 temperature);
2098 2098
2099 IL_DEBUG_POWER(priv, "Delta index for channel %d: %d [%d]\n", 2099 IL_DEBUG_POWER(il, "Delta index for channel %d: %d [%d]\n",
2100 ch_info->channel, delta_index, temperature + 2100 ch_info->channel, delta_index, temperature +
2101 IL_TEMP_CONVERT); 2101 IL_TEMP_CONVERT);
2102 2102
@@ -2115,11 +2115,11 @@ int il3945_txpower_set_from_eeprom(struct il_priv *priv)
2115 2115
2116 /* get base (i.e. at factory-measured temperature) 2116 /* get base (i.e. at factory-measured temperature)
2117 * power table index for this rate's power */ 2117 * power table index for this rate's power */
2118 rc = il3945_hw_reg_get_matched_power_index(priv, pwr, 2118 rc = il3945_hw_reg_get_matched_power_index(il, pwr,
2119 ch_info->group_index, 2119 ch_info->group_index,
2120 &power_idx); 2120 &power_idx);
2121 if (rc) { 2121 if (rc) {
2122 IL_ERR(priv, "Invalid power index\n"); 2122 IL_ERR(il, "Invalid power index\n");
2123 return rc; 2123 return rc;
2124 } 2124 }
2125 pwr_info->base_power_index = (u8) power_idx; 2125 pwr_info->base_power_index = (u8) power_idx;
@@ -2171,7 +2171,7 @@ int il3945_txpower_set_from_eeprom(struct il_priv *priv)
2171 scan_tbl_index < IL_NUM_SCAN_RATES; scan_tbl_index++) { 2171 scan_tbl_index < IL_NUM_SCAN_RATES; scan_tbl_index++) {
2172 s32 actual_index = (scan_tbl_index == 0) ? 2172 s32 actual_index = (scan_tbl_index == 0) ?
2173 IL_RATE_1M_INDEX_TABLE : IL_RATE_6M_INDEX_TABLE; 2173 IL_RATE_1M_INDEX_TABLE : IL_RATE_6M_INDEX_TABLE;
2174 il3945_hw_reg_set_scan_power(priv, scan_tbl_index, 2174 il3945_hw_reg_set_scan_power(il, scan_tbl_index,
2175 actual_index, clip_pwrs, ch_info, a_band); 2175 actual_index, clip_pwrs, ch_info, a_band);
2176 } 2176 }
2177 } 2177 }
@@ -2179,31 +2179,31 @@ int il3945_txpower_set_from_eeprom(struct il_priv *priv)
2179 return 0; 2179 return 0;
2180} 2180}
2181 2181
2182int il3945_hw_rxq_stop(struct il_priv *priv) 2182int il3945_hw_rxq_stop(struct il_priv *il)
2183{ 2183{
2184 int rc; 2184 int rc;
2185 2185
2186 il_write_direct32(priv, FH39_RCSR_CONFIG(0), 0); 2186 il_write_direct32(il, FH39_RCSR_CONFIG(0), 0);
2187 rc = il_poll_direct_bit(priv, FH39_RSSR_STATUS, 2187 rc = il_poll_direct_bit(il, FH39_RSSR_STATUS,
2188 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); 2188 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2189 if (rc < 0) 2189 if (rc < 0)
2190 IL_ERR(priv, "Can't stop Rx DMA.\n"); 2190 IL_ERR(il, "Can't stop Rx DMA.\n");
2191 2191
2192 return 0; 2192 return 0;
2193} 2193}
2194 2194
2195int il3945_hw_tx_queue_init(struct il_priv *priv, struct il_tx_queue *txq) 2195int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
2196{ 2196{
2197 int txq_id = txq->q.id; 2197 int txq_id = txq->q.id;
2198 2198
2199 struct il3945_shared *shared_data = priv->_3945.shared_virt; 2199 struct il3945_shared *shared_data = il->_3945.shared_virt;
2200 2200
2201 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr); 2201 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2202 2202
2203 il_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0); 2203 il_write_direct32(il, FH39_CBCC_CTRL(txq_id), 0);
2204 il_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0); 2204 il_write_direct32(il, FH39_CBCC_BASE(txq_id), 0);
2205 2205
2206 il_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 2206 il_write_direct32(il, FH39_TCSR_CONFIG(txq_id),
2207 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT | 2207 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2208 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF | 2208 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2209 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD | 2209 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
@@ -2211,7 +2211,7 @@ int il3945_hw_tx_queue_init(struct il_priv *priv, struct il_tx_queue *txq)
2211 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE); 2211 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2212 2212
2213 /* fake read to flush all prev. writes */ 2213 /* fake read to flush all prev. writes */
2214 il_read32(priv, FH39_TSSR_CBB_BASE); 2214 il_read32(il, FH39_TSSR_CBB_BASE);
2215 2215
2216 return 0; 2216 return 0;
2217} 2217}
@@ -2250,10 +2250,10 @@ static u16 il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
2250 return (u16)sizeof(struct il3945_addsta_cmd); 2250 return (u16)sizeof(struct il3945_addsta_cmd);
2251} 2251}
2252 2252
2253static int il3945_add_bssid_station(struct il_priv *priv, 2253static int il3945_add_bssid_station(struct il_priv *il,
2254 const u8 *addr, u8 *sta_id_r) 2254 const u8 *addr, u8 *sta_id_r)
2255{ 2255{
2256 struct il_rxon_context *ctx = &priv->contexts[IL_RXON_CTX_BSS]; 2256 struct il_rxon_context *ctx = &il->contexts[IL_RXON_CTX_BSS];
2257 int ret; 2257 int ret;
2258 u8 sta_id; 2258 u8 sta_id;
2259 unsigned long flags; 2259 unsigned long flags;
@@ -2261,49 +2261,49 @@ static int il3945_add_bssid_station(struct il_priv *priv,
2261 if (sta_id_r) 2261 if (sta_id_r)
2262 *sta_id_r = IL_INVALID_STATION; 2262 *sta_id_r = IL_INVALID_STATION;
2263 2263
2264 ret = il_add_station_common(priv, ctx, addr, 0, NULL, &sta_id); 2264 ret = il_add_station_common(il, ctx, addr, 0, NULL, &sta_id);
2265 if (ret) { 2265 if (ret) {
2266 IL_ERR(priv, "Unable to add station %pM\n", addr); 2266 IL_ERR(il, "Unable to add station %pM\n", addr);
2267 return ret; 2267 return ret;
2268 } 2268 }
2269 2269
2270 if (sta_id_r) 2270 if (sta_id_r)
2271 *sta_id_r = sta_id; 2271 *sta_id_r = sta_id;
2272 2272
2273 spin_lock_irqsave(&priv->sta_lock, flags); 2273 spin_lock_irqsave(&il->sta_lock, flags);
2274 priv->stations[sta_id].used |= IL_STA_LOCAL; 2274 il->stations[sta_id].used |= IL_STA_LOCAL;
2275 spin_unlock_irqrestore(&priv->sta_lock, flags); 2275 spin_unlock_irqrestore(&il->sta_lock, flags);
2276 2276
2277 return 0; 2277 return 0;
2278} 2278}
2279static int il3945_manage_ibss_station(struct il_priv *priv, 2279static int il3945_manage_ibss_station(struct il_priv *il,
2280 struct ieee80211_vif *vif, bool add) 2280 struct ieee80211_vif *vif, bool add)
2281{ 2281{
2282 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 2282 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2283 int ret; 2283 int ret;
2284 2284
2285 if (add) { 2285 if (add) {
2286 ret = il3945_add_bssid_station(priv, vif->bss_conf.bssid, 2286 ret = il3945_add_bssid_station(il, vif->bss_conf.bssid,
2287 &vif_priv->ibss_bssid_sta_id); 2287 &vif_priv->ibss_bssid_sta_id);
2288 if (ret) 2288 if (ret)
2289 return ret; 2289 return ret;
2290 2290
2291 il3945_sync_sta(priv, vif_priv->ibss_bssid_sta_id, 2291 il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id,
2292 (priv->band == IEEE80211_BAND_5GHZ) ? 2292 (il->band == IEEE80211_BAND_5GHZ) ?
2293 IL_RATE_6M_PLCP : IL_RATE_1M_PLCP); 2293 IL_RATE_6M_PLCP : IL_RATE_1M_PLCP);
2294 il3945_rate_scale_init(priv->hw, vif_priv->ibss_bssid_sta_id); 2294 il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id);
2295 2295
2296 return 0; 2296 return 0;
2297 } 2297 }
2298 2298
2299 return il_remove_station(priv, vif_priv->ibss_bssid_sta_id, 2299 return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
2300 vif->bss_conf.bssid); 2300 vif->bss_conf.bssid);
2301} 2301}
2302 2302
2303/** 2303/**
2304 * il3945_init_hw_rate_table - Initialize the hardware rate fallback table 2304 * il3945_init_hw_rate_table - Initialize the hardware rate fallback table
2305 */ 2305 */
2306int il3945_init_hw_rate_table(struct il_priv *priv) 2306int il3945_init_hw_rate_table(struct il_priv *il)
2307{ 2307{
2308 int rc, i, index, prev_index; 2308 int rc, i, index, prev_index;
2309 struct il3945_rate_scaling_cmd rate_cmd = { 2309 struct il3945_rate_scaling_cmd rate_cmd = {
@@ -2316,15 +2316,15 @@ int il3945_init_hw_rate_table(struct il_priv *priv)
2316 2316
2317 table[index].rate_n_flags = 2317 table[index].rate_n_flags =
2318 il3945_hw_set_rate_n_flags(il3945_rates[i].plcp, 0); 2318 il3945_hw_set_rate_n_flags(il3945_rates[i].plcp, 0);
2319 table[index].try_cnt = priv->retry_rate; 2319 table[index].try_cnt = il->retry_rate;
2320 prev_index = il3945_get_prev_ieee_rate(i); 2320 prev_index = il3945_get_prev_ieee_rate(i);
2321 table[index].next_rate_index = 2321 table[index].next_rate_index =
2322 il3945_rates[prev_index].table_rs_index; 2322 il3945_rates[prev_index].table_rs_index;
2323 } 2323 }
2324 2324
2325 switch (priv->band) { 2325 switch (il->band) {
2326 case IEEE80211_BAND_5GHZ: 2326 case IEEE80211_BAND_5GHZ:
2327 IL_DEBUG_RATE(priv, "Select A mode rate scale\n"); 2327 IL_DEBUG_RATE(il, "Select A mode rate scale\n");
2328 /* If one of the following CCK rates is used, 2328 /* If one of the following CCK rates is used,
2329 * have it fall back to the 6M OFDM rate */ 2329 * have it fall back to the 6M OFDM rate */
2330 for (i = IL_RATE_1M_INDEX_TABLE; 2330 for (i = IL_RATE_1M_INDEX_TABLE;
@@ -2342,12 +2342,12 @@ int il3945_init_hw_rate_table(struct il_priv *priv)
2342 break; 2342 break;
2343 2343
2344 case IEEE80211_BAND_2GHZ: 2344 case IEEE80211_BAND_2GHZ:
2345 IL_DEBUG_RATE(priv, "Select B/G mode rate scale\n"); 2345 IL_DEBUG_RATE(il, "Select B/G mode rate scale\n");
2346 /* If an OFDM rate is used, have it fall back to the 2346 /* If an OFDM rate is used, have it fall back to the
2347 * 1M CCK rates */ 2347 * 1M CCK rates */
2348 2348
2349 if (!(priv->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) && 2349 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
2350 il_is_associated(priv, IL_RXON_CTX_BSS)) { 2350 il_is_associated(il, IL_RXON_CTX_BSS)) {
2351 2351
2352 index = IL_FIRST_CCK_RATE; 2352 index = IL_FIRST_CCK_RATE;
2353 for (i = IL_RATE_6M_INDEX_TABLE; 2353 for (i = IL_RATE_6M_INDEX_TABLE;
@@ -2368,52 +2368,52 @@ int il3945_init_hw_rate_table(struct il_priv *priv)
2368 2368
2369 /* Update the rate scaling for control frame Tx */ 2369 /* Update the rate scaling for control frame Tx */
2370 rate_cmd.table_id = 0; 2370 rate_cmd.table_id = 0;
2371 rc = il_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd), 2371 rc = il_send_cmd_pdu(il, REPLY_RATE_SCALE, sizeof(rate_cmd),
2372 &rate_cmd); 2372 &rate_cmd);
2373 if (rc) 2373 if (rc)
2374 return rc; 2374 return rc;
2375 2375
2376 /* Update the rate scaling for data frame Tx */ 2376 /* Update the rate scaling for data frame Tx */
2377 rate_cmd.table_id = 1; 2377 rate_cmd.table_id = 1;
2378 return il_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd), 2378 return il_send_cmd_pdu(il, REPLY_RATE_SCALE, sizeof(rate_cmd),
2379 &rate_cmd); 2379 &rate_cmd);
2380} 2380}
2381 2381
2382/* Called when initializing driver */ 2382/* Called when initializing driver */
2383int il3945_hw_set_hw_params(struct il_priv *priv) 2383int il3945_hw_set_hw_params(struct il_priv *il)
2384{ 2384{
2385 memset((void *)&priv->hw_params, 0, 2385 memset((void *)&il->hw_params, 0,
2386 sizeof(struct il_hw_params)); 2386 sizeof(struct il_hw_params));
2387 2387
2388 priv->_3945.shared_virt = 2388 il->_3945.shared_virt =
2389 dma_alloc_coherent(&priv->pci_dev->dev, 2389 dma_alloc_coherent(&il->pci_dev->dev,
2390 sizeof(struct il3945_shared), 2390 sizeof(struct il3945_shared),
2391 &priv->_3945.shared_phys, GFP_KERNEL); 2391 &il->_3945.shared_phys, GFP_KERNEL);
2392 if (!priv->_3945.shared_virt) { 2392 if (!il->_3945.shared_virt) {
2393 IL_ERR(priv, "failed to allocate pci memory\n"); 2393 IL_ERR(il, "failed to allocate pci memory\n");
2394 return -ENOMEM; 2394 return -ENOMEM;
2395 } 2395 }
2396 2396
2397 /* Assign number of Usable TX queues */ 2397 /* Assign number of Usable TX queues */
2398 priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues; 2398 il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
2399 2399
2400 priv->hw_params.tfd_size = sizeof(struct il3945_tfd); 2400 il->hw_params.tfd_size = sizeof(struct il3945_tfd);
2401 priv->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K); 2401 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K);
2402 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; 2402 il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2403 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; 2403 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2404 priv->hw_params.max_stations = IWL3945_STATION_COUNT; 2404 il->hw_params.max_stations = IWL3945_STATION_COUNT;
2405 priv->contexts[IL_RXON_CTX_BSS].bcast_sta_id = IWL3945_BROADCAST_ID; 2405 il->contexts[IL_RXON_CTX_BSS].bcast_sta_id = IWL3945_BROADCAST_ID;
2406 2406
2407 priv->sta_key_max_num = STA_KEY_MAX_NUM; 2407 il->sta_key_max_num = STA_KEY_MAX_NUM;
2408 2408
2409 priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR; 2409 il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2410 priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL; 2410 il->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL;
2411 priv->hw_params.beacon_time_tsf_bits = IWL3945_EXT_BEACON_TIME_POS; 2411 il->hw_params.beacon_time_tsf_bits = IWL3945_EXT_BEACON_TIME_POS;
2412 2412
2413 return 0; 2413 return 0;
2414} 2414}
2415 2415
2416unsigned int il3945_hw_get_beacon_cmd(struct il_priv *priv, 2416unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il,
2417 struct il3945_frame *frame, u8 rate) 2417 struct il3945_frame *frame, u8 rate)
2418{ 2418{
2419 struct il3945_tx_beacon_cmd *tx_beacon_cmd; 2419 struct il3945_tx_beacon_cmd *tx_beacon_cmd;
@@ -2423,10 +2423,10 @@ unsigned int il3945_hw_get_beacon_cmd(struct il_priv *priv,
2423 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); 2423 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2424 2424
2425 tx_beacon_cmd->tx.sta_id = 2425 tx_beacon_cmd->tx.sta_id =
2426 priv->contexts[IL_RXON_CTX_BSS].bcast_sta_id; 2426 il->contexts[IL_RXON_CTX_BSS].bcast_sta_id;
2427 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 2427 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2428 2428
2429 frame_size = il3945_fill_beacon_frame(priv, 2429 frame_size = il3945_fill_beacon_frame(il,
2430 tx_beacon_cmd->frame, 2430 tx_beacon_cmd->frame,
2431 sizeof(frame->u) - sizeof(*tx_beacon_cmd)); 2431 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2432 2432
@@ -2447,41 +2447,41 @@ unsigned int il3945_hw_get_beacon_cmd(struct il_priv *priv,
2447 return sizeof(struct il3945_tx_beacon_cmd) + frame_size; 2447 return sizeof(struct il3945_tx_beacon_cmd) + frame_size;
2448} 2448}
2449 2449
2450void il3945_hw_rx_handler_setup(struct il_priv *priv) 2450void il3945_hw_rx_handler_setup(struct il_priv *il)
2451{ 2451{
2452 priv->rx_handlers[REPLY_TX] = il3945_rx_reply_tx; 2452 il->rx_handlers[REPLY_TX] = il3945_rx_reply_tx;
2453 priv->rx_handlers[REPLY_3945_RX] = il3945_rx_reply_rx; 2453 il->rx_handlers[REPLY_3945_RX] = il3945_rx_reply_rx;
2454} 2454}
2455 2455
2456void il3945_hw_setup_deferred_work(struct il_priv *priv) 2456void il3945_hw_setup_deferred_work(struct il_priv *il)
2457{ 2457{
2458 INIT_DELAYED_WORK(&priv->_3945.thermal_periodic, 2458 INIT_DELAYED_WORK(&il->_3945.thermal_periodic,
2459 il3945_bg_reg_txpower_periodic); 2459 il3945_bg_reg_txpower_periodic);
2460} 2460}
2461 2461
2462void il3945_hw_cancel_deferred_work(struct il_priv *priv) 2462void il3945_hw_cancel_deferred_work(struct il_priv *il)
2463{ 2463{
2464 cancel_delayed_work(&priv->_3945.thermal_periodic); 2464 cancel_delayed_work(&il->_3945.thermal_periodic);
2465} 2465}
2466 2466
2467/* check contents of special bootstrap uCode SRAM */ 2467/* check contents of special bootstrap uCode SRAM */
2468static int il3945_verify_bsm(struct il_priv *priv) 2468static int il3945_verify_bsm(struct il_priv *il)
2469 { 2469 {
2470 __le32 *image = priv->ucode_boot.v_addr; 2470 __le32 *image = il->ucode_boot.v_addr;
2471 u32 len = priv->ucode_boot.len; 2471 u32 len = il->ucode_boot.len;
2472 u32 reg; 2472 u32 reg;
2473 u32 val; 2473 u32 val;
2474 2474
2475 IL_DEBUG_INFO(priv, "Begin verify bsm\n"); 2475 IL_DEBUG_INFO(il, "Begin verify bsm\n");
2476 2476
2477 /* verify BSM SRAM contents */ 2477 /* verify BSM SRAM contents */
2478 val = il_read_prph(priv, BSM_WR_DWCOUNT_REG); 2478 val = il_read_prph(il, BSM_WR_DWCOUNT_REG);
2479 for (reg = BSM_SRAM_LOWER_BOUND; 2479 for (reg = BSM_SRAM_LOWER_BOUND;
2480 reg < BSM_SRAM_LOWER_BOUND + len; 2480 reg < BSM_SRAM_LOWER_BOUND + len;
2481 reg += sizeof(u32), image++) { 2481 reg += sizeof(u32), image++) {
2482 val = il_read_prph(priv, reg); 2482 val = il_read_prph(il, reg);
2483 if (val != le32_to_cpu(*image)) { 2483 if (val != le32_to_cpu(*image)) {
2484 IL_ERR(priv, "BSM uCode verification failed at " 2484 IL_ERR(il, "BSM uCode verification failed at "
2485 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", 2485 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2486 BSM_SRAM_LOWER_BOUND, 2486 BSM_SRAM_LOWER_BOUND,
2487 reg - BSM_SRAM_LOWER_BOUND, len, 2487 reg - BSM_SRAM_LOWER_BOUND, len,
@@ -2490,7 +2490,7 @@ static int il3945_verify_bsm(struct il_priv *priv)
2490 } 2490 }
2491 } 2491 }
2492 2492
2493 IL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n"); 2493 IL_DEBUG_INFO(il, "BSM bootstrap uCode image OK\n");
2494 2494
2495 return 0; 2495 return 0;
2496} 2496}
@@ -2510,14 +2510,14 @@ static int il3945_verify_bsm(struct il_priv *priv)
2510 * simply claims ownership, which should be safe when this function is called 2510 * simply claims ownership, which should be safe when this function is called
2511 * (i.e. before loading uCode!). 2511 * (i.e. before loading uCode!).
2512 */ 2512 */
2513static int il3945_eeprom_acquire_semaphore(struct il_priv *priv) 2513static int il3945_eeprom_acquire_semaphore(struct il_priv *il)
2514{ 2514{
2515 _il_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); 2515 _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2516 return 0; 2516 return 0;
2517} 2517}
2518 2518
2519 2519
2520static void il3945_eeprom_release_semaphore(struct il_priv *priv) 2520static void il3945_eeprom_release_semaphore(struct il_priv *il)
2521{ 2521{
2522 return; 2522 return;
2523} 2523}
@@ -2554,10 +2554,10 @@ static void il3945_eeprom_release_semaphore(struct il_priv *priv)
2554 * the runtime uCode instructions and the backup data cache into SRAM, 2554 * the runtime uCode instructions and the backup data cache into SRAM,
2555 * and re-launches the runtime uCode from where it left off. 2555 * and re-launches the runtime uCode from where it left off.
2556 */ 2556 */
2557static int il3945_load_bsm(struct il_priv *priv) 2557static int il3945_load_bsm(struct il_priv *il)
2558{ 2558{
2559 __le32 *image = priv->ucode_boot.v_addr; 2559 __le32 *image = il->ucode_boot.v_addr;
2560 u32 len = priv->ucode_boot.len; 2560 u32 len = il->ucode_boot.len;
2561 dma_addr_t pinst; 2561 dma_addr_t pinst;
2562 dma_addr_t pdata; 2562 dma_addr_t pdata;
2563 u32 inst_len; 2563 u32 inst_len;
@@ -2567,7 +2567,7 @@ static int il3945_load_bsm(struct il_priv *priv)
2567 u32 done; 2567 u32 done;
2568 u32 reg_offset; 2568 u32 reg_offset;
2569 2569
2570 IL_DEBUG_INFO(priv, "Begin load bsm\n"); 2570 IL_DEBUG_INFO(il, "Begin load bsm\n");
2571 2571
2572 /* make sure bootstrap program is no larger than BSM's SRAM size */ 2572 /* make sure bootstrap program is no larger than BSM's SRAM size */
2573 if (len > IWL39_MAX_BSM_SIZE) 2573 if (len > IWL39_MAX_BSM_SIZE)
@@ -2578,55 +2578,55 @@ static int il3945_load_bsm(struct il_priv *priv)
2578 * NOTE: il3945_initialize_alive_start() will replace these values, 2578 * NOTE: il3945_initialize_alive_start() will replace these values,
2579 * after the "initialize" uCode has run, to point to 2579 * after the "initialize" uCode has run, to point to
2580 * runtime/protocol instructions and backup data cache. */ 2580 * runtime/protocol instructions and backup data cache. */
2581 pinst = priv->ucode_init.p_addr; 2581 pinst = il->ucode_init.p_addr;
2582 pdata = priv->ucode_init_data.p_addr; 2582 pdata = il->ucode_init_data.p_addr;
2583 inst_len = priv->ucode_init.len; 2583 inst_len = il->ucode_init.len;
2584 data_len = priv->ucode_init_data.len; 2584 data_len = il->ucode_init_data.len;
2585 2585
2586 il_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 2586 il_write_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2587 il_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 2587 il_write_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2588 il_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); 2588 il_write_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2589 il_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); 2589 il_write_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2590 2590
2591 /* Fill BSM memory with bootstrap instructions */ 2591 /* Fill BSM memory with bootstrap instructions */
2592 for (reg_offset = BSM_SRAM_LOWER_BOUND; 2592 for (reg_offset = BSM_SRAM_LOWER_BOUND;
2593 reg_offset < BSM_SRAM_LOWER_BOUND + len; 2593 reg_offset < BSM_SRAM_LOWER_BOUND + len;
2594 reg_offset += sizeof(u32), image++) 2594 reg_offset += sizeof(u32), image++)
2595 _il_write_prph(priv, reg_offset, 2595 _il_write_prph(il, reg_offset,
2596 le32_to_cpu(*image)); 2596 le32_to_cpu(*image));
2597 2597
2598 rc = il3945_verify_bsm(priv); 2598 rc = il3945_verify_bsm(il);
2599 if (rc) 2599 if (rc)
2600 return rc; 2600 return rc;
2601 2601
2602 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ 2602 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2603 il_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); 2603 il_write_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
2604 il_write_prph(priv, BSM_WR_MEM_DST_REG, 2604 il_write_prph(il, BSM_WR_MEM_DST_REG,
2605 IWL39_RTC_INST_LOWER_BOUND); 2605 IWL39_RTC_INST_LOWER_BOUND);
2606 il_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); 2606 il_write_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2607 2607
2608 /* Load bootstrap code into instruction SRAM now, 2608 /* Load bootstrap code into instruction SRAM now,
2609 * to prepare to load "initialize" uCode */ 2609 * to prepare to load "initialize" uCode */
2610 il_write_prph(priv, BSM_WR_CTRL_REG, 2610 il_write_prph(il, BSM_WR_CTRL_REG,
2611 BSM_WR_CTRL_REG_BIT_START); 2611 BSM_WR_CTRL_REG_BIT_START);
2612 2612
2613 /* Wait for load of bootstrap uCode to finish */ 2613 /* Wait for load of bootstrap uCode to finish */
2614 for (i = 0; i < 100; i++) { 2614 for (i = 0; i < 100; i++) {
2615 done = il_read_prph(priv, BSM_WR_CTRL_REG); 2615 done = il_read_prph(il, BSM_WR_CTRL_REG);
2616 if (!(done & BSM_WR_CTRL_REG_BIT_START)) 2616 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2617 break; 2617 break;
2618 udelay(10); 2618 udelay(10);
2619 } 2619 }
2620 if (i < 100) 2620 if (i < 100)
2621 IL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i); 2621 IL_DEBUG_INFO(il, "BSM write complete, poll %d iterations\n", i);
2622 else { 2622 else {
2623 IL_ERR(priv, "BSM write did not complete!\n"); 2623 IL_ERR(il, "BSM write did not complete!\n");
2624 return -EIO; 2624 return -EIO;
2625 } 2625 }
2626 2626
2627 /* Enable future boot loads whenever power management unit triggers it 2627 /* Enable future boot loads whenever power management unit triggers it
2628 * (e.g. when powering back up after power-save shutdown) */ 2628 * (e.g. when powering back up after power-save shutdown) */
2629 il_write_prph(priv, BSM_WR_CTRL_REG, 2629 il_write_prph(il, BSM_WR_CTRL_REG,
2630 BSM_WR_CTRL_REG_BIT_START_EN); 2630 BSM_WR_CTRL_REG_BIT_START_EN);
2631 2631
2632 return 0; 2632 return 0;