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path: root/drivers/net/wireless/iwlegacy/common.h
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-rw-r--r--drivers/net/wireless/iwlegacy/common.h934
1 files changed, 456 insertions, 478 deletions
diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h
index b1d237fc5fb7..38ff3d66c745 100644
--- a/drivers/net/wireless/iwlegacy/common.h
+++ b/drivers/net/wireless/iwlegacy/common.h
@@ -27,7 +27,7 @@
27#define __il_core_h__ 27#define __il_core_h__
28 28
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/pci.h> /* for struct pci_device_id */ 30#include <linux/pci.h> /* for struct pci_device_id */
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/leds.h> 32#include <linux/leds.h>
33#include <linux/wait.h> 33#include <linux/wait.h>
@@ -59,7 +59,7 @@ struct il_tx_queue;
59#define U32_PAD(n) ((4-(n))&0x3) 59#define U32_PAD(n) ((4-(n))&0x3)
60 60
61/* CT-KILL constants */ 61/* CT-KILL constants */
62#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ 62#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
63 63
64/* Default noise level to report when noise measurement is not available. 64/* Default noise level to report when noise measurement is not available.
65 * This may be because we're: 65 * This may be because we're:
@@ -112,16 +112,15 @@ struct il_cmd_meta {
112 * invoked for SYNC commands, if it were and its result passed 112 * invoked for SYNC commands, if it were and its result passed
113 * through it would be simpler...) 113 * through it would be simpler...)
114 */ 114 */
115 void (*callback)(struct il_priv *il, 115 void (*callback) (struct il_priv * il, struct il_device_cmd * cmd,
116 struct il_device_cmd *cmd, 116 struct il_rx_pkt * pkt);
117 struct il_rx_pkt *pkt);
118 117
119 /* The CMD_SIZE_HUGE flag bit indicates that the command 118 /* The CMD_SIZE_HUGE flag bit indicates that the command
120 * structure is stored at the end of the shared queue memory. */ 119 * structure is stored at the end of the shared queue memory. */
121 u32 flags; 120 u32 flags;
122 121
123 DEFINE_DMA_UNMAP_ADDR(mapping); 122 DEFINE_DMA_UNMAP_ADDR(mapping);
124 DEFINE_DMA_UNMAP_LEN(len); 123 DEFINE_DMA_UNMAP_LEN(len);
125}; 124};
126 125
127/* 126/*
@@ -130,17 +129,17 @@ struct il_cmd_meta {
130 * Contains common data for Rx and Tx queues 129 * Contains common data for Rx and Tx queues
131 */ 130 */
132struct il_queue { 131struct il_queue {
133 int n_bd; /* number of BDs in this queue */ 132 int n_bd; /* number of BDs in this queue */
134 int write_ptr; /* 1-st empty entry (idx) host_w*/ 133 int write_ptr; /* 1-st empty entry (idx) host_w */
135 int read_ptr; /* last used entry (idx) host_r*/ 134 int read_ptr; /* last used entry (idx) host_r */
136 /* use for monitoring and recovering the stuck queue */ 135 /* use for monitoring and recovering the stuck queue */
137 dma_addr_t dma_addr; /* physical addr for BD's */ 136 dma_addr_t dma_addr; /* physical addr for BD's */
138 int n_win; /* safe queue win */ 137 int n_win; /* safe queue win */
139 u32 id; 138 u32 id;
140 int low_mark; /* low watermark, resume queue if free 139 int low_mark; /* low watermark, resume queue if free
141 * space more than this */ 140 * space more than this */
142 int high_mark; /* high watermark, stop queue if free 141 int high_mark; /* high watermark, stop queue if free
143 * space less than this */ 142 * space less than this */
144}; 143};
145 144
146/* One for each TFD */ 145/* One for each TFD */
@@ -188,11 +187,10 @@ struct il_tx_queue {
188 * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec. 187 * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
189 * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG. 188 * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
190 */ 189 */
191#define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ 190#define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
192
193#define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
194#define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
195 191
192#define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
193#define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
196 194
197/* 195/*
198 * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags. 196 * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags.
@@ -213,11 +211,11 @@ struct il_tx_queue {
213#define IL_NUM_TX_CALIB_GROUPS 5 211#define IL_NUM_TX_CALIB_GROUPS 5
214enum { 212enum {
215 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ 213 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
216 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ 214 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
217 /* Bit 2 Reserved */ 215 /* Bit 2 Reserved */
218 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ 216 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
219 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ 217 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
220 EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */ 218 EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
221 /* Bit 6 Reserved (was Narrow Channel) */ 219 /* Bit 6 Reserved (was Narrow Channel) */
222 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ 220 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
223}; 221};
@@ -251,10 +249,10 @@ struct il_eeprom_channel {
251/* 4965 driver does not work with txpower calibration version < 5 */ 249/* 4965 driver does not work with txpower calibration version < 5 */
252#define EEPROM_4965_TX_POWER_VERSION (5) 250#define EEPROM_4965_TX_POWER_VERSION (5)
253#define EEPROM_4965_EEPROM_VERSION (0x2f) 251#define EEPROM_4965_EEPROM_VERSION (0x2f)
254#define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ 252#define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
255#define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ 253#define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
256#define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ 254#define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
257#define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ 255#define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
258 256
259/* 2.4 GHz */ 257/* 2.4 GHz */
260extern const u8 il_eeprom_band_1[14]; 258extern const u8 il_eeprom_band_1[14];
@@ -280,7 +278,6 @@ struct il_eeprom_calib_measure {
280 s8 pa_det; /* Power amp detector level (not used) */ 278 s8 pa_det; /* Power amp detector level (not used) */
281} __packed; 279} __packed;
282 280
283
284/* 281/*
285 * measurement set for one channel. EEPROM contains: 282 * measurement set for one channel. EEPROM contains:
286 * 283 *
@@ -292,8 +289,8 @@ struct il_eeprom_calib_measure {
292struct il_eeprom_calib_ch_info { 289struct il_eeprom_calib_ch_info {
293 u8 ch_num; 290 u8 ch_num;
294 struct il_eeprom_calib_measure 291 struct il_eeprom_calib_measure
295 measurements[EEPROM_TX_POWER_TX_CHAINS] 292 measurements[EEPROM_TX_POWER_TX_CHAINS]
296 [EEPROM_TX_POWER_MEASUREMENTS]; 293 [EEPROM_TX_POWER_MEASUREMENTS];
297} __packed; 294} __packed;
298 295
299/* 296/*
@@ -307,13 +304,12 @@ struct il_eeprom_calib_ch_info {
307 * 2) Sample measurement sets for 2 channels close to the range endpoints. 304 * 2) Sample measurement sets for 2 channels close to the range endpoints.
308 */ 305 */
309struct il_eeprom_calib_subband_info { 306struct il_eeprom_calib_subband_info {
310 u8 ch_from; /* channel number of lowest channel in subband */ 307 u8 ch_from; /* channel number of lowest channel in subband */
311 u8 ch_to; /* channel number of highest channel in subband */ 308 u8 ch_to; /* channel number of highest channel in subband */
312 struct il_eeprom_calib_ch_info ch1; 309 struct il_eeprom_calib_ch_info ch1;
313 struct il_eeprom_calib_ch_info ch2; 310 struct il_eeprom_calib_ch_info ch2;
314} __packed; 311} __packed;
315 312
316
317/* 313/*
318 * txpower calibration info. EEPROM contains: 314 * txpower calibration info. EEPROM contains:
319 * 315 *
@@ -338,11 +334,9 @@ struct il_eeprom_calib_info {
338 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ 334 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
339 u8 saturation_power52; /* half-dBm */ 335 u8 saturation_power52; /* half-dBm */
340 __le16 voltage; /* signed */ 336 __le16 voltage; /* signed */
341 struct il_eeprom_calib_subband_info 337 struct il_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
342 band_info[EEPROM_TX_POWER_BANDS];
343} __packed; 338} __packed;
344 339
345
346/* General */ 340/* General */
347#define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ 341#define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
348#define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ 342#define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
@@ -356,12 +350,12 @@ struct il_eeprom_calib_info {
356#define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */ 350#define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */
357 351
358/* The following masks are to be applied on EEPROM_RADIO_CONFIG */ 352/* The following masks are to be applied on EEPROM_RADIO_CONFIG */
359#define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ 353#define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
360#define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ 354#define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
361#define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ 355#define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
362#define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ 356#define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
363#define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ 357#define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
364#define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ 358#define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
365 359
366#define EEPROM_3945_RF_CFG_TYPE_MAX 0x0 360#define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
367#define EEPROM_4965_RF_CFG_TYPE_MAX 0x1 361#define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
@@ -378,7 +372,7 @@ struct il_eeprom_calib_info {
378 * 372 *
379 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 373 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
380 */ 374 */
381#define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ 375#define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
382#define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ 376#define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
383#define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ 377#define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
384 378
@@ -438,22 +432,19 @@ struct il_eeprom_calib_info {
438 432
439struct il_eeprom_ops { 433struct il_eeprom_ops {
440 const u32 regulatory_bands[7]; 434 const u32 regulatory_bands[7];
441 int (*acquire_semaphore) (struct il_priv *il); 435 int (*acquire_semaphore) (struct il_priv * il);
442 void (*release_semaphore) (struct il_priv *il); 436 void (*release_semaphore) (struct il_priv * il);
443}; 437};
444 438
445
446int il_eeprom_init(struct il_priv *il); 439int il_eeprom_init(struct il_priv *il);
447void il_eeprom_free(struct il_priv *il); 440void il_eeprom_free(struct il_priv *il);
448const u8 *il_eeprom_query_addr(const struct il_priv *il, 441const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset);
449 size_t offset);
450u16 il_eeprom_query16(const struct il_priv *il, size_t offset); 442u16 il_eeprom_query16(const struct il_priv *il, size_t offset);
451int il_init_channel_map(struct il_priv *il); 443int il_init_channel_map(struct il_priv *il);
452void il_free_channel_map(struct il_priv *il); 444void il_free_channel_map(struct il_priv *il);
453const struct il_channel_info *il_get_channel_info( 445const struct il_channel_info *il_get_channel_info(const struct il_priv *il,
454 const struct il_priv *il, 446 enum ieee80211_band band,
455 enum ieee80211_band band, u16 channel); 447 u16 channel);
456
457 448
458#define IL_NUM_SCAN_RATES (2) 449#define IL_NUM_SCAN_RATES (2)
459 450
@@ -508,21 +499,21 @@ struct il_channel_info {
508 struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for 499 struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
509 * HT40 channel */ 500 * HT40 channel */
510 501
511 u8 channel; /* channel number */ 502 u8 channel; /* channel number */
512 u8 flags; /* flags copied from EEPROM */ 503 u8 flags; /* flags copied from EEPROM */
513 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 504 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
514 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ 505 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
515 s8 min_power; /* always 0 */ 506 s8 min_power; /* always 0 */
516 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ 507 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
517 508
518 u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */ 509 u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */
519 u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */ 510 u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */
520 enum ieee80211_band band; 511 enum ieee80211_band band;
521 512
522 /* HT40 channel info */ 513 /* HT40 channel info */
523 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 514 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
524 u8 ht40_flags; /* flags copied from EEPROM */ 515 u8 ht40_flags; /* flags copied from EEPROM */
525 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 516 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
526 517
527 /* Radio/DSP gain settings for each "normal" data Tx rate. 518 /* Radio/DSP gain settings for each "normal" data Tx rate.
528 * These include, in addition to RF and DSP gain, a few fields for 519 * These include, in addition to RF and DSP gain, a few fields for
@@ -598,13 +589,11 @@ struct il_device_cmd {
598 589
599#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd)) 590#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd))
600 591
601
602struct il_host_cmd { 592struct il_host_cmd {
603 const void *data; 593 const void *data;
604 unsigned long reply_page; 594 unsigned long reply_page;
605 void (*callback)(struct il_priv *il, 595 void (*callback) (struct il_priv * il, struct il_device_cmd * cmd,
606 struct il_device_cmd *cmd, 596 struct il_rx_pkt * pkt);
607 struct il_rx_pkt *pkt);
608 u32 flags; 597 u32 flags;
609 u16 len; 598 u16 len;
610 u8 id; 599 u8 id;
@@ -681,9 +670,8 @@ struct il_ht_agg {
681 u8 state; 670 u8 state;
682}; 671};
683 672
684
685struct il_tid_data { 673struct il_tid_data {
686 u16 seq_number; /* 4965 only */ 674 u16 seq_number; /* 4965 only */
687 u16 tfds_in_queue; 675 u16 tfds_in_queue;
688 struct il_ht_agg agg; 676 struct il_ht_agg agg;
689}; 677};
@@ -728,7 +716,7 @@ union il_ht_rate_supp {
728 716
729struct il_ht_config { 717struct il_ht_config {
730 bool single_chain_sufficient; 718 bool single_chain_sufficient;
731 enum ieee80211_smps_mode smps; /* current smps mode */ 719 enum ieee80211_smps_mode smps; /* current smps mode */
732}; 720};
733 721
734/* QoS structures */ 722/* QoS structures */
@@ -776,14 +764,14 @@ struct fw_desc {
776 764
777/* uCode file layout */ 765/* uCode file layout */
778struct il_ucode_header { 766struct il_ucode_header {
779 __le32 ver; /* major/minor/API/serial */ 767 __le32 ver; /* major/minor/API/serial */
780 struct { 768 struct {
781 __le32 inst_size; /* bytes of runtime code */ 769 __le32 inst_size; /* bytes of runtime code */
782 __le32 data_size; /* bytes of runtime data */ 770 __le32 data_size; /* bytes of runtime data */
783 __le32 init_size; /* bytes of init code */ 771 __le32 init_size; /* bytes of init code */
784 __le32 init_data_size; /* bytes of init data */ 772 __le32 init_data_size; /* bytes of init data */
785 __le32 boot_size; /* bytes of bootstrap code */ 773 __le32 boot_size; /* bytes of bootstrap code */
786 u8 data[0]; /* in same order as sizes */ 774 u8 data[0]; /* in same order as sizes */
787 } v1; 775 } v1;
788}; 776};
789 777
@@ -822,11 +810,9 @@ struct il_sensitivity_ranges {
822 u16 nrg_th_cca; 810 u16 nrg_th_cca;
823}; 811};
824 812
825
826#define KELVIN_TO_CELSIUS(x) ((x)-273) 813#define KELVIN_TO_CELSIUS(x) ((x)-273)
827#define CELSIUS_TO_KELVIN(x) ((x)+273) 814#define CELSIUS_TO_KELVIN(x) ((x)+273)
828 815
829
830/** 816/**
831 * struct il_hw_params 817 * struct il_hw_params
832 * @max_txq_num: Max # Tx queues supported 818 * @max_txq_num: Max # Tx queues supported
@@ -853,26 +839,25 @@ struct il_hw_params {
853 u8 dma_chnl_num; 839 u8 dma_chnl_num;
854 u16 scd_bc_tbls_size; 840 u16 scd_bc_tbls_size;
855 u32 tfd_size; 841 u32 tfd_size;
856 u8 tx_chains_num; 842 u8 tx_chains_num;
857 u8 rx_chains_num; 843 u8 rx_chains_num;
858 u8 valid_tx_ant; 844 u8 valid_tx_ant;
859 u8 valid_rx_ant; 845 u8 valid_rx_ant;
860 u16 max_rxq_size; 846 u16 max_rxq_size;
861 u16 max_rxq_log; 847 u16 max_rxq_log;
862 u32 rx_page_order; 848 u32 rx_page_order;
863 u32 rx_wrt_ptr_reg; 849 u32 rx_wrt_ptr_reg;
864 u8 max_stations; 850 u8 max_stations;
865 u8 ht40_channel; 851 u8 ht40_channel;
866 u8 max_beacon_itrvl; /* in 1024 ms */ 852 u8 max_beacon_itrvl; /* in 1024 ms */
867 u32 max_inst_size; 853 u32 max_inst_size;
868 u32 max_data_size; 854 u32 max_data_size;
869 u32 max_bsm_size; 855 u32 max_bsm_size;
870 u32 ct_kill_threshold; /* value in hw-dependent units */ 856 u32 ct_kill_threshold; /* value in hw-dependent units */
871 u16 beacon_time_tsf_bits; 857 u16 beacon_time_tsf_bits;
872 const struct il_sensitivity_ranges *sens; 858 const struct il_sensitivity_ranges *sens;
873}; 859};
874 860
875
876/****************************************************************************** 861/******************************************************************************
877 * 862 *
878 * Functions implemented in core module which are forward declared here 863 * Functions implemented in core module which are forward declared here
@@ -891,16 +876,19 @@ struct il_hw_params {
891extern void il4965_update_chain_flags(struct il_priv *il); 876extern void il4965_update_chain_flags(struct il_priv *il);
892extern const u8 il_bcast_addr[ETH_ALEN]; 877extern const u8 il_bcast_addr[ETH_ALEN];
893extern int il_queue_space(const struct il_queue *q); 878extern int il_queue_space(const struct il_queue *q);
894static inline int il_queue_used(const struct il_queue *q, int i) 879static inline int
880il_queue_used(const struct il_queue *q, int i)
895{ 881{
896 return q->write_ptr >= q->read_ptr ? 882 return q->write_ptr >= q->read_ptr ? (i >= q->read_ptr &&
897 (i >= q->read_ptr && i < q->write_ptr) : 883 i < q->write_ptr) : !(i <
898 !(i < q->read_ptr && i >= q->write_ptr); 884 q->read_ptr
885 && i >=
886 q->
887 write_ptr);
899} 888}
900 889
901 890static inline u8
902static inline u8 il_get_cmd_idx(struct il_queue *q, u32 idx, 891il_get_cmd_idx(struct il_queue *q, u32 idx, int is_huge)
903 int is_huge)
904{ 892{
905 /* 893 /*
906 * This is for init calibration result and scan command which 894 * This is for init calibration result and scan command which
@@ -914,7 +902,6 @@ static inline u8 il_get_cmd_idx(struct il_queue *q, u32 idx,
914 return idx & (q->n_win - 1); 902 return idx & (q->n_win - 1);
915} 903}
916 904
917
918struct il_dma_ptr { 905struct il_dma_ptr {
919 dma_addr_t dma; 906 dma_addr_t dma;
920 void *addr; 907 void *addr;
@@ -974,14 +961,14 @@ enum il4965_false_alarm_state {
974}; 961};
975 962
976enum il4965_chain_noise_state { 963enum il4965_chain_noise_state {
977 IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ 964 IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
978 IL_CHAIN_NOISE_ACCUMULATE, 965 IL_CHAIN_NOISE_ACCUMULATE,
979 IL_CHAIN_NOISE_CALIBRATED, 966 IL_CHAIN_NOISE_CALIBRATED,
980 IL_CHAIN_NOISE_DONE, 967 IL_CHAIN_NOISE_DONE,
981}; 968};
982 969
983enum il4965_calib_enabled_state { 970enum il4965_calib_enabled_state {
984 IL_CALIB_DISABLED = 0, /* must be 0 */ 971 IL_CALIB_DISABLED = 0, /* must be 0 */
985 IL_CALIB_ENABLED = 1, 972 IL_CALIB_ENABLED = 1,
986}; 973};
987 974
@@ -1023,7 +1010,7 @@ struct il_sensitivity_data {
1023 u32 nrg_curr_state; 1010 u32 nrg_curr_state;
1024 u32 nrg_prev_state; 1011 u32 nrg_prev_state;
1025 u32 nrg_value[10]; 1012 u32 nrg_value[10];
1026 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; 1013 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
1027 u32 nrg_silence_ref; 1014 u32 nrg_silence_ref;
1028 u32 nrg_energy_idx; 1015 u32 nrg_energy_idx;
1029 u32 nrg_silence_idx; 1016 u32 nrg_silence_idx;
@@ -1053,7 +1040,7 @@ struct il_chain_noise_data {
1053 u8 state; 1040 u8 state;
1054}; 1041};
1055 1042
1056#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 1043#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
1057#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 1044#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
1058 1045
1059#define IL_TRAFFIC_ENTRIES (256) 1046#define IL_TRAFFIC_ENTRIES (256)
@@ -1098,7 +1085,7 @@ enum il_mgmt_stats {
1098}; 1085};
1099/* control stats */ 1086/* control stats */
1100enum il_ctrl_stats { 1087enum il_ctrl_stats {
1101 CONTROL_BACK_REQ = 0, 1088 CONTROL_BACK_REQ = 0,
1102 CONTROL_BACK, 1089 CONTROL_BACK,
1103 CONTROL_PSPOLL, 1090 CONTROL_PSPOLL,
1104 CONTROL_RTS, 1091 CONTROL_RTS,
@@ -1237,8 +1224,8 @@ struct il_priv {
1237 enum ieee80211_band band; 1224 enum ieee80211_band band;
1238 int alloc_rxb_page; 1225 int alloc_rxb_page;
1239 1226
1240 void (*handlers[IL_CN_MAX])(struct il_priv *il, 1227 void (*handlers[IL_CN_MAX]) (struct il_priv * il,
1241 struct il_rx_buf *rxb); 1228 struct il_rx_buf * rxb);
1242 1229
1243 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 1230 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1244 1231
@@ -1289,9 +1276,9 @@ struct il_priv {
1289 1276
1290 /* pci hardware address support */ 1277 /* pci hardware address support */
1291 void __iomem *hw_base; 1278 void __iomem *hw_base;
1292 u32 hw_rev; 1279 u32 hw_rev;
1293 u32 hw_wa_rev; 1280 u32 hw_wa_rev;
1294 u8 rev_id; 1281 u8 rev_id;
1295 1282
1296 /* command queue number */ 1283 /* command queue number */
1297 u8 cmd_queue; 1284 u8 cmd_queue;
@@ -1303,9 +1290,9 @@ struct il_priv {
1303 struct mac_address addresses[1]; 1290 struct mac_address addresses[1];
1304 1291
1305 /* uCode images, save to reload in case of failure */ 1292 /* uCode images, save to reload in case of failure */
1306 int fw_idx; /* firmware we're trying to load */ 1293 int fw_idx; /* firmware we're trying to load */
1307 u32 ucode_ver; /* version of ucode, copy of 1294 u32 ucode_ver; /* version of ucode, copy of
1308 il_ucode.ver */ 1295 il_ucode.ver */
1309 struct fw_desc ucode_code; /* runtime inst */ 1296 struct fw_desc ucode_code; /* runtime inst */
1310 struct fw_desc ucode_data; /* runtime data original */ 1297 struct fw_desc ucode_data; /* runtime data original */
1311 struct fw_desc ucode_data_backup; /* runtime data save/restore */ 1298 struct fw_desc ucode_data_backup; /* runtime data save/restore */
@@ -1345,8 +1332,8 @@ struct il_priv {
1345 struct il_rx_queue rxq; 1332 struct il_rx_queue rxq;
1346 struct il_tx_queue *txq; 1333 struct il_tx_queue *txq;
1347 unsigned long txq_ctx_active_msk; 1334 unsigned long txq_ctx_active_msk;
1348 struct il_dma_ptr kw; /* keep warm address */ 1335 struct il_dma_ptr kw; /* keep warm address */
1349 struct il_dma_ptr scd_bc_tbls; 1336 struct il_dma_ptr scd_bc_tbls;
1350 1337
1351 u32 scd_base_addr; /* scheduler sram base address */ 1338 u32 scd_base_addr; /* scheduler sram base address */
1352 1339
@@ -1362,7 +1349,7 @@ struct il_priv {
1362 struct il_power_mgr power_data; 1349 struct il_power_mgr power_data;
1363 1350
1364 /* context information */ 1351 /* context information */
1365 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ 1352 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
1366 1353
1367 /* station table variables */ 1354 /* station table variables */
1368 1355
@@ -1477,12 +1464,11 @@ struct il_priv {
1477 s8 tx_power_device_lmt; 1464 s8 tx_power_device_lmt;
1478 s8 tx_power_next; 1465 s8 tx_power_next;
1479 1466
1480
1481#ifdef CONFIG_IWLEGACY_DEBUG 1467#ifdef CONFIG_IWLEGACY_DEBUG
1482 /* debugging info */ 1468 /* debugging info */
1483 u32 debug_level; /* per device debugging will override global 1469 u32 debug_level; /* per device debugging will override global
1484 il_debug_level if set */ 1470 il_debug_level if set */
1485#endif /* CONFIG_IWLEGACY_DEBUG */ 1471#endif /* CONFIG_IWLEGACY_DEBUG */
1486#ifdef CONFIG_IWLEGACY_DEBUGFS 1472#ifdef CONFIG_IWLEGACY_DEBUGFS
1487 /* debugfs */ 1473 /* debugfs */
1488 u16 tx_traffic_idx; 1474 u16 tx_traffic_idx;
@@ -1492,7 +1478,7 @@ struct il_priv {
1492 struct dentry *debugfs_dir; 1478 struct dentry *debugfs_dir;
1493 u32 dbgfs_sram_offset, dbgfs_sram_len; 1479 u32 dbgfs_sram_offset, dbgfs_sram_len;
1494 bool disable_ht40; 1480 bool disable_ht40;
1495#endif /* CONFIG_IWLEGACY_DEBUGFS */ 1481#endif /* CONFIG_IWLEGACY_DEBUGFS */
1496 1482
1497 struct work_struct txpower_work; 1483 struct work_struct txpower_work;
1498 u32 disable_sens_cal; 1484 u32 disable_sens_cal;
@@ -1506,25 +1492,26 @@ struct il_priv {
1506 struct led_classdev led; 1492 struct led_classdev led;
1507 unsigned long blink_on, blink_off; 1493 unsigned long blink_on, blink_off;
1508 bool led_registered; 1494 bool led_registered;
1509}; /*il_priv */ 1495}; /*il_priv */
1510 1496
1511static inline void il_txq_ctx_activate(struct il_priv *il, int txq_id) 1497static inline void
1498il_txq_ctx_activate(struct il_priv *il, int txq_id)
1512{ 1499{
1513 set_bit(txq_id, &il->txq_ctx_active_msk); 1500 set_bit(txq_id, &il->txq_ctx_active_msk);
1514} 1501}
1515 1502
1516static inline void il_txq_ctx_deactivate(struct il_priv *il, int txq_id) 1503static inline void
1504il_txq_ctx_deactivate(struct il_priv *il, int txq_id)
1517{ 1505{
1518 clear_bit(txq_id, &il->txq_ctx_active_msk); 1506 clear_bit(txq_id, &il->txq_ctx_active_msk);
1519} 1507}
1520 1508
1521static inline struct ieee80211_hdr * 1509static inline struct ieee80211_hdr *
1522il_tx_queue_get_hdr(struct il_priv *il, 1510il_tx_queue_get_hdr(struct il_priv *il, int txq_id, int idx)
1523 int txq_id, int idx)
1524{ 1511{
1525 if (il->txq[txq_id].txb[idx].skb) 1512 if (il->txq[txq_id].txb[idx].skb)
1526 return (struct ieee80211_hdr *)il->txq[txq_id]. 1513 return (struct ieee80211_hdr *)il->txq[txq_id].txb[idx].skb->
1527 txb[idx].skb->data; 1514 data;
1528 return NULL; 1515 return NULL;
1529} 1516}
1530 1517
@@ -1539,34 +1526,40 @@ il_rxon_ctx_from_vif(struct ieee80211_vif *vif)
1539#define for_each_context(il, _ctx) \ 1526#define for_each_context(il, _ctx) \
1540 for (_ctx = &il->ctx; _ctx == &il->ctx; _ctx++) 1527 for (_ctx = &il->ctx; _ctx == &il->ctx; _ctx++)
1541 1528
1542static inline int il_is_associated(struct il_priv *il) 1529static inline int
1530il_is_associated(struct il_priv *il)
1543{ 1531{
1544 return (il->ctx.active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1532 return (il->ctx.active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1545} 1533}
1546 1534
1547static inline int il_is_any_associated(struct il_priv *il) 1535static inline int
1536il_is_any_associated(struct il_priv *il)
1548{ 1537{
1549 return il_is_associated(il); 1538 return il_is_associated(il);
1550} 1539}
1551 1540
1552static inline int il_is_associated_ctx(struct il_rxon_context *ctx) 1541static inline int
1542il_is_associated_ctx(struct il_rxon_context *ctx)
1553{ 1543{
1554 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1544 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1555} 1545}
1556 1546
1557static inline int il_is_channel_valid(const struct il_channel_info *ch_info) 1547static inline int
1548il_is_channel_valid(const struct il_channel_info *ch_info)
1558{ 1549{
1559 if (ch_info == NULL) 1550 if (ch_info == NULL)
1560 return 0; 1551 return 0;
1561 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; 1552 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1562} 1553}
1563 1554
1564static inline int il_is_channel_radar(const struct il_channel_info *ch_info) 1555static inline int
1556il_is_channel_radar(const struct il_channel_info *ch_info)
1565{ 1557{
1566 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; 1558 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1567} 1559}
1568 1560
1569static inline u8 il_is_channel_a_band(const struct il_channel_info *ch_info) 1561static inline u8
1562il_is_channel_a_band(const struct il_channel_info *ch_info)
1570{ 1563{
1571 return ch_info->band == IEEE80211_BAND_5GHZ; 1564 return ch_info->band == IEEE80211_BAND_5GHZ;
1572} 1565}
@@ -1583,7 +1576,6 @@ il_is_channel_ibss(const struct il_channel_info *ch)
1583 return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0; 1576 return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0;
1584} 1577}
1585 1578
1586
1587static inline void 1579static inline void
1588__il_free_pages(struct il_priv *il, struct page *page) 1580__il_free_pages(struct il_priv *il, struct page *page)
1589{ 1581{
@@ -1591,7 +1583,8 @@ __il_free_pages(struct il_priv *il, struct page *page)
1591 il->alloc_rxb_page--; 1583 il->alloc_rxb_page--;
1592} 1584}
1593 1585
1594static inline void il_free_pages(struct il_priv *il, unsigned long page) 1586static inline void
1587il_free_pages(struct il_priv *il, unsigned long page)
1595{ 1588{
1596 free_pages(page, il->hw_params.rx_page_order); 1589 free_pages(page, il->hw_params.rx_page_order);
1597 il->alloc_rxb_page--; 1590 il->alloc_rxb_page--;
@@ -1615,77 +1608,74 @@ static inline void il_free_pages(struct il_priv *il, unsigned long page)
1615#define IL_CMD(x) case x: return #x 1608#define IL_CMD(x) case x: return #x
1616 1609
1617/* Size of one Rx buffer in host DRAM */ 1610/* Size of one Rx buffer in host DRAM */
1618#define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */ 1611#define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */
1619#define IL_RX_BUF_SIZE_4K (4 * 1024) 1612#define IL_RX_BUF_SIZE_4K (4 * 1024)
1620#define IL_RX_BUF_SIZE_8K (8 * 1024) 1613#define IL_RX_BUF_SIZE_8K (8 * 1024)
1621 1614
1622struct il_hcmd_ops { 1615struct il_hcmd_ops {
1623 int (*rxon_assoc)(struct il_priv *il, struct il_rxon_context *ctx); 1616 int (*rxon_assoc) (struct il_priv * il, struct il_rxon_context * ctx);
1624 int (*commit_rxon)(struct il_priv *il, struct il_rxon_context *ctx); 1617 int (*commit_rxon) (struct il_priv * il, struct il_rxon_context * ctx);
1625 void (*set_rxon_chain)(struct il_priv *il, 1618 void (*set_rxon_chain) (struct il_priv * il,
1626 struct il_rxon_context *ctx); 1619 struct il_rxon_context * ctx);
1627}; 1620};
1628 1621
1629struct il_hcmd_utils_ops { 1622struct il_hcmd_utils_ops {
1630 u16 (*get_hcmd_size)(u8 cmd_id, u16 len); 1623 u16(*get_hcmd_size) (u8 cmd_id, u16 len);
1631 u16 (*build_addsta_hcmd)(const struct il_addsta_cmd *cmd, 1624 u16(*build_addsta_hcmd) (const struct il_addsta_cmd * cmd, u8 * data);
1632 u8 *data); 1625 int (*request_scan) (struct il_priv * il, struct ieee80211_vif * vif);
1633 int (*request_scan)(struct il_priv *il, struct ieee80211_vif *vif); 1626 void (*post_scan) (struct il_priv * il);
1634 void (*post_scan)(struct il_priv *il);
1635}; 1627};
1636 1628
1637struct il_apm_ops { 1629struct il_apm_ops {
1638 int (*init)(struct il_priv *il); 1630 int (*init) (struct il_priv * il);
1639 void (*config)(struct il_priv *il); 1631 void (*config) (struct il_priv * il);
1640}; 1632};
1641 1633
1642struct il_debugfs_ops { 1634struct il_debugfs_ops {
1643 ssize_t (*rx_stats_read)(struct file *file, char __user *user_buf, 1635 ssize_t(*rx_stats_read) (struct file * file, char __user * user_buf,
1644 size_t count, loff_t *ppos); 1636 size_t count, loff_t * ppos);
1645 ssize_t (*tx_stats_read)(struct file *file, char __user *user_buf, 1637 ssize_t(*tx_stats_read) (struct file * file, char __user * user_buf,
1646 size_t count, loff_t *ppos); 1638 size_t count, loff_t * ppos);
1647 ssize_t (*general_stats_read)(struct file *file, char __user *user_buf, 1639 ssize_t(*general_stats_read) (struct file * file,
1648 size_t count, loff_t *ppos); 1640 char __user * user_buf, size_t count,
1641 loff_t * ppos);
1649}; 1642};
1650 1643
1651struct il_temp_ops { 1644struct il_temp_ops {
1652 void (*temperature)(struct il_priv *il); 1645 void (*temperature) (struct il_priv * il);
1653}; 1646};
1654 1647
1655struct il_lib_ops { 1648struct il_lib_ops {
1656 /* set hw dependent parameters */ 1649 /* set hw dependent parameters */
1657 int (*set_hw_params)(struct il_priv *il); 1650 int (*set_hw_params) (struct il_priv * il);
1658 /* Handling TX */ 1651 /* Handling TX */
1659 void (*txq_update_byte_cnt_tbl)(struct il_priv *il, 1652 void (*txq_update_byte_cnt_tbl) (struct il_priv * il,
1660 struct il_tx_queue *txq, 1653 struct il_tx_queue * txq,
1661 u16 byte_cnt); 1654 u16 byte_cnt);
1662 int (*txq_attach_buf_to_tfd)(struct il_priv *il, 1655 int (*txq_attach_buf_to_tfd) (struct il_priv * il,
1663 struct il_tx_queue *txq, 1656 struct il_tx_queue * txq, dma_addr_t addr,
1664 dma_addr_t addr, 1657 u16 len, u8 reset, u8 pad);
1665 u16 len, u8 reset, u8 pad); 1658 void (*txq_free_tfd) (struct il_priv * il, struct il_tx_queue * txq);
1666 void (*txq_free_tfd)(struct il_priv *il, 1659 int (*txq_init) (struct il_priv * il, struct il_tx_queue * txq);
1667 struct il_tx_queue *txq);
1668 int (*txq_init)(struct il_priv *il,
1669 struct il_tx_queue *txq);
1670 /* setup Rx handler */ 1660 /* setup Rx handler */
1671 void (*handler_setup)(struct il_priv *il); 1661 void (*handler_setup) (struct il_priv * il);
1672 /* alive notification after init uCode load */ 1662 /* alive notification after init uCode load */
1673 void (*init_alive_start)(struct il_priv *il); 1663 void (*init_alive_start) (struct il_priv * il);
1674 /* check validity of rtc data address */ 1664 /* check validity of rtc data address */
1675 int (*is_valid_rtc_data_addr)(u32 addr); 1665 int (*is_valid_rtc_data_addr) (u32 addr);
1676 /* 1st ucode load */ 1666 /* 1st ucode load */
1677 int (*load_ucode)(struct il_priv *il); 1667 int (*load_ucode) (struct il_priv * il);
1678 1668
1679 void (*dump_nic_error_log)(struct il_priv *il); 1669 void (*dump_nic_error_log) (struct il_priv * il);
1680 int (*dump_fh)(struct il_priv *il, char **buf, bool display); 1670 int (*dump_fh) (struct il_priv * il, char **buf, bool display);
1681 int (*set_channel_switch)(struct il_priv *il, 1671 int (*set_channel_switch) (struct il_priv * il,
1682 struct ieee80211_channel_switch *ch_switch); 1672 struct ieee80211_channel_switch * ch_switch);
1683 /* power management */ 1673 /* power management */
1684 struct il_apm_ops apm_ops; 1674 struct il_apm_ops apm_ops;
1685 1675
1686 /* power */ 1676 /* power */
1687 int (*send_tx_power) (struct il_priv *il); 1677 int (*send_tx_power) (struct il_priv * il);
1688 void (*update_chain_flags)(struct il_priv *il); 1678 void (*update_chain_flags) (struct il_priv * il);
1689 1679
1690 /* eeprom operations */ 1680 /* eeprom operations */
1691 struct il_eeprom_ops eeprom_ops; 1681 struct il_eeprom_ops eeprom_ops;
@@ -1698,16 +1688,16 @@ struct il_lib_ops {
1698}; 1688};
1699 1689
1700struct il_led_ops { 1690struct il_led_ops {
1701 int (*cmd)(struct il_priv *il, struct il_led_cmd *led_cmd); 1691 int (*cmd) (struct il_priv * il, struct il_led_cmd * led_cmd);
1702}; 1692};
1703 1693
1704struct il_legacy_ops { 1694struct il_legacy_ops {
1705 void (*post_associate)(struct il_priv *il); 1695 void (*post_associate) (struct il_priv * il);
1706 void (*config_ap)(struct il_priv *il); 1696 void (*config_ap) (struct il_priv * il);
1707 /* station management */ 1697 /* station management */
1708 int (*update_bcast_stations)(struct il_priv *il); 1698 int (*update_bcast_stations) (struct il_priv * il);
1709 int (*manage_ibss_station)(struct il_priv *il, 1699 int (*manage_ibss_station) (struct il_priv * il,
1710 struct ieee80211_vif *vif, bool add); 1700 struct ieee80211_vif * vif, bool add);
1711}; 1701};
1712 1702
1713struct il_ops { 1703struct il_ops {
@@ -1726,7 +1716,7 @@ struct il_mod_params {
1726 int num_of_queues; /* def: HW dependent */ 1716 int num_of_queues; /* def: HW dependent */
1727 int disable_11n; /* def: 0 = 11n capabilities enabled */ 1717 int disable_11n; /* def: 0 = 11n capabilities enabled */
1728 int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */ 1718 int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */
1729 int antenna; /* def: 0 = both antennas (use diversity) */ 1719 int antenna; /* def: 0 = both antennas (use diversity) */
1730 int restart_fw; /* def: 1 = restart firmware */ 1720 int restart_fw; /* def: 1 = restart firmware */
1731}; 1721};
1732 1722
@@ -1746,7 +1736,7 @@ struct il_mod_params {
1746struct il_base_params { 1736struct il_base_params {
1747 int eeprom_size; 1737 int eeprom_size;
1748 int num_of_queues; /* def: HW dependent */ 1738 int num_of_queues; /* def: HW dependent */
1749 int num_of_ampdu_queues;/* def: HW dependent */ 1739 int num_of_ampdu_queues; /* def: HW dependent */
1750 /* for il_apm_init() */ 1740 /* for il_apm_init() */
1751 u32 pll_cfg_val; 1741 u32 pll_cfg_val;
1752 bool set_l0s; 1742 bool set_l0s;
@@ -1821,11 +1811,11 @@ struct il_cfg {
1821 const char *fw_name_pre; 1811 const char *fw_name_pre;
1822 const unsigned int ucode_api_max; 1812 const unsigned int ucode_api_max;
1823 const unsigned int ucode_api_min; 1813 const unsigned int ucode_api_min;
1824 u8 valid_tx_ant; 1814 u8 valid_tx_ant;
1825 u8 valid_rx_ant; 1815 u8 valid_rx_ant;
1826 unsigned int sku; 1816 unsigned int sku;
1827 u16 eeprom_ver; 1817 u16 eeprom_ver;
1828 u16 eeprom_calib_ver; 1818 u16 eeprom_calib_ver;
1829 const struct il_ops *ops; 1819 const struct il_ops *ops;
1830 /* module based parameters which can be set from modprobe cmd */ 1820 /* module based parameters which can be set from modprobe cmd */
1831 const struct il_mod_params *mod_params; 1821 const struct il_mod_params *mod_params;
@@ -1841,46 +1831,33 @@ struct il_cfg {
1841 ***************************/ 1831 ***************************/
1842 1832
1843struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg); 1833struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg);
1844int il_mac_conf_tx(struct ieee80211_hw *hw, 1834int il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1845 struct ieee80211_vif *vif, u16 queue, 1835 u16 queue, const struct ieee80211_tx_queue_params *params);
1846 const struct ieee80211_tx_queue_params *params);
1847int il_mac_tx_last_beacon(struct ieee80211_hw *hw); 1836int il_mac_tx_last_beacon(struct ieee80211_hw *hw);
1848void il_set_rxon_hwcrypto(struct il_priv *il, 1837
1849 struct il_rxon_context *ctx, 1838void il_set_rxon_hwcrypto(struct il_priv *il, struct il_rxon_context *ctx,
1850 int hw_decrypt); 1839 int hw_decrypt);
1851int il_check_rxon_cmd(struct il_priv *il, 1840int il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx);
1852 struct il_rxon_context *ctx); 1841int il_full_rxon_required(struct il_priv *il, struct il_rxon_context *ctx);
1853int il_full_rxon_required(struct il_priv *il, 1842int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
1854 struct il_rxon_context *ctx);
1855int il_set_rxon_channel(struct il_priv *il,
1856 struct ieee80211_channel *ch,
1857 struct il_rxon_context *ctx); 1843 struct il_rxon_context *ctx);
1858void il_set_flags_for_band(struct il_priv *il, 1844void il_set_flags_for_band(struct il_priv *il, struct il_rxon_context *ctx,
1859 struct il_rxon_context *ctx, 1845 enum ieee80211_band band, struct ieee80211_vif *vif);
1860 enum ieee80211_band band, 1846u8 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band);
1861 struct ieee80211_vif *vif); 1847void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf);
1862u8 il_get_single_channel_number(struct il_priv *il, 1848bool il_is_ht40_tx_allowed(struct il_priv *il, struct il_rxon_context *ctx,
1863 enum ieee80211_band band); 1849 struct ieee80211_sta_ht_cap *ht_cap);
1864void il_set_rxon_ht(struct il_priv *il,
1865 struct il_ht_config *ht_conf);
1866bool il_is_ht40_tx_allowed(struct il_priv *il,
1867 struct il_rxon_context *ctx,
1868 struct ieee80211_sta_ht_cap *ht_cap);
1869void il_connection_init_rx_config(struct il_priv *il, 1850void il_connection_init_rx_config(struct il_priv *il,
1870 struct il_rxon_context *ctx); 1851 struct il_rxon_context *ctx);
1871void il_set_rate(struct il_priv *il); 1852void il_set_rate(struct il_priv *il);
1872int il_set_decrypted_flag(struct il_priv *il, 1853int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
1873 struct ieee80211_hdr *hdr, 1854 u32 decrypt_res, struct ieee80211_rx_status *stats);
1874 u32 decrypt_res,
1875 struct ieee80211_rx_status *stats);
1876void il_irq_handle_error(struct il_priv *il); 1855void il_irq_handle_error(struct il_priv *il);
1877int il_mac_add_interface(struct ieee80211_hw *hw, 1856int il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1878 struct ieee80211_vif *vif);
1879void il_mac_remove_interface(struct ieee80211_hw *hw, 1857void il_mac_remove_interface(struct ieee80211_hw *hw,
1880 struct ieee80211_vif *vif); 1858 struct ieee80211_vif *vif);
1881int il_mac_change_interface(struct ieee80211_hw *hw, 1859int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1882 struct ieee80211_vif *vif, 1860 enum nl80211_iftype newtype, bool newp2p);
1883 enum nl80211_iftype newtype, bool newp2p);
1884int il_alloc_txq_mem(struct il_priv *il); 1861int il_alloc_txq_mem(struct il_priv *il);
1885void il_txq_mem(struct il_priv *il); 1862void il_txq_mem(struct il_priv *il);
1886 1863
@@ -1888,48 +1865,54 @@ void il_txq_mem(struct il_priv *il);
1888int il_alloc_traffic_mem(struct il_priv *il); 1865int il_alloc_traffic_mem(struct il_priv *il);
1889void il_free_traffic_mem(struct il_priv *il); 1866void il_free_traffic_mem(struct il_priv *il);
1890void il_reset_traffic_log(struct il_priv *il); 1867void il_reset_traffic_log(struct il_priv *il);
1891void il_dbg_log_tx_data_frame(struct il_priv *il, 1868void il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
1892 u16 length, struct ieee80211_hdr *header); 1869 struct ieee80211_hdr *header);
1893void il_dbg_log_rx_data_frame(struct il_priv *il, 1870void il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
1894 u16 length, struct ieee80211_hdr *header); 1871 struct ieee80211_hdr *header);
1895const char *il_get_mgmt_string(int cmd); 1872const char *il_get_mgmt_string(int cmd);
1896const char *il_get_ctrl_string(int cmd); 1873const char *il_get_ctrl_string(int cmd);
1897void il_clear_traffic_stats(struct il_priv *il); 1874void il_clear_traffic_stats(struct il_priv *il);
1898void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, 1875void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len);
1899 u16 len);
1900#else 1876#else
1901static inline int il_alloc_traffic_mem(struct il_priv *il) 1877static inline int
1878il_alloc_traffic_mem(struct il_priv *il)
1902{ 1879{
1903 return 0; 1880 return 0;
1904} 1881}
1905static inline void il_free_traffic_mem(struct il_priv *il) 1882
1883static inline void
1884il_free_traffic_mem(struct il_priv *il)
1906{ 1885{
1907} 1886}
1908static inline void il_reset_traffic_log(struct il_priv *il) 1887
1888static inline void
1889il_reset_traffic_log(struct il_priv *il)
1909{ 1890{
1910} 1891}
1911static inline void il_dbg_log_tx_data_frame(struct il_priv *il, 1892
1912 u16 length, struct ieee80211_hdr *header) 1893static inline void
1894il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
1895 struct ieee80211_hdr *header)
1913{ 1896{
1914} 1897}
1915static inline void il_dbg_log_rx_data_frame(struct il_priv *il, 1898
1916 u16 length, struct ieee80211_hdr *header) 1899static inline void
1900il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
1901 struct ieee80211_hdr *header)
1917{ 1902{
1918} 1903}
1919static inline void il_update_stats(struct il_priv *il, bool is_tx, 1904
1920 __le16 fc, u16 len) 1905static inline void
1906il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
1921{ 1907{
1922} 1908}
1923#endif 1909#endif
1924/***************************************************** 1910/*****************************************************
1925 * RX handlers. 1911 * RX handlers.
1926 * **************************************************/ 1912 * **************************************************/
1927void il_hdl_pm_sleep(struct il_priv *il, 1913void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb);
1928 struct il_rx_buf *rxb); 1914void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb);
1929void il_hdl_pm_debug_stats(struct il_priv *il, 1915void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb);
1930 struct il_rx_buf *rxb);
1931void il_hdl_error(struct il_priv *il,
1932 struct il_rx_buf *rxb);
1933 1916
1934/***************************************************** 1917/*****************************************************
1935* RX 1918* RX
@@ -1937,16 +1920,12 @@ void il_hdl_error(struct il_priv *il,
1937void il_cmd_queue_unmap(struct il_priv *il); 1920void il_cmd_queue_unmap(struct il_priv *il);
1938void il_cmd_queue_free(struct il_priv *il); 1921void il_cmd_queue_free(struct il_priv *il);
1939int il_rx_queue_alloc(struct il_priv *il); 1922int il_rx_queue_alloc(struct il_priv *il);
1940void il_rx_queue_update_write_ptr(struct il_priv *il, 1923void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q);
1941 struct il_rx_queue *q);
1942int il_rx_queue_space(const struct il_rx_queue *q); 1924int il_rx_queue_space(const struct il_rx_queue *q);
1943void il_tx_cmd_complete(struct il_priv *il, 1925void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb);
1944 struct il_rx_buf *rxb);
1945/* Handlers */ 1926/* Handlers */
1946void il_hdl_spectrum_measurement(struct il_priv *il, 1927void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb);
1947 struct il_rx_buf *rxb); 1928void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt);
1948void il_recover_from_stats(struct il_priv *il,
1949 struct il_rx_pkt *pkt);
1950void il_chswitch_done(struct il_priv *il, bool is_success); 1929void il_chswitch_done(struct il_priv *il, bool is_success);
1951void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb); 1930void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
1952 1931
@@ -1955,13 +1934,11 @@ void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
1955/***************************************************** 1934/*****************************************************
1956* TX 1935* TX
1957******************************************************/ 1936******************************************************/
1958void il_txq_update_write_ptr(struct il_priv *il, 1937void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq);
1959 struct il_tx_queue *txq); 1938int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
1960int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, 1939 u32 txq_id);
1961 int slots_num, u32 txq_id); 1940void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
1962void il_tx_queue_reset(struct il_priv *il, 1941 int slots_num, u32 txq_id);
1963 struct il_tx_queue *txq,
1964 int slots_num, u32 txq_id);
1965void il_tx_queue_unmap(struct il_priv *il, int txq_id); 1942void il_tx_queue_unmap(struct il_priv *il, int txq_id);
1966void il_tx_queue_free(struct il_priv *il, int txq_id); 1943void il_tx_queue_free(struct il_priv *il, int txq_id);
1967void il_setup_watchdog(struct il_priv *il); 1944void il_setup_watchdog(struct il_priv *il);
@@ -1974,8 +1951,7 @@ int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force);
1974 * Rate 1951 * Rate
1975 ******************************************************************************/ 1952 ******************************************************************************/
1976 1953
1977u8 il_get_lowest_plcp(struct il_priv *il, 1954u8 il_get_lowest_plcp(struct il_priv *il, struct il_rxon_context *ctx);
1978 struct il_rxon_context *ctx);
1979 1955
1980/******************************************************************************* 1956/*******************************************************************************
1981 * Scanning 1957 * Scanning
@@ -1984,21 +1960,17 @@ void il_init_scan_params(struct il_priv *il);
1984int il_scan_cancel(struct il_priv *il); 1960int il_scan_cancel(struct il_priv *il);
1985int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms); 1961int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms);
1986void il_force_scan_end(struct il_priv *il); 1962void il_force_scan_end(struct il_priv *il);
1987int il_mac_hw_scan(struct ieee80211_hw *hw, 1963int il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1988 struct ieee80211_vif *vif, 1964 struct cfg80211_scan_request *req);
1989 struct cfg80211_scan_request *req);
1990void il_internal_short_hw_scan(struct il_priv *il); 1965void il_internal_short_hw_scan(struct il_priv *il);
1991int il_force_reset(struct il_priv *il, bool external); 1966int il_force_reset(struct il_priv *il, bool external);
1992u16 il_fill_probe_req(struct il_priv *il, 1967u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1993 struct ieee80211_mgmt *frame, 1968 const u8 * ta, const u8 * ie, int ie_len, int left);
1994 const u8 *ta, const u8 *ie, int ie_len, int left);
1995void il_setup_rx_scan_handlers(struct il_priv *il); 1969void il_setup_rx_scan_handlers(struct il_priv *il);
1996u16 il_get_active_dwell_time(struct il_priv *il, 1970u16 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1997 enum ieee80211_band band, 1971 u8 n_probes);
1998 u8 n_probes); 1972u16 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1999u16 il_get_passive_dwell_time(struct il_priv *il, 1973 struct ieee80211_vif *vif);
2000 enum ieee80211_band band,
2001 struct ieee80211_vif *vif);
2002void il_setup_scan_deferred_work(struct il_priv *il); 1974void il_setup_scan_deferred_work(struct il_priv *il);
2003void il_cancel_scan_deferred_work(struct il_priv *il); 1975void il_cancel_scan_deferred_work(struct il_priv *il);
2004 1976
@@ -2008,8 +1980,8 @@ void il_cancel_scan_deferred_work(struct il_priv *il);
2008 * time if it's a quiet channel (nothing responded to our probe, and there's 1980 * time if it's a quiet channel (nothing responded to our probe, and there's
2009 * no other traffic). 1981 * no other traffic).
2010 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ 1982 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
2011#define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */ 1983#define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */
2012#define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */ 1984#define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */
2013 1985
2014#define IL_SCAN_CHECK_WATCHDOG (HZ * 7) 1986#define IL_SCAN_CHECK_WATCHDOG (HZ * 7)
2015 1987
@@ -2018,25 +1990,23 @@ void il_cancel_scan_deferred_work(struct il_priv *il);
2018 *****************************************************/ 1990 *****************************************************/
2019 1991
2020const char *il_get_cmd_string(u8 cmd); 1992const char *il_get_cmd_string(u8 cmd);
2021int __must_check il_send_cmd_sync(struct il_priv *il, 1993int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd);
2022 struct il_host_cmd *cmd);
2023int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd); 1994int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd);
2024int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, 1995int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len,
2025 u16 len, const void *data); 1996 const void *data);
2026int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, 1997int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
2027 const void *data, 1998 void (*callback) (struct il_priv * il,
2028 void (*callback)(struct il_priv *il, 1999 struct il_device_cmd * cmd,
2029 struct il_device_cmd *cmd, 2000 struct il_rx_pkt * pkt));
2030 struct il_rx_pkt *pkt));
2031 2001
2032int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd); 2002int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
2033 2003
2034
2035/***************************************************** 2004/*****************************************************
2036 * PCI * 2005 * PCI *
2037 *****************************************************/ 2006 *****************************************************/
2038 2007
2039static inline u16 il_pcie_link_ctl(struct il_priv *il) 2008static inline u16
2009il_pcie_link_ctl(struct il_priv *il)
2040{ 2010{
2041 int pos; 2011 int pos;
2042 u16 pci_lnk_ctl; 2012 u16 pci_lnk_ctl;
@@ -2046,10 +2016,9 @@ static inline u16 il_pcie_link_ctl(struct il_priv *il)
2046} 2016}
2047 2017
2048void il_bg_watchdog(unsigned long data); 2018void il_bg_watchdog(unsigned long data);
2049u32 il_usecs_to_beacons(struct il_priv *il, 2019u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval);
2050 u32 usec, u32 beacon_interval); 2020__le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
2051__le32 il_add_beacon_time(struct il_priv *il, u32 base, 2021 u32 beacon_interval);
2052 u32 addon, u32 beacon_interval);
2053 2022
2054#ifdef CONFIG_PM 2023#ifdef CONFIG_PM
2055int il_pci_suspend(struct device *device); 2024int il_pci_suspend(struct device *device);
@@ -2069,11 +2038,10 @@ extern const struct dev_pm_ops il_pm_ops;
2069******************************************************/ 2038******************************************************/
2070void il4965_dump_nic_error_log(struct il_priv *il); 2039void il4965_dump_nic_error_log(struct il_priv *il);
2071#ifdef CONFIG_IWLEGACY_DEBUG 2040#ifdef CONFIG_IWLEGACY_DEBUG
2072void il_print_rx_config_cmd(struct il_priv *il, 2041void il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx);
2073 struct il_rxon_context *ctx);
2074#else 2042#else
2075static inline void il_print_rx_config_cmd(struct il_priv *il, 2043static inline void
2076 struct il_rxon_context *ctx) 2044il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx)
2077{ 2045{
2078} 2046}
2079#endif 2047#endif
@@ -2107,41 +2075,48 @@ void il_free_geos(struct il_priv *il);
2107#define S_FW_ERROR 17 2075#define S_FW_ERROR 17
2108#define S_CHANNEL_SWITCH_PENDING 18 2076#define S_CHANNEL_SWITCH_PENDING 18
2109 2077
2110static inline int il_is_ready(struct il_priv *il) 2078static inline int
2079il_is_ready(struct il_priv *il)
2111{ 2080{
2112 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are 2081 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
2113 * set but EXIT_PENDING is not */ 2082 * set but EXIT_PENDING is not */
2114 return test_bit(S_READY, &il->status) && 2083 return test_bit(S_READY, &il->status) &&
2115 test_bit(S_GEO_CONFIGURED, &il->status) && 2084 test_bit(S_GEO_CONFIGURED, &il->status) &&
2116 !test_bit(S_EXIT_PENDING, &il->status); 2085 !test_bit(S_EXIT_PENDING, &il->status);
2117} 2086}
2118 2087
2119static inline int il_is_alive(struct il_priv *il) 2088static inline int
2089il_is_alive(struct il_priv *il)
2120{ 2090{
2121 return test_bit(S_ALIVE, &il->status); 2091 return test_bit(S_ALIVE, &il->status);
2122} 2092}
2123 2093
2124static inline int il_is_init(struct il_priv *il) 2094static inline int
2095il_is_init(struct il_priv *il)
2125{ 2096{
2126 return test_bit(S_INIT, &il->status); 2097 return test_bit(S_INIT, &il->status);
2127} 2098}
2128 2099
2129static inline int il_is_rfkill_hw(struct il_priv *il) 2100static inline int
2101il_is_rfkill_hw(struct il_priv *il)
2130{ 2102{
2131 return test_bit(S_RF_KILL_HW, &il->status); 2103 return test_bit(S_RF_KILL_HW, &il->status);
2132} 2104}
2133 2105
2134static inline int il_is_rfkill(struct il_priv *il) 2106static inline int
2107il_is_rfkill(struct il_priv *il)
2135{ 2108{
2136 return il_is_rfkill_hw(il); 2109 return il_is_rfkill_hw(il);
2137} 2110}
2138 2111
2139static inline int il_is_ctkill(struct il_priv *il) 2112static inline int
2113il_is_ctkill(struct il_priv *il)
2140{ 2114{
2141 return test_bit(S_CT_KILL, &il->status); 2115 return test_bit(S_CT_KILL, &il->status);
2142} 2116}
2143 2117
2144static inline int il_is_ready_rf(struct il_priv *il) 2118static inline int
2119il_is_ready_rf(struct il_priv *il)
2145{ 2120{
2146 2121
2147 if (il_is_rfkill(il)) 2122 if (il_is_rfkill(il))
@@ -2151,66 +2126,63 @@ static inline int il_is_ready_rf(struct il_priv *il)
2151} 2126}
2152 2127
2153extern void il_send_bt_config(struct il_priv *il); 2128extern void il_send_bt_config(struct il_priv *il);
2154extern int il_send_stats_request(struct il_priv *il, 2129extern int il_send_stats_request(struct il_priv *il, u8 flags, bool clear);
2155 u8 flags, bool clear);
2156void il_apm_stop(struct il_priv *il); 2130void il_apm_stop(struct il_priv *il);
2157int il_apm_init(struct il_priv *il); 2131int il_apm_init(struct il_priv *il);
2158 2132
2159int il_send_rxon_timing(struct il_priv *il, 2133int il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx);
2160 struct il_rxon_context *ctx); 2134static inline int
2161static inline int il_send_rxon_assoc(struct il_priv *il, 2135il_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx)
2162 struct il_rxon_context *ctx)
2163{ 2136{
2164 return il->cfg->ops->hcmd->rxon_assoc(il, ctx); 2137 return il->cfg->ops->hcmd->rxon_assoc(il, ctx);
2165} 2138}
2166static inline int il_commit_rxon(struct il_priv *il, 2139
2167 struct il_rxon_context *ctx) 2140static inline int
2141il_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
2168{ 2142{
2169 return il->cfg->ops->hcmd->commit_rxon(il, ctx); 2143 return il->cfg->ops->hcmd->commit_rxon(il, ctx);
2170} 2144}
2171static inline const struct ieee80211_supported_band *il_get_hw_mode( 2145
2172 struct il_priv *il, enum ieee80211_band band) 2146static inline const struct ieee80211_supported_band *
2147il_get_hw_mode(struct il_priv *il, enum ieee80211_band band)
2173{ 2148{
2174 return il->hw->wiphy->bands[band]; 2149 return il->hw->wiphy->bands[band];
2175} 2150}
2176 2151
2177/* mac80211 handlers */ 2152/* mac80211 handlers */
2178int il_mac_config(struct ieee80211_hw *hw, u32 changed); 2153int il_mac_config(struct ieee80211_hw *hw, u32 changed);
2179void il_mac_reset_tsf(struct ieee80211_hw *hw, 2154void il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
2180 struct ieee80211_vif *vif); 2155void il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2181void il_mac_bss_info_changed(struct ieee80211_hw *hw, 2156 struct ieee80211_bss_conf *bss_conf, u32 changes);
2182 struct ieee80211_vif *vif, 2157void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
2183 struct ieee80211_bss_conf *bss_conf, 2158 __le16 fc, __le32 * tx_flags);
2184 u32 changes);
2185void il_tx_cmd_protection(struct il_priv *il,
2186 struct ieee80211_tx_info *info,
2187 __le16 fc, __le32 *tx_flags);
2188 2159
2189irqreturn_t il_isr(int irq, void *data); 2160irqreturn_t il_isr(int irq, void *data);
2190 2161
2191
2192#include <linux/io.h> 2162#include <linux/io.h>
2193 2163
2194static inline void _il_write8(struct il_priv *il, u32 ofs, u8 val) 2164static inline void
2165_il_write8(struct il_priv *il, u32 ofs, u8 val)
2195{ 2166{
2196 iowrite8(val, il->hw_base + ofs); 2167 iowrite8(val, il->hw_base + ofs);
2197} 2168}
2198#define il_write8(il, ofs, val) _il_write8(il, ofs, val) 2169#define il_write8(il, ofs, val) _il_write8(il, ofs, val)
2199 2170
2200static inline void _il_wr(struct il_priv *il, u32 ofs, u32 val) 2171static inline void
2172_il_wr(struct il_priv *il, u32 ofs, u32 val)
2201{ 2173{
2202 iowrite32(val, il->hw_base + ofs); 2174 iowrite32(val, il->hw_base + ofs);
2203} 2175}
2204 2176
2205static inline u32 _il_rd(struct il_priv *il, u32 ofs) 2177static inline u32
2178_il_rd(struct il_priv *il, u32 ofs)
2206{ 2179{
2207 return ioread32(il->hw_base + ofs); 2180 return ioread32(il->hw_base + ofs);
2208} 2181}
2209 2182
2210#define IL_POLL_INTERVAL 10 /* microseconds */ 2183#define IL_POLL_INTERVAL 10 /* microseconds */
2211static inline int 2184static inline int
2212_il_poll_bit(struct il_priv *il, u32 addr, 2185_il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
2213 u32 bits, u32 mask, int timeout)
2214{ 2186{
2215 int t = 0; 2187 int t = 0;
2216 2188
@@ -2219,17 +2191,20 @@ _il_poll_bit(struct il_priv *il, u32 addr,
2219 return t; 2191 return t;
2220 udelay(IL_POLL_INTERVAL); 2192 udelay(IL_POLL_INTERVAL);
2221 t += IL_POLL_INTERVAL; 2193 t += IL_POLL_INTERVAL;
2222 } while (t < timeout); 2194 }
2195 while (t < timeout);
2223 2196
2224 return -ETIMEDOUT; 2197 return -ETIMEDOUT;
2225} 2198}
2226 2199
2227static inline void _il_set_bit(struct il_priv *il, u32 reg, u32 mask) 2200static inline void
2201_il_set_bit(struct il_priv *il, u32 reg, u32 mask)
2228{ 2202{
2229 _il_wr(il, reg, _il_rd(il, reg) | mask); 2203 _il_wr(il, reg, _il_rd(il, reg) | mask);
2230} 2204}
2231 2205
2232static inline void il_set_bit(struct il_priv *p, u32 r, u32 m) 2206static inline void
2207il_set_bit(struct il_priv *p, u32 r, u32 m)
2233{ 2208{
2234 unsigned long reg_flags; 2209 unsigned long reg_flags;
2235 2210
@@ -2244,7 +2219,8 @@ _il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
2244 _il_wr(il, reg, _il_rd(il, reg) & ~mask); 2219 _il_wr(il, reg, _il_rd(il, reg) & ~mask);
2245} 2220}
2246 2221
2247static inline void il_clear_bit(struct il_priv *p, u32 r, u32 m) 2222static inline void
2223il_clear_bit(struct il_priv *p, u32 r, u32 m)
2248{ 2224{
2249 unsigned long reg_flags; 2225 unsigned long reg_flags;
2250 2226
@@ -2253,14 +2229,14 @@ static inline void il_clear_bit(struct il_priv *p, u32 r, u32 m)
2253 spin_unlock_irqrestore(&p->reg_lock, reg_flags); 2229 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
2254} 2230}
2255 2231
2256static inline int _il_grab_nic_access(struct il_priv *il) 2232static inline int
2233_il_grab_nic_access(struct il_priv *il)
2257{ 2234{
2258 int ret; 2235 int ret;
2259 u32 val; 2236 u32 val;
2260 2237
2261 /* this bit wakes up the NIC */ 2238 /* this bit wakes up the NIC */
2262 _il_set_bit(il, CSR_GP_CNTRL, 2239 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2263 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2264 2240
2265 /* 2241 /*
2266 * These bits say the device is running, and should keep running for 2242 * These bits say the device is running, and should keep running for
@@ -2279,29 +2255,28 @@ static inline int _il_grab_nic_access(struct il_priv *il)
2279 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). 2255 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
2280 * 2256 *
2281 */ 2257 */
2282 ret = _il_poll_bit(il, CSR_GP_CNTRL, 2258 ret =
2283 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, 2259 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
2284 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | 2260 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
2285 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); 2261 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
2286 if (ret < 0) { 2262 if (ret < 0) {
2287 val = _il_rd(il, CSR_GP_CNTRL); 2263 val = _il_rd(il, CSR_GP_CNTRL);
2288 IL_ERR( 2264 IL_ERR("MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val);
2289 "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); 2265 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
2290 _il_wr(il, CSR_RESET,
2291 CSR_RESET_REG_FLAG_FORCE_NMI);
2292 return -EIO; 2266 return -EIO;
2293 } 2267 }
2294 2268
2295 return 0; 2269 return 0;
2296} 2270}
2297 2271
2298static inline void _il_release_nic_access(struct il_priv *il) 2272static inline void
2273_il_release_nic_access(struct il_priv *il)
2299{ 2274{
2300 _il_clear_bit(il, CSR_GP_CNTRL, 2275 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2301 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2302} 2276}
2303 2277
2304static inline u32 il_rd(struct il_priv *il, u32 reg) 2278static inline u32
2279il_rd(struct il_priv *il, u32 reg)
2305{ 2280{
2306 u32 value; 2281 u32 value;
2307 unsigned long reg_flags; 2282 unsigned long reg_flags;
@@ -2328,8 +2303,8 @@ il_wr(struct il_priv *il, u32 reg, u32 value)
2328 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 2303 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2329} 2304}
2330 2305
2331static inline void il_write_reg_buf(struct il_priv *il, 2306static inline void
2332 u32 reg, u32 len, u32 *values) 2307il_write_reg_buf(struct il_priv *il, u32 reg, u32 len, u32 * values)
2333{ 2308{
2334 u32 count = sizeof(u32); 2309 u32 count = sizeof(u32);
2335 2310
@@ -2339,8 +2314,8 @@ static inline void il_write_reg_buf(struct il_priv *il,
2339 } 2314 }
2340} 2315}
2341 2316
2342static inline int il_poll_bit(struct il_priv *il, u32 addr, 2317static inline int
2343 u32 mask, int timeout) 2318il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
2344{ 2319{
2345 int t = 0; 2320 int t = 0;
2346 2321
@@ -2349,19 +2324,22 @@ static inline int il_poll_bit(struct il_priv *il, u32 addr,
2349 return t; 2324 return t;
2350 udelay(IL_POLL_INTERVAL); 2325 udelay(IL_POLL_INTERVAL);
2351 t += IL_POLL_INTERVAL; 2326 t += IL_POLL_INTERVAL;
2352 } while (t < timeout); 2327 }
2328 while (t < timeout);
2353 2329
2354 return -ETIMEDOUT; 2330 return -ETIMEDOUT;
2355} 2331}
2356 2332
2357static inline u32 _il_rd_prph(struct il_priv *il, u32 reg) 2333static inline u32
2334_il_rd_prph(struct il_priv *il, u32 reg)
2358{ 2335{
2359 _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); 2336 _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
2360 rmb(); 2337 rmb();
2361 return _il_rd(il, HBUS_TARG_PRPH_RDAT); 2338 return _il_rd(il, HBUS_TARG_PRPH_RDAT);
2362} 2339}
2363 2340
2364static inline u32 il_rd_prph(struct il_priv *il, u32 reg) 2341static inline u32
2342il_rd_prph(struct il_priv *il, u32 reg)
2365{ 2343{
2366 unsigned long reg_flags; 2344 unsigned long reg_flags;
2367 u32 val; 2345 u32 val;
@@ -2374,11 +2352,10 @@ static inline u32 il_rd_prph(struct il_priv *il, u32 reg)
2374 return val; 2352 return val;
2375} 2353}
2376 2354
2377static inline void _il_wr_prph(struct il_priv *il, 2355static inline void
2378 u32 addr, u32 val) 2356_il_wr_prph(struct il_priv *il, u32 addr, u32 val)
2379{ 2357{
2380 _il_wr(il, HBUS_TARG_PRPH_WADDR, 2358 _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24)));
2381 ((addr & 0x0000FFFF) | (3 << 24)));
2382 wmb(); 2359 wmb();
2383 _il_wr(il, HBUS_TARG_PRPH_WDAT, val); 2360 _il_wr(il, HBUS_TARG_PRPH_WDAT, val);
2384} 2361}
@@ -2415,8 +2392,8 @@ il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2415_il_wr_prph(il, reg, \ 2392_il_wr_prph(il, reg, \
2416 ((_il_rd_prph(il, reg) & mask) | bits)) 2393 ((_il_rd_prph(il, reg) & mask) | bits))
2417 2394
2418static inline void il_set_bits_mask_prph(struct il_priv *il, u32 reg, 2395static inline void
2419 u32 bits, u32 mask) 2396il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
2420{ 2397{
2421 unsigned long reg_flags; 2398 unsigned long reg_flags;
2422 2399
@@ -2427,8 +2404,8 @@ static inline void il_set_bits_mask_prph(struct il_priv *il, u32 reg,
2427 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 2404 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2428} 2405}
2429 2406
2430static inline void il_clear_bits_prph(struct il_priv 2407static inline void
2431 *il, u32 reg, u32 mask) 2408il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask)
2432{ 2409{
2433 unsigned long reg_flags; 2410 unsigned long reg_flags;
2434 u32 val; 2411 u32 val;
@@ -2441,7 +2418,8 @@ static inline void il_clear_bits_prph(struct il_priv
2441 spin_unlock_irqrestore(&il->reg_lock, reg_flags); 2418 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
2442} 2419}
2443 2420
2444static inline u32 il_read_targ_mem(struct il_priv *il, u32 addr) 2421static inline u32
2422il_read_targ_mem(struct il_priv *il, u32 addr)
2445{ 2423{
2446 unsigned long reg_flags; 2424 unsigned long reg_flags;
2447 u32 value; 2425 u32 value;
@@ -2474,8 +2452,7 @@ il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
2474} 2452}
2475 2453
2476static inline void 2454static inline void
2477il_write_targ_mem_buf(struct il_priv *il, u32 addr, 2455il_write_targ_mem_buf(struct il_priv *il, u32 addr, u32 len, u32 * values)
2478 u32 len, u32 *values)
2479{ 2456{
2480 unsigned long reg_flags; 2457 unsigned long reg_flags;
2481 2458
@@ -2484,8 +2461,7 @@ il_write_targ_mem_buf(struct il_priv *il, u32 addr,
2484 _il_wr(il, HBUS_TARG_MEM_WADDR, addr); 2461 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
2485 wmb(); 2462 wmb();
2486 for (; 0 < len; len -= sizeof(u32), values++) 2463 for (; 0 < len; len -= sizeof(u32), values++)
2487 _il_wr(il, 2464 _il_wr(il, HBUS_TARG_MEM_WDAT, *values);
2488 HBUS_TARG_MEM_WDAT, *values);
2489 2465
2490 _il_release_nic_access(il); 2466 _il_release_nic_access(il);
2491 } 2467 }
@@ -2495,43 +2471,31 @@ il_write_targ_mem_buf(struct il_priv *il, u32 addr,
2495#define HW_KEY_DYNAMIC 0 2471#define HW_KEY_DYNAMIC 0
2496#define HW_KEY_DEFAULT 1 2472#define HW_KEY_DEFAULT 1
2497 2473
2498#define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */ 2474#define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */
2499#define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */ 2475#define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */
2500#define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of 2476#define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of
2501 being activated */ 2477 being activated */
2502#define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211; 2478#define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211;
2503 (this is for the IBSS BSSID stations) */ 2479 (this is for the IBSS BSSID stations) */
2504#define IL_STA_BCAST BIT(4) /* this station is the special bcast station */ 2480#define IL_STA_BCAST BIT(4) /* this station is the special bcast station */
2505 2481
2506 2482void il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx);
2507void il_restore_stations(struct il_priv *il, 2483void il_clear_ucode_stations(struct il_priv *il, struct il_rxon_context *ctx);
2508 struct il_rxon_context *ctx);
2509void il_clear_ucode_stations(struct il_priv *il,
2510 struct il_rxon_context *ctx);
2511void il_dealloc_bcast_stations(struct il_priv *il); 2484void il_dealloc_bcast_stations(struct il_priv *il);
2512int il_get_free_ucode_key_idx(struct il_priv *il); 2485int il_get_free_ucode_key_idx(struct il_priv *il);
2513int il_send_add_sta(struct il_priv *il, 2486int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags);
2514 struct il_addsta_cmd *sta, u8 flags); 2487int il_add_station_common(struct il_priv *il, struct il_rxon_context *ctx,
2515int il_add_station_common(struct il_priv *il, 2488 const u8 * addr, bool is_ap,
2516 struct il_rxon_context *ctx, 2489 struct ieee80211_sta *sta, u8 * sta_id_r);
2517 const u8 *addr, bool is_ap, 2490int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr);
2518 struct ieee80211_sta *sta, u8 *sta_id_r); 2491int il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2519int il_remove_station(struct il_priv *il, 2492 struct ieee80211_sta *sta);
2520 const u8 sta_id, 2493
2521 const u8 *addr); 2494u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
2522int il_mac_sta_remove(struct ieee80211_hw *hw, 2495 const u8 * addr, bool is_ap, struct ieee80211_sta *sta);
2523 struct ieee80211_vif *vif, 2496
2524 struct ieee80211_sta *sta); 2497int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
2525 2498 struct il_link_quality_cmd *lq, u8 flags, bool init);
2526u8 il_prep_station(struct il_priv *il,
2527 struct il_rxon_context *ctx,
2528 const u8 *addr, bool is_ap,
2529 struct ieee80211_sta *sta);
2530
2531int il_send_lq_cmd(struct il_priv *il,
2532 struct il_rxon_context *ctx,
2533 struct il_link_quality_cmd *lq,
2534 u8 flags, bool init);
2535 2499
2536/** 2500/**
2537 * il_clear_driver_stations - clear knowledge of all stations from driver 2501 * il_clear_driver_stations - clear knowledge of all stations from driver
@@ -2542,7 +2506,8 @@ int il_send_lq_cmd(struct il_priv *il,
2542 * able to reconfigure stations -- if we're getting there in the 2506 * able to reconfigure stations -- if we're getting there in the
2543 * normal down flow then the stations will already be cleared. 2507 * normal down flow then the stations will already be cleared.
2544 */ 2508 */
2545static inline void il_clear_driver_stations(struct il_priv *il) 2509static inline void
2510il_clear_driver_stations(struct il_priv *il)
2546{ 2511{
2547 unsigned long flags; 2512 unsigned long flags;
2548 struct il_rxon_context *ctx = &il->ctx; 2513 struct il_rxon_context *ctx = &il->ctx;
@@ -2566,7 +2531,8 @@ static inline void il_clear_driver_stations(struct il_priv *il)
2566 spin_unlock_irqrestore(&il->sta_lock, flags); 2531 spin_unlock_irqrestore(&il->sta_lock, flags);
2567} 2532}
2568 2533
2569static inline int il_sta_id(struct ieee80211_sta *sta) 2534static inline int
2535il_sta_id(struct ieee80211_sta *sta)
2570{ 2536{
2571 if (WARN_ON(!sta)) 2537 if (WARN_ON(!sta))
2572 return IL_INVALID_STATION; 2538 return IL_INVALID_STATION;
@@ -2585,9 +2551,9 @@ static inline int il_sta_id(struct ieee80211_sta *sta)
2585 * that case, we need to use the broadcast station, so this 2551 * that case, we need to use the broadcast station, so this
2586 * inline wraps that pattern. 2552 * inline wraps that pattern.
2587 */ 2553 */
2588static inline int il_sta_id_or_broadcast(struct il_priv *il, 2554static inline int
2589 struct il_rxon_context *context, 2555il_sta_id_or_broadcast(struct il_priv *il, struct il_rxon_context *context,
2590 struct ieee80211_sta *sta) 2556 struct ieee80211_sta *sta)
2591{ 2557{
2592 int sta_id; 2558 int sta_id;
2593 2559
@@ -2610,7 +2576,8 @@ static inline int il_sta_id_or_broadcast(struct il_priv *il,
2610 * @idx -- current idx 2576 * @idx -- current idx
2611 * @n_bd -- total number of entries in queue (must be power of 2) 2577 * @n_bd -- total number of entries in queue (must be power of 2)
2612 */ 2578 */
2613static inline int il_queue_inc_wrap(int idx, int n_bd) 2579static inline int
2580il_queue_inc_wrap(int idx, int n_bd)
2614{ 2581{
2615 return ++idx & (n_bd - 1); 2582 return ++idx & (n_bd - 1);
2616} 2583}
@@ -2620,32 +2587,34 @@ static inline int il_queue_inc_wrap(int idx, int n_bd)
2620 * @idx -- current idx 2587 * @idx -- current idx
2621 * @n_bd -- total number of entries in queue (must be power of 2) 2588 * @n_bd -- total number of entries in queue (must be power of 2)
2622 */ 2589 */
2623static inline int il_queue_dec_wrap(int idx, int n_bd) 2590static inline int
2591il_queue_dec_wrap(int idx, int n_bd)
2624{ 2592{
2625 return --idx & (n_bd - 1); 2593 return --idx & (n_bd - 1);
2626} 2594}
2627 2595
2628/* TODO: Move fw_desc functions to iwl-pci.ko */ 2596/* TODO: Move fw_desc functions to iwl-pci.ko */
2629static inline void il_free_fw_desc(struct pci_dev *pci_dev, 2597static inline void
2630 struct fw_desc *desc) 2598il_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2631{ 2599{
2632 if (desc->v_addr) 2600 if (desc->v_addr)
2633 dma_free_coherent(&pci_dev->dev, desc->len, 2601 dma_free_coherent(&pci_dev->dev, desc->len, desc->v_addr,
2634 desc->v_addr, desc->p_addr); 2602 desc->p_addr);
2635 desc->v_addr = NULL; 2603 desc->v_addr = NULL;
2636 desc->len = 0; 2604 desc->len = 0;
2637} 2605}
2638 2606
2639static inline int il_alloc_fw_desc(struct pci_dev *pci_dev, 2607static inline int
2640 struct fw_desc *desc) 2608il_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
2641{ 2609{
2642 if (!desc->len) { 2610 if (!desc->len) {
2643 desc->v_addr = NULL; 2611 desc->v_addr = NULL;
2644 return -EINVAL; 2612 return -EINVAL;
2645 } 2613 }
2646 2614
2647 desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len, 2615 desc->v_addr =
2648 &desc->p_addr, GFP_KERNEL); 2616 dma_alloc_coherent(&pci_dev->dev, desc->len, &desc->p_addr,
2617 GFP_KERNEL);
2649 return (desc->v_addr != NULL) ? 0 : -ENOMEM; 2618 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
2650} 2619}
2651 2620
@@ -2663,14 +2632,14 @@ static inline int il_alloc_fw_desc(struct pci_dev *pci_dev,
2663static inline void 2632static inline void
2664il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq) 2633il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq)
2665{ 2634{
2666 BUG_ON(ac > 3); /* only have 2 bits */ 2635 BUG_ON(ac > 3); /* only have 2 bits */
2667 BUG_ON(hwq > 31); /* only use 5 bits */ 2636 BUG_ON(hwq > 31); /* only use 5 bits */
2668 2637
2669 txq->swq_id = (hwq << 2) | ac; 2638 txq->swq_id = (hwq << 2) | ac;
2670} 2639}
2671 2640
2672static inline void il_wake_queue(struct il_priv *il, 2641static inline void
2673 struct il_tx_queue *txq) 2642il_wake_queue(struct il_priv *il, struct il_tx_queue *txq)
2674{ 2643{
2675 u8 queue = txq->swq_id; 2644 u8 queue = txq->swq_id;
2676 u8 ac = queue & 3; 2645 u8 ac = queue & 3;
@@ -2681,8 +2650,8 @@ static inline void il_wake_queue(struct il_priv *il,
2681 ieee80211_wake_queue(il->hw, ac); 2650 ieee80211_wake_queue(il->hw, ac);
2682} 2651}
2683 2652
2684static inline void il_stop_queue(struct il_priv *il, 2653static inline void
2685 struct il_tx_queue *txq) 2654il_stop_queue(struct il_priv *il, struct il_tx_queue *txq)
2686{ 2655{
2687 u8 queue = txq->swq_id; 2656 u8 queue = txq->swq_id;
2688 u8 ac = queue & 3; 2657 u8 ac = queue & 3;
@@ -2705,7 +2674,8 @@ static inline void il_stop_queue(struct il_priv *il,
2705 2674
2706#define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue 2675#define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
2707 2676
2708static inline void il_disable_interrupts(struct il_priv *il) 2677static inline void
2678il_disable_interrupts(struct il_priv *il)
2709{ 2679{
2710 clear_bit(S_INT_ENABLED, &il->status); 2680 clear_bit(S_INT_ENABLED, &il->status);
2711 2681
@@ -2718,12 +2688,14 @@ static inline void il_disable_interrupts(struct il_priv *il)
2718 _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff); 2688 _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff);
2719} 2689}
2720 2690
2721static inline void il_enable_rfkill_int(struct il_priv *il) 2691static inline void
2692il_enable_rfkill_int(struct il_priv *il)
2722{ 2693{
2723 _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL); 2694 _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
2724} 2695}
2725 2696
2726static inline void il_enable_interrupts(struct il_priv *il) 2697static inline void
2698il_enable_interrupts(struct il_priv *il)
2727{ 2699{
2728 set_bit(S_INT_ENABLED, &il->status); 2700 set_bit(S_INT_ENABLED, &il->status);
2729 _il_wr(il, CSR_INT_MASK, il->inta_mask); 2701 _il_wr(il, CSR_INT_MASK, il->inta_mask);
@@ -2734,8 +2706,8 @@ static inline void il_enable_interrupts(struct il_priv *il)
2734 * @il -- pointer to il_priv data structure 2706 * @il -- pointer to il_priv data structure
2735 * @tsf_bits -- number of bits need to shift for masking) 2707 * @tsf_bits -- number of bits need to shift for masking)
2736 */ 2708 */
2737static inline u32 il_beacon_time_mask_low(struct il_priv *il, 2709static inline u32
2738 u16 tsf_bits) 2710il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits)
2739{ 2711{
2740 return (1 << tsf_bits) - 1; 2712 return (1 << tsf_bits) - 1;
2741} 2713}
@@ -2745,8 +2717,8 @@ static inline u32 il_beacon_time_mask_low(struct il_priv *il,
2745 * @il -- pointer to il_priv data structure 2717 * @il -- pointer to il_priv data structure
2746 * @tsf_bits -- number of bits need to shift for masking) 2718 * @tsf_bits -- number of bits need to shift for masking)
2747 */ 2719 */
2748static inline u32 il_beacon_time_mask_high(struct il_priv *il, 2720static inline u32
2749 u16 tsf_bits) 2721il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits)
2750{ 2722{
2751 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits; 2723 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
2752} 2724}
@@ -2766,20 +2738,21 @@ struct il_rb_status {
2766 __le16 closed_fr_num; 2738 __le16 closed_fr_num;
2767 __le16 finished_rb_num; 2739 __le16 finished_rb_num;
2768 __le16 finished_fr_nam; 2740 __le16 finished_fr_nam;
2769 __le32 __unused; /* 3945 only */ 2741 __le32 __unused; /* 3945 only */
2770} __packed; 2742} __packed;
2771 2743
2772
2773#define TFD_QUEUE_SIZE_MAX (256) 2744#define TFD_QUEUE_SIZE_MAX (256)
2774#define TFD_QUEUE_SIZE_BC_DUP (64) 2745#define TFD_QUEUE_SIZE_BC_DUP (64)
2775#define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP) 2746#define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
2776#define IL_TX_DMA_MASK DMA_BIT_MASK(36) 2747#define IL_TX_DMA_MASK DMA_BIT_MASK(36)
2777#define IL_NUM_OF_TBS 20 2748#define IL_NUM_OF_TBS 20
2778 2749
2779static inline u8 il_get_dma_hi_addr(dma_addr_t addr) 2750static inline u8
2751il_get_dma_hi_addr(dma_addr_t addr)
2780{ 2752{
2781 return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF; 2753 return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF;
2782} 2754}
2755
2783/** 2756/**
2784 * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor 2757 * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor
2785 * 2758 *
@@ -2837,16 +2810,16 @@ struct il_tfd {
2837#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 2810#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
2838 2811
2839struct il_rate_info { 2812struct il_rate_info {
2840 u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ 2813 u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
2841 u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ 2814 u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */
2842 u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */ 2815 u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */
2843 u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */ 2816 u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
2844 u8 prev_ieee; /* previous rate in IEEE speeds */ 2817 u8 prev_ieee; /* previous rate in IEEE speeds */
2845 u8 next_ieee; /* next rate in IEEE speeds */ 2818 u8 next_ieee; /* next rate in IEEE speeds */
2846 u8 prev_rs; /* previous rate used in rs algo */ 2819 u8 prev_rs; /* previous rate used in rs algo */
2847 u8 next_rs; /* next rate used in rs algo */ 2820 u8 next_rs; /* next rate used in rs algo */
2848 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */ 2821 u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
2849 u8 next_rs_tgg; /* next rate used in TGG rs algo */ 2822 u8 next_rs_tgg; /* next rate used in TGG rs algo */
2850}; 2823};
2851 2824
2852struct il3945_rate_info { 2825struct il3945_rate_info {
@@ -2862,7 +2835,6 @@ struct il3945_rate_info {
2862 u8 prev_table_rs; /* prev in rate table cmd */ 2835 u8 prev_table_rs; /* prev in rate table cmd */
2863}; 2836};
2864 2837
2865
2866/* 2838/*
2867 * These serve as idxes into 2839 * These serve as idxes into
2868 * struct il_rate_info il_rates[RATE_COUNT]; 2840 * struct il_rate_info il_rates[RATE_COUNT];
@@ -2929,20 +2901,20 @@ enum {
2929 2901
2930/* uCode API values for legacy bit rates, both OFDM and CCK */ 2902/* uCode API values for legacy bit rates, both OFDM and CCK */
2931enum { 2903enum {
2932 RATE_6M_PLCP = 13, 2904 RATE_6M_PLCP = 13,
2933 RATE_9M_PLCP = 15, 2905 RATE_9M_PLCP = 15,
2934 RATE_12M_PLCP = 5, 2906 RATE_12M_PLCP = 5,
2935 RATE_18M_PLCP = 7, 2907 RATE_18M_PLCP = 7,
2936 RATE_24M_PLCP = 9, 2908 RATE_24M_PLCP = 9,
2937 RATE_36M_PLCP = 11, 2909 RATE_36M_PLCP = 11,
2938 RATE_48M_PLCP = 1, 2910 RATE_48M_PLCP = 1,
2939 RATE_54M_PLCP = 3, 2911 RATE_54M_PLCP = 3,
2940 RATE_60M_PLCP = 3,/*FIXME:RS:should be removed*/ 2912 RATE_60M_PLCP = 3, /*FIXME:RS:should be removed */
2941 RATE_1M_PLCP = 10, 2913 RATE_1M_PLCP = 10,
2942 RATE_2M_PLCP = 20, 2914 RATE_2M_PLCP = 20,
2943 RATE_5M_PLCP = 55, 2915 RATE_5M_PLCP = 55,
2944 RATE_11M_PLCP = 110, 2916 RATE_11M_PLCP = 110,
2945 /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0,*/ 2917 /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0, */
2946}; 2918};
2947 2919
2948/* uCode API values for OFDM high-throughput (HT) bit rates */ 2920/* uCode API values for OFDM high-throughput (HT) bit rates */
@@ -2955,7 +2927,7 @@ enum {
2955 RATE_SISO_48M_PLCP = 5, 2927 RATE_SISO_48M_PLCP = 5,
2956 RATE_SISO_54M_PLCP = 6, 2928 RATE_SISO_54M_PLCP = 6,
2957 RATE_SISO_60M_PLCP = 7, 2929 RATE_SISO_60M_PLCP = 7,
2958 RATE_MIMO2_6M_PLCP = 0x8, 2930 RATE_MIMO2_6M_PLCP = 0x8,
2959 RATE_MIMO2_12M_PLCP = 0x9, 2931 RATE_MIMO2_12M_PLCP = 0x9,
2960 RATE_MIMO2_18M_PLCP = 0xa, 2932 RATE_MIMO2_18M_PLCP = 0xa,
2961 RATE_MIMO2_24M_PLCP = 0xb, 2933 RATE_MIMO2_24M_PLCP = 0xb,
@@ -2969,8 +2941,8 @@ enum {
2969 2941
2970/* MAC header values for bit rates */ 2942/* MAC header values for bit rates */
2971enum { 2943enum {
2972 RATE_6M_IEEE = 12, 2944 RATE_6M_IEEE = 12,
2973 RATE_9M_IEEE = 18, 2945 RATE_9M_IEEE = 18,
2974 RATE_12M_IEEE = 24, 2946 RATE_12M_IEEE = 24,
2975 RATE_18M_IEEE = 36, 2947 RATE_18M_IEEE = 36,
2976 RATE_24M_IEEE = 48, 2948 RATE_24M_IEEE = 48,
@@ -2978,9 +2950,9 @@ enum {
2978 RATE_48M_IEEE = 96, 2950 RATE_48M_IEEE = 96,
2979 RATE_54M_IEEE = 108, 2951 RATE_54M_IEEE = 108,
2980 RATE_60M_IEEE = 120, 2952 RATE_60M_IEEE = 120,
2981 RATE_1M_IEEE = 2, 2953 RATE_1M_IEEE = 2,
2982 RATE_2M_IEEE = 4, 2954 RATE_2M_IEEE = 4,
2983 RATE_5M_IEEE = 11, 2955 RATE_5M_IEEE = 11,
2984 RATE_11M_IEEE = 22, 2956 RATE_11M_IEEE = 22,
2985}; 2957};
2986 2958
@@ -3081,9 +3053,9 @@ extern const struct il_rate_info il_rates[RATE_COUNT];
3081 3053
3082enum il_table_type { 3054enum il_table_type {
3083 LQ_NONE, 3055 LQ_NONE,
3084 LQ_G, /* legacy types */ 3056 LQ_G, /* legacy types */
3085 LQ_A, 3057 LQ_A,
3086 LQ_SISO, /* high-throughput types */ 3058 LQ_SISO, /* high-throughput types */
3087 LQ_MIMO2, 3059 LQ_MIMO2,
3088 LQ_MAX, 3060 LQ_MAX,
3089}; 3061};
@@ -3108,8 +3080,8 @@ enum il_table_type {
3108#define IL_MAX_MCS_DISPLAY_SIZE 12 3080#define IL_MAX_MCS_DISPLAY_SIZE 12
3109 3081
3110struct il_rate_mcs_info { 3082struct il_rate_mcs_info {
3111 char mbps[IL_MAX_MCS_DISPLAY_SIZE]; 3083 char mbps[IL_MAX_MCS_DISPLAY_SIZE];
3112 char mcs[IL_MAX_MCS_DISPLAY_SIZE]; 3084 char mcs[IL_MAX_MCS_DISPLAY_SIZE];
3113}; 3085};
3114 3086
3115/** 3087/**
@@ -3133,25 +3105,25 @@ struct il_rate_scale_data {
3133struct il_scale_tbl_info { 3105struct il_scale_tbl_info {
3134 enum il_table_type lq_type; 3106 enum il_table_type lq_type;
3135 u8 ant_type; 3107 u8 ant_type;
3136 u8 is_SGI; /* 1 = short guard interval */ 3108 u8 is_SGI; /* 1 = short guard interval */
3137 u8 is_ht40; /* 1 = 40 MHz channel width */ 3109 u8 is_ht40; /* 1 = 40 MHz channel width */
3138 u8 is_dup; /* 1 = duplicated data streams */ 3110 u8 is_dup; /* 1 = duplicated data streams */
3139 u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */ 3111 u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */
3140 u8 max_search; /* maximun number of tables we can search */ 3112 u8 max_search; /* maximun number of tables we can search */
3141 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ 3113 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
3142 u32 current_rate; /* rate_n_flags, uCode API format */ 3114 u32 current_rate; /* rate_n_flags, uCode API format */
3143 struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */ 3115 struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */
3144}; 3116};
3145 3117
3146struct il_traffic_load { 3118struct il_traffic_load {
3147 unsigned long time_stamp; /* age of the oldest stats */ 3119 unsigned long time_stamp; /* age of the oldest stats */
3148 u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time 3120 u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time
3149 * slice */ 3121 * slice */
3150 u32 total; /* total num of packets during the 3122 u32 total; /* total num of packets during the
3151 * last TID_MAX_TIME_DIFF */ 3123 * last TID_MAX_TIME_DIFF */
3152 u8 queue_count; /* number of queues that has 3124 u8 queue_count; /* number of queues that has
3153 * been used since the last cleanup */ 3125 * been used since the last cleanup */
3154 u8 head; /* start of the circular buffer */ 3126 u8 head; /* start of the circular buffer */
3155}; 3127};
3156 3128
3157/** 3129/**
@@ -3185,11 +3157,11 @@ struct il_lq_sta {
3185 u16 active_legacy_rate; 3157 u16 active_legacy_rate;
3186 u16 active_siso_rate; 3158 u16 active_siso_rate;
3187 u16 active_mimo2_rate; 3159 u16 active_mimo2_rate;
3188 s8 max_rate_idx; /* Max rate set by user */ 3160 s8 max_rate_idx; /* Max rate set by user */
3189 u8 missed_rate_counter; 3161 u8 missed_rate_counter;
3190 3162
3191 struct il_link_quality_cmd lq; 3163 struct il_link_quality_cmd lq;
3192 struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ 3164 struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
3193 struct il_traffic_load load[TID_MAX_LOAD_COUNT]; 3165 struct il_traffic_load load[TID_MAX_LOAD_COUNT];
3194 u8 tx_agg_tid_en; 3166 u8 tx_agg_tid_en;
3195#ifdef CONFIG_MAC80211_DEBUGFS 3167#ifdef CONFIG_MAC80211_DEBUGFS
@@ -3227,12 +3199,14 @@ struct il_station_priv {
3227 bool asleep; 3199 bool asleep;
3228}; 3200};
3229 3201
3230static inline u8 il4965_num_of_ant(u8 m) 3202static inline u8
3203il4965_num_of_ant(u8 m)
3231{ 3204{
3232 return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C); 3205 return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C);
3233} 3206}
3234 3207
3235static inline u8 il4965_first_antenna(u8 mask) 3208static inline u8
3209il4965_first_antenna(u8 mask)
3236{ 3210{
3237 if (mask & ANT_A) 3211 if (mask & ANT_A)
3238 return ANT_A; 3212 return ANT_A;
@@ -3241,7 +3215,6 @@ static inline u8 il4965_first_antenna(u8 mask)
3241 return ANT_C; 3215 return ANT_C;
3242} 3216}
3243 3217
3244
3245/** 3218/**
3246 * il3945_rate_scale_init - Initialize the rate scale table based on assoc info 3219 * il3945_rate_scale_init - Initialize the rate scale table based on assoc info
3247 * 3220 *
@@ -3251,10 +3224,10 @@ static inline u8 il4965_first_antenna(u8 mask)
3251extern void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id); 3224extern void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
3252 3225
3253/* Initialize station's rate scaling information after adding station */ 3226/* Initialize station's rate scaling information after adding station */
3254extern void il4965_rs_rate_init(struct il_priv *il, 3227extern void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
3255 struct ieee80211_sta *sta, u8 sta_id); 3228 u8 sta_id);
3256extern void il3945_rs_rate_init(struct il_priv *il, 3229extern void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
3257 struct ieee80211_sta *sta, u8 sta_id); 3230 u8 sta_id);
3258 3231
3259/** 3232/**
3260 * il_rate_control_register - Register the rate control algorithm callbacks 3233 * il_rate_control_register - Register the rate control algorithm callbacks
@@ -3291,7 +3264,8 @@ extern u32 il_debug_level;
3291 * level will be used if set, otherwise the global debug level which can be 3264 * level will be used if set, otherwise the global debug level which can be
3292 * set via module parameter is used. 3265 * set via module parameter is used.
3293 */ 3266 */
3294static inline u32 il_get_debug_level(struct il_priv *il) 3267static inline u32
3268il_get_debug_level(struct il_priv *il)
3295{ 3269{
3296 if (il->debug_level) 3270 if (il->debug_level)
3297 return il->debug_level; 3271 return il->debug_level;
@@ -3299,7 +3273,8 @@ static inline u32 il_get_debug_level(struct il_priv *il)
3299 return il_debug_level; 3273 return il_debug_level;
3300} 3274}
3301#else 3275#else
3302static inline u32 il_get_debug_level(struct il_priv *il) 3276static inline u32
3277il_get_debug_level(struct il_priv *il)
3303{ 3278{
3304 return il_debug_level; 3279 return il_debug_level;
3305} 3280}
@@ -3329,10 +3304,11 @@ do { \
3329 3304
3330#else 3305#else
3331#define IL_DBG(level, fmt, args...) 3306#define IL_DBG(level, fmt, args...)
3332static inline void il_print_hex_dump(struct il_priv *il, int level, 3307static inline void
3333 const void *p, u32 len) 3308il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len)
3334{} 3309{
3335#endif /* CONFIG_IWLEGACY_DEBUG */ 3310}
3311#endif /* CONFIG_IWLEGACY_DEBUG */
3336 3312
3337#ifdef CONFIG_IWLEGACY_DEBUGFS 3313#ifdef CONFIG_IWLEGACY_DEBUGFS
3338int il_dbgfs_register(struct il_priv *il, const char *name); 3314int il_dbgfs_register(struct il_priv *il, const char *name);
@@ -3343,10 +3319,12 @@ il_dbgfs_register(struct il_priv *il, const char *name)
3343{ 3319{
3344 return 0; 3320 return 0;
3345} 3321}
3346static inline void il_dbgfs_unregister(struct il_priv *il) 3322
3323static inline void
3324il_dbgfs_unregister(struct il_priv *il)
3347{ 3325{
3348} 3326}
3349#endif /* CONFIG_IWLEGACY_DEBUGFS */ 3327#endif /* CONFIG_IWLEGACY_DEBUGFS */
3350 3328
3351/* 3329/*
3352 * To use the debug system: 3330 * To use the debug system:
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-14 10:24:07 -0500