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path: root/drivers/net/wireless/iwlegacy/4965-mac.c
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Diffstat (limited to 'drivers/net/wireless/iwlegacy/4965-mac.c')
-rw-r--r--drivers/net/wireless/iwlegacy/4965-mac.c2173
1 files changed, 1069 insertions, 1104 deletions
diff --git a/drivers/net/wireless/iwlegacy/4965-mac.c b/drivers/net/wireless/iwlegacy/4965-mac.c
index 9e3f74c8e9a7..ca819d872097 100644
--- a/drivers/net/wireless/iwlegacy/4965-mac.c
+++ b/drivers/net/wireless/iwlegacy/4965-mac.c
@@ -53,7 +53,6 @@
53#include "common.h" 53#include "common.h"
54#include "4965.h" 54#include "4965.h"
55 55
56
57/****************************************************************************** 56/******************************************************************************
58 * 57 *
59 * module boiler plate 58 * module boiler plate
@@ -73,15 +72,14 @@
73 72
74#define DRV_VERSION IWLWIFI_VERSION VD 73#define DRV_VERSION IWLWIFI_VERSION VD
75 74
76
77MODULE_DESCRIPTION(DRV_DESCRIPTION); 75MODULE_DESCRIPTION(DRV_DESCRIPTION);
78MODULE_VERSION(DRV_VERSION); 76MODULE_VERSION(DRV_VERSION);
79MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 77MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
80MODULE_LICENSE("GPL"); 78MODULE_LICENSE("GPL");
81MODULE_ALIAS("iwl4965"); 79MODULE_ALIAS("iwl4965");
82 80
83void il4965_check_abort_status(struct il_priv *il, 81void
84 u8 frame_count, u32 status) 82il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status)
85{ 83{
86 if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) { 84 if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
87 IL_ERR("Tx flush command to flush out all frames\n"); 85 IL_ERR("Tx flush command to flush out all frames\n");
@@ -99,7 +97,8 @@ struct il_mod_params il4965_mod_params = {
99 /* the rest are 0 by default */ 97 /* the rest are 0 by default */
100}; 98};
101 99
102void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) 100void
101il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
103{ 102{
104 unsigned long flags; 103 unsigned long flags;
105 int i; 104 int i;
@@ -112,8 +111,8 @@ void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
112 * to an SKB, so we need to unmap and free potential storage */ 111 * to an SKB, so we need to unmap and free potential storage */
113 if (rxq->pool[i].page != NULL) { 112 if (rxq->pool[i].page != NULL) {
114 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, 113 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
115 PAGE_SIZE << il->hw_params.rx_page_order, 114 PAGE_SIZE << il->hw_params.rx_page_order,
116 PCI_DMA_FROMDEVICE); 115 PCI_DMA_FROMDEVICE);
117 __il_free_pages(il, rxq->pool[i].page); 116 __il_free_pages(il, rxq->pool[i].page);
118 rxq->pool[i].page = NULL; 117 rxq->pool[i].page = NULL;
119 } 118 }
@@ -131,10 +130,11 @@ void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
131 spin_unlock_irqrestore(&rxq->lock, flags); 130 spin_unlock_irqrestore(&rxq->lock, flags);
132} 131}
133 132
134int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) 133int
134il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
135{ 135{
136 u32 rb_size; 136 u32 rb_size;
137 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ 137 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
138 u32 rb_timeout = 0; 138 u32 rb_timeout = 0;
139 139
140 if (il->cfg->mod_params->amsdu_size_8K) 140 if (il->cfg->mod_params->amsdu_size_8K)
@@ -149,12 +149,10 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
149 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); 149 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
150 150
151 /* Tell device where to find RBD circular buffer in DRAM */ 151 /* Tell device where to find RBD circular buffer in DRAM */
152 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, 152 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8));
153 (u32)(rxq->bd_dma >> 8));
154 153
155 /* Tell device where in DRAM to update its Rx status */ 154 /* Tell device where in DRAM to update its Rx status */
156 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, 155 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4);
157 rxq->rb_stts_dma >> 4);
158 156
159 /* Enable Rx DMA 157 /* Enable Rx DMA
160 * Direct rx interrupts to hosts 158 * Direct rx interrupts to hosts
@@ -163,12 +161,12 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
163 * 256 RBDs 161 * 256 RBDs
164 */ 162 */
165 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 163 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG,
166 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | 164 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
167 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | 165 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
168 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK | 166 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK | rb_size | (rb_timeout
169 rb_size| 167 <<
170 (rb_timeout << FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)| 168 FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)
171 (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS)); 169 | (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
172 170
173 /* Set interrupt coalescing timer to default (2048 usecs) */ 171 /* Set interrupt coalescing timer to default (2048 usecs) */
174 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF); 172 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF);
@@ -176,7 +174,8 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
176 return 0; 174 return 0;
177} 175}
178 176
179static void il4965_set_pwr_vmain(struct il_priv *il) 177static void
178il4965_set_pwr_vmain(struct il_priv *il)
180{ 179{
181/* 180/*
182 * (for documentation purposes) 181 * (for documentation purposes)
@@ -189,11 +188,12 @@ static void il4965_set_pwr_vmain(struct il_priv *il)
189 */ 188 */
190 189
191 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, 190 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
192 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, 191 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
193 ~APMG_PS_CTRL_MSK_PWR_SRC); 192 ~APMG_PS_CTRL_MSK_PWR_SRC);
194} 193}
195 194
196int il4965_hw_nic_init(struct il_priv *il) 195int
196il4965_hw_nic_init(struct il_priv *il)
197{ 197{
198 unsigned long flags; 198 unsigned long flags;
199 struct il_rx_queue *rxq = &il->rxq; 199 struct il_rx_queue *rxq = &il->rxq;
@@ -249,10 +249,10 @@ int il4965_hw_nic_init(struct il_priv *il)
249/** 249/**
250 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr 250 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
251 */ 251 */
252static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *il, 252static inline __le32
253 dma_addr_t dma_addr) 253il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
254{ 254{
255 return cpu_to_le32((u32)(dma_addr >> 8)); 255 return cpu_to_le32((u32) (dma_addr >> 8));
256} 256}
257 257
258/** 258/**
@@ -266,7 +266,8 @@ static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *il,
266 * also updates the memory address in the firmware to reference the new 266 * also updates the memory address in the firmware to reference the new
267 * target buffer. 267 * target buffer.
268 */ 268 */
269void il4965_rx_queue_restock(struct il_priv *il) 269void
270il4965_rx_queue_restock(struct il_priv *il)
270{ 271{
271 struct il_rx_queue *rxq = &il->rxq; 272 struct il_rx_queue *rxq = &il->rxq;
272 struct list_head *element; 273 struct list_head *element;
@@ -285,8 +286,8 @@ void il4965_rx_queue_restock(struct il_priv *il)
285 list_del(element); 286 list_del(element);
286 287
287 /* Point to Rx buffer via next RBD in circular buffer */ 288 /* Point to Rx buffer via next RBD in circular buffer */
288 rxq->bd[rxq->write] = il4965_dma_addr2rbd_ptr(il, 289 rxq->bd[rxq->write] =
289 rxb->page_dma); 290 il4965_dma_addr2rbd_ptr(il, rxb->page_dma);
290 rxq->queue[rxq->write] = rxb; 291 rxq->queue[rxq->write] = rxb;
291 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 292 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
292 rxq->free_count--; 293 rxq->free_count--;
@@ -297,7 +298,6 @@ void il4965_rx_queue_restock(struct il_priv *il)
297 if (rxq->free_count <= RX_LOW_WATERMARK) 298 if (rxq->free_count <= RX_LOW_WATERMARK)
298 queue_work(il->workqueue, &il->rx_replenish); 299 queue_work(il->workqueue, &il->rx_replenish);
299 300
300
301 /* If we've added more space for the firmware to place data, tell it. 301 /* If we've added more space for the firmware to place data, tell it.
302 * Increment device's write pointer in multiples of 8. */ 302 * Increment device's write pointer in multiples of 8. */
303 if (rxq->write_actual != (rxq->write & ~0x7)) { 303 if (rxq->write_actual != (rxq->write & ~0x7)) {
@@ -316,7 +316,8 @@ void il4965_rx_queue_restock(struct il_priv *il)
316 * Also restock the Rx queue via il_rx_queue_restock. 316 * Also restock the Rx queue via il_rx_queue_restock.
317 * This is called as a scheduled work item (except for during initialization) 317 * This is called as a scheduled work item (except for during initialization)
318 */ 318 */
319static void il4965_rx_allocate(struct il_priv *il, gfp_t priority) 319static void
320il4965_rx_allocate(struct il_priv *il, gfp_t priority)
320{ 321{
321 struct il_rx_queue *rxq = &il->rxq; 322 struct il_rx_queue *rxq = &il->rxq;
322 struct list_head *element; 323 struct list_head *element;
@@ -343,18 +344,16 @@ static void il4965_rx_allocate(struct il_priv *il, gfp_t priority)
343 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); 344 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
344 if (!page) { 345 if (!page) {
345 if (net_ratelimit()) 346 if (net_ratelimit())
346 D_INFO("alloc_pages failed, " 347 D_INFO("alloc_pages failed, " "order: %d\n",
347 "order: %d\n", 348 il->hw_params.rx_page_order);
348 il->hw_params.rx_page_order);
349 349
350 if (rxq->free_count <= RX_LOW_WATERMARK && 350 if (rxq->free_count <= RX_LOW_WATERMARK &&
351 net_ratelimit()) 351 net_ratelimit())
352 IL_ERR( 352 IL_ERR("Failed to alloc_pages with %s. "
353 "Failed to alloc_pages with %s. " 353 "Only %u free buffers remaining.\n",
354 "Only %u free buffers remaining.\n", 354 priority ==
355 priority == GFP_ATOMIC ? 355 GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
356 "GFP_ATOMIC" : "GFP_KERNEL", 356 rxq->free_count);
357 rxq->free_count);
358 /* We don't reschedule replenish work here -- we will 357 /* We don't reschedule replenish work here -- we will
359 * call the restock method and if it still needs 358 * call the restock method and if it still needs
360 * more buffers it will schedule replenish */ 359 * more buffers it will schedule replenish */
@@ -377,9 +376,10 @@ static void il4965_rx_allocate(struct il_priv *il, gfp_t priority)
377 BUG_ON(rxb->page); 376 BUG_ON(rxb->page);
378 rxb->page = page; 377 rxb->page = page;
379 /* Get physical address of the RB */ 378 /* Get physical address of the RB */
380 rxb->page_dma = pci_map_page(il->pci_dev, page, 0, 379 rxb->page_dma =
381 PAGE_SIZE << il->hw_params.rx_page_order, 380 pci_map_page(il->pci_dev, page, 0,
382 PCI_DMA_FROMDEVICE); 381 PAGE_SIZE << il->hw_params.rx_page_order,
382 PCI_DMA_FROMDEVICE);
383 /* dma address must be no more than 36 bits */ 383 /* dma address must be no more than 36 bits */
384 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36)); 384 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
385 /* and also 256 byte aligned! */ 385 /* and also 256 byte aligned! */
@@ -395,7 +395,8 @@ static void il4965_rx_allocate(struct il_priv *il, gfp_t priority)
395 } 395 }
396} 396}
397 397
398void il4965_rx_replenish(struct il_priv *il) 398void
399il4965_rx_replenish(struct il_priv *il)
399{ 400{
400 unsigned long flags; 401 unsigned long flags;
401 402
@@ -406,7 +407,8 @@ void il4965_rx_replenish(struct il_priv *il)
406 spin_unlock_irqrestore(&il->lock, flags); 407 spin_unlock_irqrestore(&il->lock, flags);
407} 408}
408 409
409void il4965_rx_replenish_now(struct il_priv *il) 410void
411il4965_rx_replenish_now(struct il_priv *il)
410{ 412{
411 il4965_rx_allocate(il, GFP_ATOMIC); 413 il4965_rx_allocate(il, GFP_ATOMIC);
412 414
@@ -418,14 +420,15 @@ void il4965_rx_replenish_now(struct il_priv *il)
418 * This free routine walks the list of POOL entries and if SKB is set to 420 * This free routine walks the list of POOL entries and if SKB is set to
419 * non NULL it is unmapped and freed 421 * non NULL it is unmapped and freed
420 */ 422 */
421void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) 423void
424il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
422{ 425{
423 int i; 426 int i;
424 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 427 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
425 if (rxq->pool[i].page != NULL) { 428 if (rxq->pool[i].page != NULL) {
426 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, 429 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
427 PAGE_SIZE << il->hw_params.rx_page_order, 430 PAGE_SIZE << il->hw_params.rx_page_order,
428 PCI_DMA_FROMDEVICE); 431 PCI_DMA_FROMDEVICE);
429 __il_free_pages(il, rxq->pool[i].page); 432 __il_free_pages(il, rxq->pool[i].page);
430 rxq->pool[i].page = NULL; 433 rxq->pool[i].page = NULL;
431 } 434 }
@@ -436,21 +439,23 @@ void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
436 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), 439 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
437 rxq->rb_stts, rxq->rb_stts_dma); 440 rxq->rb_stts, rxq->rb_stts_dma);
438 rxq->bd = NULL; 441 rxq->bd = NULL;
439 rxq->rb_stts = NULL; 442 rxq->rb_stts = NULL;
440} 443}
441 444
442int il4965_rxq_stop(struct il_priv *il) 445int
446il4965_rxq_stop(struct il_priv *il)
443{ 447{
444 448
445 /* stop Rx DMA */ 449 /* stop Rx DMA */
446 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); 450 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
447 il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG, 451 il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG,
448 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); 452 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
449 453
450 return 0; 454 return 0;
451} 455}
452 456
453int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band) 457int
458il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
454{ 459{
455 int idx = 0; 460 int idx = 0;
456 int band_offset = 0; 461 int band_offset = 0;
@@ -459,7 +464,7 @@ int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
459 if (rate_n_flags & RATE_MCS_HT_MSK) { 464 if (rate_n_flags & RATE_MCS_HT_MSK) {
460 idx = (rate_n_flags & 0xff); 465 idx = (rate_n_flags & 0xff);
461 return idx; 466 return idx;
462 /* Legacy rate format, search for match in table */ 467 /* Legacy rate format, search for match in table */
463 } else { 468 } else {
464 if (band == IEEE80211_BAND_5GHZ) 469 if (band == IEEE80211_BAND_5GHZ)
465 band_offset = IL_FIRST_OFDM_RATE; 470 band_offset = IL_FIRST_OFDM_RATE;
@@ -471,19 +476,20 @@ int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
471 return -1; 476 return -1;
472} 477}
473 478
474static int il4965_calc_rssi(struct il_priv *il, 479static int
475 struct il_rx_phy_res *rx_resp) 480il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp)
476{ 481{
477 /* data from PHY/DSP regarding signal strength, etc., 482 /* data from PHY/DSP regarding signal strength, etc.,
478 * contents are always there, not configurable by host. */ 483 * contents are always there, not configurable by host. */
479 struct il4965_rx_non_cfg_phy *ncphy = 484 struct il4965_rx_non_cfg_phy *ncphy =
480 (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf; 485 (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
481 u32 agc = (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) 486 u32 agc =
482 >> IL49_AGC_DB_POS; 487 (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) >>
488 IL49_AGC_DB_POS;
483 489
484 u32 valid_antennae = 490 u32 valid_antennae =
485 (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK) 491 (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK)
486 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET; 492 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
487 u8 max_rssi = 0; 493 u8 max_rssi = 0;
488 u32 i; 494 u32 i;
489 495
@@ -505,31 +511,32 @@ static int il4965_calc_rssi(struct il_priv *il,
505 return max_rssi - agc - IL4965_RSSI_OFFSET; 511 return max_rssi - agc - IL4965_RSSI_OFFSET;
506} 512}
507 513
508 514static u32
509static u32 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in) 515il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in)
510{ 516{
511 u32 decrypt_out = 0; 517 u32 decrypt_out = 0;
512 518
513 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) == 519 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
514 RX_RES_STATUS_STATION_FOUND) 520 RX_RES_STATUS_STATION_FOUND)
515 decrypt_out |= (RX_RES_STATUS_STATION_FOUND | 521 decrypt_out |=
516 RX_RES_STATUS_NO_STATION_INFO_MISMATCH); 522 (RX_RES_STATUS_STATION_FOUND |
523 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
517 524
518 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK); 525 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
519 526
520 /* packet was not encrypted */ 527 /* packet was not encrypted */
521 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == 528 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
522 RX_RES_STATUS_SEC_TYPE_NONE) 529 RX_RES_STATUS_SEC_TYPE_NONE)
523 return decrypt_out; 530 return decrypt_out;
524 531
525 /* packet was encrypted with unknown alg */ 532 /* packet was encrypted with unknown alg */
526 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == 533 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
527 RX_RES_STATUS_SEC_TYPE_ERR) 534 RX_RES_STATUS_SEC_TYPE_ERR)
528 return decrypt_out; 535 return decrypt_out;
529 536
530 /* decryption was not done in HW */ 537 /* decryption was not done in HW */
531 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) != 538 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
532 RX_MPDU_RES_STATUS_DEC_DONE_MSK) 539 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
533 return decrypt_out; 540 return decrypt_out;
534 541
535 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) { 542 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
@@ -559,26 +566,22 @@ static u32 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in)
559 break; 566 break;
560 } 567 }
561 568
562 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", 569 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in, decrypt_out);
563 decrypt_in, decrypt_out);
564 570
565 return decrypt_out; 571 return decrypt_out;
566} 572}
567 573
568static void il4965_pass_packet_to_mac80211(struct il_priv *il, 574static void
569 struct ieee80211_hdr *hdr, 575il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr,
570 u16 len, 576 u16 len, u32 ampdu_status, struct il_rx_buf *rxb,
571 u32 ampdu_status, 577 struct ieee80211_rx_status *stats)
572 struct il_rx_buf *rxb,
573 struct ieee80211_rx_status *stats)
574{ 578{
575 struct sk_buff *skb; 579 struct sk_buff *skb;
576 __le16 fc = hdr->frame_control; 580 __le16 fc = hdr->frame_control;
577 581
578 /* We only process data packets if the interface is open */ 582 /* We only process data packets if the interface is open */
579 if (unlikely(!il->is_open)) { 583 if (unlikely(!il->is_open)) {
580 D_DROP( 584 D_DROP("Dropping packet while interface is not open.\n");
581 "Dropping packet while interface is not open.\n");
582 return; 585 return;
583 } 586 }
584 587
@@ -605,8 +608,8 @@ static void il4965_pass_packet_to_mac80211(struct il_priv *il,
605 608
606/* Called for N_RX (legacy ABG frames), or 609/* Called for N_RX (legacy ABG frames), or
607 * N_RX_MPDU (HT high-throughput N frames). */ 610 * N_RX_MPDU (HT high-throughput N frames). */
608void il4965_hdl_rx(struct il_priv *il, 611void
609 struct il_rx_buf *rxb) 612il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb)
610{ 613{
611 struct ieee80211_hdr *header; 614 struct ieee80211_hdr *header;
612 struct ieee80211_rx_status rx_status; 615 struct ieee80211_rx_status rx_status;
@@ -629,12 +632,14 @@ void il4965_hdl_rx(struct il_priv *il,
629 */ 632 */
630 if (pkt->hdr.cmd == N_RX) { 633 if (pkt->hdr.cmd == N_RX) {
631 phy_res = (struct il_rx_phy_res *)pkt->u.raw; 634 phy_res = (struct il_rx_phy_res *)pkt->u.raw;
632 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) 635 header =
633 + phy_res->cfg_phy_cnt); 636 (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) +
637 phy_res->cfg_phy_cnt);
634 638
635 len = le16_to_cpu(phy_res->byte_count); 639 len = le16_to_cpu(phy_res->byte_count);
636 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) + 640 rx_pkt_status =
637 phy_res->cfg_phy_cnt + len); 641 *(__le32 *) (pkt->u.raw + sizeof(*phy_res) +
642 phy_res->cfg_phy_cnt + len);
638 ampdu_status = le32_to_cpu(rx_pkt_status); 643 ampdu_status = le32_to_cpu(rx_pkt_status);
639 } else { 644 } else {
640 if (!il->_4965.last_phy_res_valid) { 645 if (!il->_4965.last_phy_res_valid) {
@@ -645,21 +650,20 @@ void il4965_hdl_rx(struct il_priv *il,
645 amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw; 650 amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw;
646 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu)); 651 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
647 len = le16_to_cpu(amsdu->byte_count); 652 len = le16_to_cpu(amsdu->byte_count);
648 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len); 653 rx_pkt_status = *(__le32 *) (pkt->u.raw + sizeof(*amsdu) + len);
649 ampdu_status = il4965_translate_rx_status(il, 654 ampdu_status =
650 le32_to_cpu(rx_pkt_status)); 655 il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status));
651 } 656 }
652 657
653 if ((unlikely(phy_res->cfg_phy_cnt > 20))) { 658 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
654 D_DROP("dsp size out of range [0,20]: %d/n", 659 D_DROP("dsp size out of range [0,20]: %d/n",
655 phy_res->cfg_phy_cnt); 660 phy_res->cfg_phy_cnt);
656 return; 661 return;
657 } 662 }
658 663
659 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) || 664 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
660 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) { 665 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
661 D_RX("Bad CRC or FIFO: 0x%08X.\n", 666 D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status));
662 le32_to_cpu(rx_pkt_status));
663 return; 667 return;
664 } 668 }
665 669
@@ -668,18 +672,20 @@ void il4965_hdl_rx(struct il_priv *il,
668 672
669 /* rx_status carries information about the packet to mac80211 */ 673 /* rx_status carries information about the packet to mac80211 */
670 rx_status.mactime = le64_to_cpu(phy_res->timestamp); 674 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
671 rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? 675 rx_status.band =
672 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; 676 (phy_res->
677 phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ :
678 IEEE80211_BAND_5GHZ;
673 rx_status.freq = 679 rx_status.freq =
674 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel), 680 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
675 rx_status.band); 681 rx_status.band);
676 rx_status.rate_idx = 682 rx_status.rate_idx =
677 il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band); 683 il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
678 rx_status.flag = 0; 684 rx_status.flag = 0;
679 685
680 /* TSF isn't reliable. In order to allow smooth user experience, 686 /* TSF isn't reliable. In order to allow smooth user experience,
681 * this W/A doesn't propagate it to the mac80211 */ 687 * this W/A doesn't propagate it to the mac80211 */
682 /*rx_status.flag |= RX_FLAG_MACTIME_MPDU;*/ 688 /*rx_status.flag |= RX_FLAG_MACTIME_MPDU; */
683 689
684 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp); 690 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
685 691
@@ -687,8 +693,8 @@ void il4965_hdl_rx(struct il_priv *il,
687 rx_status.signal = il4965_calc_rssi(il, phy_res); 693 rx_status.signal = il4965_calc_rssi(il, phy_res);
688 694
689 il_dbg_log_rx_data_frame(il, len, header); 695 il_dbg_log_rx_data_frame(il, len, header);
690 D_STATS("Rssi %d, TSF %llu\n", 696 D_STATS("Rssi %d, TSF %llu\n", rx_status.signal,
691 rx_status.signal, (unsigned long long)rx_status.mactime); 697 (unsigned long long)rx_status.mactime);
692 698
693 /* 699 /*
694 * "antenna number" 700 * "antenna number"
@@ -704,8 +710,8 @@ void il4965_hdl_rx(struct il_priv *il,
704 * as a bitmask. 710 * as a bitmask.
705 */ 711 */
706 rx_status.antenna = 712 rx_status.antenna =
707 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) 713 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >>
708 >> RX_RES_PHY_FLAGS_ANTENNA_POS; 714 RX_RES_PHY_FLAGS_ANTENNA_POS;
709 715
710 /* set the preamble flag if appropriate */ 716 /* set the preamble flag if appropriate */
711 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) 717 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
@@ -719,14 +725,14 @@ void il4965_hdl_rx(struct il_priv *il,
719 if (rate_n_flags & RATE_MCS_SGI_MSK) 725 if (rate_n_flags & RATE_MCS_SGI_MSK)
720 rx_status.flag |= RX_FLAG_SHORT_GI; 726 rx_status.flag |= RX_FLAG_SHORT_GI;
721 727
722 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, 728 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb,
723 rxb, &rx_status); 729 &rx_status);
724} 730}
725 731
726/* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY). 732/* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY).
727 * This will be used later in il_hdl_rx() for N_RX_MPDU. */ 733 * This will be used later in il_hdl_rx() for N_RX_MPDU. */
728void il4965_hdl_rx_phy(struct il_priv *il, 734void
729 struct il_rx_buf *rxb) 735il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb)
730{ 736{
731 struct il_rx_pkt *pkt = rxb_addr(rxb); 737 struct il_rx_pkt *pkt = rxb_addr(rxb);
732 il->_4965.last_phy_res_valid = true; 738 il->_4965.last_phy_res_valid = true;
@@ -734,11 +740,10 @@ void il4965_hdl_rx_phy(struct il_priv *il,
734 sizeof(struct il_rx_phy_res)); 740 sizeof(struct il_rx_phy_res));
735} 741}
736 742
737static int il4965_get_channels_for_scan(struct il_priv *il, 743static int
738 struct ieee80211_vif *vif, 744il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif,
739 enum ieee80211_band band, 745 enum ieee80211_band band, u8 is_active,
740 u8 is_active, u8 n_probes, 746 u8 n_probes, struct il_scan_channel *scan_ch)
741 struct il_scan_channel *scan_ch)
742{ 747{
743 struct ieee80211_channel *chan; 748 struct ieee80211_channel *chan;
744 const struct ieee80211_supported_band *sband; 749 const struct ieee80211_supported_band *sband;
@@ -769,9 +774,8 @@ static int il4965_get_channels_for_scan(struct il_priv *il,
769 774
770 ch_info = il_get_channel_info(il, band, channel); 775 ch_info = il_get_channel_info(il, band, channel);
771 if (!il_is_channel_valid(ch_info)) { 776 if (!il_is_channel_valid(ch_info)) {
772 D_SCAN( 777 D_SCAN("Channel %d is INVALID for this band.\n",
773 "Channel %d is INVALID for this band.\n", 778 channel);
774 channel);
775 continue; 779 continue;
776 } 780 }
777 781
@@ -799,12 +803,13 @@ static int il4965_get_channels_for_scan(struct il_priv *il,
799 else 803 else
800 scan_ch->tx_gain = ((1 << 5) | (5 << 3)); 804 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
801 805
802 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", 806 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel,
803 channel, le32_to_cpu(scan_ch->type), 807 le32_to_cpu(scan_ch->type),
804 (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ? 808 (scan_ch->
805 "ACTIVE" : "PASSIVE", 809 type & SCAN_CHANNEL_TYPE_ACTIVE) ? "ACTIVE" : "PASSIVE",
806 (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ? 810 (scan_ch->
807 active_dwell : passive_dwell); 811 type & SCAN_CHANNEL_TYPE_ACTIVE) ? active_dwell :
812 passive_dwell);
808 813
809 scan_ch++; 814 scan_ch++;
810 added++; 815 added++;
@@ -814,12 +819,14 @@ static int il4965_get_channels_for_scan(struct il_priv *il,
814 return added; 819 return added;
815} 820}
816 821
817static inline u32 il4965_ant_idx_to_flags(u8 ant_idx) 822static inline u32
823il4965_ant_idx_to_flags(u8 ant_idx)
818{ 824{
819 return BIT(ant_idx) << RATE_MCS_ANT_POS; 825 return BIT(ant_idx) << RATE_MCS_ANT_POS;
820} 826}
821 827
822int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) 828int
829il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
823{ 830{
824 struct il_host_cmd cmd = { 831 struct il_host_cmd cmd = {
825 .id = C_SCAN, 832 .id = C_SCAN,
@@ -836,7 +843,7 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
836 u8 rx_ant = il->hw_params.valid_rx_ant; 843 u8 rx_ant = il->hw_params.valid_rx_ant;
837 u8 rate; 844 u8 rate;
838 bool is_active = false; 845 bool is_active = false;
839 int chan_mod; 846 int chan_mod;
840 u8 active_chains; 847 u8 active_chains;
841 u8 scan_tx_antennas = il->hw_params.valid_tx_ant; 848 u8 scan_tx_antennas = il->hw_params.valid_tx_ant;
842 int ret; 849 int ret;
@@ -847,11 +854,11 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
847 ctx = il_rxon_ctx_from_vif(vif); 854 ctx = il_rxon_ctx_from_vif(vif);
848 855
849 if (!il->scan_cmd) { 856 if (!il->scan_cmd) {
850 il->scan_cmd = kmalloc(sizeof(struct il_scan_cmd) + 857 il->scan_cmd =
851 IL_MAX_SCAN_SIZE, GFP_KERNEL); 858 kmalloc(sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE,
859 GFP_KERNEL);
852 if (!il->scan_cmd) { 860 if (!il->scan_cmd) {
853 D_SCAN( 861 D_SCAN("fail to allocate memory for scan\n");
854 "fail to allocate memory for scan\n");
855 return -ENOMEM; 862 return -ENOMEM;
856 } 863 }
857 } 864 }
@@ -876,11 +883,11 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
876 interval = suspend_time; 883 interval = suspend_time;
877 884
878 extra = (suspend_time / interval) << 22; 885 extra = (suspend_time / interval) << 22;
879 scan_suspend_time = (extra | 886 scan_suspend_time =
880 ((suspend_time % interval) * 1024)); 887 (extra | ((suspend_time % interval) * 1024));
881 scan->suspend_time = cpu_to_le32(scan_suspend_time); 888 scan->suspend_time = cpu_to_le32(scan_suspend_time);
882 D_SCAN("suspend_time 0x%X beacon interval %d\n", 889 D_SCAN("suspend_time 0x%X beacon interval %d\n",
883 scan_suspend_time, interval); 890 scan_suspend_time, interval);
884 } 891 }
885 892
886 if (il->scan_request->n_ssids) { 893 if (il->scan_request->n_ssids) {
@@ -892,7 +899,7 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
892 continue; 899 continue;
893 scan->direct_scan[p].id = WLAN_EID_SSID; 900 scan->direct_scan[p].id = WLAN_EID_SSID;
894 scan->direct_scan[p].len = 901 scan->direct_scan[p].len =
895 il->scan_request->ssids[i].ssid_len; 902 il->scan_request->ssids[i].ssid_len;
896 memcpy(scan->direct_scan[p].ssid, 903 memcpy(scan->direct_scan[p].ssid,
897 il->scan_request->ssids[i].ssid, 904 il->scan_request->ssids[i].ssid,
898 il->scan_request->ssids[i].ssid_len); 905 il->scan_request->ssids[i].ssid_len);
@@ -910,10 +917,10 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
910 switch (il->scan_band) { 917 switch (il->scan_band) {
911 case IEEE80211_BAND_2GHZ: 918 case IEEE80211_BAND_2GHZ:
912 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; 919 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
913 chan_mod = le32_to_cpu( 920 chan_mod =
914 il->ctx.active.flags & 921 le32_to_cpu(il->ctx.active.
915 RXON_FLG_CHANNEL_MODE_MSK) 922 flags & RXON_FLG_CHANNEL_MODE_MSK) >>
916 >> RXON_FLG_CHANNEL_MODE_POS; 923 RXON_FLG_CHANNEL_MODE_POS;
917 if (chan_mod == CHANNEL_MODE_PURE_40) { 924 if (chan_mod == CHANNEL_MODE_PURE_40) {
918 rate = RATE_6M_PLCP; 925 rate = RATE_6M_PLCP;
919 } else { 926 } else {
@@ -946,30 +953,30 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
946 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER 953 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER
947 * here instead of IL_GOOD_CRC_TH_DISABLED. 954 * here instead of IL_GOOD_CRC_TH_DISABLED.
948 */ 955 */
949 scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT : 956 scan->good_CRC_th =
950 IL_GOOD_CRC_TH_NEVER; 957 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
951 958
952 band = il->scan_band; 959 band = il->scan_band;
953 960
954 if (il->cfg->scan_rx_antennas[band]) 961 if (il->cfg->scan_rx_antennas[band])
955 rx_ant = il->cfg->scan_rx_antennas[band]; 962 rx_ant = il->cfg->scan_rx_antennas[band];
956 963
957 il->scan_tx_ant[band] = il4965_toggle_tx_ant(il, 964 il->scan_tx_ant[band] =
958 il->scan_tx_ant[band], 965 il4965_toggle_tx_ant(il, il->scan_tx_ant[band], scan_tx_antennas);
959 scan_tx_antennas);
960 rate_flags |= il4965_ant_idx_to_flags(il->scan_tx_ant[band]); 966 rate_flags |= il4965_ant_idx_to_flags(il->scan_tx_ant[band]);
961 scan->tx_cmd.rate_n_flags = il4965_hw_set_rate_n_flags(rate, rate_flags); 967 scan->tx_cmd.rate_n_flags =
968 il4965_hw_set_rate_n_flags(rate, rate_flags);
962 969
963 /* In power save mode use one chain, otherwise use all chains */ 970 /* In power save mode use one chain, otherwise use all chains */
964 if (test_bit(S_POWER_PMI, &il->status)) { 971 if (test_bit(S_POWER_PMI, &il->status)) {
965 /* rx_ant has been set to all valid chains previously */ 972 /* rx_ant has been set to all valid chains previously */
966 active_chains = rx_ant & 973 active_chains =
967 ((u8)(il->chain_noise_data.active_chains)); 974 rx_ant & ((u8) (il->chain_noise_data.active_chains));
968 if (!active_chains) 975 if (!active_chains)
969 active_chains = rx_ant; 976 active_chains = rx_ant;
970 977
971 D_SCAN("chain_noise_data.active_chains: %u\n", 978 D_SCAN("chain_noise_data.active_chains: %u\n",
972 il->chain_noise_data.active_chains); 979 il->chain_noise_data.active_chains);
973 980
974 rx_ant = il4965_first_antenna(active_chains); 981 rx_ant = il4965_first_antenna(active_chains);
975 } 982 }
@@ -981,26 +988,26 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
981 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS; 988 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
982 scan->rx_chain = cpu_to_le16(rx_chain); 989 scan->rx_chain = cpu_to_le16(rx_chain);
983 990
984 cmd_len = il_fill_probe_req(il, 991 cmd_len =
985 (struct ieee80211_mgmt *)scan->data, 992 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
986 vif->addr, 993 vif->addr, il->scan_request->ie,
987 il->scan_request->ie, 994 il->scan_request->ie_len,
988 il->scan_request->ie_len, 995 IL_MAX_SCAN_SIZE - sizeof(*scan));
989 IL_MAX_SCAN_SIZE - sizeof(*scan));
990 scan->tx_cmd.len = cpu_to_le16(cmd_len); 996 scan->tx_cmd.len = cpu_to_le16(cmd_len);
991 997
992 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | 998 scan->filter_flags |=
993 RXON_FILTER_BCON_AWARE_MSK); 999 (RXON_FILTER_ACCEPT_GRP_MSK | RXON_FILTER_BCON_AWARE_MSK);
994 1000
995 scan->channel_count = il4965_get_channels_for_scan(il, vif, band, 1001 scan->channel_count =
996 is_active, n_probes, 1002 il4965_get_channels_for_scan(il, vif, band, is_active, n_probes,
997 (void *)&scan->data[cmd_len]); 1003 (void *)&scan->data[cmd_len]);
998 if (scan->channel_count == 0) { 1004 if (scan->channel_count == 0) {
999 D_SCAN("channel count %d\n", scan->channel_count); 1005 D_SCAN("channel count %d\n", scan->channel_count);
1000 return -EIO; 1006 return -EIO;
1001 } 1007 }
1002 1008
1003 cmd.len += le16_to_cpu(scan->tx_cmd.len) + 1009 cmd.len +=
1010 le16_to_cpu(scan->tx_cmd.len) +
1004 scan->channel_count * sizeof(struct il_scan_channel); 1011 scan->channel_count * sizeof(struct il_scan_channel);
1005 cmd.data = scan; 1012 cmd.data = scan;
1006 scan->len = cpu_to_le16(cmd.len); 1013 scan->len = cpu_to_le16(cmd.len);
@@ -1014,8 +1021,9 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
1014 return ret; 1021 return ret;
1015} 1022}
1016 1023
1017int il4965_manage_ibss_station(struct il_priv *il, 1024int
1018 struct ieee80211_vif *vif, bool add) 1025il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
1026 bool add)
1019{ 1027{
1020 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 1028 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
1021 1029
@@ -1024,11 +1032,11 @@ int il4965_manage_ibss_station(struct il_priv *il,
1024 vif->bss_conf.bssid, 1032 vif->bss_conf.bssid,
1025 &vif_priv->ibss_bssid_sta_id); 1033 &vif_priv->ibss_bssid_sta_id);
1026 return il_remove_station(il, vif_priv->ibss_bssid_sta_id, 1034 return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
1027 vif->bss_conf.bssid); 1035 vif->bss_conf.bssid);
1028} 1036}
1029 1037
1030void il4965_free_tfds_in_queue(struct il_priv *il, 1038void
1031 int sta_id, int tid, int freed) 1039il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed)
1032{ 1040{
1033 lockdep_assert_held(&il->sta_lock); 1041 lockdep_assert_held(&il->sta_lock);
1034 1042
@@ -1036,18 +1044,18 @@ void il4965_free_tfds_in_queue(struct il_priv *il,
1036 il->stations[sta_id].tid[tid].tfds_in_queue -= freed; 1044 il->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1037 else { 1045 else {
1038 D_TX("free more than tfds_in_queue (%u:%d)\n", 1046 D_TX("free more than tfds_in_queue (%u:%d)\n",
1039 il->stations[sta_id].tid[tid].tfds_in_queue, 1047 il->stations[sta_id].tid[tid].tfds_in_queue, freed);
1040 freed);
1041 il->stations[sta_id].tid[tid].tfds_in_queue = 0; 1048 il->stations[sta_id].tid[tid].tfds_in_queue = 0;
1042 } 1049 }
1043} 1050}
1044 1051
1045#define IL_TX_QUEUE_MSK 0xfffff 1052#define IL_TX_QUEUE_MSK 0xfffff
1046 1053
1047static bool il4965_is_single_rx_stream(struct il_priv *il) 1054static bool
1055il4965_is_single_rx_stream(struct il_priv *il)
1048{ 1056{
1049 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC || 1057 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
1050 il->current_ht_config.single_chain_sufficient; 1058 il->current_ht_config.single_chain_sufficient;
1051} 1059}
1052 1060
1053#define IL_NUM_RX_CHAINS_MULTIPLE 3 1061#define IL_NUM_RX_CHAINS_MULTIPLE 3
@@ -1065,7 +1073,8 @@ static bool il4965_is_single_rx_stream(struct il_priv *il)
1065 * MIMO (dual stream) requires at least 2, but works better with 3. 1073 * MIMO (dual stream) requires at least 2, but works better with 3.
1066 * This does not determine *which* chains to use, just how many. 1074 * This does not determine *which* chains to use, just how many.
1067 */ 1075 */
1068static int il4965_get_active_rx_chain_count(struct il_priv *il) 1076static int
1077il4965_get_active_rx_chain_count(struct il_priv *il)
1069{ 1078{
1070 /* # of Rx chains to use when expecting MIMO. */ 1079 /* # of Rx chains to use when expecting MIMO. */
1071 if (il4965_is_single_rx_stream(il)) 1080 if (il4965_is_single_rx_stream(il))
@@ -1089,14 +1098,14 @@ il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt)
1089 case IEEE80211_SMPS_OFF: 1098 case IEEE80211_SMPS_OFF:
1090 return active_cnt; 1099 return active_cnt;
1091 default: 1100 default:
1092 WARN(1, "invalid SMPS mode %d", 1101 WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps);
1093 il->current_ht_config.smps);
1094 return active_cnt; 1102 return active_cnt;
1095 } 1103 }
1096} 1104}
1097 1105
1098/* up to 4 chains */ 1106/* up to 4 chains */
1099static u8 il4965_count_chain_bitmap(u32 chain_bitmap) 1107static u8
1108il4965_count_chain_bitmap(u32 chain_bitmap)
1100{ 1109{
1101 u8 res; 1110 u8 res;
1102 res = (chain_bitmap & BIT(0)) >> 0; 1111 res = (chain_bitmap & BIT(0)) >> 0;
@@ -1112,7 +1121,8 @@ static u8 il4965_count_chain_bitmap(u32 chain_bitmap)
1112 * Selects how many and which Rx receivers/antennas/chains to use. 1121 * Selects how many and which Rx receivers/antennas/chains to use.
1113 * This should not be used for scan command ... it puts data in wrong place. 1122 * This should not be used for scan command ... it puts data in wrong place.
1114 */ 1123 */
1115void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx) 1124void
1125il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx)
1116{ 1126{
1117 bool is_single = il4965_is_single_rx_stream(il); 1127 bool is_single = il4965_is_single_rx_stream(il);
1118 bool is_cam = !test_bit(S_POWER_PMI, &il->status); 1128 bool is_cam = !test_bit(S_POWER_PMI, &il->status);
@@ -1135,7 +1145,6 @@ void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx)
1135 active_rx_cnt = il4965_get_active_rx_chain_count(il); 1145 active_rx_cnt = il4965_get_active_rx_chain_count(il);
1136 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt); 1146 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt);
1137 1147
1138
1139 /* correct rx chain count according hw settings 1148 /* correct rx chain count according hw settings
1140 * and chain noise calibration 1149 * and chain noise calibration
1141 */ 1150 */
@@ -1147,7 +1156,7 @@ void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx)
1147 idle_rx_cnt = valid_rx_cnt; 1156 idle_rx_cnt = valid_rx_cnt;
1148 1157
1149 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS; 1158 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1150 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS; 1159 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1151 1160
1152 ctx->staging.rx_chain = cpu_to_le16(rx_chain); 1161 ctx->staging.rx_chain = cpu_to_le16(rx_chain);
1153 1162
@@ -1156,45 +1165,47 @@ void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx)
1156 else 1165 else
1157 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; 1166 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1158 1167
1159 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", 1168 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", ctx->staging.rx_chain,
1160 ctx->staging.rx_chain, 1169 active_rx_cnt, idle_rx_cnt);
1161 active_rx_cnt, idle_rx_cnt);
1162 1170
1163 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 || 1171 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1164 active_rx_cnt < idle_rx_cnt); 1172 active_rx_cnt < idle_rx_cnt);
1165} 1173}
1166 1174
1167u8 il4965_toggle_tx_ant(struct il_priv *il, u8 ant, u8 valid) 1175u8
1176il4965_toggle_tx_ant(struct il_priv *il, u8 ant, u8 valid)
1168{ 1177{
1169 int i; 1178 int i;
1170 u8 ind = ant; 1179 u8 ind = ant;
1171 1180
1172 for (i = 0; i < RATE_ANT_NUM - 1; i++) { 1181 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
1173 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0; 1182 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
1174 if (valid & BIT(ind)) 1183 if (valid & BIT(ind))
1175 return ind; 1184 return ind;
1176 } 1185 }
1177 return ant; 1186 return ant;
1178} 1187}
1179 1188
1180static const char *il4965_get_fh_string(int cmd) 1189static const char *
1190il4965_get_fh_string(int cmd)
1181{ 1191{
1182 switch (cmd) { 1192 switch (cmd) {
1183 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG); 1193 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG);
1184 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG); 1194 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG);
1185 IL_CMD(FH49_RSCSR_CHNL0_WPTR); 1195 IL_CMD(FH49_RSCSR_CHNL0_WPTR);
1186 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG); 1196 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG);
1187 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG); 1197 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG);
1188 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG); 1198 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG);
1189 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV); 1199 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1190 IL_CMD(FH49_TSSR_TX_STATUS_REG); 1200 IL_CMD(FH49_TSSR_TX_STATUS_REG);
1191 IL_CMD(FH49_TSSR_TX_ERROR_REG); 1201 IL_CMD(FH49_TSSR_TX_ERROR_REG);
1192 default: 1202 default:
1193 return "UNKNOWN"; 1203 return "UNKNOWN";
1194 } 1204 }
1195} 1205}
1196 1206
1197int il4965_dump_fh(struct il_priv *il, char **buf, bool display) 1207int
1208il4965_dump_fh(struct il_priv *il, char **buf, bool display)
1198{ 1209{
1199 int i; 1210 int i;
1200#ifdef CONFIG_IWLEGACY_DEBUG 1211#ifdef CONFIG_IWLEGACY_DEBUG
@@ -1218,28 +1229,29 @@ int il4965_dump_fh(struct il_priv *il, char **buf, bool display)
1218 *buf = kmalloc(bufsz, GFP_KERNEL); 1229 *buf = kmalloc(bufsz, GFP_KERNEL);
1219 if (!*buf) 1230 if (!*buf)
1220 return -ENOMEM; 1231 return -ENOMEM;
1221 pos += scnprintf(*buf + pos, bufsz - pos, 1232 pos +=
1222 "FH register values:\n"); 1233 scnprintf(*buf + pos, bufsz - pos, "FH register values:\n");
1223 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) { 1234 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1224 pos += scnprintf(*buf + pos, bufsz - pos, 1235 pos +=
1225 " %34s: 0X%08x\n", 1236 scnprintf(*buf + pos, bufsz - pos,
1226 il4965_get_fh_string(fh_tbl[i]), 1237 " %34s: 0X%08x\n",
1227 il_rd(il, fh_tbl[i])); 1238 il4965_get_fh_string(fh_tbl[i]), il_rd(il,
1239 fh_tbl
1240 [i]));
1228 } 1241 }
1229 return pos; 1242 return pos;
1230 } 1243 }
1231#endif 1244#endif
1232 IL_ERR("FH register values:\n"); 1245 IL_ERR("FH register values:\n");
1233 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) { 1246 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1234 IL_ERR(" %34s: 0X%08x\n", 1247 IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl[i]),
1235 il4965_get_fh_string(fh_tbl[i]), 1248 il_rd(il, fh_tbl[i]));
1236 il_rd(il, fh_tbl[i]));
1237 } 1249 }
1238 return 0; 1250 return 0;
1239} 1251}
1240void il4965_hdl_missed_beacon(struct il_priv *il,
1241 struct il_rx_buf *rxb)
1242 1252
1253void
1254il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb)
1243{ 1255{
1244 struct il_rx_pkt *pkt = rxb_addr(rxb); 1256 struct il_rx_pkt *pkt = rxb_addr(rxb);
1245 struct il_missed_beacon_notif *missed_beacon; 1257 struct il_missed_beacon_notif *missed_beacon;
@@ -1247,12 +1259,11 @@ void il4965_hdl_missed_beacon(struct il_priv *il,
1247 missed_beacon = &pkt->u.missed_beacon; 1259 missed_beacon = &pkt->u.missed_beacon;
1248 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) > 1260 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
1249 il->missed_beacon_threshold) { 1261 il->missed_beacon_threshold) {
1250 D_CALIB( 1262 D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
1251 "missed bcn cnsq %d totl %d rcd %d expctd %d\n", 1263 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
1252 le32_to_cpu(missed_beacon->consecutive_missed_beacons), 1264 le32_to_cpu(missed_beacon->total_missed_becons),
1253 le32_to_cpu(missed_beacon->total_missed_becons), 1265 le32_to_cpu(missed_beacon->num_recvd_beacons),
1254 le32_to_cpu(missed_beacon->num_recvd_beacons), 1266 le32_to_cpu(missed_beacon->num_expected_beacons));
1255 le32_to_cpu(missed_beacon->num_expected_beacons));
1256 if (!test_bit(S_SCANNING, &il->status)) 1267 if (!test_bit(S_SCANNING, &il->status))
1257 il4965_init_sensitivity(il); 1268 il4965_init_sensitivity(il);
1258 } 1269 }
@@ -1261,7 +1272,8 @@ void il4965_hdl_missed_beacon(struct il_priv *il,
1261/* Calculate noise level, based on measurements during network silence just 1272/* Calculate noise level, based on measurements during network silence just
1262 * before arriving beacon. This measurement can be done only if we know 1273 * before arriving beacon. This measurement can be done only if we know
1263 * exactly when to expect beacons, therefore only when we're associated. */ 1274 * exactly when to expect beacons, therefore only when we're associated. */
1264static void il4965_rx_calc_noise(struct il_priv *il) 1275static void
1276il4965_rx_calc_noise(struct il_priv *il)
1265{ 1277{
1266 struct stats_rx_non_phy *rx_info; 1278 struct stats_rx_non_phy *rx_info;
1267 int num_active_rx = 0; 1279 int num_active_rx = 0;
@@ -1271,11 +1283,11 @@ static void il4965_rx_calc_noise(struct il_priv *il)
1271 1283
1272 rx_info = &(il->_4965.stats.rx.general); 1284 rx_info = &(il->_4965.stats.rx.general);
1273 bcn_silence_a = 1285 bcn_silence_a =
1274 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER; 1286 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
1275 bcn_silence_b = 1287 bcn_silence_b =
1276 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER; 1288 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
1277 bcn_silence_c = 1289 bcn_silence_c =
1278 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER; 1290 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
1279 1291
1280 if (bcn_silence_a) { 1292 if (bcn_silence_a) {
1281 total_silence += bcn_silence_a; 1293 total_silence += bcn_silence_a;
@@ -1296,9 +1308,8 @@ static void il4965_rx_calc_noise(struct il_priv *il)
1296 else 1308 else
1297 last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE; 1309 last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE;
1298 1310
1299 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", 1311 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a,
1300 bcn_silence_a, bcn_silence_b, bcn_silence_c, 1312 bcn_silence_b, bcn_silence_c, last_rx_noise);
1301 last_rx_noise);
1302} 1313}
1303 1314
1304#ifdef CONFIG_IWLEGACY_DEBUGFS 1315#ifdef CONFIG_IWLEGACY_DEBUGFS
@@ -1307,8 +1318,8 @@ static void il4965_rx_calc_noise(struct il_priv *il)
1307 * FIXME: This function is for debugging, do not deal with 1318 * FIXME: This function is for debugging, do not deal with
1308 * the case of counters roll-over. 1319 * the case of counters roll-over.
1309 */ 1320 */
1310static void il4965_accumulative_stats(struct il_priv *il, 1321static void
1311 __le32 *stats) 1322il4965_accumulative_stats(struct il_priv *il, __le32 * stats)
1312{ 1323{
1313 int i, size; 1324 int i, size;
1314 __le32 *prev_stats; 1325 __le32 *prev_stats;
@@ -1317,22 +1328,23 @@ static void il4965_accumulative_stats(struct il_priv *il,
1317 struct stats_general_common *general, *accum_general; 1328 struct stats_general_common *general, *accum_general;
1318 struct stats_tx *tx, *accum_tx; 1329 struct stats_tx *tx, *accum_tx;
1319 1330
1320 prev_stats = (__le32 *)&il->_4965.stats; 1331 prev_stats = (__le32 *) & il->_4965.stats;
1321 accum_stats = (u32 *)&il->_4965.accum_stats; 1332 accum_stats = (u32 *) & il->_4965.accum_stats;
1322 size = sizeof(struct il_notif_stats); 1333 size = sizeof(struct il_notif_stats);
1323 general = &il->_4965.stats.general.common; 1334 general = &il->_4965.stats.general.common;
1324 accum_general = &il->_4965.accum_stats.general.common; 1335 accum_general = &il->_4965.accum_stats.general.common;
1325 tx = &il->_4965.stats.tx; 1336 tx = &il->_4965.stats.tx;
1326 accum_tx = &il->_4965.accum_stats.tx; 1337 accum_tx = &il->_4965.accum_stats.tx;
1327 delta = (u32 *)&il->_4965.delta_stats; 1338 delta = (u32 *) & il->_4965.delta_stats;
1328 max_delta = (u32 *)&il->_4965.max_delta; 1339 max_delta = (u32 *) & il->_4965.max_delta;
1329 1340
1330 for (i = sizeof(__le32); i < size; 1341 for (i = sizeof(__le32); i < size;
1331 i += sizeof(__le32), stats++, prev_stats++, delta++, 1342 i +=
1332 max_delta++, accum_stats++) { 1343 sizeof(__le32), stats++, prev_stats++, delta++, max_delta++,
1344 accum_stats++) {
1333 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) { 1345 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
1334 *delta = (le32_to_cpu(*stats) - 1346 *delta =
1335 le32_to_cpu(*prev_stats)); 1347 (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats));
1336 *accum_stats += *delta; 1348 *accum_stats += *delta;
1337 if (*delta > *max_delta) 1349 if (*delta > *max_delta)
1338 *max_delta = *delta; 1350 *max_delta = *delta;
@@ -1347,31 +1359,27 @@ static void il4965_accumulative_stats(struct il_priv *il,
1347 1359
1348#define REG_RECALIB_PERIOD (60) 1360#define REG_RECALIB_PERIOD (60)
1349 1361
1350void il4965_hdl_stats(struct il_priv *il, 1362void
1351 struct il_rx_buf *rxb) 1363il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb)
1352{ 1364{
1353 int change; 1365 int change;
1354 struct il_rx_pkt *pkt = rxb_addr(rxb); 1366 struct il_rx_pkt *pkt = rxb_addr(rxb);
1355 1367
1356 D_RX( 1368 D_RX("Statistics notification received (%d vs %d).\n",
1357 "Statistics notification received (%d vs %d).\n", 1369 (int)sizeof(struct il_notif_stats),
1358 (int)sizeof(struct il_notif_stats), 1370 le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
1359 le32_to_cpu(pkt->len_n_flags) & 1371
1360 IL_RX_FRAME_SIZE_MSK); 1372 change =
1361 1373 ((il->_4965.stats.general.common.temperature !=
1362 change = ((il->_4965.stats.general.common.temperature != 1374 pkt->u.stats.general.common.temperature) ||
1363 pkt->u.stats.general.common.temperature) || 1375 ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) !=
1364 ((il->_4965.stats.flag & 1376 (pkt->u.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)));
1365 STATS_REPLY_FLG_HT40_MODE_MSK) !=
1366 (pkt->u.stats.flag &
1367 STATS_REPLY_FLG_HT40_MODE_MSK)));
1368#ifdef CONFIG_IWLEGACY_DEBUGFS 1377#ifdef CONFIG_IWLEGACY_DEBUGFS
1369 il4965_accumulative_stats(il, (__le32 *)&pkt->u.stats); 1378 il4965_accumulative_stats(il, (__le32 *) & pkt->u.stats);
1370#endif 1379#endif
1371 1380
1372 /* TODO: reading some of stats is unneeded */ 1381 /* TODO: reading some of stats is unneeded */
1373 memcpy(&il->_4965.stats, &pkt->u.stats, 1382 memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats));
1374 sizeof(il->_4965.stats));
1375 1383
1376 set_bit(S_STATS, &il->status); 1384 set_bit(S_STATS, &il->status);
1377 1385
@@ -1379,8 +1387,8 @@ void il4965_hdl_stats(struct il_priv *il,
1379 * REG_RECALIB_PERIOD seconds to ensure we get a 1387 * REG_RECALIB_PERIOD seconds to ensure we get a
1380 * thermal update even if the uCode doesn't give 1388 * thermal update even if the uCode doesn't give
1381 * us one */ 1389 * us one */
1382 mod_timer(&il->stats_periodic, jiffies + 1390 mod_timer(&il->stats_periodic,
1383 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000)); 1391 jiffies + msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
1384 1392
1385 if (unlikely(!test_bit(S_SCANNING, &il->status)) && 1393 if (unlikely(!test_bit(S_SCANNING, &il->status)) &&
1386 (pkt->hdr.cmd == N_STATS)) { 1394 (pkt->hdr.cmd == N_STATS)) {
@@ -1391,19 +1399,18 @@ void il4965_hdl_stats(struct il_priv *il,
1391 il->cfg->ops->lib->temp_ops.temperature(il); 1399 il->cfg->ops->lib->temp_ops.temperature(il);
1392} 1400}
1393 1401
1394void il4965_hdl_c_stats(struct il_priv *il, 1402void
1395 struct il_rx_buf *rxb) 1403il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb)
1396{ 1404{
1397 struct il_rx_pkt *pkt = rxb_addr(rxb); 1405 struct il_rx_pkt *pkt = rxb_addr(rxb);
1398 1406
1399 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) { 1407 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) {
1400#ifdef CONFIG_IWLEGACY_DEBUGFS 1408#ifdef CONFIG_IWLEGACY_DEBUGFS
1401 memset(&il->_4965.accum_stats, 0, 1409 memset(&il->_4965.accum_stats, 0,
1402 sizeof(struct il_notif_stats)); 1410 sizeof(struct il_notif_stats));
1403 memset(&il->_4965.delta_stats, 0, 1411 memset(&il->_4965.delta_stats, 0,
1404 sizeof(struct il_notif_stats)); 1412 sizeof(struct il_notif_stats));
1405 memset(&il->_4965.max_delta, 0, 1413 memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats));
1406 sizeof(struct il_notif_stats));
1407#endif 1414#endif
1408 D_RX("Statistics have been cleared\n"); 1415 D_RX("Statistics have been cleared\n");
1409 } 1416 }
@@ -1448,7 +1455,8 @@ static const u8 tid_to_ac[] = {
1448 IEEE80211_AC_VO 1455 IEEE80211_AC_VO
1449}; 1456};
1450 1457
1451static inline int il4965_get_ac_from_tid(u16 tid) 1458static inline int
1459il4965_get_ac_from_tid(u16 tid)
1452{ 1460{
1453 if (likely(tid < ARRAY_SIZE(tid_to_ac))) 1461 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1454 return tid_to_ac[tid]; 1462 return tid_to_ac[tid];
@@ -1470,12 +1478,11 @@ il4965_get_fifo_from_tid(struct il_rxon_context *ctx, u16 tid)
1470/* 1478/*
1471 * handle build C_TX command notification. 1479 * handle build C_TX command notification.
1472 */ 1480 */
1473static void il4965_tx_cmd_build_basic(struct il_priv *il, 1481static void
1474 struct sk_buff *skb, 1482il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb,
1475 struct il_tx_cmd *tx_cmd, 1483 struct il_tx_cmd *tx_cmd,
1476 struct ieee80211_tx_info *info, 1484 struct ieee80211_tx_info *info,
1477 struct ieee80211_hdr *hdr, 1485 struct ieee80211_hdr *hdr, u8 std_id)
1478 u8 std_id)
1479{ 1486{
1480 __le16 fc = hdr->frame_control; 1487 __le16 fc = hdr->frame_control;
1481 __le32 tx_flags = tx_cmd->tx_flags; 1488 __le32 tx_flags = tx_cmd->tx_flags;
@@ -1527,10 +1534,9 @@ static void il4965_tx_cmd_build_basic(struct il_priv *il,
1527 1534
1528#define RTS_DFAULT_RETRY_LIMIT 60 1535#define RTS_DFAULT_RETRY_LIMIT 60
1529 1536
1530static void il4965_tx_cmd_build_rate(struct il_priv *il, 1537static void
1531 struct il_tx_cmd *tx_cmd, 1538il4965_tx_cmd_build_rate(struct il_priv *il, struct il_tx_cmd *tx_cmd,
1532 struct ieee80211_tx_info *info, 1539 struct ieee80211_tx_info *info, __le16 fc)
1533 __le16 fc)
1534{ 1540{
1535 u32 rate_flags; 1541 u32 rate_flags;
1536 int rate_idx; 1542 int rate_idx;
@@ -1538,7 +1544,7 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il,
1538 u8 data_retry_limit; 1544 u8 data_retry_limit;
1539 u8 rate_plcp; 1545 u8 rate_plcp;
1540 1546
1541 /* Set retry limit on DATA packets and Probe Responses*/ 1547 /* Set retry limit on DATA packets and Probe Responses */
1542 if (ieee80211_is_probe_resp(fc)) 1548 if (ieee80211_is_probe_resp(fc))
1543 data_retry_limit = 3; 1549 data_retry_limit = 3;
1544 else 1550 else
@@ -1566,10 +1572,11 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il,
1566 * idx is invalid. 1572 * idx is invalid.
1567 */ 1573 */
1568 rate_idx = info->control.rates[0].idx; 1574 rate_idx = info->control.rates[0].idx;
1569 if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || 1575 if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || rate_idx < 0
1570 rate_idx < 0 || rate_idx > RATE_COUNT_LEGACY) 1576 || rate_idx > RATE_COUNT_LEGACY)
1571 rate_idx = rate_lowest_index(&il->bands[info->band], 1577 rate_idx =
1572 info->control.sta); 1578 rate_lowest_index(&il->bands[info->band],
1579 info->control.sta);
1573 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */ 1580 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
1574 if (info->band == IEEE80211_BAND_5GHZ) 1581 if (info->band == IEEE80211_BAND_5GHZ)
1575 rate_idx += IL_FIRST_OFDM_RATE; 1582 rate_idx += IL_FIRST_OFDM_RATE;
@@ -1583,20 +1590,21 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il,
1583 rate_flags |= RATE_MCS_CCK_MSK; 1590 rate_flags |= RATE_MCS_CCK_MSK;
1584 1591
1585 /* Set up antennas */ 1592 /* Set up antennas */
1586 il->mgmt_tx_ant = il4965_toggle_tx_ant(il, il->mgmt_tx_ant, 1593 il->mgmt_tx_ant =
1587 il->hw_params.valid_tx_ant); 1594 il4965_toggle_tx_ant(il, il->mgmt_tx_ant,
1595 il->hw_params.valid_tx_ant);
1588 1596
1589 rate_flags |= il4965_ant_idx_to_flags(il->mgmt_tx_ant); 1597 rate_flags |= il4965_ant_idx_to_flags(il->mgmt_tx_ant);
1590 1598
1591 /* Set the rate in the TX cmd */ 1599 /* Set the rate in the TX cmd */
1592 tx_cmd->rate_n_flags = il4965_hw_set_rate_n_flags(rate_plcp, rate_flags); 1600 tx_cmd->rate_n_flags =
1601 il4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
1593} 1602}
1594 1603
1595static void il4965_tx_cmd_build_hwcrypto(struct il_priv *il, 1604static void
1596 struct ieee80211_tx_info *info, 1605il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
1597 struct il_tx_cmd *tx_cmd, 1606 struct il_tx_cmd *tx_cmd, struct sk_buff *skb_frag,
1598 struct sk_buff *skb_frag, 1607 int sta_id)
1599 int sta_id)
1600{ 1608{
1601 struct ieee80211_key_conf *keyconf = info->control.hw_key; 1609 struct ieee80211_key_conf *keyconf = info->control.hw_key;
1602 1610
@@ -1619,13 +1627,14 @@ static void il4965_tx_cmd_build_hwcrypto(struct il_priv *il,
1619 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; 1627 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
1620 /* fall through */ 1628 /* fall through */
1621 case WLAN_CIPHER_SUITE_WEP40: 1629 case WLAN_CIPHER_SUITE_WEP40:
1622 tx_cmd->sec_ctl |= (TX_CMD_SEC_WEP | 1630 tx_cmd->sec_ctl |=
1623 (keyconf->keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT); 1631 (TX_CMD_SEC_WEP | (keyconf->keyidx & TX_CMD_SEC_MSK) <<
1632 TX_CMD_SEC_SHIFT);
1624 1633
1625 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen); 1634 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
1626 1635
1627 D_TX("Configuring packet for WEP encryption " 1636 D_TX("Configuring packet for WEP encryption " "with key %d\n",
1628 "with key %d\n", keyconf->keyidx); 1637 keyconf->keyidx);
1629 break; 1638 break;
1630 1639
1631 default: 1640 default:
@@ -1637,7 +1646,8 @@ static void il4965_tx_cmd_build_hwcrypto(struct il_priv *il,
1637/* 1646/*
1638 * start C_TX command process 1647 * start C_TX command process
1639 */ 1648 */
1640int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) 1649int
1650il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1641{ 1651{
1642 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1652 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1643 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1653 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
@@ -1694,8 +1704,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1694 sta_id = il_sta_id_or_broadcast(il, ctx, info->control.sta); 1704 sta_id = il_sta_id_or_broadcast(il, ctx, info->control.sta);
1695 1705
1696 if (sta_id == IL_INVALID_STATION) { 1706 if (sta_id == IL_INVALID_STATION) {
1697 D_DROP("Dropping - INVALID STATION: %pM\n", 1707 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
1698 hdr->addr1);
1699 goto drop_unlock; 1708 goto drop_unlock;
1700 } 1709 }
1701 } 1710 }
@@ -1729,8 +1738,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1729 * The microcode will clear the more data 1738 * The microcode will clear the more data
1730 * bit in the last frame it transmits. 1739 * bit in the last frame it transmits.
1731 */ 1740 */
1732 hdr->frame_control |= 1741 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
1733 cpu_to_le16(IEEE80211_FCTL_MOREDATA);
1734 } else 1742 } else
1735 txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)]; 1743 txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)];
1736 1744
@@ -1746,8 +1754,8 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1746 } 1754 }
1747 seq_number = il->stations[sta_id].tid[tid].seq_number; 1755 seq_number = il->stations[sta_id].tid[tid].seq_number;
1748 seq_number &= IEEE80211_SCTL_SEQ; 1756 seq_number &= IEEE80211_SCTL_SEQ;
1749 hdr->seq_ctrl = hdr->seq_ctrl & 1757 hdr->seq_ctrl =
1750 cpu_to_le16(IEEE80211_SCTL_FRAG); 1758 hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG);
1751 hdr->seq_ctrl |= cpu_to_le16(seq_number); 1759 hdr->seq_ctrl |= cpu_to_le16(seq_number);
1752 seq_number += 0x10; 1760 seq_number += 0x10;
1753 /* aggregation is on for this <sta,tid> */ 1761 /* aggregation is on for this <sta,tid> */
@@ -1793,15 +1801,15 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1793 * locate the frame within the tx queue and do post-tx processing. 1801 * locate the frame within the tx queue and do post-tx processing.
1794 */ 1802 */
1795 out_cmd->hdr.cmd = C_TX; 1803 out_cmd->hdr.cmd = C_TX;
1796 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | 1804 out_cmd->hdr.sequence =
1797 IDX_TO_SEQ(q->write_ptr))); 1805 cpu_to_le16((u16)
1806 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
1798 1807
1799 /* Copy MAC header from skb into command buffer */ 1808 /* Copy MAC header from skb into command buffer */
1800 memcpy(tx_cmd->hdr, hdr, hdr_len); 1809 memcpy(tx_cmd->hdr, hdr, hdr_len);
1801 1810
1802
1803 /* Total # bytes to be transmitted */ 1811 /* Total # bytes to be transmitted */
1804 len = (u16)skb->len; 1812 len = (u16) skb->len;
1805 tx_cmd->len = cpu_to_le16(len); 1813 tx_cmd->len = cpu_to_le16(len);
1806 1814
1807 if (info->control.hw_key) 1815 if (info->control.hw_key)
@@ -1823,8 +1831,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1823 * of the MAC header (device reads on dword boundaries). 1831 * of the MAC header (device reads on dword boundaries).
1824 * We'll tell device about this padding later. 1832 * We'll tell device about this padding later.
1825 */ 1833 */
1826 len = sizeof(struct il_tx_cmd) + 1834 len = sizeof(struct il_tx_cmd) + sizeof(struct il_cmd_header) + hdr_len;
1827 sizeof(struct il_cmd_header) + hdr_len;
1828 firstlen = (len + 3) & ~3; 1835 firstlen = (len + 3) & ~3;
1829 1836
1830 /* Tell NIC about any 2-byte padding after MAC header */ 1837 /* Tell NIC about any 2-byte padding after MAC header */
@@ -1833,15 +1840,15 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1833 1840
1834 /* Physical address of this Tx command's header (not MAC header!), 1841 /* Physical address of this Tx command's header (not MAC header!),
1835 * within command buffer array. */ 1842 * within command buffer array. */
1836 txcmd_phys = pci_map_single(il->pci_dev, 1843 txcmd_phys =
1837 &out_cmd->hdr, firstlen, 1844 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
1838 PCI_DMA_BIDIRECTIONAL); 1845 PCI_DMA_BIDIRECTIONAL);
1839 dma_unmap_addr_set(out_meta, mapping, txcmd_phys); 1846 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1840 dma_unmap_len_set(out_meta, len, firstlen); 1847 dma_unmap_len_set(out_meta, len, firstlen);
1841 /* Add buffer containing Tx command and MAC(!) header to TFD's 1848 /* Add buffer containing Tx command and MAC(!) header to TFD's
1842 * first entry */ 1849 * first entry */
1843 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, 1850 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen,
1844 txcmd_phys, firstlen, 1, 0); 1851 1, 0);
1845 1852
1846 if (!ieee80211_has_morefrags(hdr->frame_control)) { 1853 if (!ieee80211_has_morefrags(hdr->frame_control)) {
1847 txq->need_update = 1; 1854 txq->need_update = 1;
@@ -1854,35 +1861,36 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1854 * if any (802.11 null frames have no payload). */ 1861 * if any (802.11 null frames have no payload). */
1855 secondlen = skb->len - hdr_len; 1862 secondlen = skb->len - hdr_len;
1856 if (secondlen > 0) { 1863 if (secondlen > 0) {
1857 phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len, 1864 phys_addr =
1858 secondlen, PCI_DMA_TODEVICE); 1865 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
1859 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, 1866 PCI_DMA_TODEVICE);
1860 phys_addr, secondlen, 1867 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr,
1861 0, 0); 1868 secondlen, 0, 0);
1862 } 1869 }
1863 1870
1864 scratch_phys = txcmd_phys + sizeof(struct il_cmd_header) + 1871 scratch_phys =
1865 offsetof(struct il_tx_cmd, scratch); 1872 txcmd_phys + sizeof(struct il_cmd_header) +
1873 offsetof(struct il_tx_cmd, scratch);
1866 1874
1867 /* take back ownership of DMA buffer to enable update */ 1875 /* take back ownership of DMA buffer to enable update */
1868 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, 1876 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen,
1869 firstlen, PCI_DMA_BIDIRECTIONAL); 1877 PCI_DMA_BIDIRECTIONAL);
1870 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); 1878 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1871 tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys); 1879 tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys);
1872 1880
1873 D_TX("sequence nr = 0X%x\n", 1881 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
1874 le16_to_cpu(out_cmd->hdr.sequence));
1875 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); 1882 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1876 il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd)); 1883 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd));
1877 il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); 1884 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len);
1878 1885
1879 /* Set up entry for this TFD in Tx byte-count array */ 1886 /* Set up entry for this TFD in Tx byte-count array */
1880 if (info->flags & IEEE80211_TX_CTL_AMPDU) 1887 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1881 il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 1888 il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq,
1882 le16_to_cpu(tx_cmd->len)); 1889 le16_to_cpu(tx_cmd->
1890 len));
1883 1891
1884 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, 1892 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen,
1885 firstlen, PCI_DMA_BIDIRECTIONAL); 1893 PCI_DMA_BIDIRECTIONAL);
1886 1894
1887 /* Tell device the write idx *just past* this latest filled TFD */ 1895 /* Tell device the write idx *just past* this latest filled TFD */
1888 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); 1896 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
@@ -1924,19 +1932,19 @@ drop_unlock:
1924 return -1; 1932 return -1;
1925} 1933}
1926 1934
1927static inline int il4965_alloc_dma_ptr(struct il_priv *il, 1935static inline int
1928 struct il_dma_ptr *ptr, size_t size) 1936il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size)
1929{ 1937{
1930 ptr->addr = dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, 1938 ptr->addr =
1931 GFP_KERNEL); 1939 dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, GFP_KERNEL);
1932 if (!ptr->addr) 1940 if (!ptr->addr)
1933 return -ENOMEM; 1941 return -ENOMEM;
1934 ptr->size = size; 1942 ptr->size = size;
1935 return 0; 1943 return 0;
1936} 1944}
1937 1945
1938static inline void il4965_free_dma_ptr(struct il_priv *il, 1946static inline void
1939 struct il_dma_ptr *ptr) 1947il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr)
1940{ 1948{
1941 if (unlikely(!ptr->addr)) 1949 if (unlikely(!ptr->addr))
1942 return; 1950 return;
@@ -1950,7 +1958,8 @@ static inline void il4965_free_dma_ptr(struct il_priv *il,
1950 * 1958 *
1951 * Destroy all TX DMA queues and structures 1959 * Destroy all TX DMA queues and structures
1952 */ 1960 */
1953void il4965_hw_txq_ctx_free(struct il_priv *il) 1961void
1962il4965_hw_txq_ctx_free(struct il_priv *il)
1954{ 1963{
1955 int txq_id; 1964 int txq_id;
1956 1965
@@ -1977,7 +1986,8 @@ void il4965_hw_txq_ctx_free(struct il_priv *il)
1977 * @param il 1986 * @param il
1978 * @return error code 1987 * @return error code
1979 */ 1988 */
1980int il4965_txq_ctx_alloc(struct il_priv *il) 1989int
1990il4965_txq_ctx_alloc(struct il_priv *il)
1981{ 1991{
1982 int ret; 1992 int ret;
1983 int txq_id, slots_num; 1993 int txq_id, slots_num;
@@ -1986,8 +1996,9 @@ int il4965_txq_ctx_alloc(struct il_priv *il)
1986 /* Free all tx/cmd queues and keep-warm buffer */ 1996 /* Free all tx/cmd queues and keep-warm buffer */
1987 il4965_hw_txq_ctx_free(il); 1997 il4965_hw_txq_ctx_free(il);
1988 1998
1989 ret = il4965_alloc_dma_ptr(il, &il->scd_bc_tbls, 1999 ret =
1990 il->hw_params.scd_bc_tbls_size); 2000 il4965_alloc_dma_ptr(il, &il->scd_bc_tbls,
2001 il->hw_params.scd_bc_tbls_size);
1991 if (ret) { 2002 if (ret) {
1992 IL_ERR("Scheduler BC Table allocation failed\n"); 2003 IL_ERR("Scheduler BC Table allocation failed\n");
1993 goto error_bc_tbls; 2004 goto error_bc_tbls;
@@ -2016,11 +2027,10 @@ int il4965_txq_ctx_alloc(struct il_priv *il)
2016 2027
2017 /* Alloc and init all Tx queues, including the command queue (#4/#9) */ 2028 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
2018 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { 2029 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
2019 slots_num = (txq_id == il->cmd_queue) ? 2030 slots_num =
2020 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; 2031 (txq_id ==
2021 ret = il_tx_queue_init(il, 2032 il->cmd_queue) ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
2022 &il->txq[txq_id], slots_num, 2033 ret = il_tx_queue_init(il, &il->txq[txq_id], slots_num, txq_id);
2023 txq_id);
2024 if (ret) { 2034 if (ret) {
2025 IL_ERR("Tx %d queue init failed\n", txq_id); 2035 IL_ERR("Tx %d queue init failed\n", txq_id);
2026 goto error; 2036 goto error;
@@ -2029,16 +2039,17 @@ int il4965_txq_ctx_alloc(struct il_priv *il)
2029 2039
2030 return ret; 2040 return ret;
2031 2041
2032 error: 2042error:
2033 il4965_hw_txq_ctx_free(il); 2043 il4965_hw_txq_ctx_free(il);
2034 il4965_free_dma_ptr(il, &il->kw); 2044 il4965_free_dma_ptr(il, &il->kw);
2035 error_kw: 2045error_kw:
2036 il4965_free_dma_ptr(il, &il->scd_bc_tbls); 2046 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
2037 error_bc_tbls: 2047error_bc_tbls:
2038 return ret; 2048 return ret;
2039} 2049}
2040 2050
2041void il4965_txq_ctx_reset(struct il_priv *il) 2051void
2052il4965_txq_ctx_reset(struct il_priv *il)
2042{ 2053{
2043 int txq_id, slots_num; 2054 int txq_id, slots_num;
2044 unsigned long flags; 2055 unsigned long flags;
@@ -2055,17 +2066,17 @@ void il4965_txq_ctx_reset(struct il_priv *il)
2055 2066
2056 /* Alloc and init all Tx queues, including the command queue (#4) */ 2067 /* Alloc and init all Tx queues, including the command queue (#4) */
2057 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { 2068 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
2058 slots_num = txq_id == il->cmd_queue ? 2069 slots_num =
2059 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; 2070 txq_id == il->cmd_queue ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
2060 il_tx_queue_reset(il, &il->txq[txq_id], 2071 il_tx_queue_reset(il, &il->txq[txq_id], slots_num, txq_id);
2061 slots_num, txq_id);
2062 } 2072 }
2063} 2073}
2064 2074
2065/** 2075/**
2066 * il4965_txq_ctx_stop - Stop all Tx DMA channels 2076 * il4965_txq_ctx_stop - Stop all Tx DMA channels
2067 */ 2077 */
2068void il4965_txq_ctx_stop(struct il_priv *il) 2078void
2079il4965_txq_ctx_stop(struct il_priv *il)
2069{ 2080{
2070 int ch, txq_id; 2081 int ch, txq_id;
2071 unsigned long flags; 2082 unsigned long flags;
@@ -2077,15 +2088,13 @@ void il4965_txq_ctx_stop(struct il_priv *il)
2077 2088
2078 /* Stop each Tx DMA channel, and wait for it to be idle */ 2089 /* Stop each Tx DMA channel, and wait for it to be idle */
2079 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) { 2090 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) {
2080 il_wr(il, 2091 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
2081 FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); 2092 if (il_poll_bit
2082 if (il_poll_bit(il, FH49_TSSR_TX_STATUS_REG, 2093 (il, FH49_TSSR_TX_STATUS_REG,
2083 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch), 2094 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch), 1000))
2084 1000))
2085 IL_ERR("Failing on timeout while stopping" 2095 IL_ERR("Failing on timeout while stopping"
2086 " DMA channel %d [0x%08x]", ch, 2096 " DMA channel %d [0x%08x]", ch, il_rd(il,
2087 il_rd(il, 2097 FH49_TSSR_TX_STATUS_REG));
2088 FH49_TSSR_TX_STATUS_REG));
2089 } 2098 }
2090 spin_unlock_irqrestore(&il->lock, flags); 2099 spin_unlock_irqrestore(&il->lock, flags);
2091 2100
@@ -2106,7 +2115,8 @@ void il4965_txq_ctx_stop(struct il_priv *il)
2106 * Should never return anything < 7, because they should already 2115 * Should never return anything < 7, because they should already
2107 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6) 2116 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
2108 */ 2117 */
2109static int il4965_txq_ctx_activate_free(struct il_priv *il) 2118static int
2119il4965_txq_ctx_activate_free(struct il_priv *il)
2110{ 2120{
2111 int txq_id; 2121 int txq_id;
2112 2122
@@ -2119,22 +2129,21 @@ static int il4965_txq_ctx_activate_free(struct il_priv *il)
2119/** 2129/**
2120 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration 2130 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2121 */ 2131 */
2122static void il4965_tx_queue_stop_scheduler(struct il_priv *il, 2132static void
2123 u16 txq_id) 2133il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id)
2124{ 2134{
2125 /* Simply stop the queue, but don't change any configuration; 2135 /* Simply stop the queue, but don't change any configuration;
2126 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ 2136 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2127 il_wr_prph(il, 2137 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
2128 IL49_SCD_QUEUE_STATUS_BITS(txq_id), 2138 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | (1 <<
2129 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)| 2139 IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2130 (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2131} 2140}
2132 2141
2133/** 2142/**
2134 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue 2143 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2135 */ 2144 */
2136static int il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, 2145static int
2137 u16 txq_id) 2146il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id)
2138{ 2147{
2139 u32 tbl_dw_addr; 2148 u32 tbl_dw_addr;
2140 u32 tbl_dw; 2149 u32 tbl_dw;
@@ -2142,8 +2151,8 @@ static int il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid,
2142 2151
2143 scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK; 2152 scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
2144 2153
2145 tbl_dw_addr = il->scd_base_addr + 2154 tbl_dw_addr =
2146 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); 2155 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
2147 2156
2148 tbl_dw = il_read_targ_mem(il, tbl_dw_addr); 2157 tbl_dw = il_read_targ_mem(il, tbl_dw_addr);
2149 2158
@@ -2163,8 +2172,9 @@ static int il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid,
2163 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE, 2172 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE,
2164 * i.e. it must be one of the higher queues used for aggregation 2173 * i.e. it must be one of the higher queues used for aggregation
2165 */ 2174 */
2166static int il4965_txq_agg_enable(struct il_priv *il, int txq_id, 2175static int
2167 int tx_fifo, int sta_id, int tid, u16 ssn_idx) 2176il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id,
2177 int tid, u16 ssn_idx)
2168{ 2178{
2169 unsigned long flags; 2179 unsigned long flags;
2170 u16 ra_tid; 2180 u16 ra_tid;
@@ -2172,9 +2182,8 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id,
2172 2182
2173 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) || 2183 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2174 (IL49_FIRST_AMPDU_QUEUE + 2184 (IL49_FIRST_AMPDU_QUEUE +
2175 il->cfg->base_params->num_of_ampdu_queues <= txq_id)) { 2185 il->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
2176 IL_WARN( 2186 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2177 "queue number out of range: %d, must be %d to %d\n",
2178 txq_id, IL49_FIRST_AMPDU_QUEUE, 2187 txq_id, IL49_FIRST_AMPDU_QUEUE,
2179 IL49_FIRST_AMPDU_QUEUE + 2188 IL49_FIRST_AMPDU_QUEUE +
2180 il->cfg->base_params->num_of_ampdu_queues - 1); 2189 il->cfg->base_params->num_of_ampdu_queues - 1);
@@ -2207,14 +2216,17 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id,
2207 2216
2208 /* Set up Tx win size and frame limit for this queue */ 2217 /* Set up Tx win size and frame limit for this queue */
2209 il_write_targ_mem(il, 2218 il_write_targ_mem(il,
2210 il->scd_base_addr + IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id), 2219 il->scd_base_addr +
2211 (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 2220 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2212 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 2221 (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS)
2222 & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2213 2223
2214 il_write_targ_mem(il, il->scd_base_addr + 2224 il_write_targ_mem(il,
2215 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), 2225 il->scd_base_addr +
2216 (SCD_FRAME_LIMIT << IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) 2226 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2217 & IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 2227 (SCD_FRAME_LIMIT <<
2228 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
2229 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2218 2230
2219 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); 2231 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2220 2232
@@ -2226,9 +2238,9 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id,
2226 return 0; 2238 return 0;
2227} 2239}
2228 2240
2229 2241int
2230int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, 2242il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2231 struct ieee80211_sta *sta, u16 tid, u16 *ssn) 2243 struct ieee80211_sta *sta, u16 tid, u16 * ssn)
2232{ 2244{
2233 int sta_id; 2245 int sta_id;
2234 int tx_fifo; 2246 int tx_fifo;
@@ -2241,8 +2253,7 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2241 if (unlikely(tx_fifo < 0)) 2253 if (unlikely(tx_fifo < 0))
2242 return tx_fifo; 2254 return tx_fifo;
2243 2255
2244 IL_WARN("%s on ra = %pM tid = %d\n", 2256 IL_WARN("%s on ra = %pM tid = %d\n", __func__, sta->addr, tid);
2245 __func__, sta->addr, tid);
2246 2257
2247 sta_id = il_sta_id(sta); 2258 sta_id = il_sta_id(sta);
2248 if (sta_id == IL_INVALID_STATION) { 2259 if (sta_id == IL_INVALID_STATION) {
@@ -2267,12 +2278,10 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2267 tid_data = &il->stations[sta_id].tid[tid]; 2278 tid_data = &il->stations[sta_id].tid[tid];
2268 *ssn = SEQ_TO_SN(tid_data->seq_number); 2279 *ssn = SEQ_TO_SN(tid_data->seq_number);
2269 tid_data->agg.txq_id = txq_id; 2280 tid_data->agg.txq_id = txq_id;
2270 il_set_swq_id(&il->txq[txq_id], 2281 il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id);
2271 il4965_get_ac_from_tid(tid), txq_id);
2272 spin_unlock_irqrestore(&il->sta_lock, flags); 2282 spin_unlock_irqrestore(&il->sta_lock, flags);
2273 2283
2274 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, 2284 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn);
2275 sta_id, tid, *ssn);
2276 if (ret) 2285 if (ret)
2277 return ret; 2286 return ret;
2278 2287
@@ -2283,9 +2292,8 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2283 tid_data->agg.state = IL_AGG_ON; 2292 tid_data->agg.state = IL_AGG_ON;
2284 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 2293 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2285 } else { 2294 } else {
2286 D_HT( 2295 D_HT("HW queue is NOT empty: %d packets in HW queue\n",
2287 "HW queue is NOT empty: %d packets in HW queue\n", 2296 tid_data->tfds_in_queue);
2288 tid_data->tfds_in_queue);
2289 tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA; 2297 tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA;
2290 } 2298 }
2291 spin_unlock_irqrestore(&il->sta_lock, flags); 2299 spin_unlock_irqrestore(&il->sta_lock, flags);
@@ -2296,14 +2304,13 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2296 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE 2304 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE
2297 * il->lock must be held by the caller 2305 * il->lock must be held by the caller
2298 */ 2306 */
2299static int il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, 2307static int
2300 u16 ssn_idx, u8 tx_fifo) 2308il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo)
2301{ 2309{
2302 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) || 2310 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2303 (IL49_FIRST_AMPDU_QUEUE + 2311 (IL49_FIRST_AMPDU_QUEUE +
2304 il->cfg->base_params->num_of_ampdu_queues <= txq_id)) { 2312 il->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
2305 IL_WARN( 2313 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2306 "queue number out of range: %d, must be %d to %d\n",
2307 txq_id, IL49_FIRST_AMPDU_QUEUE, 2314 txq_id, IL49_FIRST_AMPDU_QUEUE,
2308 IL49_FIRST_AMPDU_QUEUE + 2315 IL49_FIRST_AMPDU_QUEUE +
2309 il->cfg->base_params->num_of_ampdu_queues - 1); 2316 il->cfg->base_params->num_of_ampdu_queues - 1);
@@ -2312,24 +2319,23 @@ static int il4965_txq_agg_disable(struct il_priv *il, u16 txq_id,
2312 2319
2313 il4965_tx_queue_stop_scheduler(il, txq_id); 2320 il4965_tx_queue_stop_scheduler(il, txq_id);
2314 2321
2315 il_clear_bits_prph(il, 2322 il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2316 IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2317 2323
2318 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); 2324 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2319 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); 2325 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2320 /* supposes that ssn_idx is valid (!= 0xFFF) */ 2326 /* supposes that ssn_idx is valid (!= 0xFFF) */
2321 il4965_set_wr_ptrs(il, txq_id, ssn_idx); 2327 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2322 2328
2323 il_clear_bits_prph(il, 2329 il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2324 IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2325 il_txq_ctx_deactivate(il, txq_id); 2330 il_txq_ctx_deactivate(il, txq_id);
2326 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0); 2331 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0);
2327 2332
2328 return 0; 2333 return 0;
2329} 2334}
2330 2335
2331int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, 2336int
2332 struct ieee80211_sta *sta, u16 tid) 2337il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
2338 struct ieee80211_sta *sta, u16 tid)
2333{ 2339{
2334 int tx_fifo_id, txq_id, sta_id, ssn; 2340 int tx_fifo_id, txq_id, sta_id, ssn;
2335 struct il_tid_data *tid_data; 2341 struct il_tid_data *tid_data;
@@ -2376,13 +2382,13 @@ int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
2376 if (write_ptr != read_ptr) { 2382 if (write_ptr != read_ptr) {
2377 D_HT("Stopping a non empty AGG HW QUEUE\n"); 2383 D_HT("Stopping a non empty AGG HW QUEUE\n");
2378 il->stations[sta_id].tid[tid].agg.state = 2384 il->stations[sta_id].tid[tid].agg.state =
2379 IL_EMPTYING_HW_QUEUE_DELBA; 2385 IL_EMPTYING_HW_QUEUE_DELBA;
2380 spin_unlock_irqrestore(&il->sta_lock, flags); 2386 spin_unlock_irqrestore(&il->sta_lock, flags);
2381 return 0; 2387 return 0;
2382 } 2388 }
2383 2389
2384 D_HT("HW queue is empty\n"); 2390 D_HT("HW queue is empty\n");
2385 turn_off: 2391turn_off:
2386 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF; 2392 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF;
2387 2393
2388 /* do not restore/save irqs */ 2394 /* do not restore/save irqs */
@@ -2404,8 +2410,8 @@ int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
2404 return 0; 2410 return 0;
2405} 2411}
2406 2412
2407int il4965_txq_check_empty(struct il_priv *il, 2413int
2408 int sta_id, u8 tid, int txq_id) 2414il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id)
2409{ 2415{
2410 struct il_queue *q = &il->txq[txq_id].q; 2416 struct il_queue *q = &il->txq[txq_id].q;
2411 u8 *addr = il->stations[sta_id].sta.sta.addr; 2417 u8 *addr = il->stations[sta_id].sta.sta.addr;
@@ -2420,12 +2426,11 @@ int il4965_txq_check_empty(struct il_priv *il,
2420 case IL_EMPTYING_HW_QUEUE_DELBA: 2426 case IL_EMPTYING_HW_QUEUE_DELBA:
2421 /* We are reclaiming the last packet of the */ 2427 /* We are reclaiming the last packet of the */
2422 /* aggregated HW queue */ 2428 /* aggregated HW queue */
2423 if (txq_id == tid_data->agg.txq_id && 2429 if (txq_id == tid_data->agg.txq_id &&
2424 q->read_ptr == q->write_ptr) { 2430 q->read_ptr == q->write_ptr) {
2425 u16 ssn = SEQ_TO_SN(tid_data->seq_number); 2431 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
2426 int tx_fifo = il4965_get_fifo_from_tid(ctx, tid); 2432 int tx_fifo = il4965_get_fifo_from_tid(ctx, tid);
2427 D_HT( 2433 D_HT("HW queue empty: continue DELBA flow\n");
2428 "HW queue empty: continue DELBA flow\n");
2429 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo); 2434 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo);
2430 tid_data->agg.state = IL_AGG_OFF; 2435 tid_data->agg.state = IL_AGG_OFF;
2431 ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid); 2436 ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
@@ -2434,8 +2439,7 @@ int il4965_txq_check_empty(struct il_priv *il,
2434 case IL_EMPTYING_HW_QUEUE_ADDBA: 2439 case IL_EMPTYING_HW_QUEUE_ADDBA:
2435 /* We are reclaiming the last packet of the queue */ 2440 /* We are reclaiming the last packet of the queue */
2436 if (tid_data->tfds_in_queue == 0) { 2441 if (tid_data->tfds_in_queue == 0) {
2437 D_HT( 2442 D_HT("HW queue empty: continue ADDBA flow\n");
2438 "HW queue empty: continue ADDBA flow\n");
2439 tid_data->agg.state = IL_AGG_ON; 2443 tid_data->agg.state = IL_AGG_ON;
2440 ieee80211_start_tx_ba_cb_irqsafe(ctx->vif, addr, tid); 2444 ieee80211_start_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
2441 } 2445 }
@@ -2445,9 +2449,9 @@ int il4965_txq_check_empty(struct il_priv *il,
2445 return 0; 2449 return 0;
2446} 2450}
2447 2451
2448static void il4965_non_agg_tx_status(struct il_priv *il, 2452static void
2449 struct il_rxon_context *ctx, 2453il4965_non_agg_tx_status(struct il_priv *il, struct il_rxon_context *ctx,
2450 const u8 *addr1) 2454 const u8 * addr1)
2451{ 2455{
2452 struct ieee80211_sta *sta; 2456 struct ieee80211_sta *sta;
2453 struct il_station_priv *sta_priv; 2457 struct il_station_priv *sta_priv;
@@ -2465,10 +2469,9 @@ static void il4965_non_agg_tx_status(struct il_priv *il,
2465} 2469}
2466 2470
2467static void 2471static void
2468il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info, 2472il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info, bool is_agg)
2469 bool is_agg)
2470{ 2473{
2471 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) tx_info->skb->data; 2474 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data;
2472 2475
2473 if (!is_agg) 2476 if (!is_agg)
2474 il4965_non_agg_tx_status(il, tx_info->ctx, hdr->addr1); 2477 il4965_non_agg_tx_status(il, tx_info->ctx, hdr->addr1);
@@ -2476,7 +2479,8 @@ il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info,
2476 ieee80211_tx_status_irqsafe(il->hw, tx_info->skb); 2479 ieee80211_tx_status_irqsafe(il->hw, tx_info->skb);
2477} 2480}
2478 2481
2479int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) 2482int
2483il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
2480{ 2484{
2481 struct il_tx_queue *txq = &il->txq[txq_id]; 2485 struct il_tx_queue *txq = &il->txq[txq_id];
2482 struct il_queue *q = &txq->q; 2486 struct il_queue *q = &txq->q;
@@ -2486,13 +2490,12 @@ int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
2486 2490
2487 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) { 2491 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
2488 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, " 2492 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
2489 "is out of range [0-%d] %d %d.\n", txq_id, 2493 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
2490 idx, q->n_bd, q->write_ptr, q->read_ptr); 2494 q->write_ptr, q->read_ptr);
2491 return 0; 2495 return 0;
2492 } 2496 }
2493 2497
2494 for (idx = il_queue_inc_wrap(idx, q->n_bd); 2498 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
2495 q->read_ptr != idx;
2496 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { 2499 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
2497 2500
2498 tx_info = &txq->txb[txq->q.read_ptr]; 2501 tx_info = &txq->txb[txq->q.read_ptr];
@@ -2519,10 +2522,9 @@ int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
2519 * Go through block-ack's bitmap of ACK'd frames, update driver's record of 2522 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2520 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo. 2523 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2521 */ 2524 */
2522static int il4965_tx_status_reply_compressed_ba(struct il_priv *il, 2525static int
2523 struct il_ht_agg *agg, 2526il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg,
2524 struct il_compressed_ba_resp *ba_resp) 2527 struct il_compressed_ba_resp *ba_resp)
2525
2526{ 2528{
2527 int i, sh, ack; 2529 int i, sh, ack;
2528 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); 2530 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
@@ -2531,7 +2533,7 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il,
2531 struct ieee80211_tx_info *info; 2533 struct ieee80211_tx_info *info;
2532 u64 bitmap, sent_bitmap; 2534 u64 bitmap, sent_bitmap;
2533 2535
2534 if (unlikely(!agg->wait_for_ba)) { 2536 if (unlikely(!agg->wait_for_ba)) {
2535 if (unlikely(ba_resp->bitmap)) 2537 if (unlikely(ba_resp->bitmap))
2536 IL_ERR("Received BA when not expected\n"); 2538 IL_ERR("Received BA when not expected\n");
2537 return -EINVAL; 2539 return -EINVAL;
@@ -2539,12 +2541,11 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il,
2539 2541
2540 /* Mark that the expected block-ack response arrived */ 2542 /* Mark that the expected block-ack response arrived */
2541 agg->wait_for_ba = 0; 2543 agg->wait_for_ba = 0;
2542 D_TX_REPLY("BA %d %d\n", agg->start_idx, 2544 D_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2543 ba_resp->seq_ctl);
2544 2545
2545 /* Calculate shift to align block-ack bits with our Tx win bits */ 2546 /* Calculate shift to align block-ack bits with our Tx win bits */
2546 sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4); 2547 sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4);
2547 if (sh < 0) /* tbw something is wrong with indices */ 2548 if (sh < 0) /* tbw something is wrong with indices */
2548 sh += 0x100; 2549 sh += 0x100;
2549 2550
2550 if (agg->frame_count > (64 - sh)) { 2551 if (agg->frame_count > (64 - sh)) {
@@ -2565,16 +2566,13 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il,
2565 while (sent_bitmap) { 2566 while (sent_bitmap) {
2566 ack = sent_bitmap & 1ULL; 2567 ack = sent_bitmap & 1ULL;
2567 successes += ack; 2568 successes += ack;
2568 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", 2569 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack ? "ACK" : "NACK",
2569 ack ? "ACK" : "NACK", i, 2570 i, (agg->start_idx + i) & 0xff, agg->start_idx + i);
2570 (agg->start_idx + i) & 0xff,
2571 agg->start_idx + i);
2572 sent_bitmap >>= 1; 2571 sent_bitmap >>= 1;
2573 ++i; 2572 ++i;
2574 } 2573 }
2575 2574
2576 D_TX_REPLY("Bitmap %llx\n", 2575 D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2577 (unsigned long long)bitmap);
2578 2576
2579 info = IEEE80211_SKB_CB(il->txq[scd_flow].txb[agg->start_idx].skb); 2577 info = IEEE80211_SKB_CB(il->txq[scd_flow].txb[agg->start_idx].skb);
2580 memset(&info->status, 0, sizeof(info->status)); 2578 memset(&info->status, 0, sizeof(info->status));
@@ -2590,13 +2588,14 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il,
2590/** 2588/**
2591 * translate ucode response to mac80211 tx status control values 2589 * translate ucode response to mac80211 tx status control values
2592 */ 2590 */
2593void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, 2591void
2594 struct ieee80211_tx_info *info) 2592il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,
2593 struct ieee80211_tx_info *info)
2595{ 2594{
2596 struct ieee80211_tx_rate *r = &info->control.rates[0]; 2595 struct ieee80211_tx_rate *r = &info->control.rates[0];
2597 2596
2598 info->antenna_sel_tx = 2597 info->antenna_sel_tx =
2599 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS); 2598 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
2600 if (rate_n_flags & RATE_MCS_HT_MSK) 2599 if (rate_n_flags & RATE_MCS_HT_MSK)
2601 r->flags |= IEEE80211_TX_RC_MCS; 2600 r->flags |= IEEE80211_TX_RC_MCS;
2602 if (rate_n_flags & RATE_MCS_GF_MSK) 2601 if (rate_n_flags & RATE_MCS_GF_MSK)
@@ -2616,8 +2615,8 @@ void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,
2616 * Handles block-acknowledge notification from device, which reports success 2615 * Handles block-acknowledge notification from device, which reports success
2617 * of frames sent via aggregation. 2616 * of frames sent via aggregation.
2618 */ 2617 */
2619void il4965_hdl_compressed_ba(struct il_priv *il, 2618void
2620 struct il_rx_buf *rxb) 2619il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb)
2621{ 2620{
2622 struct il_rx_pkt *pkt = rxb_addr(rxb); 2621 struct il_rx_pkt *pkt = rxb_addr(rxb);
2623 struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; 2622 struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
@@ -2636,8 +2635,7 @@ void il4965_hdl_compressed_ba(struct il_priv *il,
2636 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); 2635 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2637 2636
2638 if (scd_flow >= il->hw_params.max_txq_num) { 2637 if (scd_flow >= il->hw_params.max_txq_num) {
2639 IL_ERR( 2638 IL_ERR("BUG_ON scd_flow is bigger than number of queues\n");
2640 "BUG_ON scd_flow is bigger than number of queues\n");
2641 return; 2639 return;
2642 } 2640 }
2643 2641
@@ -2652,9 +2650,8 @@ void il4965_hdl_compressed_ba(struct il_priv *il,
2652 * since it is possible happen very often and in order 2650 * since it is possible happen very often and in order
2653 * not to fill the syslog, don't enable the logging by default 2651 * not to fill the syslog, don't enable the logging by default
2654 */ 2652 */
2655 D_TX_REPLY( 2653 D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n",
2656 "BA scd_flow %d does not match txq_id %d\n", 2654 scd_flow, agg->txq_id);
2657 scd_flow, agg->txq_id);
2658 return; 2655 return;
2659 } 2656 }
2660 2657
@@ -2663,22 +2660,15 @@ void il4965_hdl_compressed_ba(struct il_priv *il,
2663 2660
2664 spin_lock_irqsave(&il->sta_lock, flags); 2661 spin_lock_irqsave(&il->sta_lock, flags);
2665 2662
2666 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " 2663 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n",
2667 "sta_id = %d\n", 2664 agg->wait_for_ba, (u8 *) & ba_resp->sta_addr_lo32,
2668 agg->wait_for_ba, 2665 ba_resp->sta_id);
2669 (u8 *) &ba_resp->sta_addr_lo32, 2666 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = "
2670 ba_resp->sta_id); 2667 "%d, scd_ssn = %d\n", ba_resp->tid, ba_resp->seq_ctl,
2671 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," 2668 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2672 "scd_flow = " 2669 ba_resp->scd_flow, ba_resp->scd_ssn);
2673 "%d, scd_ssn = %d\n", 2670 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg->start_idx,
2674 ba_resp->tid, 2671 (unsigned long long)agg->bitmap);
2675 ba_resp->seq_ctl,
2676 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2677 ba_resp->scd_flow,
2678 ba_resp->scd_ssn);
2679 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n",
2680 agg->start_idx,
2681 (unsigned long long)agg->bitmap);
2682 2672
2683 /* Update driver's record of ACK vs. not for each frame in win */ 2673 /* Update driver's record of ACK vs. not for each frame in win */
2684 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp); 2674 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp);
@@ -2703,7 +2693,8 @@ void il4965_hdl_compressed_ba(struct il_priv *il,
2703} 2693}
2704 2694
2705#ifdef CONFIG_IWLEGACY_DEBUG 2695#ifdef CONFIG_IWLEGACY_DEBUG
2706const char *il4965_get_tx_fail_reason(u32 status) 2696const char *
2697il4965_get_tx_fail_reason(u32 status)
2707{ 2698{
2708#define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x 2699#define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
2709#define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x 2700#define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
@@ -2711,27 +2702,27 @@ const char *il4965_get_tx_fail_reason(u32 status)
2711 switch (status & TX_STATUS_MSK) { 2702 switch (status & TX_STATUS_MSK) {
2712 case TX_STATUS_SUCCESS: 2703 case TX_STATUS_SUCCESS:
2713 return "SUCCESS"; 2704 return "SUCCESS";
2714 TX_STATUS_POSTPONE(DELAY); 2705 TX_STATUS_POSTPONE(DELAY);
2715 TX_STATUS_POSTPONE(FEW_BYTES); 2706 TX_STATUS_POSTPONE(FEW_BYTES);
2716 TX_STATUS_POSTPONE(QUIET_PERIOD); 2707 TX_STATUS_POSTPONE(QUIET_PERIOD);
2717 TX_STATUS_POSTPONE(CALC_TTAK); 2708 TX_STATUS_POSTPONE(CALC_TTAK);
2718 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY); 2709 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY);
2719 TX_STATUS_FAIL(SHORT_LIMIT); 2710 TX_STATUS_FAIL(SHORT_LIMIT);
2720 TX_STATUS_FAIL(LONG_LIMIT); 2711 TX_STATUS_FAIL(LONG_LIMIT);
2721 TX_STATUS_FAIL(FIFO_UNDERRUN); 2712 TX_STATUS_FAIL(FIFO_UNDERRUN);
2722 TX_STATUS_FAIL(DRAIN_FLOW); 2713 TX_STATUS_FAIL(DRAIN_FLOW);
2723 TX_STATUS_FAIL(RFKILL_FLUSH); 2714 TX_STATUS_FAIL(RFKILL_FLUSH);
2724 TX_STATUS_FAIL(LIFE_EXPIRE); 2715 TX_STATUS_FAIL(LIFE_EXPIRE);
2725 TX_STATUS_FAIL(DEST_PS); 2716 TX_STATUS_FAIL(DEST_PS);
2726 TX_STATUS_FAIL(HOST_ABORTED); 2717 TX_STATUS_FAIL(HOST_ABORTED);
2727 TX_STATUS_FAIL(BT_RETRY); 2718 TX_STATUS_FAIL(BT_RETRY);
2728 TX_STATUS_FAIL(STA_INVALID); 2719 TX_STATUS_FAIL(STA_INVALID);
2729 TX_STATUS_FAIL(FRAG_DROPPED); 2720 TX_STATUS_FAIL(FRAG_DROPPED);
2730 TX_STATUS_FAIL(TID_DISABLE); 2721 TX_STATUS_FAIL(TID_DISABLE);
2731 TX_STATUS_FAIL(FIFO_FLUSHED); 2722 TX_STATUS_FAIL(FIFO_FLUSHED);
2732 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL); 2723 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL);
2733 TX_STATUS_FAIL(PASSIVE_NO_RX); 2724 TX_STATUS_FAIL(PASSIVE_NO_RX);
2734 TX_STATUS_FAIL(NO_BEACON_ON_RADAR); 2725 TX_STATUS_FAIL(NO_BEACON_ON_RADAR);
2735 } 2726 }
2736 2727
2737 return "UNKNOWN"; 2728 return "UNKNOWN";
@@ -2764,29 +2755,29 @@ il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id)
2764 if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE) 2755 if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE)
2765 rate_flags |= RATE_MCS_CCK_MSK; 2756 rate_flags |= RATE_MCS_CCK_MSK;
2766 2757
2767 rate_flags |= il4965_first_antenna(il->hw_params.valid_tx_ant) << 2758 rate_flags |=
2768 RATE_MCS_ANT_POS; 2759 il4965_first_antenna(il->hw_params.
2769 rate_n_flags = il4965_hw_set_rate_n_flags(il_rates[r].plcp, 2760 valid_tx_ant) << RATE_MCS_ANT_POS;
2770 rate_flags); 2761 rate_n_flags = il4965_hw_set_rate_n_flags(il_rates[r].plcp, rate_flags);
2771 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) 2762 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2772 link_cmd->rs_table[i].rate_n_flags = rate_n_flags; 2763 link_cmd->rs_table[i].rate_n_flags = rate_n_flags;
2773 2764
2774 link_cmd->general_params.single_stream_ant_msk = 2765 link_cmd->general_params.single_stream_ant_msk =
2775 il4965_first_antenna(il->hw_params.valid_tx_ant); 2766 il4965_first_antenna(il->hw_params.valid_tx_ant);
2776 2767
2777 link_cmd->general_params.dual_stream_ant_msk = 2768 link_cmd->general_params.dual_stream_ant_msk =
2778 il->hw_params.valid_tx_ant & 2769 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params.
2779 ~il4965_first_antenna(il->hw_params.valid_tx_ant); 2770 valid_tx_ant);
2780 if (!link_cmd->general_params.dual_stream_ant_msk) { 2771 if (!link_cmd->general_params.dual_stream_ant_msk) {
2781 link_cmd->general_params.dual_stream_ant_msk = ANT_AB; 2772 link_cmd->general_params.dual_stream_ant_msk = ANT_AB;
2782 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { 2773 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) {
2783 link_cmd->general_params.dual_stream_ant_msk = 2774 link_cmd->general_params.dual_stream_ant_msk =
2784 il->hw_params.valid_tx_ant; 2775 il->hw_params.valid_tx_ant;
2785 } 2776 }
2786 2777
2787 link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; 2778 link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
2788 link_cmd->agg_params.agg_time_limit = 2779 link_cmd->agg_params.agg_time_limit =
2789 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); 2780 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
2790 2781
2791 link_cmd->sta_id = sta_id; 2782 link_cmd->sta_id = sta_id;
2792 2783
@@ -2800,7 +2791,7 @@ il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id)
2800 */ 2791 */
2801int 2792int
2802il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx, 2793il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx,
2803 const u8 *addr, u8 *sta_id_r) 2794 const u8 * addr, u8 * sta_id_r)
2804{ 2795{
2805 int ret; 2796 int ret;
2806 u8 sta_id; 2797 u8 sta_id;
@@ -2826,9 +2817,8 @@ il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx,
2826 /* Set up default rate scaling table in device's station table */ 2817 /* Set up default rate scaling table in device's station table */
2827 link_cmd = il4965_sta_alloc_lq(il, sta_id); 2818 link_cmd = il4965_sta_alloc_lq(il, sta_id);
2828 if (!link_cmd) { 2819 if (!link_cmd) {
2829 IL_ERR( 2820 IL_ERR("Unable to initialize rate scaling for station %pM.\n",
2830 "Unable to initialize rate scaling for station %pM.\n", 2821 addr);
2831 addr);
2832 return -ENOMEM; 2822 return -ENOMEM;
2833 } 2823 }
2834 2824
@@ -2843,15 +2833,15 @@ il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx,
2843 return 0; 2833 return 0;
2844} 2834}
2845 2835
2846static int il4965_static_wepkey_cmd(struct il_priv *il, 2836static int
2847 struct il_rxon_context *ctx, 2837il4965_static_wepkey_cmd(struct il_priv *il, struct il_rxon_context *ctx,
2848 bool send_if_empty) 2838 bool send_if_empty)
2849{ 2839{
2850 int i, not_empty = 0; 2840 int i, not_empty = 0;
2851 u8 buff[sizeof(struct il_wep_cmd) + 2841 u8 buff[sizeof(struct il_wep_cmd) +
2852 sizeof(struct il_wep_key) * WEP_KEYS_MAX]; 2842 sizeof(struct il_wep_key) * WEP_KEYS_MAX];
2853 struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff; 2843 struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff;
2854 size_t cmd_size = sizeof(struct il_wep_cmd); 2844 size_t cmd_size = sizeof(struct il_wep_cmd);
2855 struct il_host_cmd cmd = { 2845 struct il_host_cmd cmd = {
2856 .id = ctx->wep_key_cmd, 2846 .id = ctx->wep_key_cmd,
2857 .data = wep_cmd, 2847 .data = wep_cmd,
@@ -2860,10 +2850,10 @@ static int il4965_static_wepkey_cmd(struct il_priv *il,
2860 2850
2861 might_sleep(); 2851 might_sleep();
2862 2852
2863 memset(wep_cmd, 0, cmd_size + 2853 memset(wep_cmd, 0,
2864 (sizeof(struct il_wep_key) * WEP_KEYS_MAX)); 2854 cmd_size + (sizeof(struct il_wep_key) * WEP_KEYS_MAX));
2865 2855
2866 for (i = 0; i < WEP_KEYS_MAX ; i++) { 2856 for (i = 0; i < WEP_KEYS_MAX; i++) {
2867 wep_cmd->key[i].key_idx = i; 2857 wep_cmd->key[i].key_idx = i;
2868 if (ctx->wep_keys[i].key_size) { 2858 if (ctx->wep_keys[i].key_size) {
2869 wep_cmd->key[i].key_offset = i; 2859 wep_cmd->key[i].key_offset = i;
@@ -2874,7 +2864,7 @@ static int il4965_static_wepkey_cmd(struct il_priv *il,
2874 2864
2875 wep_cmd->key[i].key_size = ctx->wep_keys[i].key_size; 2865 wep_cmd->key[i].key_size = ctx->wep_keys[i].key_size;
2876 memcpy(&wep_cmd->key[i].key[3], ctx->wep_keys[i].key, 2866 memcpy(&wep_cmd->key[i].key[3], ctx->wep_keys[i].key,
2877 ctx->wep_keys[i].key_size); 2867 ctx->wep_keys[i].key_size);
2878 } 2868 }
2879 2869
2880 wep_cmd->global_key_type = WEP_KEY_WEP_TYPE; 2870 wep_cmd->global_key_type = WEP_KEY_WEP_TYPE;
@@ -2890,42 +2880,39 @@ static int il4965_static_wepkey_cmd(struct il_priv *il,
2890 return 0; 2880 return 0;
2891} 2881}
2892 2882
2893int il4965_restore_default_wep_keys(struct il_priv *il, 2883int
2894 struct il_rxon_context *ctx) 2884il4965_restore_default_wep_keys(struct il_priv *il, struct il_rxon_context *ctx)
2895{ 2885{
2896 lockdep_assert_held(&il->mutex); 2886 lockdep_assert_held(&il->mutex);
2897 2887
2898 return il4965_static_wepkey_cmd(il, ctx, false); 2888 return il4965_static_wepkey_cmd(il, ctx, false);
2899} 2889}
2900 2890
2901int il4965_remove_default_wep_key(struct il_priv *il, 2891int
2902 struct il_rxon_context *ctx, 2892il4965_remove_default_wep_key(struct il_priv *il, struct il_rxon_context *ctx,
2903 struct ieee80211_key_conf *keyconf) 2893 struct ieee80211_key_conf *keyconf)
2904{ 2894{
2905 int ret; 2895 int ret;
2906 2896
2907 lockdep_assert_held(&il->mutex); 2897 lockdep_assert_held(&il->mutex);
2908 2898
2909 D_WEP("Removing default WEP key: idx=%d\n", 2899 D_WEP("Removing default WEP key: idx=%d\n", keyconf->keyidx);
2910 keyconf->keyidx);
2911 2900
2912 memset(&ctx->wep_keys[keyconf->keyidx], 0, sizeof(ctx->wep_keys[0])); 2901 memset(&ctx->wep_keys[keyconf->keyidx], 0, sizeof(ctx->wep_keys[0]));
2913 if (il_is_rfkill(il)) { 2902 if (il_is_rfkill(il)) {
2914 D_WEP( 2903 D_WEP("Not sending C_WEPKEY command due to RFKILL.\n");
2915 "Not sending C_WEPKEY command due to RFKILL.\n");
2916 /* but keys in device are clear anyway so return success */ 2904 /* but keys in device are clear anyway so return success */
2917 return 0; 2905 return 0;
2918 } 2906 }
2919 ret = il4965_static_wepkey_cmd(il, ctx, 1); 2907 ret = il4965_static_wepkey_cmd(il, ctx, 1);
2920 D_WEP("Remove default WEP key: idx=%d ret=%d\n", 2908 D_WEP("Remove default WEP key: idx=%d ret=%d\n", keyconf->keyidx, ret);
2921 keyconf->keyidx, ret);
2922 2909
2923 return ret; 2910 return ret;
2924} 2911}
2925 2912
2926int il4965_set_default_wep_key(struct il_priv *il, 2913int
2927 struct il_rxon_context *ctx, 2914il4965_set_default_wep_key(struct il_priv *il, struct il_rxon_context *ctx,
2928 struct ieee80211_key_conf *keyconf) 2915 struct ieee80211_key_conf *keyconf)
2929{ 2916{
2930 int ret; 2917 int ret;
2931 2918
@@ -2943,19 +2930,18 @@ int il4965_set_default_wep_key(struct il_priv *il,
2943 2930
2944 ctx->wep_keys[keyconf->keyidx].key_size = keyconf->keylen; 2931 ctx->wep_keys[keyconf->keyidx].key_size = keyconf->keylen;
2945 memcpy(&ctx->wep_keys[keyconf->keyidx].key, &keyconf->key, 2932 memcpy(&ctx->wep_keys[keyconf->keyidx].key, &keyconf->key,
2946 keyconf->keylen); 2933 keyconf->keylen);
2947 2934
2948 ret = il4965_static_wepkey_cmd(il, ctx, false); 2935 ret = il4965_static_wepkey_cmd(il, ctx, false);
2949 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", 2936 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", keyconf->keylen,
2950 keyconf->keylen, keyconf->keyidx, ret); 2937 keyconf->keyidx, ret);
2951 2938
2952 return ret; 2939 return ret;
2953} 2940}
2954 2941
2955static int il4965_set_wep_dynamic_key_info(struct il_priv *il, 2942static int
2956 struct il_rxon_context *ctx, 2943il4965_set_wep_dynamic_key_info(struct il_priv *il, struct il_rxon_context *ctx,
2957 struct ieee80211_key_conf *keyconf, 2944 struct ieee80211_key_conf *keyconf, u8 sta_id)
2958 u8 sta_id)
2959{ 2945{
2960 unsigned long flags; 2946 unsigned long flags;
2961 __le16 key_flags = 0; 2947 __le16 key_flags = 0;
@@ -2981,37 +2967,36 @@ static int il4965_set_wep_dynamic_key_info(struct il_priv *il,
2981 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; 2967 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
2982 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx; 2968 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx;
2983 2969
2984 memcpy(il->stations[sta_id].keyinfo.key, 2970 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
2985 keyconf->key, keyconf->keylen);
2986 2971
2987 memcpy(&il->stations[sta_id].sta.key.key[3], 2972 memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key,
2988 keyconf->key, keyconf->keylen); 2973 keyconf->keylen);
2989 2974
2990 if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) 2975 if ((il->stations[sta_id].sta.key.
2991 == STA_KEY_FLG_NO_ENC) 2976 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
2992 il->stations[sta_id].sta.key.key_offset = 2977 il->stations[sta_id].sta.key.key_offset =
2993 il_get_free_ucode_key_idx(il); 2978 il_get_free_ucode_key_idx(il);
2994 /* else, we are overriding an existing key => no need to allocated room 2979 /* else, we are overriding an existing key => no need to allocated room
2995 * in uCode. */ 2980 * in uCode. */
2996 2981
2997 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 2982 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
2998 "no space for a new key"); 2983 "no space for a new key");
2999 2984
3000 il->stations[sta_id].sta.key.key_flags = key_flags; 2985 il->stations[sta_id].sta.key.key_flags = key_flags;
3001 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 2986 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3002 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 2987 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3003 2988
3004 memcpy(&sta_cmd, &il->stations[sta_id].sta, 2989 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3005 sizeof(struct il_addsta_cmd)); 2990 sizeof(struct il_addsta_cmd));
3006 spin_unlock_irqrestore(&il->sta_lock, flags); 2991 spin_unlock_irqrestore(&il->sta_lock, flags);
3007 2992
3008 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 2993 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3009} 2994}
3010 2995
3011static int il4965_set_ccmp_dynamic_key_info(struct il_priv *il, 2996static int
3012 struct il_rxon_context *ctx, 2997il4965_set_ccmp_dynamic_key_info(struct il_priv *il,
3013 struct ieee80211_key_conf *keyconf, 2998 struct il_rxon_context *ctx,
3014 u8 sta_id) 2999 struct ieee80211_key_conf *keyconf, u8 sta_id)
3015{ 3000{
3016 unsigned long flags; 3001 unsigned long flags;
3017 __le16 key_flags = 0; 3002 __le16 key_flags = 0;
@@ -3032,37 +3017,35 @@ static int il4965_set_ccmp_dynamic_key_info(struct il_priv *il,
3032 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; 3017 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3033 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; 3018 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3034 3019
3035 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 3020 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3036 keyconf->keylen);
3037 3021
3038 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, 3022 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
3039 keyconf->keylen);
3040 3023
3041 if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) 3024 if ((il->stations[sta_id].sta.key.
3042 == STA_KEY_FLG_NO_ENC) 3025 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3043 il->stations[sta_id].sta.key.key_offset = 3026 il->stations[sta_id].sta.key.key_offset =
3044 il_get_free_ucode_key_idx(il); 3027 il_get_free_ucode_key_idx(il);
3045 /* else, we are overriding an existing key => no need to allocated room 3028 /* else, we are overriding an existing key => no need to allocated room
3046 * in uCode. */ 3029 * in uCode. */
3047 3030
3048 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 3031 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3049 "no space for a new key"); 3032 "no space for a new key");
3050 3033
3051 il->stations[sta_id].sta.key.key_flags = key_flags; 3034 il->stations[sta_id].sta.key.key_flags = key_flags;
3052 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 3035 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3053 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3036 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3054 3037
3055 memcpy(&sta_cmd, &il->stations[sta_id].sta, 3038 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3056 sizeof(struct il_addsta_cmd)); 3039 sizeof(struct il_addsta_cmd));
3057 spin_unlock_irqrestore(&il->sta_lock, flags); 3040 spin_unlock_irqrestore(&il->sta_lock, flags);
3058 3041
3059 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 3042 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3060} 3043}
3061 3044
3062static int il4965_set_tkip_dynamic_key_info(struct il_priv *il, 3045static int
3063 struct il_rxon_context *ctx, 3046il4965_set_tkip_dynamic_key_info(struct il_priv *il,
3064 struct ieee80211_key_conf *keyconf, 3047 struct il_rxon_context *ctx,
3065 u8 sta_id) 3048 struct ieee80211_key_conf *keyconf, u8 sta_id)
3066{ 3049{
3067 unsigned long flags; 3050 unsigned long flags;
3068 int ret = 0; 3051 int ret = 0;
@@ -3083,19 +3066,18 @@ static int il4965_set_tkip_dynamic_key_info(struct il_priv *il,
3083 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; 3066 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3084 il->stations[sta_id].keyinfo.keylen = 16; 3067 il->stations[sta_id].keyinfo.keylen = 16;
3085 3068
3086 if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) 3069 if ((il->stations[sta_id].sta.key.
3087 == STA_KEY_FLG_NO_ENC) 3070 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3088 il->stations[sta_id].sta.key.key_offset = 3071 il->stations[sta_id].sta.key.key_offset =
3089 il_get_free_ucode_key_idx(il); 3072 il_get_free_ucode_key_idx(il);
3090 /* else, we are overriding an existing key => no need to allocated room 3073 /* else, we are overriding an existing key => no need to allocated room
3091 * in uCode. */ 3074 * in uCode. */
3092 3075
3093 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 3076 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3094 "no space for a new key"); 3077 "no space for a new key");
3095 3078
3096 il->stations[sta_id].sta.key.key_flags = key_flags; 3079 il->stations[sta_id].sta.key.key_flags = key_flags;
3097 3080
3098
3099 /* This copy is acutally not needed: we get the key with each TX */ 3081 /* This copy is acutally not needed: we get the key with each TX */
3100 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16); 3082 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16);
3101 3083
@@ -3106,10 +3088,10 @@ static int il4965_set_tkip_dynamic_key_info(struct il_priv *il,
3106 return ret; 3088 return ret;
3107} 3089}
3108 3090
3109void il4965_update_tkip_key(struct il_priv *il, 3091void
3110 struct il_rxon_context *ctx, 3092il4965_update_tkip_key(struct il_priv *il, struct il_rxon_context *ctx,
3111 struct ieee80211_key_conf *keyconf, 3093 struct ieee80211_key_conf *keyconf,
3112 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key) 3094 struct ieee80211_sta *sta, u32 iv32, u16 * phase1key)
3113{ 3095{
3114 u8 sta_id; 3096 u8 sta_id;
3115 unsigned long flags; 3097 unsigned long flags;
@@ -3131,7 +3113,7 @@ void il4965_update_tkip_key(struct il_priv *il,
3131 3113
3132 for (i = 0; i < 5; i++) 3114 for (i = 0; i < 5; i++)
3133 il->stations[sta_id].sta.key.tkip_rx_ttak[i] = 3115 il->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3134 cpu_to_le16(phase1key[i]); 3116 cpu_to_le16(phase1key[i]);
3135 3117
3136 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 3118 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3137 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3119 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
@@ -3142,10 +3124,9 @@ void il4965_update_tkip_key(struct il_priv *il,
3142 3124
3143} 3125}
3144 3126
3145int il4965_remove_dynamic_key(struct il_priv *il, 3127int
3146 struct il_rxon_context *ctx, 3128il4965_remove_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx,
3147 struct ieee80211_key_conf *keyconf, 3129 struct ieee80211_key_conf *keyconf, u8 sta_id)
3148 u8 sta_id)
3149{ 3130{
3150 unsigned long flags; 3131 unsigned long flags;
3151 u16 key_flags; 3132 u16 key_flags;
@@ -3160,8 +3141,7 @@ int il4965_remove_dynamic_key(struct il_priv *il,
3160 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags); 3141 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags);
3161 keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3; 3142 keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3;
3162 3143
3163 D_WEP("Remove dynamic key: idx=%d sta=%d\n", 3144 D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf->keyidx, sta_id);
3164 keyconf->keyidx, sta_id);
3165 3145
3166 if (keyconf->keyidx != keyidx) { 3146 if (keyconf->keyidx != keyidx) {
3167 /* We need to remove a key with idx different that the one 3147 /* We need to remove a key with idx different that the one
@@ -3174,41 +3154,40 @@ int il4965_remove_dynamic_key(struct il_priv *il,
3174 } 3154 }
3175 3155
3176 if (il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) { 3156 if (il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) {
3177 IL_WARN("Removing wrong key %d 0x%x\n", 3157 IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx,
3178 keyconf->keyidx, key_flags); 3158 key_flags);
3179 spin_unlock_irqrestore(&il->sta_lock, flags); 3159 spin_unlock_irqrestore(&il->sta_lock, flags);
3180 return 0; 3160 return 0;
3181 } 3161 }
3182 3162
3183 if (!test_and_clear_bit(il->stations[sta_id].sta.key.key_offset, 3163 if (!test_and_clear_bit
3184 &il->ucode_key_table)) 3164 (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table))
3185 IL_ERR("idx %d not used in uCode key table.\n", 3165 IL_ERR("idx %d not used in uCode key table.\n",
3186 il->stations[sta_id].sta.key.key_offset); 3166 il->stations[sta_id].sta.key.key_offset);
3187 memset(&il->stations[sta_id].keyinfo, 0, 3167 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
3188 sizeof(struct il_hw_key)); 3168 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
3189 memset(&il->stations[sta_id].sta.key, 0,
3190 sizeof(struct il4965_keyinfo));
3191 il->stations[sta_id].sta.key.key_flags = 3169 il->stations[sta_id].sta.key.key_flags =
3192 STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; 3170 STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
3193 il->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET; 3171 il->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET;
3194 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 3172 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3195 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3173 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3196 3174
3197 if (il_is_rfkill(il)) { 3175 if (il_is_rfkill(il)) {
3198 D_WEP( 3176 D_WEP
3199 "Not sending C_ADD_STA command because RFKILL enabled.\n"); 3177 ("Not sending C_ADD_STA command because RFKILL enabled.\n");
3200 spin_unlock_irqrestore(&il->sta_lock, flags); 3178 spin_unlock_irqrestore(&il->sta_lock, flags);
3201 return 0; 3179 return 0;
3202 } 3180 }
3203 memcpy(&sta_cmd, &il->stations[sta_id].sta, 3181 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3204 sizeof(struct il_addsta_cmd)); 3182 sizeof(struct il_addsta_cmd));
3205 spin_unlock_irqrestore(&il->sta_lock, flags); 3183 spin_unlock_irqrestore(&il->sta_lock, flags);
3206 3184
3207 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 3185 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3208} 3186}
3209 3187
3210int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, 3188int
3211 struct ieee80211_key_conf *keyconf, u8 sta_id) 3189il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx,
3190 struct ieee80211_key_conf *keyconf, u8 sta_id)
3212{ 3191{
3213 int ret; 3192 int ret;
3214 3193
@@ -3219,29 +3198,25 @@ int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx,
3219 3198
3220 switch (keyconf->cipher) { 3199 switch (keyconf->cipher) {
3221 case WLAN_CIPHER_SUITE_CCMP: 3200 case WLAN_CIPHER_SUITE_CCMP:
3222 ret = il4965_set_ccmp_dynamic_key_info(il, ctx, 3201 ret =
3223 keyconf, sta_id); 3202 il4965_set_ccmp_dynamic_key_info(il, ctx, keyconf, sta_id);
3224 break; 3203 break;
3225 case WLAN_CIPHER_SUITE_TKIP: 3204 case WLAN_CIPHER_SUITE_TKIP:
3226 ret = il4965_set_tkip_dynamic_key_info(il, ctx, 3205 ret =
3227 keyconf, sta_id); 3206 il4965_set_tkip_dynamic_key_info(il, ctx, keyconf, sta_id);
3228 break; 3207 break;
3229 case WLAN_CIPHER_SUITE_WEP40: 3208 case WLAN_CIPHER_SUITE_WEP40:
3230 case WLAN_CIPHER_SUITE_WEP104: 3209 case WLAN_CIPHER_SUITE_WEP104:
3231 ret = il4965_set_wep_dynamic_key_info(il, ctx, 3210 ret = il4965_set_wep_dynamic_key_info(il, ctx, keyconf, sta_id);
3232 keyconf, sta_id);
3233 break; 3211 break;
3234 default: 3212 default:
3235 IL_ERR( 3213 IL_ERR("Unknown alg: %s cipher = %x\n", __func__,
3236 "Unknown alg: %s cipher = %x\n", __func__, 3214 keyconf->cipher);
3237 keyconf->cipher);
3238 ret = -EINVAL; 3215 ret = -EINVAL;
3239 } 3216 }
3240 3217
3241 D_WEP( 3218 D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n",
3242 "Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n", 3219 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
3243 keyconf->cipher, keyconf->keylen, keyconf->keyidx,
3244 sta_id, ret);
3245 3220
3246 return ret; 3221 return ret;
3247} 3222}
@@ -3253,16 +3228,15 @@ int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx,
3253 * and marks it driver active, so that it will be restored to the 3228 * and marks it driver active, so that it will be restored to the
3254 * device at the next best time. 3229 * device at the next best time.
3255 */ 3230 */
3256int il4965_alloc_bcast_station(struct il_priv *il, 3231int
3257 struct il_rxon_context *ctx) 3232il4965_alloc_bcast_station(struct il_priv *il, struct il_rxon_context *ctx)
3258{ 3233{
3259 struct il_link_quality_cmd *link_cmd; 3234 struct il_link_quality_cmd *link_cmd;
3260 unsigned long flags; 3235 unsigned long flags;
3261 u8 sta_id; 3236 u8 sta_id;
3262 3237
3263 spin_lock_irqsave(&il->sta_lock, flags); 3238 spin_lock_irqsave(&il->sta_lock, flags);
3264 sta_id = il_prep_station(il, ctx, il_bcast_addr, 3239 sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL);
3265 false, NULL);
3266 if (sta_id == IL_INVALID_STATION) { 3240 if (sta_id == IL_INVALID_STATION) {
3267 IL_ERR("Unable to prepare broadcast station\n"); 3241 IL_ERR("Unable to prepare broadcast station\n");
3268 spin_unlock_irqrestore(&il->sta_lock, flags); 3242 spin_unlock_irqrestore(&il->sta_lock, flags);
@@ -3276,8 +3250,8 @@ int il4965_alloc_bcast_station(struct il_priv *il,
3276 3250
3277 link_cmd = il4965_sta_alloc_lq(il, sta_id); 3251 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3278 if (!link_cmd) { 3252 if (!link_cmd) {
3279 IL_ERR( 3253 IL_ERR
3280 "Unable to initialize rate scaling for bcast station.\n"); 3254 ("Unable to initialize rate scaling for bcast station.\n");
3281 return -ENOMEM; 3255 return -ENOMEM;
3282 } 3256 }
3283 3257
@@ -3294,8 +3268,8 @@ int il4965_alloc_bcast_station(struct il_priv *il,
3294 * Only used by iwl4965. Placed here to have all bcast station management 3268 * Only used by iwl4965. Placed here to have all bcast station management
3295 * code together. 3269 * code together.
3296 */ 3270 */
3297static int il4965_update_bcast_station(struct il_priv *il, 3271static int
3298 struct il_rxon_context *ctx) 3272il4965_update_bcast_station(struct il_priv *il, struct il_rxon_context *ctx)
3299{ 3273{
3300 unsigned long flags; 3274 unsigned long flags;
3301 struct il_link_quality_cmd *link_cmd; 3275 struct il_link_quality_cmd *link_cmd;
@@ -3303,8 +3277,8 @@ static int il4965_update_bcast_station(struct il_priv *il,
3303 3277
3304 link_cmd = il4965_sta_alloc_lq(il, sta_id); 3278 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3305 if (!link_cmd) { 3279 if (!link_cmd) {
3306 IL_ERR( 3280 IL_ERR
3307 "Unable to initialize rate scaling for bcast station.\n"); 3281 ("Unable to initialize rate scaling for bcast station.\n");
3308 return -ENOMEM; 3282 return -ENOMEM;
3309 } 3283 }
3310 3284
@@ -3312,15 +3286,16 @@ static int il4965_update_bcast_station(struct il_priv *il,
3312 if (il->stations[sta_id].lq) 3286 if (il->stations[sta_id].lq)
3313 kfree(il->stations[sta_id].lq); 3287 kfree(il->stations[sta_id].lq);
3314 else 3288 else
3315 D_INFO( 3289 D_INFO
3316 "Bcast station rate scaling has not been initialized yet.\n"); 3290 ("Bcast station rate scaling has not been initialized yet.\n");
3317 il->stations[sta_id].lq = link_cmd; 3291 il->stations[sta_id].lq = link_cmd;
3318 spin_unlock_irqrestore(&il->sta_lock, flags); 3292 spin_unlock_irqrestore(&il->sta_lock, flags);
3319 3293
3320 return 0; 3294 return 0;
3321} 3295}
3322 3296
3323int il4965_update_bcast_stations(struct il_priv *il) 3297int
3298il4965_update_bcast_stations(struct il_priv *il)
3324{ 3299{
3325 return il4965_update_bcast_station(il, &il->ctx); 3300 return il4965_update_bcast_station(il, &il->ctx);
3326} 3301}
@@ -3328,7 +3303,8 @@ int il4965_update_bcast_stations(struct il_priv *il)
3328/** 3303/**
3329 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table 3304 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table
3330 */ 3305 */
3331int il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid) 3306int
3307il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid)
3332{ 3308{
3333 unsigned long flags; 3309 unsigned long flags;
3334 struct il_addsta_cmd sta_cmd; 3310 struct il_addsta_cmd sta_cmd;
@@ -3341,14 +3317,15 @@ int il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid)
3341 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); 3317 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3342 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3318 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3343 memcpy(&sta_cmd, &il->stations[sta_id].sta, 3319 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3344 sizeof(struct il_addsta_cmd)); 3320 sizeof(struct il_addsta_cmd));
3345 spin_unlock_irqrestore(&il->sta_lock, flags); 3321 spin_unlock_irqrestore(&il->sta_lock, flags);
3346 3322
3347 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 3323 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3348} 3324}
3349 3325
3350int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, 3326int
3351 int tid, u16 ssn) 3327il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid,
3328 u16 ssn)
3352{ 3329{
3353 unsigned long flags; 3330 unsigned long flags;
3354 int sta_id; 3331 int sta_id;
@@ -3363,18 +3340,18 @@ int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta,
3363 spin_lock_irqsave(&il->sta_lock, flags); 3340 spin_lock_irqsave(&il->sta_lock, flags);
3364 il->stations[sta_id].sta.station_flags_msk = 0; 3341 il->stations[sta_id].sta.station_flags_msk = 0;
3365 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK; 3342 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3366 il->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid; 3343 il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid;
3367 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn); 3344 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3368 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3345 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3369 memcpy(&sta_cmd, &il->stations[sta_id].sta, 3346 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3370 sizeof(struct il_addsta_cmd)); 3347 sizeof(struct il_addsta_cmd));
3371 spin_unlock_irqrestore(&il->sta_lock, flags); 3348 spin_unlock_irqrestore(&il->sta_lock, flags);
3372 3349
3373 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 3350 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3374} 3351}
3375 3352
3376int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, 3353int
3377 int tid) 3354il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid)
3378{ 3355{
3379 unsigned long flags; 3356 unsigned long flags;
3380 int sta_id; 3357 int sta_id;
@@ -3391,10 +3368,10 @@ int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta,
3391 spin_lock_irqsave(&il->sta_lock, flags); 3368 spin_lock_irqsave(&il->sta_lock, flags);
3392 il->stations[sta_id].sta.station_flags_msk = 0; 3369 il->stations[sta_id].sta.station_flags_msk = 0;
3393 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; 3370 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3394 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid; 3371 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid;
3395 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3372 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3396 memcpy(&sta_cmd, &il->stations[sta_id].sta, 3373 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3397 sizeof(struct il_addsta_cmd)); 3374 sizeof(struct il_addsta_cmd));
3398 spin_unlock_irqrestore(&il->sta_lock, flags); 3375 spin_unlock_irqrestore(&il->sta_lock, flags);
3399 3376
3400 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 3377 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
@@ -3409,16 +3386,16 @@ il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt)
3409 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK; 3386 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK;
3410 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; 3387 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3411 il->stations[sta_id].sta.sta.modify_mask = 3388 il->stations[sta_id].sta.sta.modify_mask =
3412 STA_MODIFY_SLEEP_TX_COUNT_MSK; 3389 STA_MODIFY_SLEEP_TX_COUNT_MSK;
3413 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); 3390 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt);
3414 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3391 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3415 il_send_add_sta(il, 3392 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3416 &il->stations[sta_id].sta, CMD_ASYNC);
3417 spin_unlock_irqrestore(&il->sta_lock, flags); 3393 spin_unlock_irqrestore(&il->sta_lock, flags);
3418 3394
3419} 3395}
3420 3396
3421void il4965_update_chain_flags(struct il_priv *il) 3397void
3398il4965_update_chain_flags(struct il_priv *il)
3422{ 3399{
3423 if (il->cfg->ops->hcmd->set_rxon_chain) { 3400 if (il->cfg->ops->hcmd->set_rxon_chain) {
3424 il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx); 3401 il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
@@ -3427,12 +3404,12 @@ void il4965_update_chain_flags(struct il_priv *il)
3427 } 3404 }
3428} 3405}
3429 3406
3430static void il4965_clear_free_frames(struct il_priv *il) 3407static void
3408il4965_clear_free_frames(struct il_priv *il)
3431{ 3409{
3432 struct list_head *element; 3410 struct list_head *element;
3433 3411
3434 D_INFO("%d frames on pre-allocated heap on clear.\n", 3412 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
3435 il->frames_count);
3436 3413
3437 while (!list_empty(&il->free_frames)) { 3414 while (!list_empty(&il->free_frames)) {
3438 element = il->free_frames.next; 3415 element = il->free_frames.next;
@@ -3443,12 +3420,13 @@ static void il4965_clear_free_frames(struct il_priv *il)
3443 3420
3444 if (il->frames_count) { 3421 if (il->frames_count) {
3445 IL_WARN("%d frames still in use. Did we lose one?\n", 3422 IL_WARN("%d frames still in use. Did we lose one?\n",
3446 il->frames_count); 3423 il->frames_count);
3447 il->frames_count = 0; 3424 il->frames_count = 0;
3448 } 3425 }
3449} 3426}
3450 3427
3451static struct il_frame *il4965_get_free_frame(struct il_priv *il) 3428static struct il_frame *
3429il4965_get_free_frame(struct il_priv *il)
3452{ 3430{
3453 struct il_frame *frame; 3431 struct il_frame *frame;
3454 struct list_head *element; 3432 struct list_head *element;
@@ -3468,15 +3446,16 @@ static struct il_frame *il4965_get_free_frame(struct il_priv *il)
3468 return list_entry(element, struct il_frame, list); 3446 return list_entry(element, struct il_frame, list);
3469} 3447}
3470 3448
3471static void il4965_free_frame(struct il_priv *il, struct il_frame *frame) 3449static void
3450il4965_free_frame(struct il_priv *il, struct il_frame *frame)
3472{ 3451{
3473 memset(frame, 0, sizeof(*frame)); 3452 memset(frame, 0, sizeof(*frame));
3474 list_add(&frame->list, &il->free_frames); 3453 list_add(&frame->list, &il->free_frames);
3475} 3454}
3476 3455
3477static u32 il4965_fill_beacon_frame(struct il_priv *il, 3456static u32
3478 struct ieee80211_hdr *hdr, 3457il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
3479 int left) 3458 int left)
3480{ 3459{
3481 lockdep_assert_held(&il->mutex); 3460 lockdep_assert_held(&il->mutex);
3482 3461
@@ -3492,9 +3471,10 @@ static u32 il4965_fill_beacon_frame(struct il_priv *il,
3492} 3471}
3493 3472
3494/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ 3473/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
3495static void il4965_set_beacon_tim(struct il_priv *il, 3474static void
3496 struct il_tx_beacon_cmd *tx_beacon_cmd, 3475il4965_set_beacon_tim(struct il_priv *il,
3497 u8 *beacon, u32 frame_size) 3476 struct il_tx_beacon_cmd *tx_beacon_cmd, u8 * beacon,
3477 u32 frame_size)
3498{ 3478{
3499 u16 tim_idx; 3479 u16 tim_idx;
3500 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; 3480 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
@@ -3507,19 +3487,19 @@ static void il4965_set_beacon_tim(struct il_priv *il,
3507 3487
3508 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */ 3488 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
3509 while ((tim_idx < (frame_size - 2)) && 3489 while ((tim_idx < (frame_size - 2)) &&
3510 (beacon[tim_idx] != WLAN_EID_TIM)) 3490 (beacon[tim_idx] != WLAN_EID_TIM))
3511 tim_idx += beacon[tim_idx+1] + 2; 3491 tim_idx += beacon[tim_idx + 1] + 2;
3512 3492
3513 /* If TIM field was found, set variables */ 3493 /* If TIM field was found, set variables */
3514 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) { 3494 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
3515 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); 3495 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
3516 tx_beacon_cmd->tim_size = beacon[tim_idx+1]; 3496 tx_beacon_cmd->tim_size = beacon[tim_idx + 1];
3517 } else 3497 } else
3518 IL_WARN("Unable to find TIM Element in beacon\n"); 3498 IL_WARN("Unable to find TIM Element in beacon\n");
3519} 3499}
3520 3500
3521static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *il, 3501static unsigned int
3522 struct il_frame *frame) 3502il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame)
3523{ 3503{
3524 struct il_tx_beacon_cmd *tx_beacon_cmd; 3504 struct il_tx_beacon_cmd *tx_beacon_cmd;
3525 u32 frame_size; 3505 u32 frame_size;
@@ -3542,38 +3522,42 @@ static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *il,
3542 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); 3522 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
3543 3523
3544 /* Set up TX beacon contents */ 3524 /* Set up TX beacon contents */
3545 frame_size = il4965_fill_beacon_frame(il, tx_beacon_cmd->frame, 3525 frame_size =
3546 sizeof(frame->u) - sizeof(*tx_beacon_cmd)); 3526 il4965_fill_beacon_frame(il, tx_beacon_cmd->frame,
3527 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
3547 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE)) 3528 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
3548 return 0; 3529 return 0;
3549 if (!frame_size) 3530 if (!frame_size)
3550 return 0; 3531 return 0;
3551 3532
3552 /* Set up TX command fields */ 3533 /* Set up TX command fields */
3553 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); 3534 tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size);
3554 tx_beacon_cmd->tx.sta_id = il->beacon_ctx->bcast_sta_id; 3535 tx_beacon_cmd->tx.sta_id = il->beacon_ctx->bcast_sta_id;
3555 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 3536 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3556 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | 3537 tx_beacon_cmd->tx.tx_flags =
3557 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; 3538 TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK |
3539 TX_CMD_FLG_STA_RATE_MSK;
3558 3540
3559 /* Set up TX beacon command fields */ 3541 /* Set up TX beacon command fields */
3560 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame, 3542 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame,
3561 frame_size); 3543 frame_size);
3562 3544
3563 /* Set up packet rate and flags */ 3545 /* Set up packet rate and flags */
3564 rate = il_get_lowest_plcp(il, il->beacon_ctx); 3546 rate = il_get_lowest_plcp(il, il->beacon_ctx);
3565 il->mgmt_tx_ant = il4965_toggle_tx_ant(il, il->mgmt_tx_ant, 3547 il->mgmt_tx_ant =
3566 il->hw_params.valid_tx_ant); 3548 il4965_toggle_tx_ant(il, il->mgmt_tx_ant,
3549 il->hw_params.valid_tx_ant);
3567 rate_flags = il4965_ant_idx_to_flags(il->mgmt_tx_ant); 3550 rate_flags = il4965_ant_idx_to_flags(il->mgmt_tx_ant);
3568 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE)) 3551 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE))
3569 rate_flags |= RATE_MCS_CCK_MSK; 3552 rate_flags |= RATE_MCS_CCK_MSK;
3570 tx_beacon_cmd->tx.rate_n_flags = il4965_hw_set_rate_n_flags(rate, 3553 tx_beacon_cmd->tx.rate_n_flags =
3571 rate_flags); 3554 il4965_hw_set_rate_n_flags(rate, rate_flags);
3572 3555
3573 return sizeof(*tx_beacon_cmd) + frame_size; 3556 return sizeof(*tx_beacon_cmd) + frame_size;
3574} 3557}
3575 3558
3576int il4965_send_beacon_cmd(struct il_priv *il) 3559int
3560il4965_send_beacon_cmd(struct il_priv *il)
3577{ 3561{
3578 struct il_frame *frame; 3562 struct il_frame *frame;
3579 unsigned int frame_size; 3563 unsigned int frame_size;
@@ -3582,7 +3566,7 @@ int il4965_send_beacon_cmd(struct il_priv *il)
3582 frame = il4965_get_free_frame(il); 3566 frame = il4965_get_free_frame(il);
3583 if (!frame) { 3567 if (!frame) {
3584 IL_ERR("Could not obtain free frame buffer for beacon " 3568 IL_ERR("Could not obtain free frame buffer for beacon "
3585 "command.\n"); 3569 "command.\n");
3586 return -ENOMEM; 3570 return -ENOMEM;
3587 } 3571 }
3588 3572
@@ -3593,35 +3577,37 @@ int il4965_send_beacon_cmd(struct il_priv *il)
3593 return -EINVAL; 3577 return -EINVAL;
3594 } 3578 }
3595 3579
3596 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, 3580 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
3597 &frame->u.cmd[0]);
3598 3581
3599 il4965_free_frame(il, frame); 3582 il4965_free_frame(il, frame);
3600 3583
3601 return rc; 3584 return rc;
3602} 3585}
3603 3586
3604static inline dma_addr_t il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx) 3587static inline dma_addr_t
3588il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx)
3605{ 3589{
3606 struct il_tfd_tb *tb = &tfd->tbs[idx]; 3590 struct il_tfd_tb *tb = &tfd->tbs[idx];
3607 3591
3608 dma_addr_t addr = get_unaligned_le32(&tb->lo); 3592 dma_addr_t addr = get_unaligned_le32(&tb->lo);
3609 if (sizeof(dma_addr_t) > sizeof(u32)) 3593 if (sizeof(dma_addr_t) > sizeof(u32))
3610 addr |= 3594 addr |=
3611 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16; 3595 ((dma_addr_t) (le16_to_cpu(tb->hi_n_len) & 0xF) << 16) <<
3596 16;
3612 3597
3613 return addr; 3598 return addr;
3614} 3599}
3615 3600
3616static inline u16 il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx) 3601static inline u16
3602il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx)
3617{ 3603{
3618 struct il_tfd_tb *tb = &tfd->tbs[idx]; 3604 struct il_tfd_tb *tb = &tfd->tbs[idx];
3619 3605
3620 return le16_to_cpu(tb->hi_n_len) >> 4; 3606 return le16_to_cpu(tb->hi_n_len) >> 4;
3621} 3607}
3622 3608
3623static inline void il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, 3609static inline void
3624 dma_addr_t addr, u16 len) 3610il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, dma_addr_t addr, u16 len)
3625{ 3611{
3626 struct il_tfd_tb *tb = &tfd->tbs[idx]; 3612 struct il_tfd_tb *tb = &tfd->tbs[idx];
3627 u16 hi_n_len = len << 4; 3613 u16 hi_n_len = len << 4;
@@ -3635,7 +3621,8 @@ static inline void il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx,
3635 tfd->num_tbs = idx + 1; 3621 tfd->num_tbs = idx + 1;
3636} 3622}
3637 3623
3638static inline u8 il4965_tfd_get_num_tbs(struct il_tfd *tfd) 3624static inline u8
3625il4965_tfd_get_num_tbs(struct il_tfd *tfd)
3639{ 3626{
3640 return tfd->num_tbs & 0x1f; 3627 return tfd->num_tbs & 0x1f;
3641} 3628}
@@ -3648,7 +3635,8 @@ static inline u8 il4965_tfd_get_num_tbs(struct il_tfd *tfd)
3648 * Does NOT advance any TFD circular buffer read/write idxes 3635 * Does NOT advance any TFD circular buffer read/write idxes
3649 * Does NOT free the TFD itself (which is within circular buffer) 3636 * Does NOT free the TFD itself (which is within circular buffer)
3650 */ 3637 */
3651void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) 3638void
3639il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
3652{ 3640{
3653 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds; 3641 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds;
3654 struct il_tfd *tfd; 3642 struct il_tfd *tfd;
@@ -3670,16 +3658,15 @@ void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
3670 3658
3671 /* Unmap tx_cmd */ 3659 /* Unmap tx_cmd */
3672 if (num_tbs) 3660 if (num_tbs)
3673 pci_unmap_single(dev, 3661 pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
3674 dma_unmap_addr(&txq->meta[idx], mapping), 3662 dma_unmap_len(&txq->meta[idx], len),
3675 dma_unmap_len(&txq->meta[idx], len), 3663 PCI_DMA_BIDIRECTIONAL);
3676 PCI_DMA_BIDIRECTIONAL);
3677 3664
3678 /* Unmap chunks, if any. */ 3665 /* Unmap chunks, if any. */
3679 for (i = 1; i < num_tbs; i++) 3666 for (i = 1; i < num_tbs; i++)
3680 pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i), 3667 pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i),
3681 il4965_tfd_tb_get_len(tfd, i), 3668 il4965_tfd_tb_get_len(tfd, i),
3682 PCI_DMA_TODEVICE); 3669 PCI_DMA_TODEVICE);
3683 3670
3684 /* free SKB */ 3671 /* free SKB */
3685 if (txq->txb) { 3672 if (txq->txb) {
@@ -3695,10 +3682,9 @@ void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
3695 } 3682 }
3696} 3683}
3697 3684
3698int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, 3685int
3699 struct il_tx_queue *txq, 3686il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
3700 dma_addr_t addr, u16 len, 3687 dma_addr_t addr, u16 len, u8 reset, u8 pad)
3701 u8 reset, u8 pad)
3702{ 3688{
3703 struct il_queue *q; 3689 struct il_queue *q;
3704 struct il_tfd *tfd, *tfd_tmp; 3690 struct il_tfd *tfd, *tfd_tmp;
@@ -3716,14 +3702,13 @@ int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il,
3716 /* Each TFD can point to a maximum 20 Tx buffers */ 3702 /* Each TFD can point to a maximum 20 Tx buffers */
3717 if (num_tbs >= IL_NUM_OF_TBS) { 3703 if (num_tbs >= IL_NUM_OF_TBS) {
3718 IL_ERR("Error can not send more than %d chunks\n", 3704 IL_ERR("Error can not send more than %d chunks\n",
3719 IL_NUM_OF_TBS); 3705 IL_NUM_OF_TBS);
3720 return -EINVAL; 3706 return -EINVAL;
3721 } 3707 }
3722 3708
3723 BUG_ON(addr & ~DMA_BIT_MASK(36)); 3709 BUG_ON(addr & ~DMA_BIT_MASK(36));
3724 if (unlikely(addr & ~IL_TX_DMA_MASK)) 3710 if (unlikely(addr & ~IL_TX_DMA_MASK))
3725 IL_ERR("Unaligned address = %llx\n", 3711 IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr);
3726 (unsigned long long)addr);
3727 3712
3728 il4965_tfd_set_tb(tfd, num_tbs, addr, len); 3713 il4965_tfd_set_tb(tfd, num_tbs, addr, len);
3729 3714
@@ -3737,14 +3722,13 @@ int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il,
3737 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA 3722 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
3738 * channels supported in hardware. 3723 * channels supported in hardware.
3739 */ 3724 */
3740int il4965_hw_tx_queue_init(struct il_priv *il, 3725int
3741 struct il_tx_queue *txq) 3726il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
3742{ 3727{
3743 int txq_id = txq->q.id; 3728 int txq_id = txq->q.id;
3744 3729
3745 /* Circular buffer (TFD queue in DRAM) physical base address */ 3730 /* Circular buffer (TFD queue in DRAM) physical base address */
3746 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), 3731 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8);
3747 txq->q.dma_addr >> 8);
3748 3732
3749 return 0; 3733 return 0;
3750} 3734}
@@ -3754,8 +3738,8 @@ int il4965_hw_tx_queue_init(struct il_priv *il,
3754 * Generic RX handler implementations 3738 * Generic RX handler implementations
3755 * 3739 *
3756 ******************************************************************************/ 3740 ******************************************************************************/
3757static void il4965_hdl_alive(struct il_priv *il, 3741static void
3758 struct il_rx_buf *rxb) 3742il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
3759{ 3743{
3760 struct il_rx_pkt *pkt = rxb_addr(rxb); 3744 struct il_rx_pkt *pkt = rxb_addr(rxb);
3761 struct il_alive_resp *palive; 3745 struct il_alive_resp *palive;
@@ -3763,15 +3747,12 @@ static void il4965_hdl_alive(struct il_priv *il,
3763 3747
3764 palive = &pkt->u.alive_frame; 3748 palive = &pkt->u.alive_frame;
3765 3749
3766 D_INFO("Alive ucode status 0x%08X revision " 3750 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
3767 "0x%01X 0x%01X\n", 3751 palive->is_valid, palive->ver_type, palive->ver_subtype);
3768 palive->is_valid, palive->ver_type,
3769 palive->ver_subtype);
3770 3752
3771 if (palive->ver_subtype == INITIALIZE_SUBTYPE) { 3753 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3772 D_INFO("Initialization Alive received.\n"); 3754 D_INFO("Initialization Alive received.\n");
3773 memcpy(&il->card_alive_init, 3755 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
3774 &pkt->u.alive_frame,
3775 sizeof(struct il_init_alive_resp)); 3756 sizeof(struct il_init_alive_resp));
3776 pwork = &il->init_alive_start; 3757 pwork = &il->init_alive_start;
3777 } else { 3758 } else {
@@ -3784,8 +3765,7 @@ static void il4965_hdl_alive(struct il_priv *il,
3784 /* We delay the ALIVE response by 5ms to 3765 /* We delay the ALIVE response by 5ms to
3785 * give the HW RF Kill time to activate... */ 3766 * give the HW RF Kill time to activate... */
3786 if (palive->is_valid == UCODE_VALID_OK) 3767 if (palive->is_valid == UCODE_VALID_OK)
3787 queue_delayed_work(il->workqueue, pwork, 3768 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
3788 msecs_to_jiffies(5));
3789 else 3769 else
3790 IL_WARN("uCode did not respond OK.\n"); 3770 IL_WARN("uCode did not respond OK.\n");
3791} 3771}
@@ -3800,7 +3780,8 @@ static void il4965_hdl_alive(struct il_priv *il,
3800 * was received. We need to ensure we receive the stats in order 3780 * was received. We need to ensure we receive the stats in order
3801 * to update the temperature used for calibrating the TXPOWER. 3781 * to update the temperature used for calibrating the TXPOWER.
3802 */ 3782 */
3803static void il4965_bg_stats_periodic(unsigned long data) 3783static void
3784il4965_bg_stats_periodic(unsigned long data)
3804{ 3785{
3805 struct il_priv *il = (struct il_priv *)data; 3786 struct il_priv *il = (struct il_priv *)data;
3806 3787
@@ -3814,28 +3795,27 @@ static void il4965_bg_stats_periodic(unsigned long data)
3814 il_send_stats_request(il, CMD_ASYNC, false); 3795 il_send_stats_request(il, CMD_ASYNC, false);
3815} 3796}
3816 3797
3817static void il4965_hdl_beacon(struct il_priv *il, 3798static void
3818 struct il_rx_buf *rxb) 3799il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
3819{ 3800{
3820 struct il_rx_pkt *pkt = rxb_addr(rxb); 3801 struct il_rx_pkt *pkt = rxb_addr(rxb);
3821 struct il4965_beacon_notif *beacon = 3802 struct il4965_beacon_notif *beacon =
3822 (struct il4965_beacon_notif *)pkt->u.raw; 3803 (struct il4965_beacon_notif *)pkt->u.raw;
3823#ifdef CONFIG_IWLEGACY_DEBUG 3804#ifdef CONFIG_IWLEGACY_DEBUG
3824 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); 3805 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
3825 3806
3826 D_RX("beacon status %x retries %d iss %d " 3807 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
3827 "tsf %d %d rate %d\n", 3808 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
3828 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, 3809 beacon->beacon_notify_hdr.failure_frame,
3829 beacon->beacon_notify_hdr.failure_frame, 3810 le32_to_cpu(beacon->ibss_mgr_status),
3830 le32_to_cpu(beacon->ibss_mgr_status), 3811 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
3831 le32_to_cpu(beacon->high_tsf),
3832 le32_to_cpu(beacon->low_tsf), rate);
3833#endif 3812#endif
3834 3813
3835 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); 3814 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
3836} 3815}
3837 3816
3838static void il4965_perform_ct_kill_task(struct il_priv *il) 3817static void
3818il4965_perform_ct_kill_task(struct il_priv *il)
3839{ 3819{
3840 unsigned long flags; 3820 unsigned long flags;
3841 3821
@@ -3845,7 +3825,7 @@ static void il4965_perform_ct_kill_task(struct il_priv *il)
3845 ieee80211_stop_queues(il->hw); 3825 ieee80211_stop_queues(il->hw);
3846 3826
3847 _il_wr(il, CSR_UCODE_DRV_GP1_SET, 3827 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
3848 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 3828 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3849 _il_rd(il, CSR_UCODE_DRV_GP1); 3829 _il_rd(il, CSR_UCODE_DRV_GP1);
3850 3830
3851 spin_lock_irqsave(&il->reg_lock, flags); 3831 spin_lock_irqsave(&il->reg_lock, flags);
@@ -3856,33 +3836,30 @@ static void il4965_perform_ct_kill_task(struct il_priv *il)
3856 3836
3857/* Handle notification from uCode that card's power state is changing 3837/* Handle notification from uCode that card's power state is changing
3858 * due to software, hardware, or critical temperature RFKILL */ 3838 * due to software, hardware, or critical temperature RFKILL */
3859static void il4965_hdl_card_state(struct il_priv *il, 3839static void
3860 struct il_rx_buf *rxb) 3840il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
3861{ 3841{
3862 struct il_rx_pkt *pkt = rxb_addr(rxb); 3842 struct il_rx_pkt *pkt = rxb_addr(rxb);
3863 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 3843 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3864 unsigned long status = il->status; 3844 unsigned long status = il->status;
3865 3845
3866 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n", 3846 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n",
3867 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 3847 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3868 (flags & SW_CARD_DISABLED) ? "Kill" : "On", 3848 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
3869 (flags & CT_CARD_DISABLED) ? 3849 (flags & CT_CARD_DISABLED) ? "Reached" : "Not reached");
3870 "Reached" : "Not reached");
3871 3850
3872 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | 3851 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | CT_CARD_DISABLED)) {
3873 CT_CARD_DISABLED)) {
3874 3852
3875 _il_wr(il, CSR_UCODE_DRV_GP1_SET, 3853 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
3876 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 3854 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3877 3855
3878 il_wr(il, HBUS_TARG_MBX_C, 3856 il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3879 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3880 3857
3881 if (!(flags & RXON_CARD_DISABLED)) { 3858 if (!(flags & RXON_CARD_DISABLED)) {
3882 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, 3859 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
3883 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 3860 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3884 il_wr(il, HBUS_TARG_MBX_C, 3861 il_wr(il, HBUS_TARG_MBX_C,
3885 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 3862 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3886 } 3863 }
3887 } 3864 }
3888 3865
@@ -3900,7 +3877,7 @@ static void il4965_hdl_card_state(struct il_priv *il,
3900 if ((test_bit(S_RF_KILL_HW, &status) != 3877 if ((test_bit(S_RF_KILL_HW, &status) !=
3901 test_bit(S_RF_KILL_HW, &il->status))) 3878 test_bit(S_RF_KILL_HW, &il->status)))
3902 wiphy_rfkill_set_hw_state(il->hw->wiphy, 3879 wiphy_rfkill_set_hw_state(il->hw->wiphy,
3903 test_bit(S_RF_KILL_HW, &il->status)); 3880 test_bit(S_RF_KILL_HW, &il->status));
3904 else 3881 else
3905 wake_up(&il->wait_command_queue); 3882 wake_up(&il->wait_command_queue);
3906} 3883}
@@ -3914,16 +3891,15 @@ static void il4965_hdl_card_state(struct il_priv *il,
3914 * This function chains into the hardware specific files for them to setup 3891 * This function chains into the hardware specific files for them to setup
3915 * any hardware specific handlers as well. 3892 * any hardware specific handlers as well.
3916 */ 3893 */
3917static void il4965_setup_handlers(struct il_priv *il) 3894static void
3895il4965_setup_handlers(struct il_priv *il)
3918{ 3896{
3919 il->handlers[N_ALIVE] = il4965_hdl_alive; 3897 il->handlers[N_ALIVE] = il4965_hdl_alive;
3920 il->handlers[N_ERROR] = il_hdl_error; 3898 il->handlers[N_ERROR] = il_hdl_error;
3921 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; 3899 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
3922 il->handlers[N_SPECTRUM_MEASUREMENT] = 3900 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
3923 il_hdl_spectrum_measurement;
3924 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; 3901 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
3925 il->handlers[N_PM_DEBUG_STATS] = 3902 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
3926 il_hdl_pm_debug_stats;
3927 il->handlers[N_BEACON] = il4965_hdl_beacon; 3903 il->handlers[N_BEACON] = il4965_hdl_beacon;
3928 3904
3929 /* 3905 /*
@@ -3937,11 +3913,9 @@ static void il4965_setup_handlers(struct il_priv *il)
3937 il_setup_rx_scan_handlers(il); 3913 il_setup_rx_scan_handlers(il);
3938 3914
3939 /* status change handler */ 3915 /* status change handler */
3940 il->handlers[N_CARD_STATE] = 3916 il->handlers[N_CARD_STATE] = il4965_hdl_card_state;
3941 il4965_hdl_card_state;
3942 3917
3943 il->handlers[N_MISSED_BEACONS] = 3918 il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon;
3944 il4965_hdl_missed_beacon;
3945 /* Rx handlers */ 3919 /* Rx handlers */
3946 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy; 3920 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy;
3947 il->handlers[N_RX_MPDU] = il4965_hdl_rx; 3921 il->handlers[N_RX_MPDU] = il4965_hdl_rx;
@@ -3958,7 +3932,8 @@ static void il4965_setup_handlers(struct il_priv *il)
3958 * the appropriate handlers, including command responses, 3932 * the appropriate handlers, including command responses,
3959 * frame-received notifications, and other notifications. 3933 * frame-received notifications, and other notifications.
3960 */ 3934 */
3961void il4965_rx_handle(struct il_priv *il) 3935void
3936il4965_rx_handle(struct il_priv *il)
3962{ 3937{
3963 struct il_rx_buf *rxb; 3938 struct il_rx_buf *rxb;
3964 struct il_rx_pkt *pkt; 3939 struct il_rx_pkt *pkt;
@@ -3972,7 +3947,7 @@ void il4965_rx_handle(struct il_priv *il)
3972 3947
3973 /* uCode's read idx (stored in shared DRAM) indicates the last Rx 3948 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
3974 * buffer that the driver may process (last buffer filled by ucode). */ 3949 * buffer that the driver may process (last buffer filled by ucode). */
3975 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; 3950 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
3976 i = rxq->read; 3951 i = rxq->read;
3977 3952
3978 /* Rx interrupt, but nothing sent from uCode */ 3953 /* Rx interrupt, but nothing sent from uCode */
@@ -4005,7 +3980,7 @@ void il4965_rx_handle(struct il_priv *il)
4005 pkt = rxb_addr(rxb); 3980 pkt = rxb_addr(rxb);
4006 3981
4007 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; 3982 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4008 len += sizeof(u32); /* account for status word */ 3983 len += sizeof(u32); /* account for status word */
4009 3984
4010 /* Reclaim a command buffer only if this packet is a response 3985 /* Reclaim a command buffer only if this packet is a response
4011 * to a (driver-originated) command. 3986 * to a (driver-originated) command.
@@ -4014,28 +3989,23 @@ void il4965_rx_handle(struct il_priv *il)
4014 * Ucode should set SEQ_RX_FRAME bit if ucode-originated, 3989 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4015 * but apparently a few don't get set; catch them here. */ 3990 * but apparently a few don't get set; catch them here. */
4016 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && 3991 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4017 (pkt->hdr.cmd != N_RX_PHY) && 3992 (pkt->hdr.cmd != N_RX_PHY) && (pkt->hdr.cmd != N_RX) &&
4018 (pkt->hdr.cmd != N_RX) && 3993 (pkt->hdr.cmd != N_RX_MPDU) &&
4019 (pkt->hdr.cmd != N_RX_MPDU) && 3994 (pkt->hdr.cmd != N_COMPRESSED_BA) &&
4020 (pkt->hdr.cmd != N_COMPRESSED_BA) && 3995 (pkt->hdr.cmd != N_STATS) && (pkt->hdr.cmd != C_TX);
4021 (pkt->hdr.cmd != N_STATS) &&
4022 (pkt->hdr.cmd != C_TX);
4023 3996
4024 /* Based on type of command response or notification, 3997 /* Based on type of command response or notification,
4025 * handle those that need handling via function in 3998 * handle those that need handling via function in
4026 * handlers table. See il4965_setup_handlers() */ 3999 * handlers table. See il4965_setup_handlers() */
4027 if (il->handlers[pkt->hdr.cmd]) { 4000 if (il->handlers[pkt->hdr.cmd]) {
4028 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, 4001 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
4029 i, il_get_cmd_string(pkt->hdr.cmd), 4002 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4030 pkt->hdr.cmd);
4031 il->isr_stats.handlers[pkt->hdr.cmd]++; 4003 il->isr_stats.handlers[pkt->hdr.cmd]++;
4032 il->handlers[pkt->hdr.cmd] (il, rxb); 4004 il->handlers[pkt->hdr.cmd] (il, rxb);
4033 } else { 4005 } else {
4034 /* No handling needed */ 4006 /* No handling needed */
4035 D_RX( 4007 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
4036 "r %d i %d No handler needed for %s, 0x%02x\n", 4008 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4037 r, i, il_get_cmd_string(pkt->hdr.cmd),
4038 pkt->hdr.cmd);
4039 } 4009 }
4040 4010
4041 /* 4011 /*
@@ -4060,9 +4030,10 @@ void il4965_rx_handle(struct il_priv *il)
4060 * rx_free list for reuse later. */ 4030 * rx_free list for reuse later. */
4061 spin_lock_irqsave(&rxq->lock, flags); 4031 spin_lock_irqsave(&rxq->lock, flags);
4062 if (rxb->page != NULL) { 4032 if (rxb->page != NULL) {
4063 rxb->page_dma = pci_map_page(il->pci_dev, rxb->page, 4033 rxb->page_dma =
4064 0, PAGE_SIZE << il->hw_params.rx_page_order, 4034 pci_map_page(il->pci_dev, rxb->page, 0,
4065 PCI_DMA_FROMDEVICE); 4035 PAGE_SIZE << il->hw_params.
4036 rx_page_order, PCI_DMA_FROMDEVICE);
4066 list_add_tail(&rxb->list, &rxq->rx_free); 4037 list_add_tail(&rxb->list, &rxq->rx_free);
4067 rxq->free_count++; 4038 rxq->free_count++;
4068 } else 4039 } else
@@ -4092,14 +4063,16 @@ void il4965_rx_handle(struct il_priv *il)
4092} 4063}
4093 4064
4094/* call this function to flush any scheduled tasklet */ 4065/* call this function to flush any scheduled tasklet */
4095static inline void il4965_synchronize_irq(struct il_priv *il) 4066static inline void
4067il4965_synchronize_irq(struct il_priv *il)
4096{ 4068{
4097 /* wait to make sure we flush pending tasklet*/ 4069 /* wait to make sure we flush pending tasklet */
4098 synchronize_irq(il->pci_dev->irq); 4070 synchronize_irq(il->pci_dev->irq);
4099 tasklet_kill(&il->irq_tasklet); 4071 tasklet_kill(&il->irq_tasklet);
4100} 4072}
4101 4073
4102static void il4965_irq_tasklet(struct il_priv *il) 4074static void
4075il4965_irq_tasklet(struct il_priv *il)
4103{ 4076{
4104 u32 inta, handled = 0; 4077 u32 inta, handled = 0;
4105 u32 inta_fh; 4078 u32 inta_fh;
@@ -4127,8 +4100,8 @@ static void il4965_irq_tasklet(struct il_priv *il)
4127 if (il_get_debug_level(il) & IL_DL_ISR) { 4100 if (il_get_debug_level(il) & IL_DL_ISR) {
4128 /* just for debug */ 4101 /* just for debug */
4129 inta_mask = _il_rd(il, CSR_INT_MASK); 4102 inta_mask = _il_rd(il, CSR_INT_MASK);
4130 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", 4103 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
4131 inta, inta_mask, inta_fh); 4104 inta_mask, inta_fh);
4132 } 4105 }
4133#endif 4106#endif
4134 4107
@@ -4157,13 +4130,12 @@ static void il4965_irq_tasklet(struct il_priv *il)
4157 4130
4158 return; 4131 return;
4159 } 4132 }
4160
4161#ifdef CONFIG_IWLEGACY_DEBUG 4133#ifdef CONFIG_IWLEGACY_DEBUG
4162 if (il_get_debug_level(il) & (IL_DL_ISR)) { 4134 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4163 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 4135 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4164 if (inta & CSR_INT_BIT_SCD) { 4136 if (inta & CSR_INT_BIT_SCD) {
4165 D_ISR("Scheduler finished to transmit " 4137 D_ISR("Scheduler finished to transmit "
4166 "the frame/frames.\n"); 4138 "the frame/frames.\n");
4167 il->isr_stats.sch++; 4139 il->isr_stats.sch++;
4168 } 4140 }
4169 4141
@@ -4180,12 +4152,13 @@ static void il4965_irq_tasklet(struct il_priv *il)
4180 /* HW RF KILL switch toggled */ 4152 /* HW RF KILL switch toggled */
4181 if (inta & CSR_INT_BIT_RF_KILL) { 4153 if (inta & CSR_INT_BIT_RF_KILL) {
4182 int hw_rf_kill = 0; 4154 int hw_rf_kill = 0;
4183 if (!(_il_rd(il, CSR_GP_CNTRL) & 4155 if (!
4184 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) 4156 (_il_rd(il, CSR_GP_CNTRL) &
4157 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4185 hw_rf_kill = 1; 4158 hw_rf_kill = 1;
4186 4159
4187 IL_WARN("RF_KILL bit toggled to %s.\n", 4160 IL_WARN("RF_KILL bit toggled to %s.\n",
4188 hw_rf_kill ? "disable radio" : "enable radio"); 4161 hw_rf_kill ? "disable radio" : "enable radio");
4189 4162
4190 il->isr_stats.rfkill++; 4163 il->isr_stats.rfkill++;
4191 4164
@@ -4214,8 +4187,8 @@ static void il4965_irq_tasklet(struct il_priv *il)
4214 4187
4215 /* Error detected by uCode */ 4188 /* Error detected by uCode */
4216 if (inta & CSR_INT_BIT_SW_ERR) { 4189 if (inta & CSR_INT_BIT_SW_ERR) {
4217 IL_ERR("Microcode SW error detected. " 4190 IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n",
4218 " Restarting 0x%X.\n", inta); 4191 inta);
4219 il->isr_stats.sw++; 4192 il->isr_stats.sw++;
4220 il_irq_handle_error(il); 4193 il_irq_handle_error(il);
4221 handled |= CSR_INT_BIT_SW_ERR; 4194 handled |= CSR_INT_BIT_SW_ERR;
@@ -4261,7 +4234,7 @@ static void il4965_irq_tasklet(struct il_priv *il)
4261 4234
4262 if (inta & ~(il->inta_mask)) { 4235 if (inta & ~(il->inta_mask)) {
4263 IL_WARN("Disabled INTA bits 0x%08x were pending\n", 4236 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
4264 inta & ~il->inta_mask); 4237 inta & ~il->inta_mask);
4265 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh); 4238 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh);
4266 } 4239 }
4267 4240
@@ -4278,9 +4251,8 @@ static void il4965_irq_tasklet(struct il_priv *il)
4278 inta = _il_rd(il, CSR_INT); 4251 inta = _il_rd(il, CSR_INT);
4279 inta_mask = _il_rd(il, CSR_INT_MASK); 4252 inta_mask = _il_rd(il, CSR_INT_MASK);
4280 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 4253 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4281 D_ISR( 4254 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4282 "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 4255 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4283 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4284 } 4256 }
4285#endif 4257#endif
4286} 4258}
@@ -4304,15 +4276,17 @@ static void il4965_irq_tasklet(struct il_priv *il)
4304 * level that is used instead of the global debug level if it (the per 4276 * level that is used instead of the global debug level if it (the per
4305 * device debug level) is set. 4277 * device debug level) is set.
4306 */ 4278 */
4307static ssize_t il4965_show_debug_level(struct device *d, 4279static ssize_t
4308 struct device_attribute *attr, char *buf) 4280il4965_show_debug_level(struct device *d, struct device_attribute *attr,
4281 char *buf)
4309{ 4282{
4310 struct il_priv *il = dev_get_drvdata(d); 4283 struct il_priv *il = dev_get_drvdata(d);
4311 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); 4284 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
4312} 4285}
4313static ssize_t il4965_store_debug_level(struct device *d, 4286
4314 struct device_attribute *attr, 4287static ssize_t
4315 const char *buf, size_t count) 4288il4965_store_debug_level(struct device *d, struct device_attribute *attr,
4289 const char *buf, size_t count)
4316{ 4290{
4317 struct il_priv *il = dev_get_drvdata(d); 4291 struct il_priv *il = dev_get_drvdata(d);
4318 unsigned long val; 4292 unsigned long val;
@@ -4324,21 +4298,19 @@ static ssize_t il4965_store_debug_level(struct device *d,
4324 else { 4298 else {
4325 il->debug_level = val; 4299 il->debug_level = val;
4326 if (il_alloc_traffic_mem(il)) 4300 if (il_alloc_traffic_mem(il))
4327 IL_ERR( 4301 IL_ERR("Not enough memory to generate traffic log\n");
4328 "Not enough memory to generate traffic log\n");
4329 } 4302 }
4330 return strnlen(buf, count); 4303 return strnlen(buf, count);
4331} 4304}
4332 4305
4333static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, 4306static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il4965_show_debug_level,
4334 il4965_show_debug_level, il4965_store_debug_level); 4307 il4965_store_debug_level);
4335
4336 4308
4337#endif /* CONFIG_IWLEGACY_DEBUG */ 4309#endif /* CONFIG_IWLEGACY_DEBUG */
4338 4310
4339 4311static ssize_t
4340static ssize_t il4965_show_temperature(struct device *d, 4312il4965_show_temperature(struct device *d, struct device_attribute *attr,
4341 struct device_attribute *attr, char *buf) 4313 char *buf)
4342{ 4314{
4343 struct il_priv *il = dev_get_drvdata(d); 4315 struct il_priv *il = dev_get_drvdata(d);
4344 4316
@@ -4350,8 +4322,8 @@ static ssize_t il4965_show_temperature(struct device *d,
4350 4322
4351static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL); 4323static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL);
4352 4324
4353static ssize_t il4965_show_tx_power(struct device *d, 4325static ssize_t
4354 struct device_attribute *attr, char *buf) 4326il4965_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
4355{ 4327{
4356 struct il_priv *il = dev_get_drvdata(d); 4328 struct il_priv *il = dev_get_drvdata(d);
4357 4329
@@ -4361,9 +4333,9 @@ static ssize_t il4965_show_tx_power(struct device *d,
4361 return sprintf(buf, "%d\n", il->tx_power_user_lmt); 4333 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
4362} 4334}
4363 4335
4364static ssize_t il4965_store_tx_power(struct device *d, 4336static ssize_t
4365 struct device_attribute *attr, 4337il4965_store_tx_power(struct device *d, struct device_attribute *attr,
4366 const char *buf, size_t count) 4338 const char *buf, size_t count)
4367{ 4339{
4368 struct il_priv *il = dev_get_drvdata(d); 4340 struct il_priv *il = dev_get_drvdata(d);
4369 unsigned long val; 4341 unsigned long val;
@@ -4375,16 +4347,15 @@ static ssize_t il4965_store_tx_power(struct device *d,
4375 else { 4347 else {
4376 ret = il_set_tx_power(il, val, false); 4348 ret = il_set_tx_power(il, val, false);
4377 if (ret) 4349 if (ret)
4378 IL_ERR("failed setting tx power (0x%d).\n", 4350 IL_ERR("failed setting tx power (0x%d).\n", ret);
4379 ret);
4380 else 4351 else
4381 ret = count; 4352 ret = count;
4382 } 4353 }
4383 return ret; 4354 return ret;
4384} 4355}
4385 4356
4386static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, 4357static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il4965_show_tx_power,
4387 il4965_show_tx_power, il4965_store_tx_power); 4358 il4965_store_tx_power);
4388 4359
4389static struct attribute *il_sysfs_entries[] = { 4360static struct attribute *il_sysfs_entries[] = {
4390 &dev_attr_temperature.attr, 4361 &dev_attr_temperature.attr,
@@ -4406,7 +4377,8 @@ static struct attribute_group il_attribute_group = {
4406 * 4377 *
4407 ******************************************************************************/ 4378 ******************************************************************************/
4408 4379
4409static void il4965_dealloc_ucode_pci(struct il_priv *il) 4380static void
4381il4965_dealloc_ucode_pci(struct il_priv *il)
4410{ 4382{
4411 il_free_fw_desc(il->pci_dev, &il->ucode_code); 4383 il_free_fw_desc(il->pci_dev, &il->ucode_code);
4412 il_free_fw_desc(il->pci_dev, &il->ucode_data); 4384 il_free_fw_desc(il->pci_dev, &il->ucode_data);
@@ -4416,18 +4388,19 @@ static void il4965_dealloc_ucode_pci(struct il_priv *il)
4416 il_free_fw_desc(il->pci_dev, &il->ucode_boot); 4388 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
4417} 4389}
4418 4390
4419static void il4965_nic_start(struct il_priv *il) 4391static void
4392il4965_nic_start(struct il_priv *il)
4420{ 4393{
4421 /* Remove all resets to allow NIC to operate */ 4394 /* Remove all resets to allow NIC to operate */
4422 _il_wr(il, CSR_RESET, 0); 4395 _il_wr(il, CSR_RESET, 0);
4423} 4396}
4424 4397
4425static void il4965_ucode_callback(const struct firmware *ucode_raw, 4398static void il4965_ucode_callback(const struct firmware *ucode_raw,
4426 void *context); 4399 void *context);
4427static int il4965_mac_setup_register(struct il_priv *il, 4400static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length);
4428 u32 max_probe_length);
4429 4401
4430static int __must_check il4965_request_firmware(struct il_priv *il, bool first) 4402static int __must_check
4403il4965_request_firmware(struct il_priv *il, bool first)
4431{ 4404{
4432 const char *name_pre = il->cfg->fw_name_pre; 4405 const char *name_pre = il->cfg->fw_name_pre;
4433 char tag[8]; 4406 char tag[8];
@@ -4447,8 +4420,7 @@ static int __must_check il4965_request_firmware(struct il_priv *il, bool first)
4447 4420
4448 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); 4421 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
4449 4422
4450 D_INFO("attempting to load firmware '%s'\n", 4423 D_INFO("attempting to load firmware '%s'\n", il->firmware_name);
4451 il->firmware_name);
4452 4424
4453 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name, 4425 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name,
4454 &il->pci_dev->dev, GFP_KERNEL, il, 4426 &il->pci_dev->dev, GFP_KERNEL, il,
@@ -4460,9 +4432,9 @@ struct il4965_firmware_pieces {
4460 size_t inst_size, data_size, init_size, init_data_size, boot_size; 4432 size_t inst_size, data_size, init_size, init_data_size, boot_size;
4461}; 4433};
4462 4434
4463static int il4965_load_firmware(struct il_priv *il, 4435static int
4464 const struct firmware *ucode_raw, 4436il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw,
4465 struct il4965_firmware_pieces *pieces) 4437 struct il4965_firmware_pieces *pieces)
4466{ 4438{
4467 struct il_ucode_header *ucode = (void *)ucode_raw->data; 4439 struct il_ucode_header *ucode = (void *)ucode_raw->data;
4468 u32 api_ver, hdr_size; 4440 u32 api_ver, hdr_size;
@@ -4484,21 +4456,19 @@ static int il4965_load_firmware(struct il_priv *il,
4484 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size); 4456 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
4485 pieces->data_size = le32_to_cpu(ucode->v1.data_size); 4457 pieces->data_size = le32_to_cpu(ucode->v1.data_size);
4486 pieces->init_size = le32_to_cpu(ucode->v1.init_size); 4458 pieces->init_size = le32_to_cpu(ucode->v1.init_size);
4487 pieces->init_data_size = 4459 pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size);
4488 le32_to_cpu(ucode->v1.init_data_size);
4489 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size); 4460 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size);
4490 src = ucode->v1.data; 4461 src = ucode->v1.data;
4491 break; 4462 break;
4492 } 4463 }
4493 4464
4494 /* Verify size of file vs. image size info in file's header */ 4465 /* Verify size of file vs. image size info in file's header */
4495 if (ucode_raw->size != hdr_size + pieces->inst_size + 4466 if (ucode_raw->size !=
4496 pieces->data_size + pieces->init_size + 4467 hdr_size + pieces->inst_size + pieces->data_size +
4497 pieces->init_data_size + pieces->boot_size) { 4468 pieces->init_size + pieces->init_data_size + pieces->boot_size) {
4498 4469
4499 IL_ERR( 4470 IL_ERR("uCode file size %d does not match expected size\n",
4500 "uCode file size %d does not match expected size\n", 4471 (int)ucode_raw->size);
4501 (int)ucode_raw->size);
4502 return -EINVAL; 4472 return -EINVAL;
4503 } 4473 }
4504 4474
@@ -4535,20 +4505,19 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4535 4505
4536 u32 max_probe_length = 200; 4506 u32 max_probe_length = 200;
4537 u32 standard_phy_calibration_size = 4507 u32 standard_phy_calibration_size =
4538 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE; 4508 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
4539 4509
4540 memset(&pieces, 0, sizeof(pieces)); 4510 memset(&pieces, 0, sizeof(pieces));
4541 4511
4542 if (!ucode_raw) { 4512 if (!ucode_raw) {
4543 if (il->fw_idx <= il->cfg->ucode_api_max) 4513 if (il->fw_idx <= il->cfg->ucode_api_max)
4544 IL_ERR( 4514 IL_ERR("request for firmware file '%s' failed.\n",
4545 "request for firmware file '%s' failed.\n", 4515 il->firmware_name);
4546 il->firmware_name);
4547 goto try_again; 4516 goto try_again;
4548 } 4517 }
4549 4518
4550 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", 4519 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name,
4551 il->firmware_name, ucode_raw->size); 4520 ucode_raw->size);
4552 4521
4553 /* Make sure that we got at least the API version number */ 4522 /* Make sure that we got at least the API version number */
4554 if (ucode_raw->size < 4) { 4523 if (ucode_raw->size < 4) {
@@ -4572,32 +4541,25 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4572 * on the API version read from firmware header from here on forward 4541 * on the API version read from firmware header from here on forward
4573 */ 4542 */
4574 if (api_ver < api_min || api_ver > api_max) { 4543 if (api_ver < api_min || api_ver > api_max) {
4575 IL_ERR( 4544 IL_ERR("Driver unable to support your firmware API. "
4576 "Driver unable to support your firmware API. " 4545 "Driver supports v%u, firmware is v%u.\n", api_max,
4577 "Driver supports v%u, firmware is v%u.\n", 4546 api_ver);
4578 api_max, api_ver);
4579 goto try_again; 4547 goto try_again;
4580 } 4548 }
4581 4549
4582 if (api_ver != api_max) 4550 if (api_ver != api_max)
4583 IL_ERR( 4551 IL_ERR("Firmware has old API version. Expected v%u, "
4584 "Firmware has old API version. Expected v%u, " 4552 "got v%u. New firmware can be obtained "
4585 "got v%u. New firmware can be obtained " 4553 "from http://www.intellinuxwireless.org.\n", api_max,
4586 "from http://www.intellinuxwireless.org.\n", 4554 api_ver);
4587 api_max, api_ver);
4588 4555
4589 IL_INFO("loaded firmware version %u.%u.%u.%u\n", 4556 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
4590 IL_UCODE_MAJOR(il->ucode_ver), 4557 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
4591 IL_UCODE_MINOR(il->ucode_ver), 4558 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
4592 IL_UCODE_API(il->ucode_ver),
4593 IL_UCODE_SERIAL(il->ucode_ver));
4594 4559
4595 snprintf(il->hw->wiphy->fw_version, 4560 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
4596 sizeof(il->hw->wiphy->fw_version), 4561 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
4597 "%u.%u.%u.%u", 4562 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
4598 IL_UCODE_MAJOR(il->ucode_ver),
4599 IL_UCODE_MINOR(il->ucode_ver),
4600 IL_UCODE_API(il->ucode_ver),
4601 IL_UCODE_SERIAL(il->ucode_ver)); 4563 IL_UCODE_SERIAL(il->ucode_ver));
4602 4564
4603 /* 4565 /*
@@ -4606,47 +4568,41 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4606 * user just got a corrupted version of the latest API. 4568 * user just got a corrupted version of the latest API.
4607 */ 4569 */
4608 4570
4609 D_INFO("f/w package hdr ucode version raw = 0x%x\n", 4571 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
4610 il->ucode_ver); 4572 D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces.inst_size);
4611 D_INFO("f/w package hdr runtime inst size = %Zd\n", 4573 D_INFO("f/w package hdr runtime data size = %Zd\n", pieces.data_size);
4612 pieces.inst_size); 4574 D_INFO("f/w package hdr init inst size = %Zd\n", pieces.init_size);
4613 D_INFO("f/w package hdr runtime data size = %Zd\n", 4575 D_INFO("f/w package hdr init data size = %Zd\n", pieces.init_data_size);
4614 pieces.data_size); 4576 D_INFO("f/w package hdr boot inst size = %Zd\n", pieces.boot_size);
4615 D_INFO("f/w package hdr init inst size = %Zd\n",
4616 pieces.init_size);
4617 D_INFO("f/w package hdr init data size = %Zd\n",
4618 pieces.init_data_size);
4619 D_INFO("f/w package hdr boot inst size = %Zd\n",
4620 pieces.boot_size);
4621 4577
4622 /* Verify that uCode images will fit in card's SRAM */ 4578 /* Verify that uCode images will fit in card's SRAM */
4623 if (pieces.inst_size > il->hw_params.max_inst_size) { 4579 if (pieces.inst_size > il->hw_params.max_inst_size) {
4624 IL_ERR("uCode instr len %Zd too large to fit in\n", 4580 IL_ERR("uCode instr len %Zd too large to fit in\n",
4625 pieces.inst_size); 4581 pieces.inst_size);
4626 goto try_again; 4582 goto try_again;
4627 } 4583 }
4628 4584
4629 if (pieces.data_size > il->hw_params.max_data_size) { 4585 if (pieces.data_size > il->hw_params.max_data_size) {
4630 IL_ERR("uCode data len %Zd too large to fit in\n", 4586 IL_ERR("uCode data len %Zd too large to fit in\n",
4631 pieces.data_size); 4587 pieces.data_size);
4632 goto try_again; 4588 goto try_again;
4633 } 4589 }
4634 4590
4635 if (pieces.init_size > il->hw_params.max_inst_size) { 4591 if (pieces.init_size > il->hw_params.max_inst_size) {
4636 IL_ERR("uCode init instr len %Zd too large to fit in\n", 4592 IL_ERR("uCode init instr len %Zd too large to fit in\n",
4637 pieces.init_size); 4593 pieces.init_size);
4638 goto try_again; 4594 goto try_again;
4639 } 4595 }
4640 4596
4641 if (pieces.init_data_size > il->hw_params.max_data_size) { 4597 if (pieces.init_data_size > il->hw_params.max_data_size) {
4642 IL_ERR("uCode init data len %Zd too large to fit in\n", 4598 IL_ERR("uCode init data len %Zd too large to fit in\n",
4643 pieces.init_data_size); 4599 pieces.init_data_size);
4644 goto try_again; 4600 goto try_again;
4645 } 4601 }
4646 4602
4647 if (pieces.boot_size > il->hw_params.max_bsm_size) { 4603 if (pieces.boot_size > il->hw_params.max_bsm_size) {
4648 IL_ERR("uCode boot instr len %Zd too large to fit in\n", 4604 IL_ERR("uCode boot instr len %Zd too large to fit in\n",
4649 pieces.boot_size); 4605 pieces.boot_size);
4650 goto try_again; 4606 goto try_again;
4651 } 4607 }
4652 4608
@@ -4697,41 +4653,39 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4697 4653
4698 /* Runtime instructions (first block of data in file) */ 4654 /* Runtime instructions (first block of data in file) */
4699 D_INFO("Copying (but not loading) uCode instr len %Zd\n", 4655 D_INFO("Copying (but not loading) uCode instr len %Zd\n",
4700 pieces.inst_size); 4656 pieces.inst_size);
4701 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size); 4657 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size);
4702 4658
4703 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", 4659 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4704 il->ucode_code.v_addr, (u32)il->ucode_code.p_addr); 4660 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
4705 4661
4706 /* 4662 /*
4707 * Runtime data 4663 * Runtime data
4708 * NOTE: Copy into backup buffer will be done in il_up() 4664 * NOTE: Copy into backup buffer will be done in il_up()
4709 */ 4665 */
4710 D_INFO("Copying (but not loading) uCode data len %Zd\n", 4666 D_INFO("Copying (but not loading) uCode data len %Zd\n",
4711 pieces.data_size); 4667 pieces.data_size);
4712 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size); 4668 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size);
4713 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size); 4669 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
4714 4670
4715 /* Initialization instructions */ 4671 /* Initialization instructions */
4716 if (pieces.init_size) { 4672 if (pieces.init_size) {
4717 D_INFO( 4673 D_INFO("Copying (but not loading) init instr len %Zd\n",
4718 "Copying (but not loading) init instr len %Zd\n", 4674 pieces.init_size);
4719 pieces.init_size);
4720 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size); 4675 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size);
4721 } 4676 }
4722 4677
4723 /* Initialization data */ 4678 /* Initialization data */
4724 if (pieces.init_data_size) { 4679 if (pieces.init_data_size) {
4725 D_INFO( 4680 D_INFO("Copying (but not loading) init data len %Zd\n",
4726 "Copying (but not loading) init data len %Zd\n", 4681 pieces.init_data_size);
4727 pieces.init_data_size);
4728 memcpy(il->ucode_init_data.v_addr, pieces.init_data, 4682 memcpy(il->ucode_init_data.v_addr, pieces.init_data,
4729 pieces.init_data_size); 4683 pieces.init_data_size);
4730 } 4684 }
4731 4685
4732 /* Bootstrap instructions */ 4686 /* Bootstrap instructions */
4733 D_INFO("Copying (but not loading) boot instr len %Zd\n", 4687 D_INFO("Copying (but not loading) boot instr len %Zd\n",
4734 pieces.boot_size); 4688 pieces.boot_size);
4735 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size); 4689 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
4736 4690
4737 /* 4691 /*
@@ -4739,9 +4693,9 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4739 * base on the size of standard phy calibration commands table size 4693 * base on the size of standard phy calibration commands table size
4740 */ 4694 */
4741 il->_4965.phy_calib_chain_noise_reset_cmd = 4695 il->_4965.phy_calib_chain_noise_reset_cmd =
4742 standard_phy_calibration_size; 4696 standard_phy_calibration_size;
4743 il->_4965.phy_calib_chain_noise_gain_cmd = 4697 il->_4965.phy_calib_chain_noise_gain_cmd =
4744 standard_phy_calibration_size + 1; 4698 standard_phy_calibration_size + 1;
4745 4699
4746 /************************************************** 4700 /**************************************************
4747 * This is still part of probe() in a sense... 4701 * This is still part of probe() in a sense...
@@ -4754,11 +4708,10 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4754 4708
4755 err = il_dbgfs_register(il, DRV_NAME); 4709 err = il_dbgfs_register(il, DRV_NAME);
4756 if (err) 4710 if (err)
4757 IL_ERR( 4711 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
4758 "failed to create debugfs files. Ignoring error: %d\n", err); 4712 err);
4759 4713
4760 err = sysfs_create_group(&il->pci_dev->dev.kobj, 4714 err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group);
4761 &il_attribute_group);
4762 if (err) { 4715 if (err) {
4763 IL_ERR("failed to create sysfs device attributes\n"); 4716 IL_ERR("failed to create sysfs device attributes\n");
4764 goto out_unbind; 4717 goto out_unbind;
@@ -4769,23 +4722,23 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4769 complete(&il->_4965.firmware_loading_complete); 4722 complete(&il->_4965.firmware_loading_complete);
4770 return; 4723 return;
4771 4724
4772 try_again: 4725try_again:
4773 /* try next, if any */ 4726 /* try next, if any */
4774 if (il4965_request_firmware(il, false)) 4727 if (il4965_request_firmware(il, false))
4775 goto out_unbind; 4728 goto out_unbind;
4776 release_firmware(ucode_raw); 4729 release_firmware(ucode_raw);
4777 return; 4730 return;
4778 4731
4779 err_pci_alloc: 4732err_pci_alloc:
4780 IL_ERR("failed to allocate pci memory\n"); 4733 IL_ERR("failed to allocate pci memory\n");
4781 il4965_dealloc_ucode_pci(il); 4734 il4965_dealloc_ucode_pci(il);
4782 out_unbind: 4735out_unbind:
4783 complete(&il->_4965.firmware_loading_complete); 4736 complete(&il->_4965.firmware_loading_complete);
4784 device_release_driver(&il->pci_dev->dev); 4737 device_release_driver(&il->pci_dev->dev);
4785 release_firmware(ucode_raw); 4738 release_firmware(ucode_raw);
4786} 4739}
4787 4740
4788static const char * const desc_lookup_text[] = { 4741static const char *const desc_lookup_text[] = {
4789 "OK", 4742 "OK",
4790 "FAIL", 4743 "FAIL",
4791 "BAD_PARAM", 4744 "BAD_PARAM",
@@ -4816,26 +4769,30 @@ static const char * const desc_lookup_text[] = {
4816 "DEBUG_3", 4769 "DEBUG_3",
4817}; 4770};
4818 4771
4819static struct { char *name; u8 num; } advanced_lookup[] = { 4772static struct {
4820 { "NMI_INTERRUPT_WDG", 0x34 }, 4773 char *name;
4821 { "SYSASSERT", 0x35 }, 4774 u8 num;
4822 { "UCODE_VERSION_MISMATCH", 0x37 }, 4775} advanced_lookup[] = {
4823 { "BAD_COMMAND", 0x38 }, 4776 {
4824 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, 4777 "NMI_INTERRUPT_WDG", 0x34}, {
4825 { "FATAL_ERROR", 0x3D }, 4778 "SYSASSERT", 0x35}, {
4826 { "NMI_TRM_HW_ERR", 0x46 }, 4779 "UCODE_VERSION_MISMATCH", 0x37}, {
4827 { "NMI_INTERRUPT_TRM", 0x4C }, 4780 "BAD_COMMAND", 0x38}, {
4828 { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, 4781 "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, {
4829 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, 4782 "FATAL_ERROR", 0x3D}, {
4830 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, 4783 "NMI_TRM_HW_ERR", 0x46}, {
4831 { "NMI_INTERRUPT_HOST", 0x66 }, 4784 "NMI_INTERRUPT_TRM", 0x4C}, {
4832 { "NMI_INTERRUPT_ACTION_PT", 0x7C }, 4785 "NMI_INTERRUPT_BREAK_POINT", 0x54}, {
4833 { "NMI_INTERRUPT_UNKNOWN", 0x84 }, 4786 "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, {
4834 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, 4787 "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, {
4835 { "ADVANCED_SYSASSERT", 0 }, 4788 "NMI_INTERRUPT_HOST", 0x66}, {
4836}; 4789 "NMI_INTERRUPT_ACTION_PT", 0x7C}, {
4837 4790 "NMI_INTERRUPT_UNKNOWN", 0x84}, {
4838static const char *il4965_desc_lookup(u32 num) 4791 "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, {
4792"ADVANCED_SYSASSERT", 0},};
4793
4794static const char *
4795il4965_desc_lookup(u32 num)
4839{ 4796{
4840 int i; 4797 int i;
4841 int max = ARRAY_SIZE(desc_lookup_text); 4798 int max = ARRAY_SIZE(desc_lookup_text);
@@ -4854,7 +4811,8 @@ static const char *il4965_desc_lookup(u32 num)
4854#define ERROR_START_OFFSET (1 * sizeof(u32)) 4811#define ERROR_START_OFFSET (1 * sizeof(u32))
4855#define ERROR_ELEM_SIZE (7 * sizeof(u32)) 4812#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4856 4813
4857void il4965_dump_nic_error_log(struct il_priv *il) 4814void
4815il4965_dump_nic_error_log(struct il_priv *il)
4858{ 4816{
4859 u32 data2, line; 4817 u32 data2, line;
4860 u32 desc, time, count, base, data1; 4818 u32 desc, time, count, base, data1;
@@ -4868,9 +4826,8 @@ void il4965_dump_nic_error_log(struct il_priv *il)
4868 } 4826 }
4869 4827
4870 if (!il->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 4828 if (!il->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
4871 IL_ERR( 4829 IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n",
4872 "Not valid error log pointer 0x%08X for %s uCode\n", 4830 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT");
4873 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT");
4874 return; 4831 return;
4875 } 4832 }
4876 4833
@@ -4878,8 +4835,7 @@ void il4965_dump_nic_error_log(struct il_priv *il)
4878 4835
4879 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 4836 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4880 IL_ERR("Start IWL Error Log Dump:\n"); 4837 IL_ERR("Start IWL Error Log Dump:\n");
4881 IL_ERR("Status: 0x%08lX, count: %d\n", 4838 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
4882 il->status, count);
4883 } 4839 }
4884 4840
4885 desc = il_read_targ_mem(il, base + 1 * sizeof(u32)); 4841 desc = il_read_targ_mem(il, base + 1 * sizeof(u32));
@@ -4896,15 +4852,16 @@ void il4965_dump_nic_error_log(struct il_priv *il)
4896 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32)); 4852 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32));
4897 4853
4898 IL_ERR("Desc Time " 4854 IL_ERR("Desc Time "
4899 "data1 data2 line\n"); 4855 "data1 data2 line\n");
4900 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n", 4856 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
4901 il4965_desc_lookup(desc), desc, time, data1, data2, line); 4857 il4965_desc_lookup(desc), desc, time, data1, data2, line);
4902 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n"); 4858 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n");
4903 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", 4859 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc, blink1,
4904 pc, blink1, blink2, ilink1, ilink2, hcmd); 4860 blink2, ilink1, ilink2, hcmd);
4905} 4861}
4906 4862
4907static void il4965_rf_kill_ct_config(struct il_priv *il) 4863static void
4864il4965_rf_kill_ct_config(struct il_priv *il)
4908{ 4865{
4909 struct il_ct_kill_config cmd; 4866 struct il_ct_kill_config cmd;
4910 unsigned long flags; 4867 unsigned long flags;
@@ -4912,21 +4869,19 @@ static void il4965_rf_kill_ct_config(struct il_priv *il)
4912 4869
4913 spin_lock_irqsave(&il->lock, flags); 4870 spin_lock_irqsave(&il->lock, flags);
4914 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, 4871 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
4915 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 4872 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4916 spin_unlock_irqrestore(&il->lock, flags); 4873 spin_unlock_irqrestore(&il->lock, flags);
4917 4874
4918 cmd.critical_temperature_R = 4875 cmd.critical_temperature_R =
4919 cpu_to_le32(il->hw_params.ct_kill_threshold); 4876 cpu_to_le32(il->hw_params.ct_kill_threshold);
4920 4877
4921 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, 4878 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd);
4922 sizeof(cmd), &cmd);
4923 if (ret) 4879 if (ret)
4924 IL_ERR("C_CT_KILL_CONFIG failed\n"); 4880 IL_ERR("C_CT_KILL_CONFIG failed\n");
4925 else 4881 else
4926 D_INFO("C_CT_KILL_CONFIG " 4882 D_INFO("C_CT_KILL_CONFIG " "succeeded, "
4927 "succeeded, " 4883 "critical temperature is %d\n",
4928 "critical temperature is %d\n", 4884 il->hw_params.ct_kill_threshold);
4929 il->hw_params.ct_kill_threshold);
4930} 4885}
4931 4886
4932static const s8 default_queue_to_tx_fifo[] = { 4887static const s8 default_queue_to_tx_fifo[] = {
@@ -4941,7 +4896,8 @@ static const s8 default_queue_to_tx_fifo[] = {
4941 4896
4942#define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) 4897#define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
4943 4898
4944static int il4965_alive_notify(struct il_priv *il) 4899static int
4900il4965_alive_notify(struct il_priv *il)
4945{ 4901{
4946 u32 a; 4902 u32 a;
4947 unsigned long flags; 4903 unsigned long flags;
@@ -4951,32 +4907,32 @@ static int il4965_alive_notify(struct il_priv *il)
4951 spin_lock_irqsave(&il->lock, flags); 4907 spin_lock_irqsave(&il->lock, flags);
4952 4908
4953 /* Clear 4965's internal Tx Scheduler data base */ 4909 /* Clear 4965's internal Tx Scheduler data base */
4954 il->scd_base_addr = il_rd_prph(il, 4910 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR);
4955 IL49_SCD_SRAM_BASE_ADDR);
4956 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET; 4911 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET;
4957 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) 4912 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
4958 il_write_targ_mem(il, a, 0); 4913 il_write_targ_mem(il, a, 0);
4959 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) 4914 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
4960 il_write_targ_mem(il, a, 0); 4915 il_write_targ_mem(il, a, 0);
4961 for (; a < il->scd_base_addr + 4916 for (;
4962 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num); a += 4) 4917 a <
4918 il->scd_base_addr +
4919 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num);
4920 a += 4)
4963 il_write_targ_mem(il, a, 0); 4921 il_write_targ_mem(il, a, 0);
4964 4922
4965 /* Tel 4965 where to find Tx byte count tables */ 4923 /* Tel 4965 where to find Tx byte count tables */
4966 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, 4924 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10);
4967 il->scd_bc_tbls.dma >> 10);
4968 4925
4969 /* Enable DMA channel */ 4926 /* Enable DMA channel */
4970 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++) 4927 for (chan = 0; chan < FH49_TCSR_CHNL_NUM; chan++)
4971 il_wr(il, 4928 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan),
4972 FH49_TCSR_CHNL_TX_CONFIG_REG(chan), 4929 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
4973 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 4930 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
4974 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
4975 4931
4976 /* Update FH chicken bits */ 4932 /* Update FH chicken bits */
4977 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG); 4933 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG);
4978 il_wr(il, FH49_TX_CHICKEN_BITS_REG, 4934 il_wr(il, FH49_TX_CHICKEN_BITS_REG,
4979 reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); 4935 reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
4980 4936
4981 /* Disable chain mode for all queues */ 4937 /* Disable chain mode for all queues */
4982 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0); 4938 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0);
@@ -4989,23 +4945,25 @@ static int il4965_alive_notify(struct il_priv *il)
4989 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8)); 4945 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8));
4990 4946
4991 /* Max Tx Window size for Scheduler-ACK mode */ 4947 /* Max Tx Window size for Scheduler-ACK mode */
4992 il_write_targ_mem(il, il->scd_base_addr + 4948 il_write_targ_mem(il,
4993 IL49_SCD_CONTEXT_QUEUE_OFFSET(i), 4949 il->scd_base_addr +
4994 (SCD_WIN_SIZE << 4950 IL49_SCD_CONTEXT_QUEUE_OFFSET(i),
4995 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 4951 (SCD_WIN_SIZE <<
4996 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 4952 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4953 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4997 4954
4998 /* Frame limit */ 4955 /* Frame limit */
4999 il_write_targ_mem(il, il->scd_base_addr + 4956 il_write_targ_mem(il,
5000 IL49_SCD_CONTEXT_QUEUE_OFFSET(i) + 4957 il->scd_base_addr +
5001 sizeof(u32), 4958 IL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
5002 (SCD_FRAME_LIMIT << 4959 sizeof(u32),
5003 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & 4960 (SCD_FRAME_LIMIT <<
5004 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 4961 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
4962 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
5005 4963
5006 } 4964 }
5007 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK, 4965 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK,
5008 (1 << il->hw_params.max_txq_num) - 1); 4966 (1 << il->hw_params.max_txq_num) - 1);
5009 4967
5010 /* Activate all Tx DMA/FIFO channels */ 4968 /* Activate all Tx DMA/FIFO channels */
5011 il4965_txq_set_sched(il, IL_MASK(0, 6)); 4969 il4965_txq_set_sched(il, IL_MASK(0, 6));
@@ -5043,7 +5001,8 @@ static int il4965_alive_notify(struct il_priv *il)
5043 * from protocol/runtime uCode (initialization uCode's 5001 * from protocol/runtime uCode (initialization uCode's
5044 * Alive gets handled by il_init_alive_start()). 5002 * Alive gets handled by il_init_alive_start()).
5045 */ 5003 */
5046static void il4965_alive_start(struct il_priv *il) 5004static void
5005il4965_alive_start(struct il_priv *il)
5047{ 5006{
5048 int ret = 0; 5007 int ret = 0;
5049 struct il_rxon_context *ctx = &il->ctx; 5008 struct il_rxon_context *ctx = &il->ctx;
@@ -5069,12 +5028,10 @@ static void il4965_alive_start(struct il_priv *il)
5069 5028
5070 ret = il4965_alive_notify(il); 5029 ret = il4965_alive_notify(il);
5071 if (ret) { 5030 if (ret) {
5072 IL_WARN( 5031 IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret);
5073 "Could not complete ALIVE transition [ntf]: %d\n", ret);
5074 goto restart; 5032 goto restart;
5075 } 5033 }
5076 5034
5077
5078 /* After the ALIVE response, we can send host commands to the uCode */ 5035 /* After the ALIVE response, we can send host commands to the uCode */
5079 set_bit(S_ALIVE, &il->status); 5036 set_bit(S_ALIVE, &il->status);
5080 5037
@@ -5090,7 +5047,7 @@ static void il4965_alive_start(struct il_priv *il)
5090 5047
5091 if (il_is_associated_ctx(ctx)) { 5048 if (il_is_associated_ctx(ctx)) {
5092 struct il_rxon_cmd *active_rxon = 5049 struct il_rxon_cmd *active_rxon =
5093 (struct il_rxon_cmd *)&ctx->active; 5050 (struct il_rxon_cmd *)&ctx->active;
5094 /* apply any changes in staging */ 5051 /* apply any changes in staging */
5095 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 5052 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
5096 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 5053 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
@@ -5123,13 +5080,14 @@ static void il4965_alive_start(struct il_priv *il)
5123 5080
5124 return; 5081 return;
5125 5082
5126 restart: 5083restart:
5127 queue_work(il->workqueue, &il->restart); 5084 queue_work(il->workqueue, &il->restart);
5128} 5085}
5129 5086
5130static void il4965_cancel_deferred_work(struct il_priv *il); 5087static void il4965_cancel_deferred_work(struct il_priv *il);
5131 5088
5132static void __il4965_down(struct il_priv *il) 5089static void
5090__il4965_down(struct il_priv *il)
5133{ 5091{
5134 unsigned long flags; 5092 unsigned long flags;
5135 int exit_pending; 5093 int exit_pending;
@@ -5171,25 +5129,28 @@ static void __il4965_down(struct il_priv *il)
5171 /* If we have not previously called il_init() then 5129 /* If we have not previously called il_init() then
5172 * clear all bits but the RF Kill bit and return */ 5130 * clear all bits but the RF Kill bit and return */
5173 if (!il_is_init(il)) { 5131 if (!il_is_init(il)) {
5174 il->status = test_bit(S_RF_KILL_HW, &il->status) << 5132 il->status =
5175 S_RF_KILL_HW | 5133 test_bit(S_RF_KILL_HW,
5176 test_bit(S_GEO_CONFIGURED, &il->status) << 5134 &il->
5177 S_GEO_CONFIGURED | 5135 status) << S_RF_KILL_HW |
5178 test_bit(S_EXIT_PENDING, &il->status) << 5136 test_bit(S_GEO_CONFIGURED,
5179 S_EXIT_PENDING; 5137 &il->
5138 status) << S_GEO_CONFIGURED |
5139 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5180 goto exit; 5140 goto exit;
5181 } 5141 }
5182 5142
5183 /* ...otherwise clear out all the status bits but the RF Kill 5143 /* ...otherwise clear out all the status bits but the RF Kill
5184 * bit and continue taking the NIC down. */ 5144 * bit and continue taking the NIC down. */
5185 il->status &= test_bit(S_RF_KILL_HW, &il->status) << 5145 il->status &=
5186 S_RF_KILL_HW | 5146 test_bit(S_RF_KILL_HW,
5187 test_bit(S_GEO_CONFIGURED, &il->status) << 5147 &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED,
5188 S_GEO_CONFIGURED | 5148 &il->
5189 test_bit(S_FW_ERROR, &il->status) << 5149 status) <<
5190 S_FW_ERROR | 5150 S_GEO_CONFIGURED | test_bit(S_FW_ERROR,
5191 test_bit(S_EXIT_PENDING, &il->status) << 5151 &il->
5192 S_EXIT_PENDING; 5152 status) << S_FW_ERROR |
5153 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5193 5154
5194 il4965_txq_ctx_stop(il); 5155 il4965_txq_ctx_stop(il);
5195 il4965_rxq_stop(il); 5156 il4965_rxq_stop(il);
@@ -5199,13 +5160,12 @@ static void __il4965_down(struct il_priv *il)
5199 udelay(5); 5160 udelay(5);
5200 5161
5201 /* Make sure (redundant) we've released our request to stay awake */ 5162 /* Make sure (redundant) we've released our request to stay awake */
5202 il_clear_bit(il, CSR_GP_CNTRL, 5163 il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5203 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5204 5164
5205 /* Stop the device, and put it in low power state */ 5165 /* Stop the device, and put it in low power state */
5206 il_apm_stop(il); 5166 il_apm_stop(il);
5207 5167
5208 exit: 5168exit:
5209 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); 5169 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
5210 5170
5211 dev_kfree_skb(il->beacon_skb); 5171 dev_kfree_skb(il->beacon_skb);
@@ -5215,7 +5175,8 @@ static void __il4965_down(struct il_priv *il)
5215 il4965_clear_free_frames(il); 5175 il4965_clear_free_frames(il);
5216} 5176}
5217 5177
5218static void il4965_down(struct il_priv *il) 5178static void
5179il4965_down(struct il_priv *il)
5219{ 5180{
5220 mutex_lock(&il->mutex); 5181 mutex_lock(&il->mutex);
5221 __il4965_down(il); 5182 __il4965_down(il);
@@ -5226,29 +5187,30 @@ static void il4965_down(struct il_priv *il)
5226 5187
5227#define HW_READY_TIMEOUT (50) 5188#define HW_READY_TIMEOUT (50)
5228 5189
5229static int il4965_set_hw_ready(struct il_priv *il) 5190static int
5191il4965_set_hw_ready(struct il_priv *il)
5230{ 5192{
5231 int ret = 0; 5193 int ret = 0;
5232 5194
5233 il_set_bit(il, CSR_HW_IF_CONFIG_REG, 5195 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
5234 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY); 5196 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
5235 5197
5236 /* See if we got it */ 5198 /* See if we got it */
5237 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, 5199 ret =
5238 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 5200 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5239 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 5201 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5240 HW_READY_TIMEOUT); 5202 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, HW_READY_TIMEOUT);
5241 if (ret != -ETIMEDOUT) 5203 if (ret != -ETIMEDOUT)
5242 il->hw_ready = true; 5204 il->hw_ready = true;
5243 else 5205 else
5244 il->hw_ready = false; 5206 il->hw_ready = false;
5245 5207
5246 D_INFO("hardware %s\n", 5208 D_INFO("hardware %s\n", (il->hw_ready == 1) ? "ready" : "not ready");
5247 (il->hw_ready == 1) ? "ready" : "not ready");
5248 return ret; 5209 return ret;
5249} 5210}
5250 5211
5251static int il4965_prepare_card_hw(struct il_priv *il) 5212static int
5213il4965_prepare_card_hw(struct il_priv *il)
5252{ 5214{
5253 int ret = 0; 5215 int ret = 0;
5254 5216
@@ -5259,12 +5221,12 @@ static int il4965_prepare_card_hw(struct il_priv *il)
5259 return ret; 5221 return ret;
5260 5222
5261 /* If HW is not ready, prepare the conditions to check again */ 5223 /* If HW is not ready, prepare the conditions to check again */
5262 il_set_bit(il, CSR_HW_IF_CONFIG_REG, 5224 il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE);
5263 CSR_HW_IF_CONFIG_REG_PREPARE);
5264 5225
5265 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, 5226 ret =
5266 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 5227 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5267 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000); 5228 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
5229 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
5268 5230
5269 /* HW should be ready by now, check again. */ 5231 /* HW should be ready by now, check again. */
5270 if (ret != -ETIMEDOUT) 5232 if (ret != -ETIMEDOUT)
@@ -5275,7 +5237,8 @@ static int il4965_prepare_card_hw(struct il_priv *il)
5275 5237
5276#define MAX_HW_RESTARTS 5 5238#define MAX_HW_RESTARTS 5
5277 5239
5278static int __il4965_up(struct il_priv *il) 5240static int
5241__il4965_up(struct il_priv *il)
5279{ 5242{
5280 int i; 5243 int i;
5281 int ret; 5244 int ret;
@@ -5304,8 +5267,7 @@ static int __il4965_up(struct il_priv *il)
5304 } 5267 }
5305 5268
5306 /* If platform's RF_KILL switch is NOT set to KILL */ 5269 /* If platform's RF_KILL switch is NOT set to KILL */
5307 if (_il_rd(il, 5270 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5308 CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5309 clear_bit(S_RF_KILL_HW, &il->status); 5271 clear_bit(S_RF_KILL_HW, &il->status);
5310 else 5272 else
5311 set_bit(S_RF_KILL_HW, &il->status); 5273 set_bit(S_RF_KILL_HW, &il->status);
@@ -5331,8 +5293,7 @@ static int __il4965_up(struct il_priv *il)
5331 5293
5332 /* make sure rfkill handshake bits are cleared */ 5294 /* make sure rfkill handshake bits are cleared */
5333 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 5295 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5334 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, 5296 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5335 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5336 5297
5337 /* clear (again), then enable host interrupts */ 5298 /* clear (again), then enable host interrupts */
5338 _il_wr(il, CSR_INT, 0xFFFFFFFF); 5299 _il_wr(il, CSR_INT, 0xFFFFFFFF);
@@ -5356,8 +5317,7 @@ static int __il4965_up(struct il_priv *il)
5356 ret = il->cfg->ops->lib->load_ucode(il); 5317 ret = il->cfg->ops->lib->load_ucode(il);
5357 5318
5358 if (ret) { 5319 if (ret) {
5359 IL_ERR("Unable to set up bootstrap uCode: %d\n", 5320 IL_ERR("Unable to set up bootstrap uCode: %d\n", ret);
5360 ret);
5361 continue; 5321 continue;
5362 } 5322 }
5363 5323
@@ -5379,14 +5339,14 @@ static int __il4965_up(struct il_priv *il)
5379 return -EIO; 5339 return -EIO;
5380} 5340}
5381 5341
5382
5383/***************************************************************************** 5342/*****************************************************************************
5384 * 5343 *
5385 * Workqueue callbacks 5344 * Workqueue callbacks
5386 * 5345 *
5387 *****************************************************************************/ 5346 *****************************************************************************/
5388 5347
5389static void il4965_bg_init_alive_start(struct work_struct *data) 5348static void
5349il4965_bg_init_alive_start(struct work_struct *data)
5390{ 5350{
5391 struct il_priv *il = 5351 struct il_priv *il =
5392 container_of(data, struct il_priv, init_alive_start.work); 5352 container_of(data, struct il_priv, init_alive_start.work);
@@ -5400,7 +5360,8 @@ out:
5400 mutex_unlock(&il->mutex); 5360 mutex_unlock(&il->mutex);
5401} 5361}
5402 5362
5403static void il4965_bg_alive_start(struct work_struct *data) 5363static void
5364il4965_bg_alive_start(struct work_struct *data)
5404{ 5365{
5405 struct il_priv *il = 5366 struct il_priv *il =
5406 container_of(data, struct il_priv, alive_start.work); 5367 container_of(data, struct il_priv, alive_start.work);
@@ -5414,10 +5375,11 @@ out:
5414 mutex_unlock(&il->mutex); 5375 mutex_unlock(&il->mutex);
5415} 5376}
5416 5377
5417static void il4965_bg_run_time_calib_work(struct work_struct *work) 5378static void
5379il4965_bg_run_time_calib_work(struct work_struct *work)
5418{ 5380{
5419 struct il_priv *il = container_of(work, struct il_priv, 5381 struct il_priv *il = container_of(work, struct il_priv,
5420 run_time_calib_work); 5382 run_time_calib_work);
5421 5383
5422 mutex_lock(&il->mutex); 5384 mutex_lock(&il->mutex);
5423 5385
@@ -5428,16 +5390,15 @@ static void il4965_bg_run_time_calib_work(struct work_struct *work)
5428 } 5390 }
5429 5391
5430 if (il->start_calib) { 5392 if (il->start_calib) {
5431 il4965_chain_noise_calibration(il, 5393 il4965_chain_noise_calibration(il, (void *)&il->_4965.stats);
5432 (void *)&il->_4965.stats); 5394 il4965_sensitivity_calibration(il, (void *)&il->_4965.stats);
5433 il4965_sensitivity_calibration(il,
5434 (void *)&il->_4965.stats);
5435 } 5395 }
5436 5396
5437 mutex_unlock(&il->mutex); 5397 mutex_unlock(&il->mutex);
5438} 5398}
5439 5399
5440static void il4965_bg_restart(struct work_struct *data) 5400static void
5401il4965_bg_restart(struct work_struct *data)
5441{ 5402{
5442 struct il_priv *il = container_of(data, struct il_priv, restart); 5403 struct il_priv *il = container_of(data, struct il_priv, restart);
5443 5404
@@ -5468,10 +5429,10 @@ static void il4965_bg_restart(struct work_struct *data)
5468 } 5429 }
5469} 5430}
5470 5431
5471static void il4965_bg_rx_replenish(struct work_struct *data) 5432static void
5433il4965_bg_rx_replenish(struct work_struct *data)
5472{ 5434{
5473 struct il_priv *il = 5435 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
5474 container_of(data, struct il_priv, rx_replenish);
5475 5436
5476 if (test_bit(S_EXIT_PENDING, &il->status)) 5437 if (test_bit(S_EXIT_PENDING, &il->status))
5477 return; 5438 return;
@@ -5493,8 +5454,8 @@ static void il4965_bg_rx_replenish(struct work_struct *data)
5493 * Not a mac80211 entry point function, but it fits in with all the 5454 * Not a mac80211 entry point function, but it fits in with all the
5494 * other mac80211 functions grouped here. 5455 * other mac80211 functions grouped here.
5495 */ 5456 */
5496static int il4965_mac_setup_register(struct il_priv *il, 5457static int
5497 u32 max_probe_length) 5458il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length)
5498{ 5459{
5499 int ret; 5460 int ret;
5500 struct ieee80211_hw *hw = il->hw; 5461 struct ieee80211_hw *hw = il->hw;
@@ -5502,15 +5463,15 @@ static int il4965_mac_setup_register(struct il_priv *il,
5502 hw->rate_control_algorithm = "iwl-4965-rs"; 5463 hw->rate_control_algorithm = "iwl-4965-rs";
5503 5464
5504 /* Tell mac80211 our characteristics */ 5465 /* Tell mac80211 our characteristics */
5505 hw->flags = IEEE80211_HW_SIGNAL_DBM | 5466 hw->flags =
5506 IEEE80211_HW_AMPDU_AGGREGATION | 5467 IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_AMPDU_AGGREGATION |
5507 IEEE80211_HW_NEED_DTIM_PERIOD | 5468 IEEE80211_HW_NEED_DTIM_PERIOD | IEEE80211_HW_SPECTRUM_MGMT |
5508 IEEE80211_HW_SPECTRUM_MGMT | 5469 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
5509 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
5510 5470
5511 if (il->cfg->sku & IL_SKU_N) 5471 if (il->cfg->sku & IL_SKU_N)
5512 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | 5472 hw->flags |=
5513 IEEE80211_HW_SUPPORTS_STATIC_SMPS; 5473 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
5474 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
5514 5475
5515 hw->sta_data_size = sizeof(struct il_station_priv); 5476 hw->sta_data_size = sizeof(struct il_station_priv);
5516 hw->vif_data_size = sizeof(struct il_vif_priv); 5477 hw->vif_data_size = sizeof(struct il_vif_priv);
@@ -5518,8 +5479,8 @@ static int il4965_mac_setup_register(struct il_priv *il,
5518 hw->wiphy->interface_modes |= il->ctx.interface_modes; 5479 hw->wiphy->interface_modes |= il->ctx.interface_modes;
5519 hw->wiphy->interface_modes |= il->ctx.exclusive_interface_modes; 5480 hw->wiphy->interface_modes |= il->ctx.exclusive_interface_modes;
5520 5481
5521 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | 5482 hw->wiphy->flags |=
5522 WIPHY_FLAG_DISABLE_BEACON_HINTS; 5483 WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS;
5523 5484
5524 /* 5485 /*
5525 * For now, disable PS by default because it affects 5486 * For now, disable PS by default because it affects
@@ -5538,10 +5499,10 @@ static int il4965_mac_setup_register(struct il_priv *il,
5538 5499
5539 if (il->bands[IEEE80211_BAND_2GHZ].n_channels) 5500 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
5540 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 5501 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5541 &il->bands[IEEE80211_BAND_2GHZ]; 5502 &il->bands[IEEE80211_BAND_2GHZ];
5542 if (il->bands[IEEE80211_BAND_5GHZ].n_channels) 5503 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
5543 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 5504 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5544 &il->bands[IEEE80211_BAND_5GHZ]; 5505 &il->bands[IEEE80211_BAND_5GHZ];
5545 5506
5546 il_leds_init(il); 5507 il_leds_init(il);
5547 5508
@@ -5555,8 +5516,8 @@ static int il4965_mac_setup_register(struct il_priv *il,
5555 return 0; 5516 return 0;
5556} 5517}
5557 5518
5558 5519int
5559int il4965_mac_start(struct ieee80211_hw *hw) 5520il4965_mac_start(struct ieee80211_hw *hw)
5560{ 5521{
5561 struct il_priv *il = hw->priv; 5522 struct il_priv *il = hw->priv;
5562 int ret; 5523 int ret;
@@ -5579,8 +5540,8 @@ int il4965_mac_start(struct ieee80211_hw *hw)
5579 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from 5540 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5580 * mac80211 will not be run successfully. */ 5541 * mac80211 will not be run successfully. */
5581 ret = wait_event_timeout(il->wait_command_queue, 5542 ret = wait_event_timeout(il->wait_command_queue,
5582 test_bit(S_READY, &il->status), 5543 test_bit(S_READY, &il->status),
5583 UCODE_READY_TIMEOUT); 5544 UCODE_READY_TIMEOUT);
5584 if (!ret) { 5545 if (!ret) {
5585 if (!test_bit(S_READY, &il->status)) { 5546 if (!test_bit(S_READY, &il->status)) {
5586 IL_ERR("START_ALIVE timeout after %dms.\n", 5547 IL_ERR("START_ALIVE timeout after %dms.\n",
@@ -5597,7 +5558,8 @@ out:
5597 return 0; 5558 return 0;
5598} 5559}
5599 5560
5600void il4965_mac_stop(struct ieee80211_hw *hw) 5561void
5562il4965_mac_stop(struct ieee80211_hw *hw)
5601{ 5563{
5602 struct il_priv *il = hw->priv; 5564 struct il_priv *il = hw->priv;
5603 5565
@@ -5620,14 +5582,15 @@ void il4965_mac_stop(struct ieee80211_hw *hw)
5620 D_MAC80211("leave\n"); 5582 D_MAC80211("leave\n");
5621} 5583}
5622 5584
5623void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 5585void
5586il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
5624{ 5587{
5625 struct il_priv *il = hw->priv; 5588 struct il_priv *il = hw->priv;
5626 5589
5627 D_MACDUMP("enter\n"); 5590 D_MACDUMP("enter\n");
5628 5591
5629 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, 5592 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
5630 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); 5593 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
5631 5594
5632 if (il4965_tx_skb(il, skb)) 5595 if (il4965_tx_skb(il, skb))
5633 dev_kfree_skb_any(skb); 5596 dev_kfree_skb_any(skb);
@@ -5635,26 +5598,26 @@ void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
5635 D_MACDUMP("leave\n"); 5598 D_MACDUMP("leave\n");
5636} 5599}
5637 5600
5638void il4965_mac_update_tkip_key(struct ieee80211_hw *hw, 5601void
5639 struct ieee80211_vif *vif, 5602il4965_mac_update_tkip_key(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5640 struct ieee80211_key_conf *keyconf, 5603 struct ieee80211_key_conf *keyconf,
5641 struct ieee80211_sta *sta, 5604 struct ieee80211_sta *sta, u32 iv32, u16 * phase1key)
5642 u32 iv32, u16 *phase1key)
5643{ 5605{
5644 struct il_priv *il = hw->priv; 5606 struct il_priv *il = hw->priv;
5645 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 5607 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
5646 5608
5647 D_MAC80211("enter\n"); 5609 D_MAC80211("enter\n");
5648 5610
5649 il4965_update_tkip_key(il, vif_priv->ctx, keyconf, sta, 5611 il4965_update_tkip_key(il, vif_priv->ctx, keyconf, sta, iv32,
5650 iv32, phase1key); 5612 phase1key);
5651 5613
5652 D_MAC80211("leave\n"); 5614 D_MAC80211("leave\n");
5653} 5615}
5654 5616
5655int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 5617int
5656 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 5618il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5657 struct ieee80211_key_conf *key) 5619 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
5620 struct ieee80211_key_conf *key)
5658{ 5621{
5659 struct il_priv *il = hw->priv; 5622 struct il_priv *il = hw->priv;
5660 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 5623 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
@@ -5684,23 +5647,23 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5684 * In legacy wep mode, we use another host command to the uCode. 5647 * In legacy wep mode, we use another host command to the uCode.
5685 */ 5648 */
5686 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || 5649 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
5687 key->cipher == WLAN_CIPHER_SUITE_WEP104) && 5650 key->cipher == WLAN_CIPHER_SUITE_WEP104) && !sta) {
5688 !sta) {
5689 if (cmd == SET_KEY) 5651 if (cmd == SET_KEY)
5690 is_default_wep_key = !ctx->key_mapping_keys; 5652 is_default_wep_key = !ctx->key_mapping_keys;
5691 else 5653 else
5692 is_default_wep_key = 5654 is_default_wep_key =
5693 (key->hw_key_idx == HW_KEY_DEFAULT); 5655 (key->hw_key_idx == HW_KEY_DEFAULT);
5694 } 5656 }
5695 5657
5696 switch (cmd) { 5658 switch (cmd) {
5697 case SET_KEY: 5659 case SET_KEY:
5698 if (is_default_wep_key) 5660 if (is_default_wep_key)
5699 ret = il4965_set_default_wep_key(il, 5661 ret =
5700 vif_priv->ctx, key); 5662 il4965_set_default_wep_key(il, vif_priv->ctx, key);
5701 else 5663 else
5702 ret = il4965_set_dynamic_key(il, vif_priv->ctx, 5664 ret =
5703 key, sta_id); 5665 il4965_set_dynamic_key(il, vif_priv->ctx, key,
5666 sta_id);
5704 5667
5705 D_MAC80211("enable hwcrypto key\n"); 5668 D_MAC80211("enable hwcrypto key\n");
5706 break; 5669 break;
@@ -5708,8 +5671,7 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5708 if (is_default_wep_key) 5671 if (is_default_wep_key)
5709 ret = il4965_remove_default_wep_key(il, ctx, key); 5672 ret = il4965_remove_default_wep_key(il, ctx, key);
5710 else 5673 else
5711 ret = il4965_remove_dynamic_key(il, ctx, 5674 ret = il4965_remove_dynamic_key(il, ctx, key, sta_id);
5712 key, sta_id);
5713 5675
5714 D_MAC80211("disable hwcrypto key\n"); 5676 D_MAC80211("disable hwcrypto key\n");
5715 break; 5677 break;
@@ -5723,17 +5685,16 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5723 return ret; 5685 return ret;
5724} 5686}
5725 5687
5726int il4965_mac_ampdu_action(struct ieee80211_hw *hw, 5688int
5727 struct ieee80211_vif *vif, 5689il4965_mac_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5728 enum ieee80211_ampdu_mlme_action action, 5690 enum ieee80211_ampdu_mlme_action action,
5729 struct ieee80211_sta *sta, u16 tid, u16 *ssn, 5691 struct ieee80211_sta *sta, u16 tid, u16 * ssn,
5730 u8 buf_size) 5692 u8 buf_size)
5731{ 5693{
5732 struct il_priv *il = hw->priv; 5694 struct il_priv *il = hw->priv;
5733 int ret = -EINVAL; 5695 int ret = -EINVAL;
5734 5696
5735 D_HT("A-MPDU action on addr %pM tid %d\n", 5697 D_HT("A-MPDU action on addr %pM tid %d\n", sta->addr, tid);
5736 sta->addr, tid);
5737 5698
5738 if (!(il->cfg->sku & IL_SKU_N)) 5699 if (!(il->cfg->sku & IL_SKU_N))
5739 return -EACCES; 5700 return -EACCES;
@@ -5770,9 +5731,9 @@ int il4965_mac_ampdu_action(struct ieee80211_hw *hw,
5770 return ret; 5731 return ret;
5771} 5732}
5772 5733
5773int il4965_mac_sta_add(struct ieee80211_hw *hw, 5734int
5774 struct ieee80211_vif *vif, 5735il4965_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5775 struct ieee80211_sta *sta) 5736 struct ieee80211_sta *sta)
5776{ 5737{
5777 struct il_priv *il = hw->priv; 5738 struct il_priv *il = hw->priv;
5778 struct il_station_priv *sta_priv = (void *)sta->drv_priv; 5739 struct il_station_priv *sta_priv = (void *)sta->drv_priv;
@@ -5781,20 +5742,18 @@ int il4965_mac_sta_add(struct ieee80211_hw *hw,
5781 int ret; 5742 int ret;
5782 u8 sta_id; 5743 u8 sta_id;
5783 5744
5784 D_INFO("received request to add station %pM\n", 5745 D_INFO("received request to add station %pM\n", sta->addr);
5785 sta->addr);
5786 mutex_lock(&il->mutex); 5746 mutex_lock(&il->mutex);
5787 D_INFO("proceeding to add station %pM\n", 5747 D_INFO("proceeding to add station %pM\n", sta->addr);
5788 sta->addr);
5789 sta_priv->common.sta_id = IL_INVALID_STATION; 5748 sta_priv->common.sta_id = IL_INVALID_STATION;
5790 5749
5791 atomic_set(&sta_priv->pending_frames, 0); 5750 atomic_set(&sta_priv->pending_frames, 0);
5792 5751
5793 ret = il_add_station_common(il, vif_priv->ctx, sta->addr, 5752 ret =
5794 is_ap, sta, &sta_id); 5753 il_add_station_common(il, vif_priv->ctx, sta->addr, is_ap, sta,
5754 &sta_id);
5795 if (ret) { 5755 if (ret) {
5796 IL_ERR("Unable to add station %pM (%d)\n", 5756 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
5797 sta->addr, ret);
5798 /* Should we return success if return code is EEXIST ? */ 5757 /* Should we return success if return code is EEXIST ? */
5799 mutex_unlock(&il->mutex); 5758 mutex_unlock(&il->mutex);
5800 return ret; 5759 return ret;
@@ -5803,16 +5762,16 @@ int il4965_mac_sta_add(struct ieee80211_hw *hw,
5803 sta_priv->common.sta_id = sta_id; 5762 sta_priv->common.sta_id = sta_id;
5804 5763
5805 /* Initialize rate scaling */ 5764 /* Initialize rate scaling */
5806 D_INFO("Initializing rate scaling for station %pM\n", 5765 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
5807 sta->addr);
5808 il4965_rs_rate_init(il, sta, sta_id); 5766 il4965_rs_rate_init(il, sta, sta_id);
5809 mutex_unlock(&il->mutex); 5767 mutex_unlock(&il->mutex);
5810 5768
5811 return 0; 5769 return 0;
5812} 5770}
5813 5771
5814void il4965_mac_channel_switch(struct ieee80211_hw *hw, 5772void
5815 struct ieee80211_channel_switch *ch_switch) 5773il4965_mac_channel_switch(struct ieee80211_hw *hw,
5774 struct ieee80211_channel_switch *ch_switch)
5816{ 5775{
5817 struct il_priv *il = hw->priv; 5776 struct il_priv *il = hw->priv;
5818 const struct il_channel_info *ch_info; 5777 const struct il_channel_info *ch_info;
@@ -5860,15 +5819,15 @@ void il4965_mac_channel_switch(struct ieee80211_hw *hw,
5860 if (ctx->ht.enabled) { 5819 if (ctx->ht.enabled) {
5861 if (conf_is_ht40_minus(conf)) { 5820 if (conf_is_ht40_minus(conf)) {
5862 ctx->ht.extension_chan_offset = 5821 ctx->ht.extension_chan_offset =
5863 IEEE80211_HT_PARAM_CHA_SEC_BELOW; 5822 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
5864 ctx->ht.is_40mhz = true; 5823 ctx->ht.is_40mhz = true;
5865 } else if (conf_is_ht40_plus(conf)) { 5824 } else if (conf_is_ht40_plus(conf)) {
5866 ctx->ht.extension_chan_offset = 5825 ctx->ht.extension_chan_offset =
5867 IEEE80211_HT_PARAM_CHA_SEC_ABOVE; 5826 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
5868 ctx->ht.is_40mhz = true; 5827 ctx->ht.is_40mhz = true;
5869 } else { 5828 } else {
5870 ctx->ht.extension_chan_offset = 5829 ctx->ht.extension_chan_offset =
5871 IEEE80211_HT_PARAM_CHA_SEC_NONE; 5830 IEEE80211_HT_PARAM_CHA_SEC_NONE;
5872 ctx->ht.is_40mhz = false; 5831 ctx->ht.is_40mhz = false;
5873 } 5832 }
5874 } else 5833 } else
@@ -5901,10 +5860,9 @@ out:
5901 D_MAC80211("leave\n"); 5860 D_MAC80211("leave\n");
5902} 5861}
5903 5862
5904void il4965_configure_filter(struct ieee80211_hw *hw, 5863void
5905 unsigned int changed_flags, 5864il4965_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
5906 unsigned int *total_flags, 5865 unsigned int *total_flags, u64 multicast)
5907 u64 multicast)
5908{ 5866{
5909 struct il_priv *il = hw->priv; 5867 struct il_priv *il = hw->priv;
5910 __le32 filter_or = 0, filter_nand = 0; 5868 __le32 filter_or = 0, filter_nand = 0;
@@ -5916,8 +5874,8 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
5916 filter_nand |= (flag); \ 5874 filter_nand |= (flag); \
5917 } while (0) 5875 } while (0)
5918 5876
5919 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", 5877 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
5920 changed_flags, *total_flags); 5878 *total_flags);
5921 5879
5922 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); 5880 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
5923 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */ 5881 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
@@ -5944,8 +5902,9 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
5944 * since we currently do not support programming multicast 5902 * since we currently do not support programming multicast
5945 * filters into the device. 5903 * filters into the device.
5946 */ 5904 */
5947 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | 5905 *total_flags &=
5948 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 5906 FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
5907 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
5949} 5908}
5950 5909
5951/***************************************************************************** 5910/*****************************************************************************
@@ -5954,10 +5913,11 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
5954 * 5913 *
5955 *****************************************************************************/ 5914 *****************************************************************************/
5956 5915
5957static void il4965_bg_txpower_work(struct work_struct *work) 5916static void
5917il4965_bg_txpower_work(struct work_struct *work)
5958{ 5918{
5959 struct il_priv *il = container_of(work, struct il_priv, 5919 struct il_priv *il = container_of(work, struct il_priv,
5960 txpower_work); 5920 txpower_work);
5961 5921
5962 mutex_lock(&il->mutex); 5922 mutex_lock(&il->mutex);
5963 5923
@@ -5981,7 +5941,8 @@ out:
5981 mutex_unlock(&il->mutex); 5941 mutex_unlock(&il->mutex);
5982} 5942}
5983 5943
5984static void il4965_setup_deferred_work(struct il_priv *il) 5944static void
5945il4965_setup_deferred_work(struct il_priv *il)
5985{ 5946{
5986 il->workqueue = create_singlethread_workqueue(DRV_NAME); 5947 il->workqueue = create_singlethread_workqueue(DRV_NAME);
5987 5948
@@ -6005,11 +5966,13 @@ static void il4965_setup_deferred_work(struct il_priv *il)
6005 il->watchdog.data = (unsigned long)il; 5966 il->watchdog.data = (unsigned long)il;
6006 il->watchdog.function = il_bg_watchdog; 5967 il->watchdog.function = il_bg_watchdog;
6007 5968
6008 tasklet_init(&il->irq_tasklet, (void (*)(unsigned long)) 5969 tasklet_init(&il->irq_tasklet,
6009 il4965_irq_tasklet, (unsigned long)il); 5970 (void (*)(unsigned long))il4965_irq_tasklet,
5971 (unsigned long)il);
6010} 5972}
6011 5973
6012static void il4965_cancel_deferred_work(struct il_priv *il) 5974static void
5975il4965_cancel_deferred_work(struct il_priv *il)
6013{ 5976{
6014 cancel_work_sync(&il->txpower_work); 5977 cancel_work_sync(&il->txpower_work);
6015 cancel_delayed_work_sync(&il->init_alive_start); 5978 cancel_delayed_work_sync(&il->init_alive_start);
@@ -6021,14 +5984,14 @@ static void il4965_cancel_deferred_work(struct il_priv *il)
6021 del_timer_sync(&il->stats_periodic); 5984 del_timer_sync(&il->stats_periodic);
6022} 5985}
6023 5986
6024static void il4965_init_hw_rates(struct il_priv *il, 5987static void
6025 struct ieee80211_rate *rates) 5988il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
6026{ 5989{
6027 int i; 5990 int i;
6028 5991
6029 for (i = 0; i < RATE_COUNT_LEGACY; i++) { 5992 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
6030 rates[i].bitrate = il_rates[i].ieee * 5; 5993 rates[i].bitrate = il_rates[i].ieee * 5;
6031 rates[i].hw_value = i; /* Rate scaling will work on idxes */ 5994 rates[i].hw_value = i; /* Rate scaling will work on idxes */
6032 rates[i].hw_value_short = i; 5995 rates[i].hw_value_short = i;
6033 rates[i].flags = 0; 5996 rates[i].flags = 0;
6034 if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) { 5997 if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) {
@@ -6036,24 +5999,25 @@ static void il4965_init_hw_rates(struct il_priv *il,
6036 * If CCK != 1M then set short preamble rate flag. 5999 * If CCK != 1M then set short preamble rate flag.
6037 */ 6000 */
6038 rates[i].flags |= 6001 rates[i].flags |=
6039 (il_rates[i].plcp == RATE_1M_PLCP) ? 6002 (il_rates[i].plcp ==
6040 0 : IEEE80211_RATE_SHORT_PREAMBLE; 6003 RATE_1M_PLCP) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
6041 } 6004 }
6042 } 6005 }
6043} 6006}
6007
6044/* 6008/*
6045 * Acquire il->lock before calling this function ! 6009 * Acquire il->lock before calling this function !
6046 */ 6010 */
6047void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx) 6011void
6012il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx)
6048{ 6013{
6049 il_wr(il, HBUS_TARG_WRPTR, 6014 il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8));
6050 (idx & 0xff) | (txq_id << 8));
6051 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx); 6015 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx);
6052} 6016}
6053 6017
6054void il4965_tx_queue_set_status(struct il_priv *il, 6018void
6055 struct il_tx_queue *txq, 6019il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq,
6056 int tx_fifo_id, int scd_retry) 6020 int tx_fifo_id, int scd_retry)
6057{ 6021{
6058 int txq_id = txq->q.id; 6022 int txq_id = txq->q.id;
6059 6023
@@ -6062,21 +6026,22 @@ void il4965_tx_queue_set_status(struct il_priv *il,
6062 6026
6063 /* Set up and activate */ 6027 /* Set up and activate */
6064 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), 6028 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
6065 (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | 6029 (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | (tx_fifo_id
6066 (tx_fifo_id << IL49_SCD_QUEUE_STTS_REG_POS_TXF) | 6030 <<
6067 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) | 6031 IL49_SCD_QUEUE_STTS_REG_POS_TXF)
6068 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) | 6032 | (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) | (scd_retry
6069 IL49_SCD_QUEUE_STTS_REG_MSK); 6033 <<
6034 IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK)
6035 | IL49_SCD_QUEUE_STTS_REG_MSK);
6070 6036
6071 txq->sched_retry = scd_retry; 6037 txq->sched_retry = scd_retry;
6072 6038
6073 D_INFO("%s %s Queue %d on AC %d\n", 6039 D_INFO("%s %s Queue %d on AC %d\n", active ? "Activate" : "Deactivate",
6074 active ? "Activate" : "Deactivate", 6040 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
6075 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
6076} 6041}
6077 6042
6078 6043static int
6079static int il4965_init_drv(struct il_priv *il) 6044il4965_init_drv(struct il_priv *il)
6080{ 6045{
6081 int ret; 6046 int ret;
6082 6047
@@ -6100,8 +6065,7 @@ static int il4965_init_drv(struct il_priv *il)
6100 6065
6101 /* Choose which receivers/antennas to use */ 6066 /* Choose which receivers/antennas to use */
6102 if (il->cfg->ops->hcmd->set_rxon_chain) 6067 if (il->cfg->ops->hcmd->set_rxon_chain)
6103 il->cfg->ops->hcmd->set_rxon_chain(il, 6068 il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
6104 &il->ctx);
6105 6069
6106 il_init_scan_params(il); 6070 il_init_scan_params(il);
6107 6071
@@ -6126,7 +6090,8 @@ err:
6126 return ret; 6090 return ret;
6127} 6091}
6128 6092
6129static void il4965_uninit_drv(struct il_priv *il) 6093static void
6094il4965_uninit_drv(struct il_priv *il)
6130{ 6095{
6131 il4965_calib_free_results(il); 6096 il4965_calib_free_results(il);
6132 il_free_geos(il); 6097 il_free_geos(il);
@@ -6134,7 +6099,8 @@ static void il4965_uninit_drv(struct il_priv *il)
6134 kfree(il->scan_cmd); 6099 kfree(il->scan_cmd);
6135} 6100}
6136 6101
6137static void il4965_hw_detect(struct il_priv *il) 6102static void
6103il4965_hw_detect(struct il_priv *il)
6138{ 6104{
6139 il->hw_rev = _il_rd(il, CSR_HW_REV); 6105 il->hw_rev = _il_rd(il, CSR_HW_REV);
6140 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG); 6106 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG);
@@ -6142,7 +6108,8 @@ static void il4965_hw_detect(struct il_priv *il)
6142 D_INFO("HW Revision ID = 0x%X\n", il->rev_id); 6108 D_INFO("HW Revision ID = 0x%X\n", il->rev_id);
6143} 6109}
6144 6110
6145static int il4965_set_hw_params(struct il_priv *il) 6111static int
6112il4965_set_hw_params(struct il_priv *il)
6146{ 6113{
6147 il->hw_params.max_rxq_size = RX_QUEUE_SIZE; 6114 il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
6148 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; 6115 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
@@ -6205,10 +6172,8 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6205 il->ctx.wep_key_cmd = C_WEPKEY; 6172 il->ctx.wep_key_cmd = C_WEPKEY;
6206 il->ctx.ac_to_fifo = il4965_bss_ac_to_fifo; 6173 il->ctx.ac_to_fifo = il4965_bss_ac_to_fifo;
6207 il->ctx.ac_to_queue = il4965_bss_ac_to_queue; 6174 il->ctx.ac_to_queue = il4965_bss_ac_to_queue;
6208 il->ctx.exclusive_interface_modes = 6175 il->ctx.exclusive_interface_modes = BIT(NL80211_IFTYPE_ADHOC);
6209 BIT(NL80211_IFTYPE_ADHOC); 6176 il->ctx.interface_modes = BIT(NL80211_IFTYPE_STATION);
6210 il->ctx.interface_modes =
6211 BIT(NL80211_IFTYPE_STATION);
6212 il->ctx.ap_devtype = RXON_DEV_TYPE_AP; 6177 il->ctx.ap_devtype = RXON_DEV_TYPE_AP;
6213 il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS; 6178 il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
6214 il->ctx.station_devtype = RXON_DEV_TYPE_ESS; 6179 il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
@@ -6227,8 +6192,9 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6227 /************************** 6192 /**************************
6228 * 2. Initializing PCI bus 6193 * 2. Initializing PCI bus
6229 **************************/ 6194 **************************/
6230 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | 6195 pci_disable_link_state(pdev,
6231 PCIE_LINK_STATE_CLKPM); 6196 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
6197 PCIE_LINK_STATE_CLKPM);
6232 6198
6233 if (pci_enable_device(pdev)) { 6199 if (pci_enable_device(pdev)) {
6234 err = -ENODEV; 6200 err = -ENODEV;
@@ -6243,8 +6209,8 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6243 if (err) { 6209 if (err) {
6244 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 6210 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6245 if (!err) 6211 if (!err)
6246 err = pci_set_consistent_dma_mask(pdev, 6212 err =
6247 DMA_BIT_MASK(32)); 6213 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6248 /* both attempts failed: */ 6214 /* both attempts failed: */
6249 if (err) { 6215 if (err) {
6250 IL_WARN("No suitable DMA available.\n"); 6216 IL_WARN("No suitable DMA available.\n");
@@ -6258,7 +6224,6 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6258 6224
6259 pci_set_drvdata(pdev, il); 6225 pci_set_drvdata(pdev, il);
6260 6226
6261
6262 /*********************** 6227 /***********************
6263 * 3. Read REV register 6228 * 3. Read REV register
6264 ***********************/ 6229 ***********************/
@@ -6269,7 +6234,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6269 } 6234 }
6270 6235
6271 D_INFO("pci_resource_len = 0x%08llx\n", 6236 D_INFO("pci_resource_len = 0x%08llx\n",
6272 (unsigned long long) pci_resource_len(pdev, 0)); 6237 (unsigned long long)pci_resource_len(pdev, 0));
6273 D_INFO("pci_resource_base = %p\n", il->hw_base); 6238 D_INFO("pci_resource_base = %p\n", il->hw_base);
6274 6239
6275 /* these spin locks will be used in apm_ops.init and EEPROM access 6240 /* these spin locks will be used in apm_ops.init and EEPROM access
@@ -6286,8 +6251,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6286 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 6251 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6287 6252
6288 il4965_hw_detect(il); 6253 il4965_hw_detect(il);
6289 IL_INFO("Detected %s, REV=0x%X\n", 6254 IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev);
6290 il->cfg->name, il->hw_rev);
6291 6255
6292 /* We disable the RETRY_TIMEOUT register (0x41) to keep 6256 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6293 * PCI Tx retries from interfering with C3 CPU state */ 6257 * PCI Tx retries from interfering with C3 CPU state */
@@ -6347,8 +6311,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6347 6311
6348 pci_enable_msi(il->pci_dev); 6312 pci_enable_msi(il->pci_dev);
6349 6313
6350 err = request_irq(il->pci_dev->irq, il_isr, 6314 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
6351 IRQF_SHARED, DRV_NAME, il);
6352 if (err) { 6315 if (err) {
6353 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); 6316 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
6354 goto out_disable_msi; 6317 goto out_disable_msi;
@@ -6371,14 +6334,13 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6371 il_enable_rfkill_int(il); 6334 il_enable_rfkill_int(il);
6372 6335
6373 /* If platform's RF_KILL switch is NOT set to KILL */ 6336 /* If platform's RF_KILL switch is NOT set to KILL */
6374 if (_il_rd(il, CSR_GP_CNTRL) & 6337 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6375 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6376 clear_bit(S_RF_KILL_HW, &il->status); 6338 clear_bit(S_RF_KILL_HW, &il->status);
6377 else 6339 else
6378 set_bit(S_RF_KILL_HW, &il->status); 6340 set_bit(S_RF_KILL_HW, &il->status);
6379 6341
6380 wiphy_rfkill_set_hw_state(il->hw->wiphy, 6342 wiphy_rfkill_set_hw_state(il->hw->wiphy,
6381 test_bit(S_RF_KILL_HW, &il->status)); 6343 test_bit(S_RF_KILL_HW, &il->status));
6382 6344
6383 il_power_initialize(il); 6345 il_power_initialize(il);
6384 6346
@@ -6390,30 +6352,31 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6390 6352
6391 return 0; 6353 return 0;
6392 6354
6393 out_destroy_workqueue: 6355out_destroy_workqueue:
6394 destroy_workqueue(il->workqueue); 6356 destroy_workqueue(il->workqueue);
6395 il->workqueue = NULL; 6357 il->workqueue = NULL;
6396 free_irq(il->pci_dev->irq, il); 6358 free_irq(il->pci_dev->irq, il);
6397 out_disable_msi: 6359out_disable_msi:
6398 pci_disable_msi(il->pci_dev); 6360 pci_disable_msi(il->pci_dev);
6399 il4965_uninit_drv(il); 6361 il4965_uninit_drv(il);
6400 out_free_eeprom: 6362out_free_eeprom:
6401 il_eeprom_free(il); 6363 il_eeprom_free(il);
6402 out_iounmap: 6364out_iounmap:
6403 pci_iounmap(pdev, il->hw_base); 6365 pci_iounmap(pdev, il->hw_base);
6404 out_pci_release_regions: 6366out_pci_release_regions:
6405 pci_set_drvdata(pdev, NULL); 6367 pci_set_drvdata(pdev, NULL);
6406 pci_release_regions(pdev); 6368 pci_release_regions(pdev);
6407 out_pci_disable_device: 6369out_pci_disable_device:
6408 pci_disable_device(pdev); 6370 pci_disable_device(pdev);
6409 out_ieee80211_free_hw: 6371out_ieee80211_free_hw:
6410 il_free_traffic_mem(il); 6372 il_free_traffic_mem(il);
6411 ieee80211_free_hw(il->hw); 6373 ieee80211_free_hw(il->hw);
6412 out: 6374out:
6413 return err; 6375 return err;
6414} 6376}
6415 6377
6416static void __devexit il4965_pci_remove(struct pci_dev *pdev) 6378static void __devexit
6379il4965_pci_remove(struct pci_dev *pdev)
6417{ 6380{
6418 struct il_priv *il = pci_get_drvdata(pdev); 6381 struct il_priv *il = pci_get_drvdata(pdev);
6419 unsigned long flags; 6382 unsigned long flags;
@@ -6469,7 +6432,6 @@ static void __devexit il4965_pci_remove(struct pci_dev *pdev)
6469 6432
6470 il_eeprom_free(il); 6433 il_eeprom_free(il);
6471 6434
6472
6473 /*netif_stop_queue(dev); */ 6435 /*netif_stop_queue(dev); */
6474 flush_workqueue(il->workqueue); 6436 flush_workqueue(il->workqueue);
6475 6437
@@ -6498,7 +6460,8 @@ static void __devexit il4965_pci_remove(struct pci_dev *pdev)
6498 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask 6460 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
6499 * must be called under il->lock and mac access 6461 * must be called under il->lock and mac access
6500 */ 6462 */
6501void il4965_txq_set_sched(struct il_priv *il, u32 mask) 6463void
6464il4965_txq_set_sched(struct il_priv *il, u32 mask)
6502{ 6465{
6503 il_wr_prph(il, IL49_SCD_TXFACT, mask); 6466 il_wr_prph(il, IL49_SCD_TXFACT, mask);
6504} 6467}
@@ -6525,7 +6488,8 @@ static struct pci_driver il4965_driver = {
6525 .driver.pm = IL_LEGACY_PM_OPS, 6488 .driver.pm = IL_LEGACY_PM_OPS,
6526}; 6489};
6527 6490
6528static int __init il4965_init(void) 6491static int __init
6492il4965_init(void)
6529{ 6493{
6530 6494
6531 int ret; 6495 int ret;
@@ -6551,7 +6515,8 @@ error_register:
6551 return ret; 6515 return ret;
6552} 6516}
6553 6517
6554static void __exit il4965_exit(void) 6518static void __exit
6519il4965_exit(void)
6555{ 6520{
6556 pci_unregister_driver(&il4965_driver); 6521 pci_unregister_driver(&il4965_driver);
6557 il4965_rate_control_unregister(); 6522 il4965_rate_control_unregister();
@@ -6571,8 +6536,8 @@ module_param_named(queues_num, il4965_mod_params.num_of_queues, int, S_IRUGO);
6571MODULE_PARM_DESC(queues_num, "number of hw queues."); 6536MODULE_PARM_DESC(queues_num, "number of hw queues.");
6572module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO); 6537module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO);
6573MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); 6538MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
6574module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, 6539module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, int,
6575 int, S_IRUGO); 6540 S_IRUGO);
6576MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); 6541MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
6577module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO); 6542module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO);
6578MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 6543MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-12 00:59:40 -0500