diff options
Diffstat (limited to 'drivers/net/wireless/iwlegacy/3945.c')
-rw-r--r-- | drivers/net/wireless/iwlegacy/3945.c | 111 |
1 files changed, 55 insertions, 56 deletions
diff --git a/drivers/net/wireless/iwlegacy/3945.c b/drivers/net/wireless/iwlegacy/3945.c index 1489b1573a6a..6c1ae5fab899 100644 --- a/drivers/net/wireless/iwlegacy/3945.c +++ b/drivers/net/wireless/iwlegacy/3945.c | |||
@@ -293,17 +293,17 @@ il3945_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) | |||
293 | { | 293 | { |
294 | struct il_tx_queue *txq = &il->txq[txq_id]; | 294 | struct il_tx_queue *txq = &il->txq[txq_id]; |
295 | struct il_queue *q = &txq->q; | 295 | struct il_queue *q = &txq->q; |
296 | struct il_tx_info *tx_info; | 296 | struct sk_buff *skb; |
297 | 297 | ||
298 | BUG_ON(txq_id == IL39_CMD_QUEUE_NUM); | 298 | BUG_ON(txq_id == IL39_CMD_QUEUE_NUM); |
299 | 299 | ||
300 | for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; | 300 | for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; |
301 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { | 301 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
302 | 302 | ||
303 | tx_info = &txq->txb[txq->q.read_ptr]; | 303 | skb = txq->skbs[txq->q.read_ptr]; |
304 | ieee80211_tx_status_irqsafe(il->hw, tx_info->skb); | 304 | ieee80211_tx_status_irqsafe(il->hw, skb); |
305 | tx_info->skb = NULL; | 305 | txq->skbs[txq->q.read_ptr] = NULL; |
306 | il->cfg->ops->lib->txq_free_tfd(il, txq); | 306 | il->ops->lib->txq_free_tfd(il, txq); |
307 | } | 307 | } |
308 | 308 | ||
309 | if (il_queue_space(q) > q->low_mark && txq_id >= 0 && | 309 | if (il_queue_space(q) > q->low_mark && txq_id >= 0 && |
@@ -336,7 +336,7 @@ il3945_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) | |||
336 | } | 336 | } |
337 | 337 | ||
338 | txq->time_stamp = jiffies; | 338 | txq->time_stamp = jiffies; |
339 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb); | 339 | info = IEEE80211_SKB_CB(txq->skbs[txq->q.read_ptr]); |
340 | ieee80211_tx_info_clear_status(info); | 340 | ieee80211_tx_info_clear_status(info); |
341 | 341 | ||
342 | /* Fill the MRR chain with some info about on-chip retransmissions */ | 342 | /* Fill the MRR chain with some info about on-chip retransmissions */ |
@@ -660,15 +660,13 @@ il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | |||
660 | PCI_DMA_TODEVICE); | 660 | PCI_DMA_TODEVICE); |
661 | 661 | ||
662 | /* free SKB */ | 662 | /* free SKB */ |
663 | if (txq->txb) { | 663 | if (txq->skbs) { |
664 | struct sk_buff *skb; | 664 | struct sk_buff *skb = txq->skbs[txq->q.read_ptr]; |
665 | |||
666 | skb = txq->txb[txq->q.read_ptr].skb; | ||
667 | 665 | ||
668 | /* can be called from irqs-disabled context */ | 666 | /* can be called from irqs-disabled context */ |
669 | if (skb) { | 667 | if (skb) { |
670 | dev_kfree_skb_any(skb); | 668 | dev_kfree_skb_any(skb); |
671 | txq->txb[txq->q.read_ptr].skb = NULL; | 669 | txq->skbs[txq->q.read_ptr] = NULL; |
672 | } | 670 | } |
673 | } | 671 | } |
674 | } | 672 | } |
@@ -960,12 +958,12 @@ il3945_hw_nic_init(struct il_priv *il) | |||
960 | struct il_rx_queue *rxq = &il->rxq; | 958 | struct il_rx_queue *rxq = &il->rxq; |
961 | 959 | ||
962 | spin_lock_irqsave(&il->lock, flags); | 960 | spin_lock_irqsave(&il->lock, flags); |
963 | il->cfg->ops->lib->apm_ops.init(il); | 961 | il->ops->lib->apm_ops.init(il); |
964 | spin_unlock_irqrestore(&il->lock, flags); | 962 | spin_unlock_irqrestore(&il->lock, flags); |
965 | 963 | ||
966 | il3945_set_pwr_vmain(il); | 964 | il3945_set_pwr_vmain(il); |
967 | 965 | ||
968 | il->cfg->ops->lib->apm_ops.config(il); | 966 | il->ops->lib->apm_ops.config(il); |
969 | 967 | ||
970 | /* Allocate the RX queue, or reset if it is already allocated */ | 968 | /* Allocate the RX queue, or reset if it is already allocated */ |
971 | if (!rxq->bd) { | 969 | if (!rxq->bd) { |
@@ -1388,7 +1386,7 @@ il3945_send_tx_power(struct il_priv *il) | |||
1388 | int rate_idx, i; | 1386 | int rate_idx, i; |
1389 | const struct il_channel_info *ch_info = NULL; | 1387 | const struct il_channel_info *ch_info = NULL; |
1390 | struct il3945_txpowertable_cmd txpower = { | 1388 | struct il3945_txpowertable_cmd txpower = { |
1391 | .channel = il->ctx.active.channel, | 1389 | .channel = il->active.channel, |
1392 | }; | 1390 | }; |
1393 | u16 chan; | 1391 | u16 chan; |
1394 | 1392 | ||
@@ -1397,7 +1395,7 @@ il3945_send_tx_power(struct il_priv *il) | |||
1397 | "TX Power requested while scanning!\n")) | 1395 | "TX Power requested while scanning!\n")) |
1398 | return -EAGAIN; | 1396 | return -EAGAIN; |
1399 | 1397 | ||
1400 | chan = le16_to_cpu(il->ctx.active.channel); | 1398 | chan = le16_to_cpu(il->active.channel); |
1401 | 1399 | ||
1402 | txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1; | 1400 | txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1; |
1403 | ch_info = il_get_channel_info(il, il->band, chan); | 1401 | ch_info = il_get_channel_info(il, il->band, chan); |
@@ -1615,7 +1613,7 @@ il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | |||
1615 | } | 1613 | } |
1616 | 1614 | ||
1617 | /* send Txpower command for current channel to ucode */ | 1615 | /* send Txpower command for current channel to ucode */ |
1618 | return il->cfg->ops->lib->send_tx_power(il); | 1616 | return il->ops->lib->send_tx_power(il); |
1619 | } | 1617 | } |
1620 | 1618 | ||
1621 | int | 1619 | int |
@@ -1662,7 +1660,7 @@ il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) | |||
1662 | } | 1660 | } |
1663 | 1661 | ||
1664 | static int | 1662 | static int |
1665 | il3945_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) | 1663 | il3945_send_rxon_assoc(struct il_priv *il) |
1666 | { | 1664 | { |
1667 | int rc = 0; | 1665 | int rc = 0; |
1668 | struct il_rx_pkt *pkt; | 1666 | struct il_rx_pkt *pkt; |
@@ -1673,8 +1671,8 @@ il3945_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) | |||
1673 | .flags = CMD_WANT_SKB, | 1671 | .flags = CMD_WANT_SKB, |
1674 | .data = &rxon_assoc, | 1672 | .data = &rxon_assoc, |
1675 | }; | 1673 | }; |
1676 | const struct il_rxon_cmd *rxon1 = &ctx->staging; | 1674 | const struct il_rxon_cmd *rxon1 = &il->staging; |
1677 | const struct il_rxon_cmd *rxon2 = &ctx->active; | 1675 | const struct il_rxon_cmd *rxon2 = &il->active; |
1678 | 1676 | ||
1679 | if (rxon1->flags == rxon2->flags && | 1677 | if (rxon1->flags == rxon2->flags && |
1680 | rxon1->filter_flags == rxon2->filter_flags && | 1678 | rxon1->filter_flags == rxon2->filter_flags && |
@@ -1684,10 +1682,10 @@ il3945_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) | |||
1684 | return 0; | 1682 | return 0; |
1685 | } | 1683 | } |
1686 | 1684 | ||
1687 | rxon_assoc.flags = ctx->staging.flags; | 1685 | rxon_assoc.flags = il->staging.flags; |
1688 | rxon_assoc.filter_flags = ctx->staging.filter_flags; | 1686 | rxon_assoc.filter_flags = il->staging.filter_flags; |
1689 | rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates; | 1687 | rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates; |
1690 | rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates; | 1688 | rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates; |
1691 | rxon_assoc.reserved = 0; | 1689 | rxon_assoc.reserved = 0; |
1692 | 1690 | ||
1693 | rc = il_send_cmd_sync(il, &cmd); | 1691 | rc = il_send_cmd_sync(il, &cmd); |
@@ -1714,11 +1712,11 @@ il3945_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) | |||
1714 | * a HW tune is required based on the RXON structure changes. | 1712 | * a HW tune is required based on the RXON structure changes. |
1715 | */ | 1713 | */ |
1716 | int | 1714 | int |
1717 | il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | 1715 | il3945_commit_rxon(struct il_priv *il) |
1718 | { | 1716 | { |
1719 | /* cast away the const for active_rxon in this function */ | 1717 | /* cast away the const for active_rxon in this function */ |
1720 | struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active; | 1718 | struct il3945_rxon_cmd *active_rxon = (void *)&il->active; |
1721 | struct il3945_rxon_cmd *staging_rxon = (void *)&ctx->staging; | 1719 | struct il3945_rxon_cmd *staging_rxon = (void *)&il->staging; |
1722 | int rc = 0; | 1720 | int rc = 0; |
1723 | bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK); | 1721 | bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK); |
1724 | 1722 | ||
@@ -1735,7 +1733,7 @@ il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1735 | staging_rxon->flags &= ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); | 1733 | staging_rxon->flags &= ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); |
1736 | staging_rxon->flags |= il3945_get_antenna_flags(il); | 1734 | staging_rxon->flags |= il3945_get_antenna_flags(il); |
1737 | 1735 | ||
1738 | rc = il_check_rxon_cmd(il, ctx); | 1736 | rc = il_check_rxon_cmd(il); |
1739 | if (rc) { | 1737 | if (rc) { |
1740 | IL_ERR("Invalid RXON configuration. Not committing.\n"); | 1738 | IL_ERR("Invalid RXON configuration. Not committing.\n"); |
1741 | return -EINVAL; | 1739 | return -EINVAL; |
@@ -1744,8 +1742,8 @@ il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1744 | /* If we don't need to send a full RXON, we can use | 1742 | /* If we don't need to send a full RXON, we can use |
1745 | * il3945_rxon_assoc_cmd which is used to reconfigure filter | 1743 | * il3945_rxon_assoc_cmd which is used to reconfigure filter |
1746 | * and other flags for the current radio configuration. */ | 1744 | * and other flags for the current radio configuration. */ |
1747 | if (!il_full_rxon_required(il, &il->ctx)) { | 1745 | if (!il_full_rxon_required(il)) { |
1748 | rc = il_send_rxon_assoc(il, &il->ctx); | 1746 | rc = il_send_rxon_assoc(il); |
1749 | if (rc) { | 1747 | if (rc) { |
1750 | IL_ERR("Error setting RXON_ASSOC " | 1748 | IL_ERR("Error setting RXON_ASSOC " |
1751 | "configuration (%d).\n", rc); | 1749 | "configuration (%d).\n", rc); |
@@ -1776,7 +1774,7 @@ il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1776 | active_rxon->reserved4 = 0; | 1774 | active_rxon->reserved4 = 0; |
1777 | active_rxon->reserved5 = 0; | 1775 | active_rxon->reserved5 = 0; |
1778 | rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), | 1776 | rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), |
1779 | &il->ctx.active); | 1777 | &il->active); |
1780 | 1778 | ||
1781 | /* If the mask clearing failed then we set | 1779 | /* If the mask clearing failed then we set |
1782 | * active_rxon back to what it was previously */ | 1780 | * active_rxon back to what it was previously */ |
@@ -1786,8 +1784,8 @@ il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1786 | "configuration (%d).\n", rc); | 1784 | "configuration (%d).\n", rc); |
1787 | return rc; | 1785 | return rc; |
1788 | } | 1786 | } |
1789 | il_clear_ucode_stations(il, &il->ctx); | 1787 | il_clear_ucode_stations(il); |
1790 | il_restore_stations(il, &il->ctx); | 1788 | il_restore_stations(il); |
1791 | } | 1789 | } |
1792 | 1790 | ||
1793 | D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n" | 1791 | D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n" |
@@ -1801,7 +1799,7 @@ il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1801 | staging_rxon->reserved4 = 0; | 1799 | staging_rxon->reserved4 = 0; |
1802 | staging_rxon->reserved5 = 0; | 1800 | staging_rxon->reserved5 = 0; |
1803 | 1801 | ||
1804 | il_set_rxon_hwcrypto(il, ctx, !il3945_mod_params.sw_crypto); | 1802 | il_set_rxon_hwcrypto(il, !il3945_mod_params.sw_crypto); |
1805 | 1803 | ||
1806 | /* Apply the new configuration */ | 1804 | /* Apply the new configuration */ |
1807 | rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), | 1805 | rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), |
@@ -1814,8 +1812,8 @@ il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1814 | memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); | 1812 | memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); |
1815 | 1813 | ||
1816 | if (!new_assoc) { | 1814 | if (!new_assoc) { |
1817 | il_clear_ucode_stations(il, &il->ctx); | 1815 | il_clear_ucode_stations(il); |
1818 | il_restore_stations(il, &il->ctx); | 1816 | il_restore_stations(il); |
1819 | } | 1817 | } |
1820 | 1818 | ||
1821 | /* If we issue a new RXON command which required a tune then we must | 1819 | /* If we issue a new RXON command which required a tune then we must |
@@ -2258,7 +2256,6 @@ il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data) | |||
2258 | static int | 2256 | static int |
2259 | il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r) | 2257 | il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r) |
2260 | { | 2258 | { |
2261 | struct il_rxon_context *ctx = &il->ctx; | ||
2262 | int ret; | 2259 | int ret; |
2263 | u8 sta_id; | 2260 | u8 sta_id; |
2264 | unsigned long flags; | 2261 | unsigned long flags; |
@@ -2266,7 +2263,7 @@ il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r) | |||
2266 | if (sta_id_r) | 2263 | if (sta_id_r) |
2267 | *sta_id_r = IL_INVALID_STATION; | 2264 | *sta_id_r = IL_INVALID_STATION; |
2268 | 2265 | ||
2269 | ret = il_add_station_common(il, ctx, addr, 0, NULL, &sta_id); | 2266 | ret = il_add_station_common(il, addr, 0, NULL, &sta_id); |
2270 | if (ret) { | 2267 | if (ret) { |
2271 | IL_ERR("Unable to add station %pM\n", addr); | 2268 | IL_ERR("Unable to add station %pM\n", addr); |
2272 | return ret; | 2269 | return ret; |
@@ -2396,15 +2393,16 @@ il3945_hw_set_hw_params(struct il_priv *il) | |||
2396 | return -ENOMEM; | 2393 | return -ENOMEM; |
2397 | } | 2394 | } |
2398 | 2395 | ||
2396 | il->hw_params.bcast_id = IL3945_BROADCAST_ID; | ||
2397 | |||
2399 | /* Assign number of Usable TX queues */ | 2398 | /* Assign number of Usable TX queues */ |
2400 | il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues; | 2399 | il->hw_params.max_txq_num = il->cfg->num_of_queues; |
2401 | 2400 | ||
2402 | il->hw_params.tfd_size = sizeof(struct il3945_tfd); | 2401 | il->hw_params.tfd_size = sizeof(struct il3945_tfd); |
2403 | il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K); | 2402 | il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K); |
2404 | il->hw_params.max_rxq_size = RX_QUEUE_SIZE; | 2403 | il->hw_params.max_rxq_size = RX_QUEUE_SIZE; |
2405 | il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; | 2404 | il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; |
2406 | il->hw_params.max_stations = IL3945_STATION_COUNT; | 2405 | il->hw_params.max_stations = IL3945_STATION_COUNT; |
2407 | il->ctx.bcast_sta_id = IL3945_BROADCAST_ID; | ||
2408 | 2406 | ||
2409 | il->sta_key_max_num = STA_KEY_MAX_NUM; | 2407 | il->sta_key_max_num = STA_KEY_MAX_NUM; |
2410 | 2408 | ||
@@ -2425,7 +2423,7 @@ il3945_hw_get_beacon_cmd(struct il_priv *il, struct il3945_frame *frame, | |||
2425 | tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u; | 2423 | tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u; |
2426 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | 2424 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); |
2427 | 2425 | ||
2428 | tx_beacon_cmd->tx.sta_id = il->ctx.bcast_sta_id; | 2426 | tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id; |
2429 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 2427 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
2430 | 2428 | ||
2431 | frame_size = | 2429 | frame_size = |
@@ -2685,23 +2683,12 @@ static struct il_hcmd_utils_ops il3945_hcmd_utils = { | |||
2685 | .post_scan = il3945_post_scan, | 2683 | .post_scan = il3945_post_scan, |
2686 | }; | 2684 | }; |
2687 | 2685 | ||
2688 | static const struct il_ops il3945_ops = { | 2686 | const struct il_ops il3945_ops = { |
2689 | .lib = &il3945_lib, | 2687 | .lib = &il3945_lib, |
2690 | .hcmd = &il3945_hcmd, | 2688 | .hcmd = &il3945_hcmd, |
2691 | .utils = &il3945_hcmd_utils, | 2689 | .utils = &il3945_hcmd_utils, |
2692 | .led = &il3945_led_ops, | 2690 | .led = &il3945_led_ops, |
2693 | .legacy = &il3945_legacy_ops, | 2691 | .legacy = &il3945_legacy_ops, |
2694 | .ieee80211_ops = &il3945_hw_ops, | ||
2695 | }; | ||
2696 | |||
2697 | static struct il_base_params il3945_base_params = { | ||
2698 | .eeprom_size = IL3945_EEPROM_IMG_SIZE, | ||
2699 | .num_of_queues = IL39_NUM_QUEUES, | ||
2700 | .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL, | ||
2701 | .set_l0s = false, | ||
2702 | .use_bsm = true, | ||
2703 | .led_compensation = 64, | ||
2704 | .wd_timeout = IL_DEF_WD_TIMEOUT, | ||
2705 | }; | 2692 | }; |
2706 | 2693 | ||
2707 | static struct il_cfg il3945_bg_cfg = { | 2694 | static struct il_cfg il3945_bg_cfg = { |
@@ -2711,10 +2698,16 @@ static struct il_cfg il3945_bg_cfg = { | |||
2711 | .ucode_api_min = IL3945_UCODE_API_MIN, | 2698 | .ucode_api_min = IL3945_UCODE_API_MIN, |
2712 | .sku = IL_SKU_G, | 2699 | .sku = IL_SKU_G, |
2713 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, | 2700 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, |
2714 | .ops = &il3945_ops, | ||
2715 | .mod_params = &il3945_mod_params, | 2701 | .mod_params = &il3945_mod_params, |
2716 | .base_params = &il3945_base_params, | ||
2717 | .led_mode = IL_LED_BLINK, | 2702 | .led_mode = IL_LED_BLINK, |
2703 | |||
2704 | .eeprom_size = IL3945_EEPROM_IMG_SIZE, | ||
2705 | .num_of_queues = IL39_NUM_QUEUES, | ||
2706 | .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL, | ||
2707 | .set_l0s = false, | ||
2708 | .use_bsm = true, | ||
2709 | .led_compensation = 64, | ||
2710 | .wd_timeout = IL_DEF_WD_TIMEOUT | ||
2718 | }; | 2711 | }; |
2719 | 2712 | ||
2720 | static struct il_cfg il3945_abg_cfg = { | 2713 | static struct il_cfg il3945_abg_cfg = { |
@@ -2724,10 +2717,16 @@ static struct il_cfg il3945_abg_cfg = { | |||
2724 | .ucode_api_min = IL3945_UCODE_API_MIN, | 2717 | .ucode_api_min = IL3945_UCODE_API_MIN, |
2725 | .sku = IL_SKU_A | IL_SKU_G, | 2718 | .sku = IL_SKU_A | IL_SKU_G, |
2726 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, | 2719 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, |
2727 | .ops = &il3945_ops, | ||
2728 | .mod_params = &il3945_mod_params, | 2720 | .mod_params = &il3945_mod_params, |
2729 | .base_params = &il3945_base_params, | ||
2730 | .led_mode = IL_LED_BLINK, | 2721 | .led_mode = IL_LED_BLINK, |
2722 | |||
2723 | .eeprom_size = IL3945_EEPROM_IMG_SIZE, | ||
2724 | .num_of_queues = IL39_NUM_QUEUES, | ||
2725 | .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL, | ||
2726 | .set_l0s = false, | ||
2727 | .use_bsm = true, | ||
2728 | .led_compensation = 64, | ||
2729 | .wd_timeout = IL_DEF_WD_TIMEOUT | ||
2731 | }; | 2730 | }; |
2732 | 2731 | ||
2733 | DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = { | 2732 | DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = { |