diff options
Diffstat (limited to 'drivers/net/wireless/ipw2x00/ipw2200.c')
-rw-r--r-- | drivers/net/wireless/ipw2x00/ipw2200.c | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c index 7fa2a3e6ebb0..192abfdc5039 100644 --- a/drivers/net/wireless/ipw2x00/ipw2200.c +++ b/drivers/net/wireless/ipw2x00/ipw2200.c | |||
@@ -458,7 +458,7 @@ static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg) | |||
458 | { | 458 | { |
459 | u32 word; | 459 | u32 word; |
460 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg & IPW_INDIRECT_ADDR_MASK); | 460 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg & IPW_INDIRECT_ADDR_MASK); |
461 | IPW_DEBUG_IO(" reg = 0x%8X : \n", reg); | 461 | IPW_DEBUG_IO(" reg = 0x%8X :\n", reg); |
462 | word = _ipw_read32(priv, IPW_INDIRECT_DATA); | 462 | word = _ipw_read32(priv, IPW_INDIRECT_DATA); |
463 | return (word >> ((reg & 0x3) * 8)) & 0xff; | 463 | return (word >> ((reg & 0x3) * 8)) & 0xff; |
464 | } | 464 | } |
@@ -472,7 +472,7 @@ static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg) | |||
472 | 472 | ||
473 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg); | 473 | _ipw_write32(priv, IPW_INDIRECT_ADDR, reg); |
474 | value = _ipw_read32(priv, IPW_INDIRECT_DATA); | 474 | value = _ipw_read32(priv, IPW_INDIRECT_DATA); |
475 | IPW_DEBUG_IO(" reg = 0x%4X : value = 0x%4x \n", reg, value); | 475 | IPW_DEBUG_IO(" reg = 0x%4X : value = 0x%4x\n", reg, value); |
476 | return value; | 476 | return value; |
477 | } | 477 | } |
478 | 478 | ||
@@ -2747,7 +2747,7 @@ static inline void ipw_fw_dma_reset_command_blocks(struct ipw_priv *priv) | |||
2747 | static int ipw_fw_dma_enable(struct ipw_priv *priv) | 2747 | static int ipw_fw_dma_enable(struct ipw_priv *priv) |
2748 | { /* start dma engine but no transfers yet */ | 2748 | { /* start dma engine but no transfers yet */ |
2749 | 2749 | ||
2750 | IPW_DEBUG_FW(">> : \n"); | 2750 | IPW_DEBUG_FW(">> :\n"); |
2751 | 2751 | ||
2752 | /* Start the dma */ | 2752 | /* Start the dma */ |
2753 | ipw_fw_dma_reset_command_blocks(priv); | 2753 | ipw_fw_dma_reset_command_blocks(priv); |
@@ -2755,7 +2755,7 @@ static int ipw_fw_dma_enable(struct ipw_priv *priv) | |||
2755 | /* Write CB base address */ | 2755 | /* Write CB base address */ |
2756 | ipw_write_reg32(priv, IPW_DMA_I_CB_BASE, IPW_SHARED_SRAM_DMA_CONTROL); | 2756 | ipw_write_reg32(priv, IPW_DMA_I_CB_BASE, IPW_SHARED_SRAM_DMA_CONTROL); |
2757 | 2757 | ||
2758 | IPW_DEBUG_FW("<< : \n"); | 2758 | IPW_DEBUG_FW("<< :\n"); |
2759 | return 0; | 2759 | return 0; |
2760 | } | 2760 | } |
2761 | 2761 | ||
@@ -2770,7 +2770,7 @@ static void ipw_fw_dma_abort(struct ipw_priv *priv) | |||
2770 | ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control); | 2770 | ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control); |
2771 | priv->sram_desc.last_cb_index = 0; | 2771 | priv->sram_desc.last_cb_index = 0; |
2772 | 2772 | ||
2773 | IPW_DEBUG_FW("<< \n"); | 2773 | IPW_DEBUG_FW("<<\n"); |
2774 | } | 2774 | } |
2775 | 2775 | ||
2776 | static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, | 2776 | static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, |
@@ -2821,29 +2821,29 @@ static void ipw_fw_dma_dump_command_block(struct ipw_priv *priv) | |||
2821 | 2821 | ||
2822 | IPW_DEBUG_FW(">> :\n"); | 2822 | IPW_DEBUG_FW(">> :\n"); |
2823 | address = ipw_read_reg32(priv, IPW_DMA_I_CURRENT_CB); | 2823 | address = ipw_read_reg32(priv, IPW_DMA_I_CURRENT_CB); |
2824 | IPW_DEBUG_FW_INFO("Current CB is 0x%x \n", address); | 2824 | IPW_DEBUG_FW_INFO("Current CB is 0x%x\n", address); |
2825 | 2825 | ||
2826 | /* Read the DMA Controlor register */ | 2826 | /* Read the DMA Controlor register */ |
2827 | register_value = ipw_read_reg32(priv, IPW_DMA_I_DMA_CONTROL); | 2827 | register_value = ipw_read_reg32(priv, IPW_DMA_I_DMA_CONTROL); |
2828 | IPW_DEBUG_FW_INFO("IPW_DMA_I_DMA_CONTROL is 0x%x \n", register_value); | 2828 | IPW_DEBUG_FW_INFO("IPW_DMA_I_DMA_CONTROL is 0x%x\n", register_value); |
2829 | 2829 | ||
2830 | /* Print the CB values */ | 2830 | /* Print the CB values */ |
2831 | cb_fields_address = address; | 2831 | cb_fields_address = address; |
2832 | register_value = ipw_read_reg32(priv, cb_fields_address); | 2832 | register_value = ipw_read_reg32(priv, cb_fields_address); |
2833 | IPW_DEBUG_FW_INFO("Current CB ControlField is 0x%x \n", register_value); | 2833 | IPW_DEBUG_FW_INFO("Current CB Control Field is 0x%x\n", register_value); |
2834 | 2834 | ||
2835 | cb_fields_address += sizeof(u32); | 2835 | cb_fields_address += sizeof(u32); |
2836 | register_value = ipw_read_reg32(priv, cb_fields_address); | 2836 | register_value = ipw_read_reg32(priv, cb_fields_address); |
2837 | IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x \n", register_value); | 2837 | IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x\n", register_value); |
2838 | 2838 | ||
2839 | cb_fields_address += sizeof(u32); | 2839 | cb_fields_address += sizeof(u32); |
2840 | register_value = ipw_read_reg32(priv, cb_fields_address); | 2840 | register_value = ipw_read_reg32(priv, cb_fields_address); |
2841 | IPW_DEBUG_FW_INFO("Current CB Destination Field is 0x%x \n", | 2841 | IPW_DEBUG_FW_INFO("Current CB Destination Field is 0x%x\n", |
2842 | register_value); | 2842 | register_value); |
2843 | 2843 | ||
2844 | cb_fields_address += sizeof(u32); | 2844 | cb_fields_address += sizeof(u32); |
2845 | register_value = ipw_read_reg32(priv, cb_fields_address); | 2845 | register_value = ipw_read_reg32(priv, cb_fields_address); |
2846 | IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x \n", register_value); | 2846 | IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x\n", register_value); |
2847 | 2847 | ||
2848 | IPW_DEBUG_FW(">> :\n"); | 2848 | IPW_DEBUG_FW(">> :\n"); |
2849 | } | 2849 | } |
@@ -2859,7 +2859,7 @@ static int ipw_fw_dma_command_block_index(struct ipw_priv *priv) | |||
2859 | current_cb_index = (current_cb_address - IPW_SHARED_SRAM_DMA_CONTROL) / | 2859 | current_cb_index = (current_cb_address - IPW_SHARED_SRAM_DMA_CONTROL) / |
2860 | sizeof(struct command_block); | 2860 | sizeof(struct command_block); |
2861 | 2861 | ||
2862 | IPW_DEBUG_FW_INFO("Current CB index 0x%x address = 0x%X \n", | 2862 | IPW_DEBUG_FW_INFO("Current CB index 0x%x address = 0x%X\n", |
2863 | current_cb_index, current_cb_address); | 2863 | current_cb_index, current_cb_address); |
2864 | 2864 | ||
2865 | IPW_DEBUG_FW(">> :\n"); | 2865 | IPW_DEBUG_FW(">> :\n"); |
@@ -2918,7 +2918,7 @@ static int ipw_fw_dma_add_buffer(struct ipw_priv *priv, dma_addr_t *src_address, | |||
2918 | int ret, i; | 2918 | int ret, i; |
2919 | u32 size; | 2919 | u32 size; |
2920 | 2920 | ||
2921 | IPW_DEBUG_FW(">> \n"); | 2921 | IPW_DEBUG_FW(">>\n"); |
2922 | IPW_DEBUG_FW_INFO("nr=%d dest_address=0x%x len=0x%x\n", | 2922 | IPW_DEBUG_FW_INFO("nr=%d dest_address=0x%x len=0x%x\n", |
2923 | nr, dest_address, len); | 2923 | nr, dest_address, len); |
2924 | 2924 | ||
@@ -2935,7 +2935,7 @@ static int ipw_fw_dma_add_buffer(struct ipw_priv *priv, dma_addr_t *src_address, | |||
2935 | IPW_DEBUG_FW_INFO(": Added new cb\n"); | 2935 | IPW_DEBUG_FW_INFO(": Added new cb\n"); |
2936 | } | 2936 | } |
2937 | 2937 | ||
2938 | IPW_DEBUG_FW("<< \n"); | 2938 | IPW_DEBUG_FW("<<\n"); |
2939 | return 0; | 2939 | return 0; |
2940 | } | 2940 | } |
2941 | 2941 | ||
@@ -2944,7 +2944,7 @@ static int ipw_fw_dma_wait(struct ipw_priv *priv) | |||
2944 | u32 current_index = 0, previous_index; | 2944 | u32 current_index = 0, previous_index; |
2945 | u32 watchdog = 0; | 2945 | u32 watchdog = 0; |
2946 | 2946 | ||
2947 | IPW_DEBUG_FW(">> : \n"); | 2947 | IPW_DEBUG_FW(">> :\n"); |
2948 | 2948 | ||
2949 | current_index = ipw_fw_dma_command_block_index(priv); | 2949 | current_index = ipw_fw_dma_command_block_index(priv); |
2950 | IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%08X\n", | 2950 | IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%08X\n", |
@@ -2973,7 +2973,7 @@ static int ipw_fw_dma_wait(struct ipw_priv *priv) | |||
2973 | ipw_set_bit(priv, IPW_RESET_REG, | 2973 | ipw_set_bit(priv, IPW_RESET_REG, |
2974 | IPW_RESET_REG_MASTER_DISABLED | IPW_RESET_REG_STOP_MASTER); | 2974 | IPW_RESET_REG_MASTER_DISABLED | IPW_RESET_REG_STOP_MASTER); |
2975 | 2975 | ||
2976 | IPW_DEBUG_FW("<< dmaWaitSync \n"); | 2976 | IPW_DEBUG_FW("<< dmaWaitSync\n"); |
2977 | return 0; | 2977 | return 0; |
2978 | } | 2978 | } |
2979 | 2979 | ||
@@ -3034,7 +3034,7 @@ static int ipw_stop_master(struct ipw_priv *priv) | |||
3034 | { | 3034 | { |
3035 | int rc; | 3035 | int rc; |
3036 | 3036 | ||
3037 | IPW_DEBUG_TRACE(">> \n"); | 3037 | IPW_DEBUG_TRACE(">>\n"); |
3038 | /* stop master. typical delay - 0 */ | 3038 | /* stop master. typical delay - 0 */ |
3039 | ipw_set_bit(priv, IPW_RESET_REG, IPW_RESET_REG_STOP_MASTER); | 3039 | ipw_set_bit(priv, IPW_RESET_REG, IPW_RESET_REG_STOP_MASTER); |
3040 | 3040 | ||
@@ -3053,7 +3053,7 @@ static int ipw_stop_master(struct ipw_priv *priv) | |||
3053 | 3053 | ||
3054 | static void ipw_arc_release(struct ipw_priv *priv) | 3054 | static void ipw_arc_release(struct ipw_priv *priv) |
3055 | { | 3055 | { |
3056 | IPW_DEBUG_TRACE(">> \n"); | 3056 | IPW_DEBUG_TRACE(">>\n"); |
3057 | mdelay(5); | 3057 | mdelay(5); |
3058 | 3058 | ||
3059 | ipw_clear_bit(priv, IPW_RESET_REG, CBD_RESET_REG_PRINCETON_RESET); | 3059 | ipw_clear_bit(priv, IPW_RESET_REG, CBD_RESET_REG_PRINCETON_RESET); |
@@ -3075,7 +3075,7 @@ static int ipw_load_ucode(struct ipw_priv *priv, u8 * data, size_t len) | |||
3075 | 3075 | ||
3076 | image = (__le16 *) data; | 3076 | image = (__le16 *) data; |
3077 | 3077 | ||
3078 | IPW_DEBUG_TRACE(">> \n"); | 3078 | IPW_DEBUG_TRACE(">>\n"); |
3079 | 3079 | ||
3080 | rc = ipw_stop_master(priv); | 3080 | rc = ipw_stop_master(priv); |
3081 | 3081 | ||
@@ -3189,7 +3189,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len) | |||
3189 | u32 *virts[CB_NUMBER_OF_ELEMENTS_SMALL]; | 3189 | u32 *virts[CB_NUMBER_OF_ELEMENTS_SMALL]; |
3190 | dma_addr_t phys[CB_NUMBER_OF_ELEMENTS_SMALL]; | 3190 | dma_addr_t phys[CB_NUMBER_OF_ELEMENTS_SMALL]; |
3191 | 3191 | ||
3192 | IPW_DEBUG_TRACE("<< : \n"); | 3192 | IPW_DEBUG_TRACE("<< :\n"); |
3193 | 3193 | ||
3194 | pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0); | 3194 | pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0); |
3195 | if (!pool) { | 3195 | if (!pool) { |
@@ -4475,7 +4475,7 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4475 | case CMAS_ASSOCIATED:{ | 4475 | case CMAS_ASSOCIATED:{ |
4476 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | 4476 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | |
4477 | IPW_DL_ASSOC, | 4477 | IPW_DL_ASSOC, |
4478 | "associated: '%s' %pM \n", | 4478 | "associated: '%s' %pM\n", |
4479 | print_ssid(ssid, priv->essid, | 4479 | print_ssid(ssid, priv->essid, |
4480 | priv->essid_len), | 4480 | priv->essid_len), |
4481 | priv->bssid); | 4481 | priv->bssid); |
@@ -4556,7 +4556,7 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4556 | IPW_DL_ASSOC, | 4556 | IPW_DL_ASSOC, |
4557 | "deauthenticated: '%s' " | 4557 | "deauthenticated: '%s' " |
4558 | "%pM" | 4558 | "%pM" |
4559 | ": (0x%04X) - %s \n", | 4559 | ": (0x%04X) - %s\n", |
4560 | print_ssid(ssid, | 4560 | print_ssid(ssid, |
4561 | priv-> | 4561 | priv-> |
4562 | essid, | 4562 | essid, |
@@ -4607,7 +4607,7 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4607 | 4607 | ||
4608 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | | 4608 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | |
4609 | IPW_DL_ASSOC, | 4609 | IPW_DL_ASSOC, |
4610 | "disassociated: '%s' %pM \n", | 4610 | "disassociated: '%s' %pM\n", |
4611 | print_ssid(ssid, priv->essid, | 4611 | print_ssid(ssid, priv->essid, |
4612 | priv->essid_len), | 4612 | priv->essid_len), |
4613 | priv->bssid); | 4613 | priv->bssid); |
@@ -4645,7 +4645,7 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4645 | switch (auth->state) { | 4645 | switch (auth->state) { |
4646 | case CMAS_AUTHENTICATED: | 4646 | case CMAS_AUTHENTICATED: |
4647 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | 4647 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, |
4648 | "authenticated: '%s' %pM \n", | 4648 | "authenticated: '%s' %pM\n", |
4649 | print_ssid(ssid, priv->essid, | 4649 | print_ssid(ssid, priv->essid, |
4650 | priv->essid_len), | 4650 | priv->essid_len), |
4651 | priv->bssid); | 4651 | priv->bssid); |
@@ -6918,7 +6918,7 @@ static u8 ipw_qos_current_mode(struct ipw_priv * priv) | |||
6918 | } else { | 6918 | } else { |
6919 | mode = priv->ieee->mode; | 6919 | mode = priv->ieee->mode; |
6920 | } | 6920 | } |
6921 | IPW_DEBUG_QOS("QoS network/card mode %d \n", mode); | 6921 | IPW_DEBUG_QOS("QoS network/card mode %d\n", mode); |
6922 | return mode; | 6922 | return mode; |
6923 | } | 6923 | } |
6924 | 6924 | ||
@@ -6958,7 +6958,7 @@ static int ipw_qos_handle_probe_response(struct ipw_priv *priv, | |||
6958 | &def_parameters_OFDM, size); | 6958 | &def_parameters_OFDM, size); |
6959 | 6959 | ||
6960 | if ((network->qos_data.active == 1) && (active_network == 1)) { | 6960 | if ((network->qos_data.active == 1) && (active_network == 1)) { |
6961 | IPW_DEBUG_QOS("QoS was disabled call qos_activate \n"); | 6961 | IPW_DEBUG_QOS("QoS was disabled call qos_activate\n"); |
6962 | schedule_work(&priv->qos_activate); | 6962 | schedule_work(&priv->qos_activate); |
6963 | } | 6963 | } |
6964 | 6964 | ||
@@ -7535,7 +7535,7 @@ static int ipw_associate_network(struct ipw_priv *priv, | |||
7535 | return err; | 7535 | return err; |
7536 | } | 7536 | } |
7537 | 7537 | ||
7538 | IPW_DEBUG(IPW_DL_STATE, "associating: '%s' %pM \n", | 7538 | IPW_DEBUG(IPW_DL_STATE, "associating: '%s' %pM\n", |
7539 | print_ssid(ssid, priv->essid, priv->essid_len), | 7539 | print_ssid(ssid, priv->essid, priv->essid_len), |
7540 | priv->bssid); | 7540 | priv->bssid); |
7541 | 7541 | ||
@@ -8786,7 +8786,7 @@ static int ipw_wx_set_freq(struct net_device *dev, | |||
8786 | } | 8786 | } |
8787 | } | 8787 | } |
8788 | 8788 | ||
8789 | IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m); | 8789 | IPW_DEBUG_WX("SET Freq/Channel -> %d\n", fwrq->m); |
8790 | mutex_lock(&priv->mutex); | 8790 | mutex_lock(&priv->mutex); |
8791 | ret = ipw_set_channel(priv, channel); | 8791 | ret = ipw_set_channel(priv, channel); |
8792 | mutex_unlock(&priv->mutex); | 8792 | mutex_unlock(&priv->mutex); |
@@ -8828,7 +8828,7 @@ static int ipw_wx_get_freq(struct net_device *dev, | |||
8828 | wrqu->freq.m = 0; | 8828 | wrqu->freq.m = 0; |
8829 | 8829 | ||
8830 | mutex_unlock(&priv->mutex); | 8830 | mutex_unlock(&priv->mutex); |
8831 | IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel); | 8831 | IPW_DEBUG_WX("GET Freq/Channel -> %d\n", priv->channel); |
8832 | return 0; | 8832 | return 0; |
8833 | } | 8833 | } |
8834 | 8834 | ||
@@ -9223,7 +9223,7 @@ static int ipw_wx_get_sens(struct net_device *dev, | |||
9223 | wrqu->sens.value = priv->roaming_threshold; | 9223 | wrqu->sens.value = priv->roaming_threshold; |
9224 | mutex_unlock(&priv->mutex); | 9224 | mutex_unlock(&priv->mutex); |
9225 | 9225 | ||
9226 | IPW_DEBUG_WX("GET roaming threshold -> %s %d \n", | 9226 | IPW_DEBUG_WX("GET roaming threshold -> %s %d\n", |
9227 | wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value); | 9227 | wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value); |
9228 | 9228 | ||
9229 | return 0; | 9229 | return 0; |
@@ -9351,7 +9351,7 @@ static int ipw_wx_get_rate(struct net_device *dev, | |||
9351 | wrqu->bitrate.value = priv->last_rate; | 9351 | wrqu->bitrate.value = priv->last_rate; |
9352 | wrqu->bitrate.fixed = (priv->config & CFG_FIXED_RATE) ? 1 : 0; | 9352 | wrqu->bitrate.fixed = (priv->config & CFG_FIXED_RATE) ? 1 : 0; |
9353 | mutex_unlock(&priv->mutex); | 9353 | mutex_unlock(&priv->mutex); |
9354 | IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value); | 9354 | IPW_DEBUG_WX("GET Rate -> %d\n", wrqu->bitrate.value); |
9355 | return 0; | 9355 | return 0; |
9356 | } | 9356 | } |
9357 | 9357 | ||
@@ -9374,7 +9374,7 @@ static int ipw_wx_set_rts(struct net_device *dev, | |||
9374 | 9374 | ||
9375 | ipw_send_rts_threshold(priv, priv->rts_threshold); | 9375 | ipw_send_rts_threshold(priv, priv->rts_threshold); |
9376 | mutex_unlock(&priv->mutex); | 9376 | mutex_unlock(&priv->mutex); |
9377 | IPW_DEBUG_WX("SET RTS Threshold -> %d \n", priv->rts_threshold); | 9377 | IPW_DEBUG_WX("SET RTS Threshold -> %d\n", priv->rts_threshold); |
9378 | return 0; | 9378 | return 0; |
9379 | } | 9379 | } |
9380 | 9380 | ||
@@ -9388,7 +9388,7 @@ static int ipw_wx_get_rts(struct net_device *dev, | |||
9388 | wrqu->rts.fixed = 0; /* no auto select */ | 9388 | wrqu->rts.fixed = 0; /* no auto select */ |
9389 | wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); | 9389 | wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); |
9390 | mutex_unlock(&priv->mutex); | 9390 | mutex_unlock(&priv->mutex); |
9391 | IPW_DEBUG_WX("GET RTS Threshold -> %d \n", wrqu->rts.value); | 9391 | IPW_DEBUG_WX("GET RTS Threshold -> %d\n", wrqu->rts.value); |
9392 | return 0; | 9392 | return 0; |
9393 | } | 9393 | } |
9394 | 9394 | ||
@@ -9438,7 +9438,7 @@ static int ipw_wx_get_txpow(struct net_device *dev, | |||
9438 | wrqu->power.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0; | 9438 | wrqu->power.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0; |
9439 | mutex_unlock(&priv->mutex); | 9439 | mutex_unlock(&priv->mutex); |
9440 | 9440 | ||
9441 | IPW_DEBUG_WX("GET TX Power -> %s %d \n", | 9441 | IPW_DEBUG_WX("GET TX Power -> %s %d\n", |
9442 | wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value); | 9442 | wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value); |
9443 | 9443 | ||
9444 | return 0; | 9444 | return 0; |
@@ -9464,7 +9464,7 @@ static int ipw_wx_set_frag(struct net_device *dev, | |||
9464 | 9464 | ||
9465 | ipw_send_frag_threshold(priv, wrqu->frag.value); | 9465 | ipw_send_frag_threshold(priv, wrqu->frag.value); |
9466 | mutex_unlock(&priv->mutex); | 9466 | mutex_unlock(&priv->mutex); |
9467 | IPW_DEBUG_WX("SET Frag Threshold -> %d \n", wrqu->frag.value); | 9467 | IPW_DEBUG_WX("SET Frag Threshold -> %d\n", wrqu->frag.value); |
9468 | return 0; | 9468 | return 0; |
9469 | } | 9469 | } |
9470 | 9470 | ||
@@ -9478,7 +9478,7 @@ static int ipw_wx_get_frag(struct net_device *dev, | |||
9478 | wrqu->frag.fixed = 0; /* no auto select */ | 9478 | wrqu->frag.fixed = 0; /* no auto select */ |
9479 | wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FTS); | 9479 | wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FTS); |
9480 | mutex_unlock(&priv->mutex); | 9480 | mutex_unlock(&priv->mutex); |
9481 | IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value); | 9481 | IPW_DEBUG_WX("GET Frag Threshold -> %d\n", wrqu->frag.value); |
9482 | 9482 | ||
9483 | return 0; | 9483 | return 0; |
9484 | } | 9484 | } |
@@ -9542,7 +9542,7 @@ static int ipw_wx_get_retry(struct net_device *dev, | |||
9542 | } | 9542 | } |
9543 | mutex_unlock(&priv->mutex); | 9543 | mutex_unlock(&priv->mutex); |
9544 | 9544 | ||
9545 | IPW_DEBUG_WX("GET retry -> %d \n", wrqu->retry.value); | 9545 | IPW_DEBUG_WX("GET retry -> %d\n", wrqu->retry.value); |
9546 | 9546 | ||
9547 | return 0; | 9547 | return 0; |
9548 | } | 9548 | } |