diff options
Diffstat (limited to 'drivers/net/wireless/ipw2200.h')
-rw-r--r-- | drivers/net/wireless/ipw2200.h | 408 |
1 files changed, 173 insertions, 235 deletions
diff --git a/drivers/net/wireless/ipw2200.h b/drivers/net/wireless/ipw2200.h index 3bff09d93154..5b00882133f9 100644 --- a/drivers/net/wireless/ipw2200.h +++ b/drivers/net/wireless/ipw2200.h | |||
@@ -42,9 +42,11 @@ | |||
42 | #include <linux/etherdevice.h> | 42 | #include <linux/etherdevice.h> |
43 | #include <linux/delay.h> | 43 | #include <linux/delay.h> |
44 | #include <linux/random.h> | 44 | #include <linux/random.h> |
45 | #include <linux/dma-mapping.h> | ||
45 | 46 | ||
46 | #include <linux/firmware.h> | 47 | #include <linux/firmware.h> |
47 | #include <linux/wireless.h> | 48 | #include <linux/wireless.h> |
49 | #include <linux/dma-mapping.h> | ||
48 | #include <asm/io.h> | 50 | #include <asm/io.h> |
49 | 51 | ||
50 | #include <net/ieee80211.h> | 52 | #include <net/ieee80211.h> |
@@ -54,8 +56,7 @@ | |||
54 | #include <linux/workqueue.h> | 56 | #include <linux/workqueue.h> |
55 | 57 | ||
56 | /* Authentication and Association States */ | 58 | /* Authentication and Association States */ |
57 | enum connection_manager_assoc_states | 59 | enum connection_manager_assoc_states { |
58 | { | ||
59 | CMAS_INIT = 0, | 60 | CMAS_INIT = 0, |
60 | CMAS_TX_AUTH_SEQ_1, | 61 | CMAS_TX_AUTH_SEQ_1, |
61 | CMAS_RX_AUTH_SEQ_2, | 62 | CMAS_RX_AUTH_SEQ_2, |
@@ -72,7 +73,6 @@ enum connection_manager_assoc_states | |||
72 | CMAS_LAST | 73 | CMAS_LAST |
73 | }; | 74 | }; |
74 | 75 | ||
75 | |||
76 | #define IPW_WAIT (1<<0) | 76 | #define IPW_WAIT (1<<0) |
77 | #define IPW_QUIET (1<<1) | 77 | #define IPW_QUIET (1<<1) |
78 | #define IPW_ROAMING (1<<2) | 78 | #define IPW_ROAMING (1<<2) |
@@ -188,7 +188,6 @@ enum connection_manager_assoc_states | |||
188 | #define DCT_FLAG_EXT_MODE_CCK 0x01 | 188 | #define DCT_FLAG_EXT_MODE_CCK 0x01 |
189 | #define DCT_FLAG_EXT_MODE_OFDM 0x00 | 189 | #define DCT_FLAG_EXT_MODE_OFDM 0x00 |
190 | 190 | ||
191 | |||
192 | #define TX_RX_TYPE_MASK 0xFF | 191 | #define TX_RX_TYPE_MASK 0xFF |
193 | #define TX_FRAME_TYPE 0x00 | 192 | #define TX_FRAME_TYPE 0x00 |
194 | #define TX_HOST_COMMAND_TYPE 0x01 | 193 | #define TX_HOST_COMMAND_TYPE 0x01 |
@@ -240,107 +239,97 @@ enum connection_manager_assoc_states | |||
240 | * Contains common data for Rx and Tx queues | 239 | * Contains common data for Rx and Tx queues |
241 | */ | 240 | */ |
242 | struct clx2_queue { | 241 | struct clx2_queue { |
243 | int n_bd; /**< number of BDs in this queue */ | 242 | int n_bd; /**< number of BDs in this queue */ |
244 | int first_empty; /**< 1-st empty entry (index) */ | 243 | int first_empty; /**< 1-st empty entry (index) */ |
245 | int last_used; /**< last used entry (index) */ | 244 | int last_used; /**< last used entry (index) */ |
246 | u32 reg_w; /**< 'write' reg (queue head), addr in domain 1 */ | 245 | u32 reg_w; /**< 'write' reg (queue head), addr in domain 1 */ |
247 | u32 reg_r; /**< 'read' reg (queue tail), addr in domain 1 */ | 246 | u32 reg_r; /**< 'read' reg (queue tail), addr in domain 1 */ |
248 | dma_addr_t dma_addr; /**< physical addr for BD's */ | 247 | dma_addr_t dma_addr; /**< physical addr for BD's */ |
249 | int low_mark; /**< low watermark, resume queue if free space more than this */ | 248 | int low_mark; /**< low watermark, resume queue if free space more than this */ |
250 | int high_mark; /**< high watermark, stop queue if free space less than this */ | 249 | int high_mark; /**< high watermark, stop queue if free space less than this */ |
251 | } __attribute__ ((packed)); | 250 | } __attribute__ ((packed)); |
252 | 251 | ||
253 | struct machdr32 | 252 | struct machdr32 { |
254 | { | ||
255 | u16 frame_ctl; | 253 | u16 frame_ctl; |
256 | u16 duration; // watch out for endians! | 254 | u16 duration; // watch out for endians! |
257 | u8 addr1[ MACADRR_BYTE_LEN ]; | 255 | u8 addr1[MACADRR_BYTE_LEN]; |
258 | u8 addr2[ MACADRR_BYTE_LEN ]; | 256 | u8 addr2[MACADRR_BYTE_LEN]; |
259 | u8 addr3[ MACADRR_BYTE_LEN ]; | 257 | u8 addr3[MACADRR_BYTE_LEN]; |
260 | u16 seq_ctrl; // more endians! | 258 | u16 seq_ctrl; // more endians! |
261 | u8 addr4[ MACADRR_BYTE_LEN ]; | 259 | u8 addr4[MACADRR_BYTE_LEN]; |
262 | u16 qos_ctrl; | 260 | u16 qos_ctrl; |
263 | } __attribute__ ((packed)) ; | 261 | } __attribute__ ((packed)); |
264 | 262 | ||
265 | struct machdr30 | 263 | struct machdr30 { |
266 | { | ||
267 | u16 frame_ctl; | 264 | u16 frame_ctl; |
268 | u16 duration; // watch out for endians! | 265 | u16 duration; // watch out for endians! |
269 | u8 addr1[ MACADRR_BYTE_LEN ]; | 266 | u8 addr1[MACADRR_BYTE_LEN]; |
270 | u8 addr2[ MACADRR_BYTE_LEN ]; | 267 | u8 addr2[MACADRR_BYTE_LEN]; |
271 | u8 addr3[ MACADRR_BYTE_LEN ]; | 268 | u8 addr3[MACADRR_BYTE_LEN]; |
272 | u16 seq_ctrl; // more endians! | 269 | u16 seq_ctrl; // more endians! |
273 | u8 addr4[ MACADRR_BYTE_LEN ]; | 270 | u8 addr4[MACADRR_BYTE_LEN]; |
274 | } __attribute__ ((packed)) ; | 271 | } __attribute__ ((packed)); |
275 | 272 | ||
276 | struct machdr26 | 273 | struct machdr26 { |
277 | { | ||
278 | u16 frame_ctl; | 274 | u16 frame_ctl; |
279 | u16 duration; // watch out for endians! | 275 | u16 duration; // watch out for endians! |
280 | u8 addr1[ MACADRR_BYTE_LEN ]; | 276 | u8 addr1[MACADRR_BYTE_LEN]; |
281 | u8 addr2[ MACADRR_BYTE_LEN ]; | 277 | u8 addr2[MACADRR_BYTE_LEN]; |
282 | u8 addr3[ MACADRR_BYTE_LEN ]; | 278 | u8 addr3[MACADRR_BYTE_LEN]; |
283 | u16 seq_ctrl; // more endians! | 279 | u16 seq_ctrl; // more endians! |
284 | u16 qos_ctrl; | 280 | u16 qos_ctrl; |
285 | } __attribute__ ((packed)) ; | 281 | } __attribute__ ((packed)); |
286 | 282 | ||
287 | struct machdr24 | 283 | struct machdr24 { |
288 | { | ||
289 | u16 frame_ctl; | 284 | u16 frame_ctl; |
290 | u16 duration; // watch out for endians! | 285 | u16 duration; // watch out for endians! |
291 | u8 addr1[ MACADRR_BYTE_LEN ]; | 286 | u8 addr1[MACADRR_BYTE_LEN]; |
292 | u8 addr2[ MACADRR_BYTE_LEN ]; | 287 | u8 addr2[MACADRR_BYTE_LEN]; |
293 | u8 addr3[ MACADRR_BYTE_LEN ]; | 288 | u8 addr3[MACADRR_BYTE_LEN]; |
294 | u16 seq_ctrl; // more endians! | 289 | u16 seq_ctrl; // more endians! |
295 | } __attribute__ ((packed)) ; | 290 | } __attribute__ ((packed)); |
296 | 291 | ||
297 | // TX TFD with 32 byte MAC Header | 292 | // TX TFD with 32 byte MAC Header |
298 | struct tx_tfd_32 | 293 | struct tx_tfd_32 { |
299 | { | 294 | struct machdr32 mchdr; // 32 |
300 | struct machdr32 mchdr; // 32 | 295 | u32 uivplaceholder[2]; // 8 |
301 | u32 uivplaceholder[2]; // 8 | 296 | } __attribute__ ((packed)); |
302 | } __attribute__ ((packed)) ; | ||
303 | 297 | ||
304 | // TX TFD with 30 byte MAC Header | 298 | // TX TFD with 30 byte MAC Header |
305 | struct tx_tfd_30 | 299 | struct tx_tfd_30 { |
306 | { | 300 | struct machdr30 mchdr; // 30 |
307 | struct machdr30 mchdr; // 30 | 301 | u8 reserved[2]; // 2 |
308 | u8 reserved[2]; // 2 | 302 | u32 uivplaceholder[2]; // 8 |
309 | u32 uivplaceholder[2]; // 8 | 303 | } __attribute__ ((packed)); |
310 | } __attribute__ ((packed)) ; | ||
311 | 304 | ||
312 | // tx tfd with 26 byte mac header | 305 | // tx tfd with 26 byte mac header |
313 | struct tx_tfd_26 | 306 | struct tx_tfd_26 { |
314 | { | 307 | struct machdr26 mchdr; // 26 |
315 | struct machdr26 mchdr; // 26 | 308 | u8 reserved1[2]; // 2 |
316 | u8 reserved1[2]; // 2 | 309 | u32 uivplaceholder[2]; // 8 |
317 | u32 uivplaceholder[2]; // 8 | 310 | u8 reserved2[4]; // 4 |
318 | u8 reserved2[4]; // 4 | 311 | } __attribute__ ((packed)); |
319 | } __attribute__ ((packed)) ; | ||
320 | 312 | ||
321 | // tx tfd with 24 byte mac header | 313 | // tx tfd with 24 byte mac header |
322 | struct tx_tfd_24 | 314 | struct tx_tfd_24 { |
323 | { | 315 | struct machdr24 mchdr; // 24 |
324 | struct machdr24 mchdr; // 24 | 316 | u32 uivplaceholder[2]; // 8 |
325 | u32 uivplaceholder[2]; // 8 | 317 | u8 reserved[8]; // 8 |
326 | u8 reserved[8]; // 8 | 318 | } __attribute__ ((packed)); |
327 | } __attribute__ ((packed)) ; | ||
328 | |||
329 | 319 | ||
330 | #define DCT_WEP_KEY_FIELD_LENGTH 16 | 320 | #define DCT_WEP_KEY_FIELD_LENGTH 16 |
331 | 321 | ||
332 | struct tfd_command | 322 | struct tfd_command { |
333 | { | ||
334 | u8 index; | 323 | u8 index; |
335 | u8 length; | 324 | u8 length; |
336 | u16 reserved; | 325 | u16 reserved; |
337 | u8 payload[0]; | 326 | u8 payload[0]; |
338 | } __attribute__ ((packed)) ; | 327 | } __attribute__ ((packed)); |
339 | 328 | ||
340 | struct tfd_data { | 329 | struct tfd_data { |
341 | /* Header */ | 330 | /* Header */ |
342 | u32 work_area_ptr; | 331 | u32 work_area_ptr; |
343 | u8 station_number; /* 0 for BSS */ | 332 | u8 station_number; /* 0 for BSS */ |
344 | u8 reserved1; | 333 | u8 reserved1; |
345 | u16 reserved2; | 334 | u16 reserved2; |
346 | 335 | ||
@@ -357,14 +346,13 @@ struct tfd_data { | |||
357 | u8 antenna; | 346 | u8 antenna; |
358 | u16 next_packet_duration; | 347 | u16 next_packet_duration; |
359 | u16 next_frag_len; | 348 | u16 next_frag_len; |
360 | u16 back_off_counter; //////txop; | 349 | u16 back_off_counter; //////txop; |
361 | u8 retrylimit; | 350 | u8 retrylimit; |
362 | u16 cwcurrent; | 351 | u16 cwcurrent; |
363 | u8 reserved3; | 352 | u8 reserved3; |
364 | 353 | ||
365 | /* 802.11 MAC Header */ | 354 | /* 802.11 MAC Header */ |
366 | union | 355 | union { |
367 | { | ||
368 | struct tx_tfd_24 tfd_24; | 356 | struct tx_tfd_24 tfd_24; |
369 | struct tx_tfd_26 tfd_26; | 357 | struct tx_tfd_26 tfd_26; |
370 | struct tx_tfd_30 tfd_30; | 358 | struct tx_tfd_30 tfd_30; |
@@ -377,8 +365,7 @@ struct tfd_data { | |||
377 | u16 chunk_len[NUM_TFD_CHUNKS]; | 365 | u16 chunk_len[NUM_TFD_CHUNKS]; |
378 | } __attribute__ ((packed)); | 366 | } __attribute__ ((packed)); |
379 | 367 | ||
380 | struct txrx_control_flags | 368 | struct txrx_control_flags { |
381 | { | ||
382 | u8 message_type; | 369 | u8 message_type; |
383 | u8 rx_seq_num; | 370 | u8 rx_seq_num; |
384 | u8 control_bits; | 371 | u8 control_bits; |
@@ -388,17 +375,16 @@ struct txrx_control_flags | |||
388 | #define TFD_SIZE 128 | 375 | #define TFD_SIZE 128 |
389 | #define TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH (TFD_SIZE - sizeof(struct txrx_control_flags)) | 376 | #define TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH (TFD_SIZE - sizeof(struct txrx_control_flags)) |
390 | 377 | ||
391 | struct tfd_frame | 378 | struct tfd_frame { |
392 | { | ||
393 | struct txrx_control_flags control_flags; | 379 | struct txrx_control_flags control_flags; |
394 | union { | 380 | union { |
395 | struct tfd_data data; | 381 | struct tfd_data data; |
396 | struct tfd_command cmd; | 382 | struct tfd_command cmd; |
397 | u8 raw[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH]; | 383 | u8 raw[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH]; |
398 | } u; | 384 | } u; |
399 | } __attribute__ ((packed)) ; | 385 | } __attribute__ ((packed)); |
400 | 386 | ||
401 | typedef void destructor_func(const void*); | 387 | typedef void destructor_func(const void *); |
402 | 388 | ||
403 | /** | 389 | /** |
404 | * Tx Queue for DMA. Queue consists of circular buffer of | 390 | * Tx Queue for DMA. Queue consists of circular buffer of |
@@ -406,7 +392,7 @@ typedef void destructor_func(const void*); | |||
406 | */ | 392 | */ |
407 | struct clx2_tx_queue { | 393 | struct clx2_tx_queue { |
408 | struct clx2_queue q; | 394 | struct clx2_queue q; |
409 | struct tfd_frame* bd; | 395 | struct tfd_frame *bd; |
410 | struct ieee80211_txb **txb; | 396 | struct ieee80211_txb **txb; |
411 | }; | 397 | }; |
412 | 398 | ||
@@ -421,8 +407,7 @@ struct clx2_tx_queue { | |||
421 | #define SUP_RATE_11G_MAX_NUM_CHANNELS (12) | 407 | #define SUP_RATE_11G_MAX_NUM_CHANNELS (12) |
422 | 408 | ||
423 | // Used for passing to driver number of successes and failures per rate | 409 | // Used for passing to driver number of successes and failures per rate |
424 | struct rate_histogram | 410 | struct rate_histogram { |
425 | { | ||
426 | union { | 411 | union { |
427 | u32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | 412 | u32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; |
428 | u32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | 413 | u32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; |
@@ -473,12 +458,12 @@ struct notif_scan_complete { | |||
473 | u8 num_channels; | 458 | u8 num_channels; |
474 | u8 status; | 459 | u8 status; |
475 | u8 reserved; | 460 | u8 reserved; |
476 | } __attribute__ ((packed)); | 461 | } __attribute__ ((packed)); |
477 | 462 | ||
478 | struct notif_frag_length { | 463 | struct notif_frag_length { |
479 | u16 frag_length; | 464 | u16 frag_length; |
480 | u16 reserved; | 465 | u16 reserved; |
481 | } __attribute__ ((packed)); | 466 | } __attribute__ ((packed)); |
482 | 467 | ||
483 | struct notif_beacon_state { | 468 | struct notif_beacon_state { |
484 | u32 state; | 469 | u32 state; |
@@ -541,11 +526,11 @@ struct ipw_rx_notification { | |||
541 | 526 | ||
542 | struct ipw_rx_frame { | 527 | struct ipw_rx_frame { |
543 | u32 reserved1; | 528 | u32 reserved1; |
544 | u8 parent_tsf[4]; // fw_use[0] is boolean for OUR_TSF_IS_GREATER | 529 | u8 parent_tsf[4]; // fw_use[0] is boolean for OUR_TSF_IS_GREATER |
545 | u8 received_channel; // The channel that this frame was received on. | 530 | u8 received_channel; // The channel that this frame was received on. |
546 | // Note that for .11b this does not have to be | 531 | // Note that for .11b this does not have to be |
547 | // the same as the channel that it was sent. | 532 | // the same as the channel that it was sent. |
548 | // Filled by LMAC | 533 | // Filled by LMAC |
549 | u8 frameStatus; | 534 | u8 frameStatus; |
550 | u8 rate; | 535 | u8 rate; |
551 | u8 rssi; | 536 | u8 rssi; |
@@ -554,10 +539,10 @@ struct ipw_rx_frame { | |||
554 | u16 signal; | 539 | u16 signal; |
555 | u16 noise; | 540 | u16 noise; |
556 | u8 antennaAndPhy; | 541 | u8 antennaAndPhy; |
557 | u8 control; // control bit should be on in bg | 542 | u8 control; // control bit should be on in bg |
558 | u8 rtscts_rate; // rate of rts or cts (in rts cts sequence rate | 543 | u8 rtscts_rate; // rate of rts or cts (in rts cts sequence rate |
559 | // is identical) | 544 | // is identical) |
560 | u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen | 545 | u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen |
561 | u16 length; | 546 | u16 length; |
562 | u8 data[0]; | 547 | u8 data[0]; |
563 | } __attribute__ ((packed)); | 548 | } __attribute__ ((packed)); |
@@ -569,8 +554,7 @@ struct ipw_rx_header { | |||
569 | u8 reserved; | 554 | u8 reserved; |
570 | } __attribute__ ((packed)); | 555 | } __attribute__ ((packed)); |
571 | 556 | ||
572 | struct ipw_rx_packet | 557 | struct ipw_rx_packet { |
573 | { | ||
574 | struct ipw_rx_header header; | 558 | struct ipw_rx_header header; |
575 | union { | 559 | union { |
576 | struct ipw_rx_frame frame; | 560 | struct ipw_rx_frame frame; |
@@ -587,21 +571,20 @@ struct ipw_rx_mem_buffer { | |||
587 | struct ipw_rx_buffer *rxb; | 571 | struct ipw_rx_buffer *rxb; |
588 | struct sk_buff *skb; | 572 | struct sk_buff *skb; |
589 | struct list_head list; | 573 | struct list_head list; |
590 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ | 574 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ |
591 | 575 | ||
592 | struct ipw_rx_queue { | 576 | struct ipw_rx_queue { |
593 | struct ipw_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; | 577 | struct ipw_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; |
594 | struct ipw_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | 578 | struct ipw_rx_mem_buffer *queue[RX_QUEUE_SIZE]; |
595 | u32 processed; /* Internal index to last handled Rx packet */ | 579 | u32 processed; /* Internal index to last handled Rx packet */ |
596 | u32 read; /* Shared index to newest available Rx buffer */ | 580 | u32 read; /* Shared index to newest available Rx buffer */ |
597 | u32 write; /* Shared index to oldest written Rx packet */ | 581 | u32 write; /* Shared index to oldest written Rx packet */ |
598 | u32 free_count;/* Number of pre-allocated buffers in rx_free */ | 582 | u32 free_count; /* Number of pre-allocated buffers in rx_free */ |
599 | /* Each of these lists is used as a FIFO for ipw_rx_mem_buffers */ | 583 | /* Each of these lists is used as a FIFO for ipw_rx_mem_buffers */ |
600 | struct list_head rx_free; /* Own an SKBs */ | 584 | struct list_head rx_free; /* Own an SKBs */ |
601 | struct list_head rx_used; /* No SKB allocated */ | 585 | struct list_head rx_used; /* No SKB allocated */ |
602 | spinlock_t lock; | 586 | spinlock_t lock; |
603 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ | 587 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ |
604 | |||
605 | 588 | ||
606 | struct alive_command_responce { | 589 | struct alive_command_responce { |
607 | u8 alive_command; | 590 | u8 alive_command; |
@@ -625,8 +608,7 @@ struct ipw_rates { | |||
625 | u8 rates[IPW_MAX_RATES]; | 608 | u8 rates[IPW_MAX_RATES]; |
626 | } __attribute__ ((packed)); | 609 | } __attribute__ ((packed)); |
627 | 610 | ||
628 | struct command_block | 611 | struct command_block { |
629 | { | ||
630 | unsigned int control; | 612 | unsigned int control; |
631 | u32 source_addr; | 613 | u32 source_addr; |
632 | u32 dest_addr; | 614 | u32 dest_addr; |
@@ -634,18 +616,16 @@ struct command_block | |||
634 | } __attribute__ ((packed)); | 616 | } __attribute__ ((packed)); |
635 | 617 | ||
636 | #define CB_NUMBER_OF_ELEMENTS_SMALL 64 | 618 | #define CB_NUMBER_OF_ELEMENTS_SMALL 64 |
637 | struct fw_image_desc | 619 | struct fw_image_desc { |
638 | { | ||
639 | unsigned long last_cb_index; | 620 | unsigned long last_cb_index; |
640 | unsigned long current_cb_index; | 621 | unsigned long current_cb_index; |
641 | struct command_block cb_list[CB_NUMBER_OF_ELEMENTS_SMALL]; | 622 | struct command_block cb_list[CB_NUMBER_OF_ELEMENTS_SMALL]; |
642 | void * v_addr; | 623 | void *v_addr; |
643 | unsigned long p_addr; | 624 | unsigned long p_addr; |
644 | unsigned long len; | 625 | unsigned long len; |
645 | }; | 626 | }; |
646 | 627 | ||
647 | struct ipw_sys_config | 628 | struct ipw_sys_config { |
648 | { | ||
649 | u8 bt_coexistence; | 629 | u8 bt_coexistence; |
650 | u8 reserved1; | 630 | u8 reserved1; |
651 | u8 answer_broadcast_ssid_probe; | 631 | u8 answer_broadcast_ssid_probe; |
@@ -668,8 +648,7 @@ struct ipw_sys_config | |||
668 | u8 reserved3; | 648 | u8 reserved3; |
669 | } __attribute__ ((packed)); | 649 | } __attribute__ ((packed)); |
670 | 650 | ||
671 | struct ipw_multicast_addr | 651 | struct ipw_multicast_addr { |
672 | { | ||
673 | u8 num_of_multicast_addresses; | 652 | u8 num_of_multicast_addresses; |
674 | u8 reserved[3]; | 653 | u8 reserved[3]; |
675 | u8 mac1[6]; | 654 | u8 mac1[6]; |
@@ -678,8 +657,7 @@ struct ipw_multicast_addr | |||
678 | u8 mac4[6]; | 657 | u8 mac4[6]; |
679 | } __attribute__ ((packed)); | 658 | } __attribute__ ((packed)); |
680 | 659 | ||
681 | struct ipw_wep_key | 660 | struct ipw_wep_key { |
682 | { | ||
683 | u8 cmd_id; | 661 | u8 cmd_id; |
684 | u8 seq_num; | 662 | u8 seq_num; |
685 | u8 key_index; | 663 | u8 key_index; |
@@ -687,8 +665,7 @@ struct ipw_wep_key | |||
687 | u8 key[16]; | 665 | u8 key[16]; |
688 | } __attribute__ ((packed)); | 666 | } __attribute__ ((packed)); |
689 | 667 | ||
690 | struct ipw_tgi_tx_key | 668 | struct ipw_tgi_tx_key { |
691 | { | ||
692 | u8 key_id; | 669 | u8 key_id; |
693 | u8 security_type; | 670 | u8 security_type; |
694 | u8 station_index; | 671 | u8 station_index; |
@@ -699,8 +676,7 @@ struct ipw_tgi_tx_key | |||
699 | 676 | ||
700 | #define IPW_SCAN_CHANNELS 54 | 677 | #define IPW_SCAN_CHANNELS 54 |
701 | 678 | ||
702 | struct ipw_scan_request | 679 | struct ipw_scan_request { |
703 | { | ||
704 | u8 scan_type; | 680 | u8 scan_type; |
705 | u16 dwell_time; | 681 | u16 dwell_time; |
706 | u8 channels_list[IPW_SCAN_CHANNELS]; | 682 | u8 channels_list[IPW_SCAN_CHANNELS]; |
@@ -716,8 +692,7 @@ enum { | |||
716 | IPW_SCAN_TYPES | 692 | IPW_SCAN_TYPES |
717 | }; | 693 | }; |
718 | 694 | ||
719 | struct ipw_scan_request_ext | 695 | struct ipw_scan_request_ext { |
720 | { | ||
721 | u32 full_scan_index; | 696 | u32 full_scan_index; |
722 | u8 channels_list[IPW_SCAN_CHANNELS]; | 697 | u8 channels_list[IPW_SCAN_CHANNELS]; |
723 | u8 scan_type[IPW_SCAN_CHANNELS / 2]; | 698 | u8 scan_type[IPW_SCAN_CHANNELS / 2]; |
@@ -738,19 +713,16 @@ extern inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan, | |||
738 | { | 713 | { |
739 | if (index % 2) | 714 | if (index % 2) |
740 | scan->scan_type[index / 2] = | 715 | scan->scan_type[index / 2] = |
741 | (scan->scan_type[index / 2] & 0xF0) | | 716 | (scan->scan_type[index / 2] & 0xF0) | (scan_type & 0x0F); |
742 | (scan_type & 0x0F); | ||
743 | else | 717 | else |
744 | scan->scan_type[index / 2] = | 718 | scan->scan_type[index / 2] = |
745 | (scan->scan_type[index / 2] & 0x0F) | | 719 | (scan->scan_type[index / 2] & 0x0F) | |
746 | ((scan_type & 0x0F) << 4); | 720 | ((scan_type & 0x0F) << 4); |
747 | } | 721 | } |
748 | 722 | ||
749 | struct ipw_associate | 723 | struct ipw_associate { |
750 | { | ||
751 | u8 channel; | 724 | u8 channel; |
752 | u8 auth_type:4, | 725 | u8 auth_type:4, auth_key:4; |
753 | auth_key:4; | ||
754 | u8 assoc_type; | 726 | u8 assoc_type; |
755 | u8 reserved; | 727 | u8 reserved; |
756 | u16 policy_support; | 728 | u16 policy_support; |
@@ -769,8 +741,7 @@ struct ipw_associate | |||
769 | u16 reserved2; | 741 | u16 reserved2; |
770 | } __attribute__ ((packed)); | 742 | } __attribute__ ((packed)); |
771 | 743 | ||
772 | struct ipw_supported_rates | 744 | struct ipw_supported_rates { |
773 | { | ||
774 | u8 ieee_mode; | 745 | u8 ieee_mode; |
775 | u8 num_rates; | 746 | u8 num_rates; |
776 | u8 purpose; | 747 | u8 purpose; |
@@ -778,42 +749,36 @@ struct ipw_supported_rates | |||
778 | u8 supported_rates[IPW_MAX_RATES]; | 749 | u8 supported_rates[IPW_MAX_RATES]; |
779 | } __attribute__ ((packed)); | 750 | } __attribute__ ((packed)); |
780 | 751 | ||
781 | struct ipw_rts_threshold | 752 | struct ipw_rts_threshold { |
782 | { | ||
783 | u16 rts_threshold; | 753 | u16 rts_threshold; |
784 | u16 reserved; | 754 | u16 reserved; |
785 | } __attribute__ ((packed)); | 755 | } __attribute__ ((packed)); |
786 | 756 | ||
787 | struct ipw_frag_threshold | 757 | struct ipw_frag_threshold { |
788 | { | ||
789 | u16 frag_threshold; | 758 | u16 frag_threshold; |
790 | u16 reserved; | 759 | u16 reserved; |
791 | } __attribute__ ((packed)); | 760 | } __attribute__ ((packed)); |
792 | 761 | ||
793 | struct ipw_retry_limit | 762 | struct ipw_retry_limit { |
794 | { | ||
795 | u8 short_retry_limit; | 763 | u8 short_retry_limit; |
796 | u8 long_retry_limit; | 764 | u8 long_retry_limit; |
797 | u16 reserved; | 765 | u16 reserved; |
798 | } __attribute__ ((packed)); | 766 | } __attribute__ ((packed)); |
799 | 767 | ||
800 | struct ipw_dino_config | 768 | struct ipw_dino_config { |
801 | { | ||
802 | u32 dino_config_addr; | 769 | u32 dino_config_addr; |
803 | u16 dino_config_size; | 770 | u16 dino_config_size; |
804 | u8 dino_response; | 771 | u8 dino_response; |
805 | u8 reserved; | 772 | u8 reserved; |
806 | } __attribute__ ((packed)); | 773 | } __attribute__ ((packed)); |
807 | 774 | ||
808 | struct ipw_aironet_info | 775 | struct ipw_aironet_info { |
809 | { | ||
810 | u8 id; | 776 | u8 id; |
811 | u8 length; | 777 | u8 length; |
812 | u16 reserved; | 778 | u16 reserved; |
813 | } __attribute__ ((packed)); | 779 | } __attribute__ ((packed)); |
814 | 780 | ||
815 | struct ipw_rx_key | 781 | struct ipw_rx_key { |
816 | { | ||
817 | u8 station_index; | 782 | u8 station_index; |
818 | u8 key_type; | 783 | u8 key_type; |
819 | u8 key_id; | 784 | u8 key_id; |
@@ -824,23 +789,20 @@ struct ipw_rx_key | |||
824 | u8 reserved; | 789 | u8 reserved; |
825 | } __attribute__ ((packed)); | 790 | } __attribute__ ((packed)); |
826 | 791 | ||
827 | struct ipw_country_channel_info | 792 | struct ipw_country_channel_info { |
828 | { | ||
829 | u8 first_channel; | 793 | u8 first_channel; |
830 | u8 no_channels; | 794 | u8 no_channels; |
831 | s8 max_tx_power; | 795 | s8 max_tx_power; |
832 | } __attribute__ ((packed)); | 796 | } __attribute__ ((packed)); |
833 | 797 | ||
834 | struct ipw_country_info | 798 | struct ipw_country_info { |
835 | { | ||
836 | u8 id; | 799 | u8 id; |
837 | u8 length; | 800 | u8 length; |
838 | u8 country_str[3]; | 801 | u8 country_str[3]; |
839 | struct ipw_country_channel_info groups[7]; | 802 | struct ipw_country_channel_info groups[7]; |
840 | } __attribute__ ((packed)); | 803 | } __attribute__ ((packed)); |
841 | 804 | ||
842 | struct ipw_channel_tx_power | 805 | struct ipw_channel_tx_power { |
843 | { | ||
844 | u8 channel_number; | 806 | u8 channel_number; |
845 | s8 tx_power; | 807 | s8 tx_power; |
846 | } __attribute__ ((packed)); | 808 | } __attribute__ ((packed)); |
@@ -850,15 +812,13 @@ struct ipw_channel_tx_power | |||
850 | #define MAX_A_CHANNELS 37 | 812 | #define MAX_A_CHANNELS 37 |
851 | #define MAX_B_CHANNELS 14 | 813 | #define MAX_B_CHANNELS 14 |
852 | 814 | ||
853 | struct ipw_tx_power | 815 | struct ipw_tx_power { |
854 | { | ||
855 | u8 num_channels; | 816 | u8 num_channels; |
856 | u8 ieee_mode; | 817 | u8 ieee_mode; |
857 | struct ipw_channel_tx_power channels_tx_power[MAX_A_CHANNELS]; | 818 | struct ipw_channel_tx_power channels_tx_power[MAX_A_CHANNELS]; |
858 | } __attribute__ ((packed)); | 819 | } __attribute__ ((packed)); |
859 | 820 | ||
860 | struct ipw_qos_parameters | 821 | struct ipw_qos_parameters { |
861 | { | ||
862 | u16 cw_min[4]; | 822 | u16 cw_min[4]; |
863 | u16 cw_max[4]; | 823 | u16 cw_max[4]; |
864 | u8 aifs[4]; | 824 | u8 aifs[4]; |
@@ -866,15 +826,13 @@ struct ipw_qos_parameters | |||
866 | u16 tx_op_limit[4]; | 826 | u16 tx_op_limit[4]; |
867 | } __attribute__ ((packed)); | 827 | } __attribute__ ((packed)); |
868 | 828 | ||
869 | struct ipw_rsn_capabilities | 829 | struct ipw_rsn_capabilities { |
870 | { | ||
871 | u8 id; | 830 | u8 id; |
872 | u8 length; | 831 | u8 length; |
873 | u16 version; | 832 | u16 version; |
874 | } __attribute__ ((packed)); | 833 | } __attribute__ ((packed)); |
875 | 834 | ||
876 | struct ipw_sensitivity_calib | 835 | struct ipw_sensitivity_calib { |
877 | { | ||
878 | u16 beacon_rssi_raw; | 836 | u16 beacon_rssi_raw; |
879 | u16 reserved; | 837 | u16 reserved; |
880 | } __attribute__ ((packed)); | 838 | } __attribute__ ((packed)); |
@@ -893,10 +851,11 @@ struct ipw_sensitivity_calib | |||
893 | * - \a param filled with status parameters. | 851 | * - \a param filled with status parameters. |
894 | */ | 852 | */ |
895 | struct ipw_cmd { | 853 | struct ipw_cmd { |
896 | u32 cmd; /**< Host command */ | 854 | u32 cmd; /**< Host command */ |
897 | u32 status; /**< Status */ | 855 | u32 status;/**< Status */ |
898 | u32 status_len; /**< How many 32 bit parameters in the status */ | 856 | u32 status_len; |
899 | u32 len; /**< incoming parameters length, bytes */ | 857 | /**< How many 32 bit parameters in the status */ |
858 | u32 len; /**< incoming parameters length, bytes */ | ||
900 | /** | 859 | /** |
901 | * command parameters. | 860 | * command parameters. |
902 | * There should be enough space for incoming and | 861 | * There should be enough space for incoming and |
@@ -904,10 +863,10 @@ struct ipw_cmd { | |||
904 | * Incoming parameters listed 1-st, followed by outcoming params. | 863 | * Incoming parameters listed 1-st, followed by outcoming params. |
905 | * nParams=(len+3)/4+status_len | 864 | * nParams=(len+3)/4+status_len |
906 | */ | 865 | */ |
907 | u32 param[0]; | 866 | u32 param[0]; |
908 | } __attribute__ ((packed)); | 867 | } __attribute__ ((packed)); |
909 | 868 | ||
910 | #define STATUS_HCMD_ACTIVE (1<<0) /**< host command in progress */ | 869 | #define STATUS_HCMD_ACTIVE (1<<0) /**< host command in progress */ |
911 | 870 | ||
912 | #define STATUS_INT_ENABLED (1<<1) | 871 | #define STATUS_INT_ENABLED (1<<1) |
913 | #define STATUS_RF_KILL_HW (1<<2) | 872 | #define STATUS_RF_KILL_HW (1<<2) |
@@ -930,15 +889,15 @@ struct ipw_cmd { | |||
930 | #define STATUS_SCANNING (1<<21) | 889 | #define STATUS_SCANNING (1<<21) |
931 | #define STATUS_SCAN_ABORTING (1<<22) | 890 | #define STATUS_SCAN_ABORTING (1<<22) |
932 | 891 | ||
933 | #define STATUS_INDIRECT_BYTE (1<<28) /* sysfs entry configured for access */ | 892 | #define STATUS_INDIRECT_BYTE (1<<28) /* sysfs entry configured for access */ |
934 | #define STATUS_INDIRECT_DWORD (1<<29) /* sysfs entry configured for access */ | 893 | #define STATUS_INDIRECT_DWORD (1<<29) /* sysfs entry configured for access */ |
935 | #define STATUS_DIRECT_DWORD (1<<30) /* sysfs entry configured for access */ | 894 | #define STATUS_DIRECT_DWORD (1<<30) /* sysfs entry configured for access */ |
936 | 895 | ||
937 | #define STATUS_SECURITY_UPDATED (1<<31) /* Security sync needed */ | 896 | #define STATUS_SECURITY_UPDATED (1<<31) /* Security sync needed */ |
938 | 897 | ||
939 | #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */ | 898 | #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */ |
940 | #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */ | 899 | #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */ |
941 | #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */ | 900 | #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */ |
942 | #define CFG_CUSTOM_MAC (1<<3) | 901 | #define CFG_CUSTOM_MAC (1<<3) |
943 | #define CFG_PREAMBLE (1<<4) | 902 | #define CFG_PREAMBLE (1<<4) |
944 | #define CFG_ADHOC_PERSIST (1<<5) | 903 | #define CFG_ADHOC_PERSIST (1<<5) |
@@ -946,8 +905,8 @@ struct ipw_cmd { | |||
946 | #define CFG_FIXED_RATE (1<<7) | 905 | #define CFG_FIXED_RATE (1<<7) |
947 | #define CFG_ADHOC_CREATE (1<<8) | 906 | #define CFG_ADHOC_CREATE (1<<8) |
948 | 907 | ||
949 | #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */ | 908 | #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */ |
950 | #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ | 909 | #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ |
951 | 910 | ||
952 | #define MAX_STATIONS 32 | 911 | #define MAX_STATIONS 32 |
953 | #define IPW_INVALID_STATION (0xff) | 912 | #define IPW_INVALID_STATION (0xff) |
@@ -987,8 +946,8 @@ struct ipw_priv { | |||
987 | /* result of ucode download */ | 946 | /* result of ucode download */ |
988 | struct alive_command_responce dino_alive; | 947 | struct alive_command_responce dino_alive; |
989 | 948 | ||
990 | wait_queue_head_t wait_command_queue; | 949 | wait_queue_head_t wait_command_queue; |
991 | wait_queue_head_t wait_state; | 950 | wait_queue_head_t wait_state; |
992 | 951 | ||
993 | /* Rx and Tx DMA processing queues */ | 952 | /* Rx and Tx DMA processing queues */ |
994 | struct ipw_rx_queue *rxq; | 953 | struct ipw_rx_queue *rxq; |
@@ -1004,9 +963,9 @@ struct ipw_priv { | |||
1004 | struct average average_rssi; | 963 | struct average average_rssi; |
1005 | struct average average_noise; | 964 | struct average average_noise; |
1006 | u32 port_type; | 965 | u32 port_type; |
1007 | int rx_bufs_min; /**< minimum number of bufs in Rx queue */ | 966 | int rx_bufs_min; /**< minimum number of bufs in Rx queue */ |
1008 | int rx_pend_max; /**< maximum pending buffers for one IRQ */ | 967 | int rx_pend_max; /**< maximum pending buffers for one IRQ */ |
1009 | u32 hcmd_seq; /**< sequence number for hcmd */ | 968 | u32 hcmd_seq; /**< sequence number for hcmd */ |
1010 | u32 missed_beacon_threshold; | 969 | u32 missed_beacon_threshold; |
1011 | u32 roaming_threshold; | 970 | u32 roaming_threshold; |
1012 | 971 | ||
@@ -1015,17 +974,17 @@ struct ipw_priv { | |||
1015 | 974 | ||
1016 | unsigned long ts_scan_abort; | 975 | unsigned long ts_scan_abort; |
1017 | struct ipw_supported_rates rates; | 976 | struct ipw_supported_rates rates; |
1018 | struct ipw_rates phy[3]; /**< PHY restrictions, per band */ | 977 | struct ipw_rates phy[3]; /**< PHY restrictions, per band */ |
1019 | struct ipw_rates supp; /**< software defined */ | 978 | struct ipw_rates supp; /**< software defined */ |
1020 | struct ipw_rates extended; /**< use for corresp. IE, AP only */ | 979 | struct ipw_rates extended; /**< use for corresp. IE, AP only */ |
1021 | 980 | ||
1022 | struct notif_link_deterioration last_link_deterioration; /** for statistics */ | 981 | struct notif_link_deterioration last_link_deterioration; /** for statistics */ |
1023 | struct ipw_cmd* hcmd; /**< host command currently executed */ | 982 | struct ipw_cmd *hcmd; /**< host command currently executed */ |
1024 | 983 | ||
1025 | wait_queue_head_t hcmd_wq; /**< host command waits for execution */ | 984 | wait_queue_head_t hcmd_wq; /**< host command waits for execution */ |
1026 | u32 tsf_bcn[2]; /**< TSF from latest beacon */ | 985 | u32 tsf_bcn[2]; /**< TSF from latest beacon */ |
1027 | 986 | ||
1028 | struct notif_calibration calib; /**< last calibration */ | 987 | struct notif_calibration calib; /**< last calibration */ |
1029 | 988 | ||
1030 | /* ordinal interface with firmware */ | 989 | /* ordinal interface with firmware */ |
1031 | u32 table0_addr; | 990 | u32 table0_addr; |
@@ -1065,8 +1024,8 @@ struct ipw_priv { | |||
1065 | u32 tx_packets; | 1024 | u32 tx_packets; |
1066 | u32 quality; | 1025 | u32 quality; |
1067 | 1026 | ||
1068 | /* eeprom */ | 1027 | /* eeprom */ |
1069 | u8 eeprom[0x100]; /* 256 bytes of eeprom */ | 1028 | u8 eeprom[0x100]; /* 256 bytes of eeprom */ |
1070 | int eeprom_delay; | 1029 | int eeprom_delay; |
1071 | 1030 | ||
1072 | struct iw_statistics wstats; | 1031 | struct iw_statistics wstats; |
@@ -1089,7 +1048,6 @@ struct ipw_priv { | |||
1089 | 1048 | ||
1090 | struct tasklet_struct irq_tasklet; | 1049 | struct tasklet_struct irq_tasklet; |
1091 | 1050 | ||
1092 | |||
1093 | #define IPW_2200BG 1 | 1051 | #define IPW_2200BG 1 |
1094 | #define IPW_2915ABG 2 | 1052 | #define IPW_2915ABG 2 |
1095 | u8 adapter; | 1053 | u8 adapter; |
@@ -1112,7 +1070,6 @@ struct ipw_priv { | |||
1112 | u32 indirect_byte; | 1070 | u32 indirect_byte; |
1113 | }; /*ipw_priv */ | 1071 | }; /*ipw_priv */ |
1114 | 1072 | ||
1115 | |||
1116 | /* debug macros */ | 1073 | /* debug macros */ |
1117 | 1074 | ||
1118 | #ifdef CONFIG_IPW_DEBUG | 1075 | #ifdef CONFIG_IPW_DEBUG |
@@ -1168,7 +1125,6 @@ do { if (ipw_debug_level & (level)) \ | |||
1168 | #define IPW_DL_RF_KILL (1<<17) | 1125 | #define IPW_DL_RF_KILL (1<<17) |
1169 | #define IPW_DL_FW_ERRORS (1<<18) | 1126 | #define IPW_DL_FW_ERRORS (1<<18) |
1170 | 1127 | ||
1171 | |||
1172 | #define IPW_DL_ORD (1<<20) | 1128 | #define IPW_DL_ORD (1<<20) |
1173 | 1129 | ||
1174 | #define IPW_DL_FRAG (1<<21) | 1130 | #define IPW_DL_FRAG (1<<21) |
@@ -1182,7 +1138,6 @@ do { if (ipw_debug_level & (level)) \ | |||
1182 | 1138 | ||
1183 | #define IPW_DL_STATS (1<<29) | 1139 | #define IPW_DL_STATS (1<<29) |
1184 | 1140 | ||
1185 | |||
1186 | #define IPW_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) | 1141 | #define IPW_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) |
1187 | #define IPW_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) | 1142 | #define IPW_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) |
1188 | #define IPW_DEBUG_INFO(f, a...) IPW_DEBUG(IPW_DL_INFO, f, ## a) | 1143 | #define IPW_DEBUG_INFO(f, a...) IPW_DEBUG(IPW_DL_INFO, f, ## a) |
@@ -1251,12 +1206,12 @@ do { if (ipw_debug_level & (level)) \ | |||
1251 | /* | 1206 | /* |
1252 | * RESET Register Bit Indexes | 1207 | * RESET Register Bit Indexes |
1253 | */ | 1208 | */ |
1254 | #define CBD_RESET_REG_PRINCETON_RESET 0x00000001 /* Bit 0 (LSB) */ | 1209 | #define CBD_RESET_REG_PRINCETON_RESET 0x00000001 /* Bit 0 (LSB) */ |
1255 | #define CX2_RESET_REG_SW_RESET 0x00000080 /* Bit 7 */ | 1210 | #define CX2_RESET_REG_SW_RESET 0x00000080 /* Bit 7 */ |
1256 | #define CX2_RESET_REG_MASTER_DISABLED 0x00000100 /* Bit 8 */ | 1211 | #define CX2_RESET_REG_MASTER_DISABLED 0x00000100 /* Bit 8 */ |
1257 | #define CX2_RESET_REG_STOP_MASTER 0x00000200 /* Bit 9 */ | 1212 | #define CX2_RESET_REG_STOP_MASTER 0x00000200 /* Bit 9 */ |
1258 | #define CX2_ARC_KESHET_CONFIG 0x08000000 /* Bit 27 */ | 1213 | #define CX2_ARC_KESHET_CONFIG 0x08000000 /* Bit 27 */ |
1259 | #define CX2_START_STANDBY 0x00000004 /* Bit 2 */ | 1214 | #define CX2_START_STANDBY 0x00000004 /* Bit 2 */ |
1260 | 1215 | ||
1261 | #define CX2_CSR_CIS_UPPER_BOUND 0x00000200 | 1216 | #define CX2_CSR_CIS_UPPER_BOUND 0x00000200 |
1262 | #define CX2_DOMAIN_0_END 0x1000 | 1217 | #define CX2_DOMAIN_0_END 0x1000 |
@@ -1287,14 +1242,12 @@ do { if (ipw_debug_level & (level)) \ | |||
1287 | #define CB_SRC_SIZE_LONG 0x00200000 | 1242 | #define CB_SRC_SIZE_LONG 0x00200000 |
1288 | #define CB_DEST_SIZE_LONG 0x00020000 | 1243 | #define CB_DEST_SIZE_LONG 0x00020000 |
1289 | 1244 | ||
1290 | |||
1291 | /* DMA DEFINES */ | 1245 | /* DMA DEFINES */ |
1292 | 1246 | ||
1293 | #define DMA_CONTROL_SMALL_CB_CONST_VALUE 0x00540000 | 1247 | #define DMA_CONTROL_SMALL_CB_CONST_VALUE 0x00540000 |
1294 | #define DMA_CB_STOP_AND_ABORT 0x00000C00 | 1248 | #define DMA_CB_STOP_AND_ABORT 0x00000C00 |
1295 | #define DMA_CB_START 0x00000100 | 1249 | #define DMA_CB_START 0x00000100 |
1296 | 1250 | ||
1297 | |||
1298 | #define CX2_SHARED_SRAM_SIZE 0x00030000 | 1251 | #define CX2_SHARED_SRAM_SIZE 0x00030000 |
1299 | #define CX2_SHARED_SRAM_DMA_CONTROL 0x00027000 | 1252 | #define CX2_SHARED_SRAM_DMA_CONTROL 0x00027000 |
1300 | #define CB_MAX_LENGTH 0x1FFF | 1253 | #define CB_MAX_LENGTH 0x1FFF |
@@ -1302,7 +1255,6 @@ do { if (ipw_debug_level & (level)) \ | |||
1302 | #define CX2_HOST_EEPROM_DATA_SRAM_SIZE 0xA18 | 1255 | #define CX2_HOST_EEPROM_DATA_SRAM_SIZE 0xA18 |
1303 | #define CX2_EEPROM_IMAGE_SIZE 0x100 | 1256 | #define CX2_EEPROM_IMAGE_SIZE 0x100 |
1304 | 1257 | ||
1305 | |||
1306 | /* DMA defs */ | 1258 | /* DMA defs */ |
1307 | #define CX2_DMA_I_CURRENT_CB 0x003000D0 | 1259 | #define CX2_DMA_I_CURRENT_CB 0x003000D0 |
1308 | #define CX2_DMA_O_CURRENT_CB 0x003000D4 | 1260 | #define CX2_DMA_O_CURRENT_CB 0x003000D4 |
@@ -1354,7 +1306,6 @@ do { if (ipw_debug_level & (level)) \ | |||
1354 | #define IPW_WHO_IS_AWAKE (CX2_SHARED_LOWER_BOUND + 0xB14) | 1306 | #define IPW_WHO_IS_AWAKE (CX2_SHARED_LOWER_BOUND + 0xB14) |
1355 | #define IPW_DURING_ATIM_WINDOW (CX2_SHARED_LOWER_BOUND + 0xB18) | 1307 | #define IPW_DURING_ATIM_WINDOW (CX2_SHARED_LOWER_BOUND + 0xB18) |
1356 | 1308 | ||
1357 | |||
1358 | #define MSB 1 | 1309 | #define MSB 1 |
1359 | #define LSB 0 | 1310 | #define LSB 0 |
1360 | #define WORD_TO_BYTE(_word) ((_word) * sizeof(u16)) | 1311 | #define WORD_TO_BYTE(_word) ((_word) * sizeof(u16)) |
@@ -1363,16 +1314,16 @@ do { if (ipw_debug_level & (level)) \ | |||
1363 | ( WORD_TO_BYTE(_wordoffset) + (_byteoffset) ) | 1314 | ( WORD_TO_BYTE(_wordoffset) + (_byteoffset) ) |
1364 | 1315 | ||
1365 | /* EEPROM access by BYTE */ | 1316 | /* EEPROM access by BYTE */ |
1366 | #define EEPROM_PME_CAPABILITY (GET_EEPROM_ADDR(0x09,MSB)) /* 1 byte */ | 1317 | #define EEPROM_PME_CAPABILITY (GET_EEPROM_ADDR(0x09,MSB)) /* 1 byte */ |
1367 | #define EEPROM_MAC_ADDRESS (GET_EEPROM_ADDR(0x21,LSB)) /* 6 byte */ | 1318 | #define EEPROM_MAC_ADDRESS (GET_EEPROM_ADDR(0x21,LSB)) /* 6 byte */ |
1368 | #define EEPROM_VERSION (GET_EEPROM_ADDR(0x24,MSB)) /* 1 byte */ | 1319 | #define EEPROM_VERSION (GET_EEPROM_ADDR(0x24,MSB)) /* 1 byte */ |
1369 | #define EEPROM_NIC_TYPE (GET_EEPROM_ADDR(0x25,LSB)) /* 1 byte */ | 1320 | #define EEPROM_NIC_TYPE (GET_EEPROM_ADDR(0x25,LSB)) /* 1 byte */ |
1370 | #define EEPROM_SKU_CAPABILITY (GET_EEPROM_ADDR(0x25,MSB)) /* 1 byte */ | 1321 | #define EEPROM_SKU_CAPABILITY (GET_EEPROM_ADDR(0x25,MSB)) /* 1 byte */ |
1371 | #define EEPROM_COUNTRY_CODE (GET_EEPROM_ADDR(0x26,LSB)) /* 3 bytes */ | 1322 | #define EEPROM_COUNTRY_CODE (GET_EEPROM_ADDR(0x26,LSB)) /* 3 bytes */ |
1372 | #define EEPROM_IBSS_CHANNELS_BG (GET_EEPROM_ADDR(0x28,LSB)) /* 2 bytes */ | 1323 | #define EEPROM_IBSS_CHANNELS_BG (GET_EEPROM_ADDR(0x28,LSB)) /* 2 bytes */ |
1373 | #define EEPROM_IBSS_CHANNELS_A (GET_EEPROM_ADDR(0x29,MSB)) /* 5 bytes */ | 1324 | #define EEPROM_IBSS_CHANNELS_A (GET_EEPROM_ADDR(0x29,MSB)) /* 5 bytes */ |
1374 | #define EEPROM_BSS_CHANNELS_BG (GET_EEPROM_ADDR(0x2c,LSB)) /* 2 bytes */ | 1325 | #define EEPROM_BSS_CHANNELS_BG (GET_EEPROM_ADDR(0x2c,LSB)) /* 2 bytes */ |
1375 | #define EEPROM_HW_VERSION (GET_EEPROM_ADDR(0x72,LSB)) /* 2 bytes */ | 1326 | #define EEPROM_HW_VERSION (GET_EEPROM_ADDR(0x72,LSB)) /* 2 bytes */ |
1376 | 1327 | ||
1377 | /* NIC type as found in the one byte EEPROM_NIC_TYPE offset*/ | 1328 | /* NIC type as found in the one byte EEPROM_NIC_TYPE offset*/ |
1378 | #define EEPROM_NIC_TYPE_STANDARD 0 | 1329 | #define EEPROM_NIC_TYPE_STANDARD 0 |
@@ -1477,7 +1428,6 @@ enum { | |||
1477 | #define IPW_RATE_CAPABILITIES 1 | 1428 | #define IPW_RATE_CAPABILITIES 1 |
1478 | #define IPW_RATE_CONNECT 0 | 1429 | #define IPW_RATE_CONNECT 0 |
1479 | 1430 | ||
1480 | |||
1481 | /* | 1431 | /* |
1482 | * Rate values and masks | 1432 | * Rate values and masks |
1483 | */ | 1433 | */ |
@@ -1522,12 +1472,6 @@ enum { | |||
1522 | IPW_ORD_STAT_TX_DIR_DATA_B_11, | 1472 | IPW_ORD_STAT_TX_DIR_DATA_B_11, |
1523 | /* Hole */ | 1473 | /* Hole */ |
1524 | 1474 | ||
1525 | |||
1526 | |||
1527 | |||
1528 | |||
1529 | |||
1530 | |||
1531 | IPW_ORD_STAT_TX_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 19, | 1475 | IPW_ORD_STAT_TX_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 19, |
1532 | IPW_ORD_STAT_TX_DIR_DATA_G_2, | 1476 | IPW_ORD_STAT_TX_DIR_DATA_G_2, |
1533 | IPW_ORD_STAT_TX_DIR_DATA_G_5_5, | 1477 | IPW_ORD_STAT_TX_DIR_DATA_G_5_5, |
@@ -1547,12 +1491,6 @@ enum { | |||
1547 | IPW_ORD_STAT_TX_NON_DIR_DATA_B_11, | 1491 | IPW_ORD_STAT_TX_NON_DIR_DATA_B_11, |
1548 | /* Hole */ | 1492 | /* Hole */ |
1549 | 1493 | ||
1550 | |||
1551 | |||
1552 | |||
1553 | |||
1554 | |||
1555 | |||
1556 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 44, | 1494 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 44, |
1557 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_2, | 1495 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_2, |
1558 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_5_5, | 1496 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_5_5, |
@@ -1683,7 +1621,7 @@ struct host_cmd { | |||
1683 | #define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08 | 1621 | #define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08 |
1684 | #define CFG_BT_COEXISTENCE_OOB 0x10 | 1622 | #define CFG_BT_COEXISTENCE_OOB 0x10 |
1685 | #define CFG_BT_COEXISTENCE_MAX 0xFF | 1623 | #define CFG_BT_COEXISTENCE_MAX 0xFF |
1686 | #define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM*/ | 1624 | #define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM */ |
1687 | 1625 | ||
1688 | #define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x0 | 1626 | #define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x0 |
1689 | #define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x1 | 1627 | #define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x1 |
@@ -1725,11 +1663,11 @@ static inline u32 frame_hdr_len(struct ieee80211_hdr *hdr) | |||
1725 | fc = le16_to_cpu(hdr->frame_ctl); | 1663 | fc = le16_to_cpu(hdr->frame_ctl); |
1726 | 1664 | ||
1727 | /* | 1665 | /* |
1728 | * Function ToDS FromDS | 1666 | * Function ToDS FromDS |
1729 | * IBSS 0 0 | 1667 | * IBSS 0 0 |
1730 | * To AP 1 0 | 1668 | * To AP 1 0 |
1731 | * From AP 0 1 | 1669 | * From AP 0 1 |
1732 | * WDS (bridge) 1 1 | 1670 | * WDS (bridge) 1 1 |
1733 | * | 1671 | * |
1734 | * Only WDS frames use Address4 among them. --YZ | 1672 | * Only WDS frames use Address4 among them. --YZ |
1735 | */ | 1673 | */ |
@@ -1739,4 +1677,4 @@ static inline u32 frame_hdr_len(struct ieee80211_hdr *hdr) | |||
1739 | return retval; | 1677 | return retval; |
1740 | } | 1678 | } |
1741 | 1679 | ||
1742 | #endif /* __ipw2200_h__ */ | 1680 | #endif /* __ipw2200_h__ */ |