diff options
Diffstat (limited to 'drivers/net/wireless/ipw2200.c')
-rw-r--r-- | drivers/net/wireless/ipw2200.c | 2270 |
1 files changed, 1150 insertions, 1120 deletions
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c index 2a3bd607a5cd..b7f275c00de3 100644 --- a/drivers/net/wireless/ipw2200.c +++ b/drivers/net/wireless/ipw2200.c | |||
@@ -72,7 +72,8 @@ static void ipw_rx_queue_replenish(void *); | |||
72 | static int ipw_up(struct ipw_priv *); | 72 | static int ipw_up(struct ipw_priv *); |
73 | static void ipw_down(struct ipw_priv *); | 73 | static void ipw_down(struct ipw_priv *); |
74 | static int ipw_config(struct ipw_priv *); | 74 | static int ipw_config(struct ipw_priv *); |
75 | static int init_supported_rates(struct ipw_priv *priv, struct ipw_supported_rates *prates); | 75 | static int init_supported_rates(struct ipw_priv *priv, |
76 | struct ipw_supported_rates *prates); | ||
76 | 77 | ||
77 | static u8 band_b_active_channel[MAX_B_CHANNELS] = { | 78 | static u8 band_b_active_channel[MAX_B_CHANNELS] = { |
78 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0 | 79 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0 |
@@ -102,7 +103,7 @@ static int is_valid_channel(int mode_mask, int channel) | |||
102 | } | 103 | } |
103 | 104 | ||
104 | static char *snprint_line(char *buf, size_t count, | 105 | static char *snprint_line(char *buf, size_t count, |
105 | const u8 *data, u32 len, u32 ofs) | 106 | const u8 * data, u32 len, u32 ofs) |
106 | { | 107 | { |
107 | int out, i, j, l; | 108 | int out, i, j, l; |
108 | char c; | 109 | char c; |
@@ -136,7 +137,7 @@ static char *snprint_line(char *buf, size_t count, | |||
136 | return buf; | 137 | return buf; |
137 | } | 138 | } |
138 | 139 | ||
139 | static void printk_buf(int level, const u8 *data, u32 len) | 140 | static void printk_buf(int level, const u8 * data, u32 len) |
140 | { | 141 | { |
141 | char line[81]; | 142 | char line[81]; |
142 | u32 ofs = 0; | 143 | u32 ofs = 0; |
@@ -161,21 +162,24 @@ static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg); | |||
161 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value); | 162 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value); |
162 | static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c) | 163 | static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c) |
163 | { | 164 | { |
164 | IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c)); | 165 | IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, |
166 | __LINE__, (u32) (b), (u32) (c)); | ||
165 | _ipw_write_reg8(a, b, c); | 167 | _ipw_write_reg8(a, b, c); |
166 | } | 168 | } |
167 | 169 | ||
168 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value); | 170 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value); |
169 | static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c) | 171 | static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c) |
170 | { | 172 | { |
171 | IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c)); | 173 | IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, |
174 | __LINE__, (u32) (b), (u32) (c)); | ||
172 | _ipw_write_reg16(a, b, c); | 175 | _ipw_write_reg16(a, b, c); |
173 | } | 176 | } |
174 | 177 | ||
175 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value); | 178 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value); |
176 | static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) | 179 | static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) |
177 | { | 180 | { |
178 | IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c)); | 181 | IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, |
182 | __LINE__, (u32) (b), (u32) (c)); | ||
179 | _ipw_write_reg32(a, b, c); | 183 | _ipw_write_reg32(a, b, c); |
180 | } | 184 | } |
181 | 185 | ||
@@ -195,24 +199,30 @@ static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) | |||
195 | _ipw_write32(ipw, ofs, val) | 199 | _ipw_write32(ipw, ofs, val) |
196 | 200 | ||
197 | #define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs)) | 201 | #define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs)) |
198 | static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) { | 202 | static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) |
199 | IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32)(ofs)); | 203 | { |
204 | IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32) (ofs)); | ||
200 | return _ipw_read8(ipw, ofs); | 205 | return _ipw_read8(ipw, ofs); |
201 | } | 206 | } |
207 | |||
202 | #define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs) | 208 | #define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs) |
203 | 209 | ||
204 | #define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs)) | 210 | #define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs)) |
205 | static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) { | 211 | static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) |
206 | IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32)(ofs)); | 212 | { |
213 | IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32) (ofs)); | ||
207 | return _ipw_read16(ipw, ofs); | 214 | return _ipw_read16(ipw, ofs); |
208 | } | 215 | } |
216 | |||
209 | #define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs) | 217 | #define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs) |
210 | 218 | ||
211 | #define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs)) | 219 | #define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs)) |
212 | static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) { | 220 | static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) |
213 | IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32)(ofs)); | 221 | { |
222 | IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32) (ofs)); | ||
214 | return _ipw_read32(ipw, ofs); | 223 | return _ipw_read32(ipw, ofs); |
215 | } | 224 | } |
225 | |||
216 | #define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs) | 226 | #define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs) |
217 | 227 | ||
218 | static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int); | 228 | static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int); |
@@ -220,34 +230,30 @@ static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int); | |||
220 | IPW_DEBUG_IO("%s %d: read_inddirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ | 230 | IPW_DEBUG_IO("%s %d: read_inddirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ |
221 | _ipw_read_indirect(a, b, c, d) | 231 | _ipw_read_indirect(a, b, c, d) |
222 | 232 | ||
223 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *data, int num); | 233 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * data, |
234 | int num); | ||
224 | #define ipw_write_indirect(a, b, c, d) \ | 235 | #define ipw_write_indirect(a, b, c, d) \ |
225 | IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ | 236 | IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ |
226 | _ipw_write_indirect(a, b, c, d) | 237 | _ipw_write_indirect(a, b, c, d) |
227 | 238 | ||
228 | /* indirect write s */ | 239 | /* indirect write s */ |
229 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, | 240 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value) |
230 | u32 value) | ||
231 | { | 241 | { |
232 | IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", | 242 | IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", priv, reg, value); |
233 | priv, reg, value); | ||
234 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg); | 243 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg); |
235 | _ipw_write32(priv, CX2_INDIRECT_DATA, value); | 244 | _ipw_write32(priv, CX2_INDIRECT_DATA, value); |
236 | } | 245 | } |
237 | 246 | ||
238 | |||
239 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value) | 247 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value) |
240 | { | 248 | { |
241 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); | 249 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); |
242 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); | 250 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); |
243 | _ipw_write8(priv, CX2_INDIRECT_DATA, value); | 251 | _ipw_write8(priv, CX2_INDIRECT_DATA, value); |
244 | IPW_DEBUG_IO(" reg = 0x%8lX : value = 0x%8X\n", | 252 | IPW_DEBUG_IO(" reg = 0x%8lX : value = 0x%8X\n", |
245 | (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA), | 253 | (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA), value); |
246 | value); | ||
247 | } | 254 | } |
248 | 255 | ||
249 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, | 256 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value) |
250 | u16 value) | ||
251 | { | 257 | { |
252 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); | 258 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); |
253 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); | 259 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); |
@@ -262,7 +268,7 @@ static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg) | |||
262 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); | 268 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); |
263 | IPW_DEBUG_IO(" reg = 0x%8X : \n", reg); | 269 | IPW_DEBUG_IO(" reg = 0x%8X : \n", reg); |
264 | word = _ipw_read32(priv, CX2_INDIRECT_DATA); | 270 | word = _ipw_read32(priv, CX2_INDIRECT_DATA); |
265 | return (word >> ((reg & 0x3)*8)) & 0xff; | 271 | return (word >> ((reg & 0x3) * 8)) & 0xff; |
266 | } | 272 | } |
267 | 273 | ||
268 | static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg) | 274 | static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg) |
@@ -302,7 +308,7 @@ static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf, | |||
302 | _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr); | 308 | _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr); |
303 | aligned_len = num & CX2_INDIRECT_ADDR_MASK; | 309 | aligned_len = num & CX2_INDIRECT_ADDR_MASK; |
304 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) | 310 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) |
305 | *(u32*)buf = ipw_read32(priv, CX2_AUTOINC_DATA); | 311 | *(u32 *) buf = ipw_read32(priv, CX2_AUTOINC_DATA); |
306 | 312 | ||
307 | /* Copy the last nibble */ | 313 | /* Copy the last nibble */ |
308 | dif_len = num - aligned_len; | 314 | dif_len = num - aligned_len; |
@@ -311,7 +317,7 @@ static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf, | |||
311 | *buf = ipw_read8(priv, CX2_INDIRECT_DATA + i); | 317 | *buf = ipw_read8(priv, CX2_INDIRECT_DATA + i); |
312 | } | 318 | } |
313 | 319 | ||
314 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf, | 320 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * buf, |
315 | int num) | 321 | int num) |
316 | { | 322 | { |
317 | u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK; | 323 | u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK; |
@@ -335,7 +341,7 @@ static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf, | |||
335 | _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr); | 341 | _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr); |
336 | aligned_len = num & CX2_INDIRECT_ADDR_MASK; | 342 | aligned_len = num & CX2_INDIRECT_ADDR_MASK; |
337 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) | 343 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) |
338 | _ipw_write32(priv, CX2_AUTOINC_DATA, *(u32*)buf); | 344 | _ipw_write32(priv, CX2_AUTOINC_DATA, *(u32 *) buf); |
339 | 345 | ||
340 | /* Copy the last nibble */ | 346 | /* Copy the last nibble */ |
341 | dif_len = num - aligned_len; | 347 | dif_len = num - aligned_len; |
@@ -428,20 +434,18 @@ static void ipw_dump_nic_error_log(struct ipw_priv *priv) | |||
428 | } | 434 | } |
429 | 435 | ||
430 | for (i = ERROR_START_OFFSET; | 436 | for (i = ERROR_START_OFFSET; |
431 | i <= count * ERROR_ELEM_SIZE; | 437 | i <= count * ERROR_ELEM_SIZE; i += ERROR_ELEM_SIZE) { |
432 | i += ERROR_ELEM_SIZE) { | 438 | desc = ipw_read_reg32(priv, base + i); |
433 | desc = ipw_read_reg32(priv, base + i); | 439 | time = ipw_read_reg32(priv, base + i + 1 * sizeof(u32)); |
434 | time = ipw_read_reg32(priv, base + i + 1*sizeof(u32)); | 440 | blink1 = ipw_read_reg32(priv, base + i + 2 * sizeof(u32)); |
435 | blink1 = ipw_read_reg32(priv, base + i + 2*sizeof(u32)); | 441 | blink2 = ipw_read_reg32(priv, base + i + 3 * sizeof(u32)); |
436 | blink2 = ipw_read_reg32(priv, base + i + 3*sizeof(u32)); | 442 | ilink1 = ipw_read_reg32(priv, base + i + 4 * sizeof(u32)); |
437 | ilink1 = ipw_read_reg32(priv, base + i + 4*sizeof(u32)); | 443 | ilink2 = ipw_read_reg32(priv, base + i + 5 * sizeof(u32)); |
438 | ilink2 = ipw_read_reg32(priv, base + i + 5*sizeof(u32)); | 444 | idata = ipw_read_reg32(priv, base + i + 6 * sizeof(u32)); |
439 | idata = ipw_read_reg32(priv, base + i + 6*sizeof(u32)); | ||
440 | 445 | ||
441 | IPW_ERROR( | 446 | IPW_ERROR("%s %i 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", |
442 | "%s %i 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", | 447 | ipw_error_desc(desc), time, blink1, blink2, |
443 | ipw_error_desc(desc), time, blink1, blink2, | 448 | ilink1, ilink2, idata); |
444 | ilink1, ilink2, idata); | ||
445 | } | 449 | } |
446 | } | 450 | } |
447 | 451 | ||
@@ -456,11 +460,10 @@ static void ipw_dump_nic_event_log(struct ipw_priv *priv) | |||
456 | IPW_ERROR("Start IPW Event Log Dump:\n"); | 460 | IPW_ERROR("Start IPW Event Log Dump:\n"); |
457 | 461 | ||
458 | for (i = EVENT_START_OFFSET; | 462 | for (i = EVENT_START_OFFSET; |
459 | i <= count * EVENT_ELEM_SIZE; | 463 | i <= count * EVENT_ELEM_SIZE; i += EVENT_ELEM_SIZE) { |
460 | i += EVENT_ELEM_SIZE) { | ||
461 | ev = ipw_read_reg32(priv, base + i); | 464 | ev = ipw_read_reg32(priv, base + i); |
462 | time = ipw_read_reg32(priv, base + i + 1*sizeof(u32)); | 465 | time = ipw_read_reg32(priv, base + i + 1 * sizeof(u32)); |
463 | data = ipw_read_reg32(priv, base + i + 2*sizeof(u32)); | 466 | data = ipw_read_reg32(priv, base + i + 2 * sizeof(u32)); |
464 | 467 | ||
465 | #ifdef CONFIG_IPW_DEBUG | 468 | #ifdef CONFIG_IPW_DEBUG |
466 | IPW_ERROR("%i\t0x%08x\t%i\n", time, data, ev); | 469 | IPW_ERROR("%i\t0x%08x\t%i\n", time, data, ev); |
@@ -468,8 +471,7 @@ static void ipw_dump_nic_event_log(struct ipw_priv *priv) | |||
468 | } | 471 | } |
469 | } | 472 | } |
470 | 473 | ||
471 | static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, | 474 | static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, u32 * len) |
472 | u32 *len) | ||
473 | { | 475 | { |
474 | u32 addr, field_info, field_len, field_count, total_len; | 476 | u32 addr, field_info, field_len, field_count, total_len; |
475 | 477 | ||
@@ -513,11 +515,11 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, | |||
513 | } | 515 | } |
514 | 516 | ||
515 | IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n", | 517 | IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n", |
516 | ord, priv->table0_addr + (ord << 2)); | 518 | ord, priv->table0_addr + (ord << 2)); |
517 | 519 | ||
518 | *len = sizeof(u32); | 520 | *len = sizeof(u32); |
519 | ord <<= 2; | 521 | ord <<= 2; |
520 | *((u32 *)val) = ipw_read32(priv, priv->table0_addr + ord); | 522 | *((u32 *) val) = ipw_read32(priv, priv->table0_addr + ord); |
521 | break; | 523 | break; |
522 | 524 | ||
523 | case IPW_ORD_TABLE_1_MASK: | 525 | case IPW_ORD_TABLE_1_MASK: |
@@ -545,7 +547,8 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, | |||
545 | return -EINVAL; | 547 | return -EINVAL; |
546 | } | 548 | } |
547 | 549 | ||
548 | *((u32 *)val) = ipw_read_reg32(priv, (priv->table1_addr + (ord << 2))); | 550 | *((u32 *) val) = |
551 | ipw_read_reg32(priv, (priv->table1_addr + (ord << 2))); | ||
549 | *len = sizeof(u32); | 552 | *len = sizeof(u32); |
550 | break; | 553 | break; |
551 | 554 | ||
@@ -573,13 +576,16 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, | |||
573 | 576 | ||
574 | /* get the second DW of statistics ; | 577 | /* get the second DW of statistics ; |
575 | * two 16-bit words - first is length, second is count */ | 578 | * two 16-bit words - first is length, second is count */ |
576 | field_info = ipw_read_reg32(priv, priv->table2_addr + (ord << 3) + sizeof(u32)); | 579 | field_info = |
580 | ipw_read_reg32(priv, | ||
581 | priv->table2_addr + (ord << 3) + | ||
582 | sizeof(u32)); | ||
577 | 583 | ||
578 | /* get each entry length */ | 584 | /* get each entry length */ |
579 | field_len = *((u16 *)&field_info); | 585 | field_len = *((u16 *) & field_info); |
580 | 586 | ||
581 | /* get number of entries */ | 587 | /* get number of entries */ |
582 | field_count = *(((u16 *)&field_info) + 1); | 588 | field_count = *(((u16 *) & field_info) + 1); |
583 | 589 | ||
584 | /* abort if not enought memory */ | 590 | /* abort if not enought memory */ |
585 | total_len = field_len * field_count; | 591 | total_len = field_len * field_count; |
@@ -604,7 +610,6 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, | |||
604 | 610 | ||
605 | } | 611 | } |
606 | 612 | ||
607 | |||
608 | return 0; | 613 | return 0; |
609 | } | 614 | } |
610 | 615 | ||
@@ -624,7 +629,7 @@ static void ipw_init_ordinals(struct ipw_priv *priv) | |||
624 | 629 | ||
625 | priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2); | 630 | priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2); |
626 | priv->table2_len = ipw_read_reg32(priv, priv->table2_addr); | 631 | priv->table2_len = ipw_read_reg32(priv, priv->table2_addr); |
627 | priv->table2_len &= 0x0000ffff; /* use first two bytes */ | 632 | priv->table2_len &= 0x0000ffff; /* use first two bytes */ |
628 | 633 | ||
629 | IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n", | 634 | IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n", |
630 | priv->table2_addr, priv->table2_len); | 635 | priv->table2_addr, priv->table2_len); |
@@ -643,7 +648,7 @@ static ssize_t show_debug_level(struct device_driver *d, char *buf) | |||
643 | return sprintf(buf, "0x%08X\n", ipw_debug_level); | 648 | return sprintf(buf, "0x%08X\n", ipw_debug_level); |
644 | } | 649 | } |
645 | static ssize_t store_debug_level(struct device_driver *d, | 650 | static ssize_t store_debug_level(struct device_driver *d, |
646 | const char *buf, size_t count) | 651 | const char *buf, size_t count) |
647 | { | 652 | { |
648 | char *p = (char *)buf; | 653 | char *p = (char *)buf; |
649 | u32 val; | 654 | u32 val; |
@@ -668,11 +673,12 @@ static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | |||
668 | show_debug_level, store_debug_level); | 673 | show_debug_level, store_debug_level); |
669 | 674 | ||
670 | static ssize_t show_status(struct device *d, | 675 | static ssize_t show_status(struct device *d, |
671 | struct device_attribute *attr, char *buf) | 676 | struct device_attribute *attr, char *buf) |
672 | { | 677 | { |
673 | struct ipw_priv *p = d->driver_data; | 678 | struct ipw_priv *p = d->driver_data; |
674 | return sprintf(buf, "0x%08x\n", (int)p->status); | 679 | return sprintf(buf, "0x%08x\n", (int)p->status); |
675 | } | 680 | } |
681 | |||
676 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | 682 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); |
677 | 683 | ||
678 | static ssize_t show_cfg(struct device *d, struct device_attribute *attr, | 684 | static ssize_t show_cfg(struct device *d, struct device_attribute *attr, |
@@ -681,10 +687,11 @@ static ssize_t show_cfg(struct device *d, struct device_attribute *attr, | |||
681 | struct ipw_priv *p = d->driver_data; | 687 | struct ipw_priv *p = d->driver_data; |
682 | return sprintf(buf, "0x%08x\n", (int)p->config); | 688 | return sprintf(buf, "0x%08x\n", (int)p->config); |
683 | } | 689 | } |
690 | |||
684 | static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL); | 691 | static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL); |
685 | 692 | ||
686 | static ssize_t show_nic_type(struct device *d, | 693 | static ssize_t show_nic_type(struct device *d, |
687 | struct device_attribute *attr, char *buf) | 694 | struct device_attribute *attr, char *buf) |
688 | { | 695 | { |
689 | struct ipw_priv *p = d->driver_data; | 696 | struct ipw_priv *p = d->driver_data; |
690 | u8 type = p->eeprom[EEPROM_NIC_TYPE]; | 697 | u8 type = p->eeprom[EEPROM_NIC_TYPE]; |
@@ -704,44 +711,50 @@ static ssize_t show_nic_type(struct device *d, | |||
704 | 711 | ||
705 | return sprintf(buf, "UNKNOWN\n"); | 712 | return sprintf(buf, "UNKNOWN\n"); |
706 | } | 713 | } |
714 | |||
707 | static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL); | 715 | static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL); |
708 | 716 | ||
709 | static ssize_t dump_error_log(struct device *d, | 717 | static ssize_t dump_error_log(struct device *d, |
710 | struct device_attribute *attr, const char *buf, size_t count) | 718 | struct device_attribute *attr, const char *buf, |
719 | size_t count) | ||
711 | { | 720 | { |
712 | char *p = (char *)buf; | 721 | char *p = (char *)buf; |
713 | 722 | ||
714 | if (p[0] == '1') | 723 | if (p[0] == '1') |
715 | ipw_dump_nic_error_log((struct ipw_priv*)d->driver_data); | 724 | ipw_dump_nic_error_log((struct ipw_priv *)d->driver_data); |
716 | 725 | ||
717 | return strnlen(buf, count); | 726 | return strnlen(buf, count); |
718 | } | 727 | } |
728 | |||
719 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | 729 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); |
720 | 730 | ||
721 | static ssize_t dump_event_log(struct device *d, | 731 | static ssize_t dump_event_log(struct device *d, |
722 | struct device_attribute *attr, const char *buf, size_t count) | 732 | struct device_attribute *attr, const char *buf, |
733 | size_t count) | ||
723 | { | 734 | { |
724 | char *p = (char *)buf; | 735 | char *p = (char *)buf; |
725 | 736 | ||
726 | if (p[0] == '1') | 737 | if (p[0] == '1') |
727 | ipw_dump_nic_event_log((struct ipw_priv*)d->driver_data); | 738 | ipw_dump_nic_event_log((struct ipw_priv *)d->driver_data); |
728 | 739 | ||
729 | return strnlen(buf, count); | 740 | return strnlen(buf, count); |
730 | } | 741 | } |
742 | |||
731 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | 743 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); |
732 | 744 | ||
733 | static ssize_t show_ucode_version(struct device *d, | 745 | static ssize_t show_ucode_version(struct device *d, |
734 | struct device_attribute *attr, char *buf) | 746 | struct device_attribute *attr, char *buf) |
735 | { | 747 | { |
736 | u32 len = sizeof(u32), tmp = 0; | 748 | u32 len = sizeof(u32), tmp = 0; |
737 | struct ipw_priv *p = d->driver_data; | 749 | struct ipw_priv *p = d->driver_data; |
738 | 750 | ||
739 | if(ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len)) | 751 | if (ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len)) |
740 | return 0; | 752 | return 0; |
741 | 753 | ||
742 | return sprintf(buf, "0x%08x\n", tmp); | 754 | return sprintf(buf, "0x%08x\n", tmp); |
743 | } | 755 | } |
744 | static DEVICE_ATTR(ucode_version, S_IWUSR|S_IRUGO, show_ucode_version, NULL); | 756 | |
757 | static DEVICE_ATTR(ucode_version, S_IWUSR | S_IRUGO, show_ucode_version, NULL); | ||
745 | 758 | ||
746 | static ssize_t show_rtc(struct device *d, struct device_attribute *attr, | 759 | static ssize_t show_rtc(struct device *d, struct device_attribute *attr, |
747 | char *buf) | 760 | char *buf) |
@@ -749,36 +762,38 @@ static ssize_t show_rtc(struct device *d, struct device_attribute *attr, | |||
749 | u32 len = sizeof(u32), tmp = 0; | 762 | u32 len = sizeof(u32), tmp = 0; |
750 | struct ipw_priv *p = d->driver_data; | 763 | struct ipw_priv *p = d->driver_data; |
751 | 764 | ||
752 | if(ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len)) | 765 | if (ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len)) |
753 | return 0; | 766 | return 0; |
754 | 767 | ||
755 | return sprintf(buf, "0x%08x\n", tmp); | 768 | return sprintf(buf, "0x%08x\n", tmp); |
756 | } | 769 | } |
757 | static DEVICE_ATTR(rtc, S_IWUSR|S_IRUGO, show_rtc, NULL); | 770 | |
771 | static DEVICE_ATTR(rtc, S_IWUSR | S_IRUGO, show_rtc, NULL); | ||
758 | 772 | ||
759 | /* | 773 | /* |
760 | * Add a device attribute to view/control the delay between eeprom | 774 | * Add a device attribute to view/control the delay between eeprom |
761 | * operations. | 775 | * operations. |
762 | */ | 776 | */ |
763 | static ssize_t show_eeprom_delay(struct device *d, | 777 | static ssize_t show_eeprom_delay(struct device *d, |
764 | struct device_attribute *attr, char *buf) | 778 | struct device_attribute *attr, char *buf) |
765 | { | 779 | { |
766 | int n = ((struct ipw_priv*)d->driver_data)->eeprom_delay; | 780 | int n = ((struct ipw_priv *)d->driver_data)->eeprom_delay; |
767 | return sprintf(buf, "%i\n", n); | 781 | return sprintf(buf, "%i\n", n); |
768 | } | 782 | } |
769 | static ssize_t store_eeprom_delay(struct device *d, | 783 | static ssize_t store_eeprom_delay(struct device *d, |
770 | struct device_attribute *attr, const char *buf, | 784 | struct device_attribute *attr, |
771 | size_t count) | 785 | const char *buf, size_t count) |
772 | { | 786 | { |
773 | struct ipw_priv *p = d->driver_data; | 787 | struct ipw_priv *p = d->driver_data; |
774 | sscanf(buf, "%i", &p->eeprom_delay); | 788 | sscanf(buf, "%i", &p->eeprom_delay); |
775 | return strnlen(buf, count); | 789 | return strnlen(buf, count); |
776 | } | 790 | } |
777 | static DEVICE_ATTR(eeprom_delay, S_IWUSR|S_IRUGO, | 791 | |
778 | show_eeprom_delay,store_eeprom_delay); | 792 | static DEVICE_ATTR(eeprom_delay, S_IWUSR | S_IRUGO, |
793 | show_eeprom_delay, store_eeprom_delay); | ||
779 | 794 | ||
780 | static ssize_t show_command_event_reg(struct device *d, | 795 | static ssize_t show_command_event_reg(struct device *d, |
781 | struct device_attribute *attr, char *buf) | 796 | struct device_attribute *attr, char *buf) |
782 | { | 797 | { |
783 | u32 reg = 0; | 798 | u32 reg = 0; |
784 | struct ipw_priv *p = d->driver_data; | 799 | struct ipw_priv *p = d->driver_data; |
@@ -787,8 +802,8 @@ static ssize_t show_command_event_reg(struct device *d, | |||
787 | return sprintf(buf, "0x%08x\n", reg); | 802 | return sprintf(buf, "0x%08x\n", reg); |
788 | } | 803 | } |
789 | static ssize_t store_command_event_reg(struct device *d, | 804 | static ssize_t store_command_event_reg(struct device *d, |
790 | struct device_attribute *attr, const char *buf, | 805 | struct device_attribute *attr, |
791 | size_t count) | 806 | const char *buf, size_t count) |
792 | { | 807 | { |
793 | u32 reg; | 808 | u32 reg; |
794 | struct ipw_priv *p = d->driver_data; | 809 | struct ipw_priv *p = d->driver_data; |
@@ -797,11 +812,12 @@ static ssize_t store_command_event_reg(struct device *d, | |||
797 | ipw_write_reg32(p, CX2_INTERNAL_CMD_EVENT, reg); | 812 | ipw_write_reg32(p, CX2_INTERNAL_CMD_EVENT, reg); |
798 | return strnlen(buf, count); | 813 | return strnlen(buf, count); |
799 | } | 814 | } |
800 | static DEVICE_ATTR(command_event_reg, S_IWUSR|S_IRUGO, | 815 | |
801 | show_command_event_reg,store_command_event_reg); | 816 | static DEVICE_ATTR(command_event_reg, S_IWUSR | S_IRUGO, |
817 | show_command_event_reg, store_command_event_reg); | ||
802 | 818 | ||
803 | static ssize_t show_mem_gpio_reg(struct device *d, | 819 | static ssize_t show_mem_gpio_reg(struct device *d, |
804 | struct device_attribute *attr, char *buf) | 820 | struct device_attribute *attr, char *buf) |
805 | { | 821 | { |
806 | u32 reg = 0; | 822 | u32 reg = 0; |
807 | struct ipw_priv *p = d->driver_data; | 823 | struct ipw_priv *p = d->driver_data; |
@@ -810,8 +826,8 @@ static ssize_t show_mem_gpio_reg(struct device *d, | |||
810 | return sprintf(buf, "0x%08x\n", reg); | 826 | return sprintf(buf, "0x%08x\n", reg); |
811 | } | 827 | } |
812 | static ssize_t store_mem_gpio_reg(struct device *d, | 828 | static ssize_t store_mem_gpio_reg(struct device *d, |
813 | struct device_attribute *attr, const char *buf, | 829 | struct device_attribute *attr, |
814 | size_t count) | 830 | const char *buf, size_t count) |
815 | { | 831 | { |
816 | u32 reg; | 832 | u32 reg; |
817 | struct ipw_priv *p = d->driver_data; | 833 | struct ipw_priv *p = d->driver_data; |
@@ -820,11 +836,12 @@ static ssize_t store_mem_gpio_reg(struct device *d, | |||
820 | ipw_write_reg32(p, 0x301100, reg); | 836 | ipw_write_reg32(p, 0x301100, reg); |
821 | return strnlen(buf, count); | 837 | return strnlen(buf, count); |
822 | } | 838 | } |
823 | static DEVICE_ATTR(mem_gpio_reg, S_IWUSR|S_IRUGO, | 839 | |
824 | show_mem_gpio_reg,store_mem_gpio_reg); | 840 | static DEVICE_ATTR(mem_gpio_reg, S_IWUSR | S_IRUGO, |
841 | show_mem_gpio_reg, store_mem_gpio_reg); | ||
825 | 842 | ||
826 | static ssize_t show_indirect_dword(struct device *d, | 843 | static ssize_t show_indirect_dword(struct device *d, |
827 | struct device_attribute *attr, char *buf) | 844 | struct device_attribute *attr, char *buf) |
828 | { | 845 | { |
829 | u32 reg = 0; | 846 | u32 reg = 0; |
830 | struct ipw_priv *priv = d->driver_data; | 847 | struct ipw_priv *priv = d->driver_data; |
@@ -836,8 +853,8 @@ static ssize_t show_indirect_dword(struct device *d, | |||
836 | return sprintf(buf, "0x%08x\n", reg); | 853 | return sprintf(buf, "0x%08x\n", reg); |
837 | } | 854 | } |
838 | static ssize_t store_indirect_dword(struct device *d, | 855 | static ssize_t store_indirect_dword(struct device *d, |
839 | struct device_attribute *attr, const char *buf, | 856 | struct device_attribute *attr, |
840 | size_t count) | 857 | const char *buf, size_t count) |
841 | { | 858 | { |
842 | struct ipw_priv *priv = d->driver_data; | 859 | struct ipw_priv *priv = d->driver_data; |
843 | 860 | ||
@@ -845,11 +862,12 @@ static ssize_t store_indirect_dword(struct device *d, | |||
845 | priv->status |= STATUS_INDIRECT_DWORD; | 862 | priv->status |= STATUS_INDIRECT_DWORD; |
846 | return strnlen(buf, count); | 863 | return strnlen(buf, count); |
847 | } | 864 | } |
848 | static DEVICE_ATTR(indirect_dword, S_IWUSR|S_IRUGO, | 865 | |
849 | show_indirect_dword,store_indirect_dword); | 866 | static DEVICE_ATTR(indirect_dword, S_IWUSR | S_IRUGO, |
867 | show_indirect_dword, store_indirect_dword); | ||
850 | 868 | ||
851 | static ssize_t show_indirect_byte(struct device *d, | 869 | static ssize_t show_indirect_byte(struct device *d, |
852 | struct device_attribute *attr, char *buf) | 870 | struct device_attribute *attr, char *buf) |
853 | { | 871 | { |
854 | u8 reg = 0; | 872 | u8 reg = 0; |
855 | struct ipw_priv *priv = d->driver_data; | 873 | struct ipw_priv *priv = d->driver_data; |
@@ -861,8 +879,8 @@ static ssize_t show_indirect_byte(struct device *d, | |||
861 | return sprintf(buf, "0x%02x\n", reg); | 879 | return sprintf(buf, "0x%02x\n", reg); |
862 | } | 880 | } |
863 | static ssize_t store_indirect_byte(struct device *d, | 881 | static ssize_t store_indirect_byte(struct device *d, |
864 | struct device_attribute *attr, const char *buf, | 882 | struct device_attribute *attr, |
865 | size_t count) | 883 | const char *buf, size_t count) |
866 | { | 884 | { |
867 | struct ipw_priv *priv = d->driver_data; | 885 | struct ipw_priv *priv = d->driver_data; |
868 | 886 | ||
@@ -870,11 +888,12 @@ static ssize_t store_indirect_byte(struct device *d, | |||
870 | priv->status |= STATUS_INDIRECT_BYTE; | 888 | priv->status |= STATUS_INDIRECT_BYTE; |
871 | return strnlen(buf, count); | 889 | return strnlen(buf, count); |
872 | } | 890 | } |
873 | static DEVICE_ATTR(indirect_byte, S_IWUSR|S_IRUGO, | 891 | |
892 | static DEVICE_ATTR(indirect_byte, S_IWUSR | S_IRUGO, | ||
874 | show_indirect_byte, store_indirect_byte); | 893 | show_indirect_byte, store_indirect_byte); |
875 | 894 | ||
876 | static ssize_t show_direct_dword(struct device *d, | 895 | static ssize_t show_direct_dword(struct device *d, |
877 | struct device_attribute *attr, char *buf) | 896 | struct device_attribute *attr, char *buf) |
878 | { | 897 | { |
879 | u32 reg = 0; | 898 | u32 reg = 0; |
880 | struct ipw_priv *priv = d->driver_data; | 899 | struct ipw_priv *priv = d->driver_data; |
@@ -887,8 +906,8 @@ static ssize_t show_direct_dword(struct device *d, | |||
887 | return sprintf(buf, "0x%08x\n", reg); | 906 | return sprintf(buf, "0x%08x\n", reg); |
888 | } | 907 | } |
889 | static ssize_t store_direct_dword(struct device *d, | 908 | static ssize_t store_direct_dword(struct device *d, |
890 | struct device_attribute *attr, const char *buf, | 909 | struct device_attribute *attr, |
891 | size_t count) | 910 | const char *buf, size_t count) |
892 | { | 911 | { |
893 | struct ipw_priv *priv = d->driver_data; | 912 | struct ipw_priv *priv = d->driver_data; |
894 | 913 | ||
@@ -896,9 +915,9 @@ static ssize_t store_direct_dword(struct device *d, | |||
896 | priv->status |= STATUS_DIRECT_DWORD; | 915 | priv->status |= STATUS_DIRECT_DWORD; |
897 | return strnlen(buf, count); | 916 | return strnlen(buf, count); |
898 | } | 917 | } |
899 | static DEVICE_ATTR(direct_dword, S_IWUSR|S_IRUGO, | ||
900 | show_direct_dword,store_direct_dword); | ||
901 | 918 | ||
919 | static DEVICE_ATTR(direct_dword, S_IWUSR | S_IRUGO, | ||
920 | show_direct_dword, store_direct_dword); | ||
902 | 921 | ||
903 | static inline int rf_kill_active(struct ipw_priv *priv) | 922 | static inline int rf_kill_active(struct ipw_priv *priv) |
904 | { | 923 | { |
@@ -911,7 +930,7 @@ static inline int rf_kill_active(struct ipw_priv *priv) | |||
911 | } | 930 | } |
912 | 931 | ||
913 | static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr, | 932 | static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr, |
914 | char *buf) | 933 | char *buf) |
915 | { | 934 | { |
916 | /* 0 - RF kill not enabled | 935 | /* 0 - RF kill not enabled |
917 | 1 - SW based RF kill active (sysfs) | 936 | 1 - SW based RF kill active (sysfs) |
@@ -919,7 +938,7 @@ static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr, | |||
919 | 3 - Both HW and SW baed RF kill active */ | 938 | 3 - Both HW and SW baed RF kill active */ |
920 | struct ipw_priv *priv = d->driver_data; | 939 | struct ipw_priv *priv = d->driver_data; |
921 | int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | | 940 | int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | |
922 | (rf_kill_active(priv) ? 0x2 : 0x0); | 941 | (rf_kill_active(priv) ? 0x2 : 0x0); |
923 | return sprintf(buf, "%i\n", val); | 942 | return sprintf(buf, "%i\n", val); |
924 | } | 943 | } |
925 | 944 | ||
@@ -927,7 +946,7 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio) | |||
927 | { | 946 | { |
928 | if ((disable_radio ? 1 : 0) == | 947 | if ((disable_radio ? 1 : 0) == |
929 | (priv->status & STATUS_RF_KILL_SW ? 1 : 0)) | 948 | (priv->status & STATUS_RF_KILL_SW ? 1 : 0)) |
930 | return 0 ; | 949 | return 0; |
931 | 950 | ||
932 | IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n", | 951 | IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n", |
933 | disable_radio ? "OFF" : "ON"); | 952 | disable_radio ? "OFF" : "ON"); |
@@ -956,8 +975,8 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio) | |||
956 | return 1; | 975 | return 1; |
957 | } | 976 | } |
958 | 977 | ||
959 | static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr, | 978 | static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr, |
960 | const char *buf, size_t count) | 979 | const char *buf, size_t count) |
961 | { | 980 | { |
962 | struct ipw_priv *priv = d->driver_data; | 981 | struct ipw_priv *priv = d->driver_data; |
963 | 982 | ||
@@ -965,7 +984,8 @@ static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr, | |||
965 | 984 | ||
966 | return count; | 985 | return count; |
967 | } | 986 | } |
968 | static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill); | 987 | |
988 | static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill); | ||
969 | 989 | ||
970 | static void ipw_irq_tasklet(struct ipw_priv *priv) | 990 | static void ipw_irq_tasklet(struct ipw_priv *priv) |
971 | { | 991 | { |
@@ -990,7 +1010,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv) | |||
990 | 1010 | ||
991 | if (inta & CX2_INTA_BIT_TX_CMD_QUEUE) { | 1011 | if (inta & CX2_INTA_BIT_TX_CMD_QUEUE) { |
992 | IPW_DEBUG_HC("Command completed.\n"); | 1012 | IPW_DEBUG_HC("Command completed.\n"); |
993 | rc = ipw_queue_tx_reclaim( priv, &priv->txq_cmd, -1); | 1013 | rc = ipw_queue_tx_reclaim(priv, &priv->txq_cmd, -1); |
994 | priv->status &= ~STATUS_HCMD_ACTIVE; | 1014 | priv->status &= ~STATUS_HCMD_ACTIVE; |
995 | wake_up_interruptible(&priv->wait_command_queue); | 1015 | wake_up_interruptible(&priv->wait_command_queue); |
996 | handled |= CX2_INTA_BIT_TX_CMD_QUEUE; | 1016 | handled |= CX2_INTA_BIT_TX_CMD_QUEUE; |
@@ -998,25 +1018,25 @@ static void ipw_irq_tasklet(struct ipw_priv *priv) | |||
998 | 1018 | ||
999 | if (inta & CX2_INTA_BIT_TX_QUEUE_1) { | 1019 | if (inta & CX2_INTA_BIT_TX_QUEUE_1) { |
1000 | IPW_DEBUG_TX("TX_QUEUE_1\n"); | 1020 | IPW_DEBUG_TX("TX_QUEUE_1\n"); |
1001 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[0], 0); | 1021 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[0], 0); |
1002 | handled |= CX2_INTA_BIT_TX_QUEUE_1; | 1022 | handled |= CX2_INTA_BIT_TX_QUEUE_1; |
1003 | } | 1023 | } |
1004 | 1024 | ||
1005 | if (inta & CX2_INTA_BIT_TX_QUEUE_2) { | 1025 | if (inta & CX2_INTA_BIT_TX_QUEUE_2) { |
1006 | IPW_DEBUG_TX("TX_QUEUE_2\n"); | 1026 | IPW_DEBUG_TX("TX_QUEUE_2\n"); |
1007 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[1], 1); | 1027 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[1], 1); |
1008 | handled |= CX2_INTA_BIT_TX_QUEUE_2; | 1028 | handled |= CX2_INTA_BIT_TX_QUEUE_2; |
1009 | } | 1029 | } |
1010 | 1030 | ||
1011 | if (inta & CX2_INTA_BIT_TX_QUEUE_3) { | 1031 | if (inta & CX2_INTA_BIT_TX_QUEUE_3) { |
1012 | IPW_DEBUG_TX("TX_QUEUE_3\n"); | 1032 | IPW_DEBUG_TX("TX_QUEUE_3\n"); |
1013 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[2], 2); | 1033 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[2], 2); |
1014 | handled |= CX2_INTA_BIT_TX_QUEUE_3; | 1034 | handled |= CX2_INTA_BIT_TX_QUEUE_3; |
1015 | } | 1035 | } |
1016 | 1036 | ||
1017 | if (inta & CX2_INTA_BIT_TX_QUEUE_4) { | 1037 | if (inta & CX2_INTA_BIT_TX_QUEUE_4) { |
1018 | IPW_DEBUG_TX("TX_QUEUE_4\n"); | 1038 | IPW_DEBUG_TX("TX_QUEUE_4\n"); |
1019 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[3], 3); | 1039 | rc = ipw_queue_tx_reclaim(priv, &priv->txq[3], 3); |
1020 | handled |= CX2_INTA_BIT_TX_QUEUE_4; | 1040 | handled |= CX2_INTA_BIT_TX_QUEUE_4; |
1021 | } | 1041 | } |
1022 | 1042 | ||
@@ -1074,8 +1094,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv) | |||
1074 | } | 1094 | } |
1075 | 1095 | ||
1076 | if (handled != inta) { | 1096 | if (handled != inta) { |
1077 | IPW_ERROR("Unhandled INTA bits 0x%08x\n", | 1097 | IPW_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); |
1078 | inta & ~handled); | ||
1079 | } | 1098 | } |
1080 | 1099 | ||
1081 | /* enable all interrupts */ | 1100 | /* enable all interrupts */ |
@@ -1143,7 +1162,7 @@ static char *get_cmd_string(u8 cmd) | |||
1143 | return "UNKNOWN"; | 1162 | return "UNKNOWN"; |
1144 | } | 1163 | } |
1145 | } | 1164 | } |
1146 | #endif /* CONFIG_IPW_DEBUG */ | 1165 | #endif /* CONFIG_IPW_DEBUG */ |
1147 | 1166 | ||
1148 | #define HOST_COMPLETE_TIMEOUT HZ | 1167 | #define HOST_COMPLETE_TIMEOUT HZ |
1149 | static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd) | 1168 | static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd) |
@@ -1159,15 +1178,16 @@ static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd) | |||
1159 | 1178 | ||
1160 | IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n", | 1179 | IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n", |
1161 | get_cmd_string(cmd->cmd), cmd->cmd, cmd->len); | 1180 | get_cmd_string(cmd->cmd), cmd->cmd, cmd->len); |
1162 | printk_buf(IPW_DL_HOST_COMMAND, (u8*)cmd->param, cmd->len); | 1181 | printk_buf(IPW_DL_HOST_COMMAND, (u8 *) cmd->param, cmd->len); |
1163 | 1182 | ||
1164 | rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0); | 1183 | rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0); |
1165 | if (rc) | 1184 | if (rc) |
1166 | return rc; | 1185 | return rc; |
1167 | 1186 | ||
1168 | rc = wait_event_interruptible_timeout( | 1187 | rc = wait_event_interruptible_timeout(priv->wait_command_queue, |
1169 | priv->wait_command_queue, !(priv->status & STATUS_HCMD_ACTIVE), | 1188 | !(priv-> |
1170 | HOST_COMPLETE_TIMEOUT); | 1189 | status & STATUS_HCMD_ACTIVE), |
1190 | HOST_COMPLETE_TIMEOUT); | ||
1171 | if (rc == 0) { | 1191 | if (rc == 0) { |
1172 | IPW_DEBUG_INFO("Command completion failed out after %dms.\n", | 1192 | IPW_DEBUG_INFO("Command completion failed out after %dms.\n", |
1173 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); | 1193 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); |
@@ -1215,7 +1235,7 @@ static int ipw_send_system_config(struct ipw_priv *priv, | |||
1215 | return -1; | 1235 | return -1; |
1216 | } | 1236 | } |
1217 | 1237 | ||
1218 | memcpy(&cmd.param,config,sizeof(*config)); | 1238 | memcpy(&cmd.param, config, sizeof(*config)); |
1219 | if (ipw_send_cmd(priv, &cmd)) { | 1239 | if (ipw_send_cmd(priv, &cmd)) { |
1220 | IPW_ERROR("failed to send SYSTEM_CONFIG command\n"); | 1240 | IPW_ERROR("failed to send SYSTEM_CONFIG command\n"); |
1221 | return -1; | 1241 | return -1; |
@@ -1224,7 +1244,7 @@ static int ipw_send_system_config(struct ipw_priv *priv, | |||
1224 | return 0; | 1244 | return 0; |
1225 | } | 1245 | } |
1226 | 1246 | ||
1227 | static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len) | 1247 | static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len) |
1228 | { | 1248 | { |
1229 | struct host_cmd cmd = { | 1249 | struct host_cmd cmd = { |
1230 | .cmd = IPW_CMD_SSID, | 1250 | .cmd = IPW_CMD_SSID, |
@@ -1245,7 +1265,7 @@ static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len) | |||
1245 | return 0; | 1265 | return 0; |
1246 | } | 1266 | } |
1247 | 1267 | ||
1248 | static int ipw_send_adapter_address(struct ipw_priv *priv, u8 *mac) | 1268 | static int ipw_send_adapter_address(struct ipw_priv *priv, u8 * mac) |
1249 | { | 1269 | { |
1250 | struct host_cmd cmd = { | 1270 | struct host_cmd cmd = { |
1251 | .cmd = IPW_CMD_ADAPTER_ADDRESS, | 1271 | .cmd = IPW_CMD_ADAPTER_ADDRESS, |
@@ -1284,9 +1304,6 @@ static void ipw_adapter_restart(void *adapter) | |||
1284 | } | 1304 | } |
1285 | } | 1305 | } |
1286 | 1306 | ||
1287 | |||
1288 | |||
1289 | |||
1290 | #define IPW_SCAN_CHECK_WATCHDOG (5 * HZ) | 1307 | #define IPW_SCAN_CHECK_WATCHDOG (5 * HZ) |
1291 | 1308 | ||
1292 | static void ipw_scan_check(void *data) | 1309 | static void ipw_scan_check(void *data) |
@@ -1313,7 +1330,7 @@ static int ipw_send_scan_request_ext(struct ipw_priv *priv, | |||
1313 | return -1; | 1330 | return -1; |
1314 | } | 1331 | } |
1315 | 1332 | ||
1316 | memcpy(&cmd.param,request,sizeof(*request)); | 1333 | memcpy(&cmd.param, request, sizeof(*request)); |
1317 | if (ipw_send_cmd(priv, &cmd)) { | 1334 | if (ipw_send_cmd(priv, &cmd)) { |
1318 | IPW_ERROR("failed to send SCAN_REQUEST_EXT command\n"); | 1335 | IPW_ERROR("failed to send SCAN_REQUEST_EXT command\n"); |
1319 | return -1; | 1336 | return -1; |
@@ -1351,7 +1368,7 @@ static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens) | |||
1351 | .len = sizeof(struct ipw_sensitivity_calib) | 1368 | .len = sizeof(struct ipw_sensitivity_calib) |
1352 | }; | 1369 | }; |
1353 | struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *) | 1370 | struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *) |
1354 | &cmd.param; | 1371 | &cmd.param; |
1355 | calib->beacon_rssi_raw = sens; | 1372 | calib->beacon_rssi_raw = sens; |
1356 | if (ipw_send_cmd(priv, &cmd)) { | 1373 | if (ipw_send_cmd(priv, &cmd)) { |
1357 | IPW_ERROR("failed to send SENSITIVITY CALIB command\n"); | 1374 | IPW_ERROR("failed to send SENSITIVITY CALIB command\n"); |
@@ -1374,7 +1391,7 @@ static int ipw_send_associate(struct ipw_priv *priv, | |||
1374 | return -1; | 1391 | return -1; |
1375 | } | 1392 | } |
1376 | 1393 | ||
1377 | memcpy(&cmd.param,associate,sizeof(*associate)); | 1394 | memcpy(&cmd.param, associate, sizeof(*associate)); |
1378 | if (ipw_send_cmd(priv, &cmd)) { | 1395 | if (ipw_send_cmd(priv, &cmd)) { |
1379 | IPW_ERROR("failed to send ASSOCIATE command\n"); | 1396 | IPW_ERROR("failed to send ASSOCIATE command\n"); |
1380 | return -1; | 1397 | return -1; |
@@ -1396,7 +1413,7 @@ static int ipw_send_supported_rates(struct ipw_priv *priv, | |||
1396 | return -1; | 1413 | return -1; |
1397 | } | 1414 | } |
1398 | 1415 | ||
1399 | memcpy(&cmd.param,rates,sizeof(*rates)); | 1416 | memcpy(&cmd.param, rates, sizeof(*rates)); |
1400 | if (ipw_send_cmd(priv, &cmd)) { | 1417 | if (ipw_send_cmd(priv, &cmd)) { |
1401 | IPW_ERROR("failed to send SUPPORTED_RATES command\n"); | 1418 | IPW_ERROR("failed to send SUPPORTED_RATES command\n"); |
1402 | return -1; | 1419 | return -1; |
@@ -1440,7 +1457,7 @@ static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off) | |||
1440 | return -1; | 1457 | return -1; |
1441 | } | 1458 | } |
1442 | 1459 | ||
1443 | *((u32*)&cmd.param) = phy_off; | 1460 | *((u32 *) & cmd.param) = phy_off; |
1444 | 1461 | ||
1445 | if (ipw_send_cmd(priv, &cmd)) { | 1462 | if (ipw_send_cmd(priv, &cmd)) { |
1446 | IPW_ERROR("failed to send CARD_DISABLE command\n"); | 1463 | IPW_ERROR("failed to send CARD_DISABLE command\n"); |
@@ -1451,8 +1468,7 @@ static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off) | |||
1451 | } | 1468 | } |
1452 | #endif | 1469 | #endif |
1453 | 1470 | ||
1454 | static int ipw_send_tx_power(struct ipw_priv *priv, | 1471 | static int ipw_send_tx_power(struct ipw_priv *priv, struct ipw_tx_power *power) |
1455 | struct ipw_tx_power *power) | ||
1456 | { | 1472 | { |
1457 | struct host_cmd cmd = { | 1473 | struct host_cmd cmd = { |
1458 | .cmd = IPW_CMD_TX_POWER, | 1474 | .cmd = IPW_CMD_TX_POWER, |
@@ -1464,7 +1480,7 @@ static int ipw_send_tx_power(struct ipw_priv *priv, | |||
1464 | return -1; | 1480 | return -1; |
1465 | } | 1481 | } |
1466 | 1482 | ||
1467 | memcpy(&cmd.param,power,sizeof(*power)); | 1483 | memcpy(&cmd.param, power, sizeof(*power)); |
1468 | if (ipw_send_cmd(priv, &cmd)) { | 1484 | if (ipw_send_cmd(priv, &cmd)) { |
1469 | IPW_ERROR("failed to send TX_POWER command\n"); | 1485 | IPW_ERROR("failed to send TX_POWER command\n"); |
1470 | return -1; | 1486 | return -1; |
@@ -1527,7 +1543,7 @@ static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode) | |||
1527 | .cmd = IPW_CMD_POWER_MODE, | 1543 | .cmd = IPW_CMD_POWER_MODE, |
1528 | .len = sizeof(u32) | 1544 | .len = sizeof(u32) |
1529 | }; | 1545 | }; |
1530 | u32 *param = (u32*)(&cmd.param); | 1546 | u32 *param = (u32 *) (&cmd.param); |
1531 | 1547 | ||
1532 | if (!priv) { | 1548 | if (!priv) { |
1533 | IPW_ERROR("Invalid args\n"); | 1549 | IPW_ERROR("Invalid args\n"); |
@@ -1585,67 +1601,67 @@ static inline void eeprom_write_reg(struct ipw_priv *p, u32 data) | |||
1585 | } | 1601 | } |
1586 | 1602 | ||
1587 | /* perform a chip select operation */ | 1603 | /* perform a chip select operation */ |
1588 | static inline void eeprom_cs(struct ipw_priv* priv) | 1604 | static inline void eeprom_cs(struct ipw_priv *priv) |
1589 | { | 1605 | { |
1590 | eeprom_write_reg(priv,0); | 1606 | eeprom_write_reg(priv, 0); |
1591 | eeprom_write_reg(priv,EEPROM_BIT_CS); | 1607 | eeprom_write_reg(priv, EEPROM_BIT_CS); |
1592 | eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK); | 1608 | eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK); |
1593 | eeprom_write_reg(priv,EEPROM_BIT_CS); | 1623 | int d = (bit ? EEPROM_BIT_DI : 0); |
1608 | eeprom_write_reg(p,EEPROM_BIT_CS|d); | 1624 | eeprom_write_reg(p, EEPROM_BIT_CS | d); |
1609 | eeprom_write_reg(p,EEPROM_BIT_CS|d|EEPROM_BIT_SK); | 1625 | eeprom_write_reg(p, EEPROM_BIT_CS | d | EEPROM_BIT_SK); |
1610 | } | 1626 | } |
1611 | 1627 | ||
1612 | /* push an opcode followed by an address down to the eeprom */ | 1628 | /* push an opcode followed by an address down to the eeprom */ |
1613 | static void eeprom_op(struct ipw_priv* priv, u8 op, u8 addr) | 1629 | static void eeprom_op(struct ipw_priv *priv, u8 op, u8 addr) |
1614 | { | 1630 | { |
1615 | int i; | 1631 | int i; |
1616 | /* * start up the nfsiod workqueue */ static int nfsiod_start(void) { struct workqueue_struct *wq; dprintk("RPC: creating workqueue nfsiod\n"); wq = alloc_workqueue("nfsiod", WQ_MEM_RECLAIM, 0); if (wq == NULL) return -ENOMEM; nfsiod_workqueue = wq; return 0; } /* * Destroy the nfsiod workqueue */ static void nfsiod_stop(void) { struct workqueue_struct *wq; wq = nfsiod_workqueue; if (wq == NULL) return; nfsiod_workqueue = NULL; destroy_workqueue(wq); } int nfs_net_id; EXPORT_SYMBOL_GPL(nfs_net_id); static int nfs_net_init(struct net *net) { nfs_clients_init(net); return nfs_fs_proc_net_init(net); } static void nfs_net_exit(struct net *net) { nfs_fs_proc_net_exit(net); nfs_cleanup_cb_ident_idr(net); } static struct pernet_operations nfs_net_ops = { .init = nfs_net_init, .exit = nfs_net_exit, .id = &nfs_net_id, .size = sizeof(struct nfs_net), }; /* * Initialize NFS */ static int __init init_nfs_fs(void) { int err; err = register_pernet_subsys(&nfs_net_ops); if (err < 0) goto out9; err = nfs_fscache_register(); if (err < 0) goto out8; err = nfsiod_start(); if (err) goto out7; err = nfs_fs_proc_init(); if (err) goto out6; err = nfs_init_nfspagecache(); if (err) goto out5; err = nfs_init_inodecache(); if (err) goto out4; err = nfs_init_readpagecache(); if (err) goto out3; err = nfs_init_writepagecache(); if (err) goto out2; err = nfs_init_directcache(); if (err) goto out1; rpc_proc_register(&init_net, &nfs_rpcstat); err = register_nfs_fs(); if (err) goto out0; return 0; out0: rpc_proc_unregister(&init_net, "nfs"); nfs_destroy_directcache(); out1: nfs_destroy_writepagecache(); out2: nfs_destroy_readpagecache(); out3: nfs_destroy_inodecache(); out4: nfs_destroy_nfspagecache: nfs_fscache_unregister(); out8: unregister_pernet_subsys(&nfs_net_ops); out9: return err; } static void __exit exit_nfs_fs(void) { nfs_destroy_directcache(); nfs_destroy_writepagecache(); nfs_destroy_readpagecache(); nfs_destroy_inodecache(); nfs_destroy_nfspagecache(); nfs_fscache_unregister(); unregister_pernet_subsys(&nfs_net_ops); rpc_proc_unregister(&init_net, "nfs"); unregister_nfs_fs(); nfs_fs_proc_exit(); nfsiod_stop(); } /* Not quite true; I just maintain it */ MODULE_AUTHOR("Olaf Kirch <okir@monad.swb.de>"); MODULE_LICENSE("GPL"); module_param(enable_ino64, bool, 0644); module_init(init_nfs_fs) module_exit(exit_nfs_fs)