diff options
Diffstat (limited to 'drivers/net/wireless/brcm80211/brcmsmac/pmu.c')
-rw-r--r-- | drivers/net/wireless/brcm80211/brcmsmac/pmu.c | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/drivers/net/wireless/brcm80211/brcmsmac/pmu.c b/drivers/net/wireless/brcm80211/brcmsmac/pmu.c index 7e9df566c733..71b80381f3ad 100644 --- a/drivers/net/wireless/brcm80211/brcmsmac/pmu.c +++ b/drivers/net/wireless/brcm80211/brcmsmac/pmu.c | |||
@@ -115,60 +115,6 @@ u16 si_pmu_fast_pwrup_delay(struct si_pub *sih) | |||
115 | return (u16) delay; | 115 | return (u16) delay; |
116 | } | 116 | } |
117 | 117 | ||
118 | /* Read/write a chipcontrol reg */ | ||
119 | u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) | ||
120 | { | ||
121 | ai_cc_reg(sih, offsetof(struct chipcregs, chipcontrol_addr), ~0, reg); | ||
122 | return ai_cc_reg(sih, offsetof(struct chipcregs, chipcontrol_data), | ||
123 | mask, val); | ||
124 | } | ||
125 | |||
126 | /* Read/write a regcontrol reg */ | ||
127 | u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) | ||
128 | { | ||
129 | ai_cc_reg(sih, offsetof(struct chipcregs, regcontrol_addr), ~0, reg); | ||
130 | return ai_cc_reg(sih, offsetof(struct chipcregs, regcontrol_data), | ||
131 | mask, val); | ||
132 | } | ||
133 | |||
134 | /* Read/write a pllcontrol reg */ | ||
135 | u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) | ||
136 | { | ||
137 | ai_cc_reg(sih, offsetof(struct chipcregs, pllcontrol_addr), ~0, reg); | ||
138 | return ai_cc_reg(sih, offsetof(struct chipcregs, pllcontrol_data), | ||
139 | mask, val); | ||
140 | } | ||
141 | |||
142 | /* PMU PLL update */ | ||
143 | void si_pmu_pllupd(struct si_pub *sih) | ||
144 | { | ||
145 | ai_cc_reg(sih, offsetof(struct chipcregs, pmucontrol), | ||
146 | PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD); | ||
147 | } | ||
148 | |||
149 | /* query alp/xtal clock frequency */ | ||
150 | u32 si_pmu_alp_clock(struct si_pub *sih) | ||
151 | { | ||
152 | u32 clock = ALP_CLOCK; | ||
153 | |||
154 | /* bail out with default */ | ||
155 | if (!(ai_get_cccaps(sih) & CC_CAP_PMU)) | ||
156 | return clock; | ||
157 | |||
158 | switch (ai_get_chip_id(sih)) { | ||
159 | case BCMA_CHIP_ID_BCM43224: | ||
160 | case BCMA_CHIP_ID_BCM43225: | ||
161 | case BCMA_CHIP_ID_BCM4313: | ||
162 | /* always 20Mhz */ | ||
163 | clock = 20000 * 1000; | ||
164 | break; | ||
165 | default: | ||
166 | break; | ||
167 | } | ||
168 | |||
169 | return clock; | ||
170 | } | ||
171 | |||
172 | u32 si_pmu_measure_alpclk(struct si_pub *sih) | 118 | u32 si_pmu_measure_alpclk(struct si_pub *sih) |
173 | { | 119 | { |
174 | struct si_info *sii = container_of(sih, struct si_info, pub); | 120 | struct si_info *sii = container_of(sih, struct si_info, pub); |