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path: root/drivers/net/wireless/bcm43xx/bcm43xx_dma.c
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Diffstat (limited to 'drivers/net/wireless/bcm43xx/bcm43xx_dma.c')
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_dma.c61
1 files changed, 33 insertions, 28 deletions
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_dma.c b/drivers/net/wireless/bcm43xx/bcm43xx_dma.c
index 0cd292847954..fbe19b922aa7 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_dma.c
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_dma.c
@@ -374,13 +374,11 @@ static int dmacontroller_setup(struct bcm43xx_dmaring *ring)
374 374
375 if (ring->tx) { 375 if (ring->tx) {
376 /* Set Transmit Control register to "transmit enable" */ 376 /* Set Transmit Control register to "transmit enable" */
377 bcm43xx_write32(ring->bcm, 377 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
378 ring->mmio_base + BCM43xx_DMA_TX_CONTROL, 378 BCM43xx_DMA_TXCTRL_ENABLE);
379 BCM43xx_DMA_TXCTRL_ENABLE);
380 /* Set Transmit Descriptor ring address. */ 379 /* Set Transmit Descriptor ring address. */
381 bcm43xx_write32(ring->bcm, 380 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_RING,
382 ring->mmio_base + BCM43xx_DMA_TX_DESC_RING, 381 ring->dmabase + ring->memoffset);
383 ring->dmabase + ring->memoffset);
384 } else { 382 } else {
385 err = alloc_initial_descbuffers(ring); 383 err = alloc_initial_descbuffers(ring);
386 if (err) 384 if (err)
@@ -388,17 +386,12 @@ static int dmacontroller_setup(struct bcm43xx_dmaring *ring)
388 /* Set Receive Control "receive enable" and frame offset */ 386 /* Set Receive Control "receive enable" and frame offset */
389 value = (ring->frameoffset << BCM43xx_DMA_RXCTRL_FRAMEOFF_SHIFT); 387 value = (ring->frameoffset << BCM43xx_DMA_RXCTRL_FRAMEOFF_SHIFT);
390 value |= BCM43xx_DMA_RXCTRL_ENABLE; 388 value |= BCM43xx_DMA_RXCTRL_ENABLE;
391 bcm43xx_write32(ring->bcm, 389 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_CONTROL, value);
392 ring->mmio_base + BCM43xx_DMA_RX_CONTROL,
393 value);
394 /* Set Receive Descriptor ring address. */ 390 /* Set Receive Descriptor ring address. */
395 bcm43xx_write32(ring->bcm, 391 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_RING,
396 ring->mmio_base + BCM43xx_DMA_RX_DESC_RING, 392 ring->dmabase + ring->memoffset);
397 ring->dmabase + ring->memoffset);
398 /* Init the descriptor pointer. */ 393 /* Init the descriptor pointer. */
399 bcm43xx_write32(ring->bcm, 394 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_INDEX, 200);
400 ring->mmio_base + BCM43xx_DMA_RX_DESC_INDEX,
401 200);
402 } 395 }
403 396
404out: 397out:
@@ -411,15 +404,11 @@ static void dmacontroller_cleanup(struct bcm43xx_dmaring *ring)
411 if (ring->tx) { 404 if (ring->tx) {
412 bcm43xx_dmacontroller_tx_reset(ring->bcm, ring->mmio_base); 405 bcm43xx_dmacontroller_tx_reset(ring->bcm, ring->mmio_base);
413 /* Zero out Transmit Descriptor ring address. */ 406 /* Zero out Transmit Descriptor ring address. */
414 bcm43xx_write32(ring->bcm, 407 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_RING, 0);
415 ring->mmio_base + BCM43xx_DMA_TX_DESC_RING,
416 0x00000000);
417 } else { 408 } else {
418 bcm43xx_dmacontroller_rx_reset(ring->bcm, ring->mmio_base); 409 bcm43xx_dmacontroller_rx_reset(ring->bcm, ring->mmio_base);
419 /* Zero out Receive Descriptor ring address. */ 410 /* Zero out Receive Descriptor ring address. */
420 bcm43xx_write32(ring->bcm, 411 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_RING, 0);
421 ring->mmio_base + BCM43xx_DMA_RX_DESC_RING,
422 0x00000000);
423 } 412 }
424} 413}
425 414
@@ -698,9 +687,8 @@ static void dmacontroller_poke_tx(struct bcm43xx_dmaring *ring,
698 */ 687 */
699 wmb(); 688 wmb();
700 slot = next_slot(ring, slot); 689 slot = next_slot(ring, slot);
701 bcm43xx_write32(ring->bcm, 690 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_INDEX,
702 ring->mmio_base + BCM43xx_DMA_TX_DESC_INDEX, 691 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
703 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
704} 692}
705 693
706static int dma_tx_fragment(struct bcm43xx_dmaring *ring, 694static int dma_tx_fragment(struct bcm43xx_dmaring *ring,
@@ -940,7 +928,7 @@ void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring)
940#endif 928#endif
941 929
942 assert(!ring->tx); 930 assert(!ring->tx);
943 status = bcm43xx_read32(ring->bcm, ring->mmio_base + BCM43xx_DMA_RX_STATUS); 931 status = bcm43xx_dma_read(ring, BCM43xx_DMA_RX_STATUS);
944 descptr = (status & BCM43xx_DMA_RXSTAT_DPTR_MASK); 932 descptr = (status & BCM43xx_DMA_RXSTAT_DPTR_MASK);
945 current_slot = descptr / sizeof(struct bcm43xx_dmadesc); 933 current_slot = descptr / sizeof(struct bcm43xx_dmadesc);
946 assert(current_slot >= 0 && current_slot < ring->nr_slots); 934 assert(current_slot >= 0 && current_slot < ring->nr_slots);
@@ -953,10 +941,27 @@ void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring)
953 ring->max_used_slots = used_slots; 941 ring->max_used_slots = used_slots;
954#endif 942#endif
955 } 943 }
956 bcm43xx_write32(ring->bcm, 944 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_INDEX,
957 ring->mmio_base + BCM43xx_DMA_RX_DESC_INDEX, 945 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
958 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
959 ring->current_slot = slot; 946 ring->current_slot = slot;
960} 947}
961 948
949void bcm43xx_dma_tx_suspend(struct bcm43xx_dmaring *ring)
950{
951 assert(ring->tx);
952 bcm43xx_power_saving_ctl_bits(ring->bcm, -1, 1);
953 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
954 bcm43xx_dma_read(ring, BCM43xx_DMA_TX_CONTROL)
955 | BCM43xx_DMA_TXCTRL_SUSPEND);
956}
957
958void bcm43xx_dma_tx_resume(struct bcm43xx_dmaring *ring)
959{
960 assert(ring->tx);
961 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
962 bcm43xx_dma_read(ring, BCM43xx_DMA_TX_CONTROL)
963 & ~BCM43xx_DMA_TXCTRL_SUSPEND);
964 bcm43xx_power_saving_ctl_bits(ring->bcm, -1, -1);
965}
966
962/* vim: set ts=8 sw=8 sts=8: */ 967/* vim: set ts=8 sw=8 sts=8: */