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path: root/drivers/net/wireless/bcm43xx/bcm43xx.h
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Diffstat (limited to 'drivers/net/wireless/bcm43xx/bcm43xx.h')
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx.h101
1 files changed, 6 insertions, 95 deletions
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx.h b/drivers/net/wireless/bcm43xx/bcm43xx.h
index 5f8c63fab836..29c95b07122a 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx.h
+++ b/drivers/net/wireless/bcm43xx/bcm43xx.h
@@ -718,8 +718,6 @@ struct bcm43xx_private {
718 /* Debugging stuff follows. */ 718 /* Debugging stuff follows. */
719#ifdef CONFIG_BCM43XX_DEBUG 719#ifdef CONFIG_BCM43XX_DEBUG
720 struct bcm43xx_dfsentry *dfsentry; 720 struct bcm43xx_dfsentry *dfsentry;
721 atomic_t mmio_print_cnt;
722 atomic_t pcicfg_print_cnt;
723#endif 721#endif
724}; 722};
725 723
@@ -805,141 +803,54 @@ struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy,
805} 803}
806 804
807 805
808/* MMIO read/write functions. Debug and non-debug variants. */
809#ifdef CONFIG_BCM43XX_DEBUG
810
811static inline 806static inline
812u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset) 807u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset)
813{ 808{
814 u16 value; 809 return ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
815
816 value = ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
817 if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
818 printk(KERN_INFO PFX "ioread16 offset: 0x%04x, value: 0x%04x\n",
819 offset, value);
820 }
821
822 return value;
823} 810}
824 811
825static inline 812static inline
826void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value) 813void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value)
827{ 814{
828 iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset); 815 iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset);
829 if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
830 printk(KERN_INFO PFX "iowrite16 offset: 0x%04x, value: 0x%04x\n",
831 offset, value);
832 }
833} 816}
834 817
835static inline 818static inline
836u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset) 819u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset)
837{ 820{
838 u32 value; 821 return ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
839
840 value = ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
841 if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
842 printk(KERN_INFO PFX "ioread32 offset: 0x%04x, value: 0x%08x\n",
843 offset, value);
844 }
845
846 return value;
847} 822}
848 823
849static inline 824static inline
850void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value) 825void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value)
851{ 826{
852 iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset); 827 iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset);
853 if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
854 printk(KERN_INFO PFX "iowrite32 offset: 0x%04x, value: 0x%08x\n",
855 offset, value);
856 }
857} 828}
858 829
859static inline 830static inline
860int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value) 831int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value)
861{ 832{
862 int err; 833 return pci_read_config_word(bcm->pci_dev, offset, value);
863
864 err = pci_read_config_word(bcm->pci_dev, offset, value);
865 if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
866 printk(KERN_INFO PFX "pciread16 offset: 0x%08x, value: 0x%04x, err: %d\n",
867 offset, *value, err);
868 }
869
870 return err;
871} 834}
872 835
873static inline 836static inline
874int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value) 837int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value)
875{ 838{
876 int err; 839 return pci_read_config_dword(bcm->pci_dev, offset, value);
877
878 err = pci_read_config_dword(bcm->pci_dev, offset, value);
879 if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
880 printk(KERN_INFO PFX "pciread32 offset: 0x%08x, value: 0x%08x, err: %d\n",
881 offset, *value, err);
882 }
883
884 return err;
885} 840}
886 841
887static inline 842static inline
888int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value) 843int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value)
889{ 844{
890 int err; 845 return pci_write_config_word(bcm->pci_dev, offset, value);
891
892 err = pci_write_config_word(bcm->pci_dev, offset, value);
893 if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
894 printk(KERN_INFO PFX "pciwrite16 offset: 0x%08x, value: 0x%04x, err: %d\n",
895 offset, value, err);
896 }
897
898 return err;
899} 846}
900 847
901static inline 848static inline
902int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value) 849int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value)
903{ 850{
904 int err; 851 return pci_write_config_dword(bcm->pci_dev, offset, value);
905
906 err = pci_write_config_dword(bcm->pci_dev, offset, value);
907 if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
908 printk(KERN_INFO PFX "pciwrite32 offset: 0x%08x, value: 0x%08x, err: %d\n",
909 offset, value, err);
910 }
911
912 return err;
913} 852}
914 853
915#define bcm43xx_mmioprint_initial(bcm, value) atomic_set(&(bcm)->mmio_print_cnt, (value))
916#define bcm43xx_mmioprint_enable(bcm) atomic_inc(&(bcm)->mmio_print_cnt)
917#define bcm43xx_mmioprint_disable(bcm) atomic_dec(&(bcm)->mmio_print_cnt)
918#define bcm43xx_pciprint_initial(bcm, value) atomic_set(&(bcm)->pcicfg_print_cnt, (value))
919#define bcm43xx_pciprint_enable(bcm) atomic_inc(&(bcm)->pcicfg_print_cnt)
920#define bcm43xx_pciprint_disable(bcm) atomic_dec(&(bcm)->pcicfg_print_cnt)
921
922#else /* CONFIG_BCM43XX_DEBUG*/
923
924#define bcm43xx_read16(bcm, offset) ioread16((bcm)->mmio_addr + core_offset(bcm) + (offset))
925#define bcm43xx_write16(bcm, offset, value) iowrite16((value), (bcm)->mmio_addr + core_offset(bcm) + (offset))
926#define bcm43xx_read32(bcm, offset) ioread32((bcm)->mmio_addr + core_offset(bcm) + (offset))
927#define bcm43xx_write32(bcm, offset, value) iowrite32((value), (bcm)->mmio_addr + core_offset(bcm) + (offset))
928#define bcm43xx_pci_read_config16(bcm, o, v) pci_read_config_word((bcm)->pci_dev, (o), (v))
929#define bcm43xx_pci_read_config32(bcm, o, v) pci_read_config_dword((bcm)->pci_dev, (o), (v))
930#define bcm43xx_pci_write_config16(bcm, o, v) pci_write_config_word((bcm)->pci_dev, (o), (v))
931#define bcm43xx_pci_write_config32(bcm, o, v) pci_write_config_dword((bcm)->pci_dev, (o), (v))
932
933#define bcm43xx_mmioprint_initial(x, y) do { /* nothing */ } while (0)
934#define bcm43xx_mmioprint_enable(x) do { /* nothing */ } while (0)
935#define bcm43xx_mmioprint_disable(x) do { /* nothing */ } while (0)
936#define bcm43xx_pciprint_initial(bcm, value) do { /* nothing */ } while (0)
937#define bcm43xx_pciprint_enable(bcm) do { /* nothing */ } while (0)
938#define bcm43xx_pciprint_disable(bcm) do { /* nothing */ } while (0)
939
940#endif /* CONFIG_BCM43XX_DEBUG*/
941
942
943/** Limit a value between two limits */ 854/** Limit a value between two limits */
944#ifdef limit_value 855#ifdef limit_value
945# undef limit_value 856# undef limit_value