diff options
Diffstat (limited to 'drivers/net/wireless/b43legacy/b43legacy.h')
-rw-r--r-- | drivers/net/wireless/b43legacy/b43legacy.h | 31 |
1 files changed, 12 insertions, 19 deletions
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h index 93419adb925e..c80edd2b9044 100644 --- a/drivers/net/wireless/b43legacy/b43legacy.h +++ b/drivers/net/wireless/b43legacy/b43legacy.h | |||
@@ -23,7 +23,7 @@ | |||
23 | #include "phy.h" | 23 | #include "phy.h" |
24 | 24 | ||
25 | 25 | ||
26 | #define B43legacy_IRQWAIT_MAX_RETRIES 100 | 26 | #define B43legacy_IRQWAIT_MAX_RETRIES 20 |
27 | 27 | ||
28 | #define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */ | 28 | #define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */ |
29 | 29 | ||
@@ -40,9 +40,8 @@ | |||
40 | #define B43legacy_MMIO_DMA4_IRQ_MASK 0x44 | 40 | #define B43legacy_MMIO_DMA4_IRQ_MASK 0x44 |
41 | #define B43legacy_MMIO_DMA5_REASON 0x48 | 41 | #define B43legacy_MMIO_DMA5_REASON 0x48 |
42 | #define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C | 42 | #define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C |
43 | #define B43legacy_MMIO_MACCTL 0x120 | 43 | #define B43legacy_MMIO_MACCTL 0x120 /* MAC control */ |
44 | #define B43legacy_MMIO_STATUS_BITFIELD 0x120 | 44 | #define B43legacy_MMIO_MACCMD 0x124 /* MAC command */ |
45 | #define B43legacy_MMIO_STATUS2_BITFIELD 0x124 | ||
46 | #define B43legacy_MMIO_GEN_IRQ_REASON 0x128 | 45 | #define B43legacy_MMIO_GEN_IRQ_REASON 0x128 |
47 | #define B43legacy_MMIO_GEN_IRQ_MASK 0x12C | 46 | #define B43legacy_MMIO_GEN_IRQ_MASK 0x12C |
48 | #define B43legacy_MMIO_RAM_CONTROL 0x130 | 47 | #define B43legacy_MMIO_RAM_CONTROL 0x130 |
@@ -177,31 +176,25 @@ | |||
177 | #define B43legacy_RADIOCTL_ID 0x01 | 176 | #define B43legacy_RADIOCTL_ID 0x01 |
178 | 177 | ||
179 | /* MAC Control bitfield */ | 178 | /* MAC Control bitfield */ |
179 | #define B43legacy_MACCTL_ENABLED 0x00000001 /* MAC Enabled */ | ||
180 | #define B43legacy_MACCTL_PSM_RUN 0x00000002 /* Run Microcode */ | ||
181 | #define B43legacy_MACCTL_PSM_JMP0 0x00000004 /* Microcode jump to 0 */ | ||
182 | #define B43legacy_MACCTL_SHM_ENABLED 0x00000100 /* SHM Enabled */ | ||
180 | #define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */ | 183 | #define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */ |
184 | #define B43legacy_MACCTL_BE 0x00010000 /* Big Endian mode */ | ||
181 | #define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */ | 185 | #define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */ |
182 | #define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */ | 186 | #define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */ |
187 | #define B43legacy_MACCTL_RADIOLOCK 0x00080000 /* Radio lock */ | ||
183 | #define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */ | 188 | #define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */ |
184 | #define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */ | 189 | #define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */ |
185 | #define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */ | 190 | #define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */ |
186 | #define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */ | 191 | #define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */ |
187 | #define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */ | 192 | #define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */ |
193 | #define B43legacy_MACCTL_HWPS 0x02000000 /* Hardware Power Saving */ | ||
194 | #define B43legacy_MACCTL_AWAKE 0x04000000 /* Device is awake */ | ||
195 | #define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */ | ||
188 | #define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */ | 196 | #define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */ |
189 | 197 | ||
190 | /* StatusBitField */ | ||
191 | #define B43legacy_SBF_MAC_ENABLED 0x00000001 | ||
192 | #define B43legacy_SBF_CORE_READY 0x00000004 | ||
193 | #define B43legacy_SBF_400 0x00000400 /*FIXME: fix name*/ | ||
194 | #define B43legacy_SBF_XFER_REG_BYTESWAP 0x00010000 | ||
195 | #define B43legacy_SBF_MODE_NOTADHOC 0x00020000 | ||
196 | #define B43legacy_SBF_MODE_AP 0x00040000 | ||
197 | #define B43legacy_SBF_RADIOREG_LOCK 0x00080000 | ||
198 | #define B43legacy_SBF_MODE_MONITOR 0x00400000 | ||
199 | #define B43legacy_SBF_MODE_PROMISC 0x01000000 | ||
200 | #define B43legacy_SBF_PS1 0x02000000 | ||
201 | #define B43legacy_SBF_PS2 0x04000000 | ||
202 | #define B43legacy_SBF_NO_SSID_BCAST 0x08000000 | ||
203 | #define B43legacy_SBF_TIME_UPDATE 0x10000000 | ||
204 | |||
205 | /* 802.11 core specific TM State Low flags */ | 198 | /* 802.11 core specific TM State Low flags */ |
206 | #define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ | 199 | #define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ |
207 | #define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */ | 200 | #define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */ |