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-rw-r--r--drivers/net/wireless/b43/Kconfig32
-rw-r--r--drivers/net/wireless/b43/Makefile5
-rw-r--r--drivers/net/wireless/b43/b43.h63
-rw-r--r--drivers/net/wireless/b43/bus.c253
-rw-r--r--drivers/net/wireless/b43/bus.h70
-rw-r--r--drivers/net/wireless/b43/dma.c75
-rw-r--r--drivers/net/wireless/b43/dma.h4
-rw-r--r--drivers/net/wireless/b43/leds.c15
-rw-r--r--drivers/net/wireless/b43/lo.c6
-rw-r--r--drivers/net/wireless/b43/main.c678
-rw-r--r--drivers/net/wireless/b43/main.h2
-rw-r--r--drivers/net/wireless/b43/phy_a.c21
-rw-r--r--drivers/net/wireless/b43/phy_common.c20
-rw-r--r--drivers/net/wireless/b43/phy_common.h6
-rw-r--r--drivers/net/wireless/b43/phy_g.c92
-rw-r--r--drivers/net/wireless/b43/phy_ht.c413
-rw-r--r--drivers/net/wireless/b43/phy_ht.h46
-rw-r--r--drivers/net/wireless/b43/phy_lcn.c52
-rw-r--r--drivers/net/wireless/b43/phy_lcn.h14
-rw-r--r--drivers/net/wireless/b43/phy_lp.c135
-rw-r--r--drivers/net/wireless/b43/phy_n.c120
-rw-r--r--drivers/net/wireless/b43/pio.c10
-rw-r--r--drivers/net/wireless/b43/radio_2055.h5
-rw-r--r--drivers/net/wireless/b43/radio_2056.h5
-rw-r--r--drivers/net/wireless/b43/radio_2059.c174
-rw-r--r--drivers/net/wireless/b43/radio_2059.h54
-rw-r--r--drivers/net/wireless/b43/rfkill.c9
-rw-r--r--drivers/net/wireless/b43/sdio.c10
-rw-r--r--drivers/net/wireless/b43/sysfs.c4
-rw-r--r--drivers/net/wireless/b43/tables_lpphy.c15
-rw-r--r--drivers/net/wireless/b43/tables_nphy.h8
-rw-r--r--drivers/net/wireless/b43/tables_phy_ht.c750
-rw-r--r--drivers/net/wireless/b43/tables_phy_ht.h22
-rw-r--r--drivers/net/wireless/b43/tables_phy_lcn.c34
-rw-r--r--drivers/net/wireless/b43/tables_phy_lcn.h6
-rw-r--r--drivers/net/wireless/b43/wa.c24
-rw-r--r--drivers/net/wireless/b43/xmit.c5
37 files changed, 2835 insertions, 422 deletions
diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
index 480595f04411..d2293dcc117f 100644
--- a/drivers/net/wireless/b43/Kconfig
+++ b/drivers/net/wireless/b43/Kconfig
@@ -26,6 +26,16 @@ config B43
26 This driver can be built as a module (recommended) that will be called "b43". 26 This driver can be built as a module (recommended) that will be called "b43".
27 If unsure, say M. 27 If unsure, say M.
28 28
29config B43_BCMA
30 bool "Support for BCMA bus"
31 depends on B43 && BCMA && BROKEN
32 default y
33
34config B43_SSB
35 bool
36 depends on B43 && SSB
37 default y
38
29# Auto-select SSB PCI-HOST support, if possible 39# Auto-select SSB PCI-HOST support, if possible
30config B43_PCI_AUTOSELECT 40config B43_PCI_AUTOSELECT
31 bool 41 bool
@@ -80,6 +90,12 @@ config B43_SDIO
80 90
81#Data transfers to the device via PIO. We want it as a fallback even 91#Data transfers to the device via PIO. We want it as a fallback even
82# if we can do DMA. 92# if we can do DMA.
93config B43_BCMA_PIO
94 bool
95 depends on B43_BCMA
96 select BCMA_BLOCKIO
97 default y
98
83config B43_PIO 99config B43_PIO
84 bool 100 bool
85 depends on B43 101 depends on B43
@@ -107,6 +123,22 @@ config B43_PHY_LP
107 and embedded devices. It supports 802.11a/g 123 and embedded devices. It supports 802.11a/g
108 (802.11a support is optional, and currently disabled). 124 (802.11a support is optional, and currently disabled).
109 125
126config B43_PHY_HT
127 bool "Support for HT-PHY devices (BROKEN)"
128 depends on B43 && BROKEN
129 ---help---
130 Support for the HT-PHY.
131
132 Say N, this is BROKEN and crashes driver.
133
134config B43_PHY_LCN
135 bool "Support for LCN-PHY devices (BROKEN)"
136 depends on B43 && BROKEN
137 ---help---
138 Support for the LCN-PHY.
139
140 Say N, this is BROKEN and crashes driver.
141
110# This config option automatically enables b43 LEDS support, 142# This config option automatically enables b43 LEDS support,
111# if it's possible. 143# if it's possible.
112config B43_LEDS 144config B43_LEDS
diff --git a/drivers/net/wireless/b43/Makefile b/drivers/net/wireless/b43/Makefile
index cef334a8c669..4648bbf76abc 100644
--- a/drivers/net/wireless/b43/Makefile
+++ b/drivers/net/wireless/b43/Makefile
@@ -1,4 +1,5 @@
1b43-y += main.o 1b43-y += main.o
2b43-y += bus.o
2b43-y += tables.o 3b43-y += tables.o
3b43-$(CONFIG_B43_PHY_N) += tables_nphy.o 4b43-$(CONFIG_B43_PHY_N) += tables_nphy.o
4b43-$(CONFIG_B43_PHY_N) += radio_2055.o 5b43-$(CONFIG_B43_PHY_N) += radio_2055.o
@@ -9,6 +10,10 @@ b43-y += phy_a.o
9b43-$(CONFIG_B43_PHY_N) += phy_n.o 10b43-$(CONFIG_B43_PHY_N) += phy_n.o
10b43-$(CONFIG_B43_PHY_LP) += phy_lp.o 11b43-$(CONFIG_B43_PHY_LP) += phy_lp.o
11b43-$(CONFIG_B43_PHY_LP) += tables_lpphy.o 12b43-$(CONFIG_B43_PHY_LP) += tables_lpphy.o
13b43-$(CONFIG_B43_PHY_HT) += phy_ht.o
14b43-$(CONFIG_B43_PHY_HT) += tables_phy_ht.o
15b43-$(CONFIG_B43_PHY_HT) += radio_2059.o
16b43-$(CONFIG_B43_PHY_LCN) += phy_lcn.o tables_phy_lcn.o
12b43-y += sysfs.o 17b43-y += sysfs.o
13b43-y += xmit.o 18b43-y += xmit.o
14b43-y += lo.o 19b43-y += lo.o
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 25a78cfb7d15..c818b0bc88ec 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -5,12 +5,14 @@
5#include <linux/spinlock.h> 5#include <linux/spinlock.h>
6#include <linux/interrupt.h> 6#include <linux/interrupt.h>
7#include <linux/hw_random.h> 7#include <linux/hw_random.h>
8#include <linux/bcma/bcma.h>
8#include <linux/ssb/ssb.h> 9#include <linux/ssb/ssb.h>
9#include <net/mac80211.h> 10#include <net/mac80211.h>
10 11
11#include "debugfs.h" 12#include "debugfs.h"
12#include "leds.h" 13#include "leds.h"
13#include "rfkill.h" 14#include "rfkill.h"
15#include "bus.h"
14#include "lo.h" 16#include "lo.h"
15#include "phy_common.h" 17#include "phy_common.h"
16 18
@@ -90,6 +92,8 @@
90#define B43_MMIO_PIO11_BASE4 0x300 92#define B43_MMIO_PIO11_BASE4 0x300
91#define B43_MMIO_PIO11_BASE5 0x340 93#define B43_MMIO_PIO11_BASE5 0x340
92 94
95#define B43_MMIO_RADIO24_CONTROL 0x3D8 /* core rev >= 24 only */
96#define B43_MMIO_RADIO24_DATA 0x3DA /* core rev >= 24 only */
93#define B43_MMIO_PHY_VER 0x3E0 97#define B43_MMIO_PHY_VER 0x3E0
94#define B43_MMIO_PHY_RADIO 0x3E2 98#define B43_MMIO_PHY_RADIO 0x3E2
95#define B43_MMIO_PHY0 0x3E6 99#define B43_MMIO_PHY0 0x3E6
@@ -361,6 +365,10 @@ enum {
361#define B43_PHYTYPE_G 0x02 365#define B43_PHYTYPE_G 0x02
362#define B43_PHYTYPE_N 0x04 366#define B43_PHYTYPE_N 0x04
363#define B43_PHYTYPE_LP 0x05 367#define B43_PHYTYPE_LP 0x05
368#define B43_PHYTYPE_SSLPN 0x06
369#define B43_PHYTYPE_HT 0x07
370#define B43_PHYTYPE_LCN 0x08
371#define B43_PHYTYPE_LCNXN 0x09
364 372
365/* PHYRegisters */ 373/* PHYRegisters */
366#define B43_PHY_ILT_A_CTRL 0x0072 374#define B43_PHY_ILT_A_CTRL 0x0072
@@ -414,6 +422,23 @@ enum {
414#define B43_MACCMD_CCA 0x00000008 /* Clear channel assessment */ 422#define B43_MACCMD_CCA 0x00000008 /* Clear channel assessment */
415#define B43_MACCMD_BGNOISE 0x00000010 /* Background noise */ 423#define B43_MACCMD_BGNOISE 0x00000010 /* Background noise */
416 424
425/* BCMA 802.11 core specific IO Control (BCMA_IOCTL) flags */
426#define B43_BCMA_IOCTL_PHY_CLKEN 0x00000004 /* PHY Clock Enable */
427#define B43_BCMA_IOCTL_PHY_RESET 0x00000008 /* PHY Reset */
428#define B43_BCMA_IOCTL_MACPHYCLKEN 0x00000010 /* MAC PHY Clock Control Enable */
429#define B43_BCMA_IOCTL_PLLREFSEL 0x00000020 /* PLL Frequency Reference Select */
430#define B43_BCMA_IOCTL_PHY_BW 0x000000C0 /* PHY band width and clock speed mask (N-PHY+ only?) */
431#define B43_BCMA_IOCTL_PHY_BW_10MHZ 0x00000000 /* 10 MHz bandwidth, 40 MHz PHY */
432#define B43_BCMA_IOCTL_PHY_BW_20MHZ 0x00000040 /* 20 MHz bandwidth, 80 MHz PHY */
433#define B43_BCMA_IOCTL_PHY_BW_40MHZ 0x00000080 /* 40 MHz bandwidth, 160 MHz PHY */
434#define B43_BCMA_IOCTL_GMODE 0x00002000 /* G Mode Enable */
435
436/* BCMA 802.11 core specific IO status (BCMA_IOST) flags */
437#define B43_BCMA_IOST_2G_PHY 0x00000001 /* 2.4G capable phy */
438#define B43_BCMA_IOST_5G_PHY 0x00000002 /* 5G capable phy */
439#define B43_BCMA_IOST_FASTCLKA 0x00000004 /* Fast Clock Available */
440#define B43_BCMA_IOST_DUALB_PHY 0x00000008 /* Dualband phy */
441
417/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */ 442/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
418#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ 443#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
419#define B43_TMSLOW_PHY_BANDWIDTH 0x00C00000 /* PHY band width and clock speed mask (N-PHY only) */ 444#define B43_TMSLOW_PHY_BANDWIDTH 0x00C00000 /* PHY band width and clock speed mask (N-PHY only) */
@@ -569,6 +594,7 @@ struct b43_dma {
569 struct b43_dmaring *rx_ring; 594 struct b43_dmaring *rx_ring;
570 595
571 u32 translation; /* Routing bits */ 596 u32 translation; /* Routing bits */
597 bool parity; /* Check for parity */
572}; 598};
573 599
574struct b43_pio_txqueue; 600struct b43_pio_txqueue;
@@ -707,7 +733,7 @@ enum {
707 733
708/* Data structure for one wireless device (802.11 core) */ 734/* Data structure for one wireless device (802.11 core) */
709struct b43_wldev { 735struct b43_wldev {
710 struct ssb_device *sdev; 736 struct b43_bus_dev *dev;
711 struct b43_wl *wl; 737 struct b43_wl *wl;
712 738
713 /* The device initialization status. 739 /* The device initialization status.
@@ -879,36 +905,59 @@ static inline enum ieee80211_band b43_current_band(struct b43_wl *wl)
879 return wl->hw->conf.channel->band; 905 return wl->hw->conf.channel->band;
880} 906}
881 907
908static inline int b43_bus_may_powerdown(struct b43_wldev *wldev)
909{
910 return wldev->dev->bus_may_powerdown(wldev->dev);
911}
912static inline int b43_bus_powerup(struct b43_wldev *wldev, bool dynamic_pctl)
913{
914 return wldev->dev->bus_powerup(wldev->dev, dynamic_pctl);
915}
916static inline int b43_device_is_enabled(struct b43_wldev *wldev)
917{
918 return wldev->dev->device_is_enabled(wldev->dev);
919}
920static inline void b43_device_enable(struct b43_wldev *wldev,
921 u32 core_specific_flags)
922{
923 wldev->dev->device_enable(wldev->dev, core_specific_flags);
924}
925static inline void b43_device_disable(struct b43_wldev *wldev,
926 u32 core_specific_flags)
927{
928 wldev->dev->device_disable(wldev->dev, core_specific_flags);
929}
930
882static inline u16 b43_read16(struct b43_wldev *dev, u16 offset) 931static inline u16 b43_read16(struct b43_wldev *dev, u16 offset)
883{ 932{
884 return ssb_read16(dev->sdev, offset); 933 return dev->dev->read16(dev->dev, offset);
885} 934}
886 935
887static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value) 936static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value)
888{ 937{
889 ssb_write16(dev->sdev, offset, value); 938 dev->dev->write16(dev->dev, offset, value);
890} 939}
891 940
892static inline u32 b43_read32(struct b43_wldev *dev, u16 offset) 941static inline u32 b43_read32(struct b43_wldev *dev, u16 offset)
893{ 942{
894 return ssb_read32(dev->sdev, offset); 943 return dev->dev->read32(dev->dev, offset);
895} 944}
896 945
897static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value) 946static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
898{ 947{
899 ssb_write32(dev->sdev, offset, value); 948 dev->dev->write32(dev->dev, offset, value);
900} 949}
901 950
902static inline void b43_block_read(struct b43_wldev *dev, void *buffer, 951static inline void b43_block_read(struct b43_wldev *dev, void *buffer,
903 size_t count, u16 offset, u8 reg_width) 952 size_t count, u16 offset, u8 reg_width)
904{ 953{
905 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); 954 dev->dev->block_read(dev->dev, buffer, count, offset, reg_width);
906} 955}
907 956
908static inline void b43_block_write(struct b43_wldev *dev, const void *buffer, 957static inline void b43_block_write(struct b43_wldev *dev, const void *buffer,
909 size_t count, u16 offset, u8 reg_width) 958 size_t count, u16 offset, u8 reg_width)
910{ 959{
911 ssb_block_write(dev->sdev, buffer, count, offset, reg_width); 960 dev->dev->block_write(dev->dev, buffer, count, offset, reg_width);
912} 961}
913 962
914static inline bool b43_using_pio_transfers(struct b43_wldev *dev) 963static inline bool b43_using_pio_transfers(struct b43_wldev *dev)
diff --git a/drivers/net/wireless/b43/bus.c b/drivers/net/wireless/b43/bus.c
new file mode 100644
index 000000000000..64c3f65ff8c0
--- /dev/null
+++ b/drivers/net/wireless/b43/bus.c
@@ -0,0 +1,253 @@
1/*
2
3 Broadcom B43 wireless driver
4 Bus abstraction layer
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include "b43.h"
24#include "bus.h"
25
26/* BCMA */
27#ifdef CONFIG_B43_BCMA
28static int b43_bus_bcma_bus_may_powerdown(struct b43_bus_dev *dev)
29{
30 return 0; /* bcma_bus_may_powerdown(dev->bdev->bus); */
31}
32static int b43_bus_bcma_bus_powerup(struct b43_bus_dev *dev,
33 bool dynamic_pctl)
34{
35 return 0; /* bcma_bus_powerup(dev->sdev->bus, dynamic_pctl); */
36}
37static int b43_bus_bcma_device_is_enabled(struct b43_bus_dev *dev)
38{
39 return bcma_core_is_enabled(dev->bdev);
40}
41static void b43_bus_bcma_device_enable(struct b43_bus_dev *dev,
42 u32 core_specific_flags)
43{
44 bcma_core_enable(dev->bdev, core_specific_flags);
45}
46static void b43_bus_bcma_device_disable(struct b43_bus_dev *dev,
47 u32 core_specific_flags)
48{
49 bcma_core_disable(dev->bdev, core_specific_flags);
50}
51static u16 b43_bus_bcma_read16(struct b43_bus_dev *dev, u16 offset)
52{
53 return bcma_read16(dev->bdev, offset);
54}
55static u32 b43_bus_bcma_read32(struct b43_bus_dev *dev, u16 offset)
56{
57 return bcma_read32(dev->bdev, offset);
58}
59static
60void b43_bus_bcma_write16(struct b43_bus_dev *dev, u16 offset, u16 value)
61{
62 bcma_write16(dev->bdev, offset, value);
63}
64static
65void b43_bus_bcma_write32(struct b43_bus_dev *dev, u16 offset, u32 value)
66{
67 bcma_write32(dev->bdev, offset, value);
68}
69static
70void b43_bus_bcma_block_read(struct b43_bus_dev *dev, void *buffer,
71 size_t count, u16 offset, u8 reg_width)
72{
73 bcma_block_read(dev->bdev, buffer, count, offset, reg_width);
74}
75static
76void b43_bus_bcma_block_write(struct b43_bus_dev *dev, const void *buffer,
77 size_t count, u16 offset, u8 reg_width)
78{
79 bcma_block_write(dev->bdev, buffer, count, offset, reg_width);
80}
81
82struct b43_bus_dev *b43_bus_dev_bcma_init(struct bcma_device *core)
83{
84 struct b43_bus_dev *dev = kzalloc(sizeof(*dev), GFP_KERNEL);
85 if (!dev)
86 return NULL;
87
88 dev->bus_type = B43_BUS_BCMA;
89 dev->bdev = core;
90
91 dev->bus_may_powerdown = b43_bus_bcma_bus_may_powerdown;
92 dev->bus_powerup = b43_bus_bcma_bus_powerup;
93 dev->device_is_enabled = b43_bus_bcma_device_is_enabled;
94 dev->device_enable = b43_bus_bcma_device_enable;
95 dev->device_disable = b43_bus_bcma_device_disable;
96
97 dev->read16 = b43_bus_bcma_read16;
98 dev->read32 = b43_bus_bcma_read32;
99 dev->write16 = b43_bus_bcma_write16;
100 dev->write32 = b43_bus_bcma_write32;
101 dev->block_read = b43_bus_bcma_block_read;
102 dev->block_write = b43_bus_bcma_block_write;
103
104 dev->dev = &core->dev;
105 dev->dma_dev = core->dma_dev;
106 dev->irq = core->irq;
107
108 /*
109 dev->board_vendor = core->bus->boardinfo.vendor;
110 dev->board_type = core->bus->boardinfo.type;
111 dev->board_rev = core->bus->boardinfo.rev;
112 */
113
114 dev->chip_id = core->bus->chipinfo.id;
115 dev->chip_rev = core->bus->chipinfo.rev;
116 dev->chip_pkg = core->bus->chipinfo.pkg;
117
118 dev->bus_sprom = &core->bus->sprom;
119
120 dev->core_id = core->id.id;
121 dev->core_rev = core->id.rev;
122
123 return dev;
124}
125#endif /* CONFIG_B43_BCMA */
126
127/* SSB */
128#ifdef CONFIG_B43_SSB
129static int b43_bus_ssb_bus_may_powerdown(struct b43_bus_dev *dev)
130{
131 return ssb_bus_may_powerdown(dev->sdev->bus);
132}
133static int b43_bus_ssb_bus_powerup(struct b43_bus_dev *dev,
134 bool dynamic_pctl)
135{
136 return ssb_bus_powerup(dev->sdev->bus, dynamic_pctl);
137}
138static int b43_bus_ssb_device_is_enabled(struct b43_bus_dev *dev)
139{
140 return ssb_device_is_enabled(dev->sdev);
141}
142static void b43_bus_ssb_device_enable(struct b43_bus_dev *dev,
143 u32 core_specific_flags)
144{
145 ssb_device_enable(dev->sdev, core_specific_flags);
146}
147static void b43_bus_ssb_device_disable(struct b43_bus_dev *dev,
148 u32 core_specific_flags)
149{
150 ssb_device_disable(dev->sdev, core_specific_flags);
151}
152
153static u16 b43_bus_ssb_read16(struct b43_bus_dev *dev, u16 offset)
154{
155 return ssb_read16(dev->sdev, offset);
156}
157static u32 b43_bus_ssb_read32(struct b43_bus_dev *dev, u16 offset)
158{
159 return ssb_read32(dev->sdev, offset);
160}
161static void b43_bus_ssb_write16(struct b43_bus_dev *dev, u16 offset, u16 value)
162{
163 ssb_write16(dev->sdev, offset, value);
164}
165static void b43_bus_ssb_write32(struct b43_bus_dev *dev, u16 offset, u32 value)
166{
167 ssb_write32(dev->sdev, offset, value);
168}
169static void b43_bus_ssb_block_read(struct b43_bus_dev *dev, void *buffer,
170 size_t count, u16 offset, u8 reg_width)
171{
172 ssb_block_read(dev->sdev, buffer, count, offset, reg_width);
173}
174static
175void b43_bus_ssb_block_write(struct b43_bus_dev *dev, const void *buffer,
176 size_t count, u16 offset, u8 reg_width)
177{
178 ssb_block_write(dev->sdev, buffer, count, offset, reg_width);
179}
180
181struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev)
182{
183 struct b43_bus_dev *dev;
184
185 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
186 if (!dev)
187 return NULL;
188
189 dev->bus_type = B43_BUS_SSB;
190 dev->sdev = sdev;
191
192 dev->bus_may_powerdown = b43_bus_ssb_bus_may_powerdown;
193 dev->bus_powerup = b43_bus_ssb_bus_powerup;
194 dev->device_is_enabled = b43_bus_ssb_device_is_enabled;
195 dev->device_enable = b43_bus_ssb_device_enable;
196 dev->device_disable = b43_bus_ssb_device_disable;
197
198 dev->read16 = b43_bus_ssb_read16;
199 dev->read32 = b43_bus_ssb_read32;
200 dev->write16 = b43_bus_ssb_write16;
201 dev->write32 = b43_bus_ssb_write32;
202 dev->block_read = b43_bus_ssb_block_read;
203 dev->block_write = b43_bus_ssb_block_write;
204
205 dev->dev = sdev->dev;
206 dev->dma_dev = sdev->dma_dev;
207 dev->irq = sdev->irq;
208
209 dev->board_vendor = sdev->bus->boardinfo.vendor;
210 dev->board_type = sdev->bus->boardinfo.type;
211 dev->board_rev = sdev->bus->boardinfo.rev;
212
213 dev->chip_id = sdev->bus->chip_id;
214 dev->chip_rev = sdev->bus->chip_rev;
215 dev->chip_pkg = sdev->bus->chip_package;
216
217 dev->bus_sprom = &sdev->bus->sprom;
218
219 dev->core_id = sdev->id.coreid;
220 dev->core_rev = sdev->id.revision;
221
222 return dev;
223}
224#endif /* CONFIG_B43_SSB */
225
226void *b43_bus_get_wldev(struct b43_bus_dev *dev)
227{
228 switch (dev->bus_type) {
229#ifdef CONFIG_B43_BCMA
230 case B43_BUS_BCMA:
231 return bcma_get_drvdata(dev->bdev);
232#endif
233#ifdef CONFIG_B43_SSB
234 case B43_BUS_SSB:
235 return ssb_get_drvdata(dev->sdev);
236#endif
237 }
238 return NULL;
239}
240
241void b43_bus_set_wldev(struct b43_bus_dev *dev, void *wldev)
242{
243 switch (dev->bus_type) {
244#ifdef CONFIG_B43_BCMA
245 case B43_BUS_BCMA:
246 bcma_set_drvdata(dev->bdev, wldev);
247#endif
248#ifdef CONFIG_B43_SSB
249 case B43_BUS_SSB:
250 ssb_set_drvdata(dev->sdev, wldev);
251#endif
252 }
253}
diff --git a/drivers/net/wireless/b43/bus.h b/drivers/net/wireless/b43/bus.h
new file mode 100644
index 000000000000..184c95659279
--- /dev/null
+++ b/drivers/net/wireless/b43/bus.h
@@ -0,0 +1,70 @@
1#ifndef B43_BUS_H_
2#define B43_BUS_H_
3
4enum b43_bus_type {
5#ifdef CONFIG_B43_BCMA
6 B43_BUS_BCMA,
7#endif
8 B43_BUS_SSB,
9};
10
11struct b43_bus_dev {
12 enum b43_bus_type bus_type;
13 union {
14 struct bcma_device *bdev;
15 struct ssb_device *sdev;
16 };
17
18 int (*bus_may_powerdown)(struct b43_bus_dev *dev);
19 int (*bus_powerup)(struct b43_bus_dev *dev, bool dynamic_pctl);
20 int (*device_is_enabled)(struct b43_bus_dev *dev);
21 void (*device_enable)(struct b43_bus_dev *dev,
22 u32 core_specific_flags);
23 void (*device_disable)(struct b43_bus_dev *dev,
24 u32 core_specific_flags);
25
26 u16 (*read16)(struct b43_bus_dev *dev, u16 offset);
27 u32 (*read32)(struct b43_bus_dev *dev, u16 offset);
28 void (*write16)(struct b43_bus_dev *dev, u16 offset, u16 value);
29 void (*write32)(struct b43_bus_dev *dev, u16 offset, u32 value);
30 void (*block_read)(struct b43_bus_dev *dev, void *buffer,
31 size_t count, u16 offset, u8 reg_width);
32 void (*block_write)(struct b43_bus_dev *dev, const void *buffer,
33 size_t count, u16 offset, u8 reg_width);
34
35 struct device *dev;
36 struct device *dma_dev;
37 unsigned int irq;
38
39 u16 board_vendor;
40 u16 board_type;
41 u16 board_rev;
42
43 u16 chip_id;
44 u8 chip_rev;
45 u8 chip_pkg;
46
47 struct ssb_sprom *bus_sprom;
48
49 u16 core_id;
50 u8 core_rev;
51};
52
53static inline bool b43_bus_host_is_pcmcia(struct b43_bus_dev *dev)
54{
55 return (dev->bus_type == B43_BUS_SSB &&
56 dev->sdev->bus->bustype == SSB_BUSTYPE_PCMCIA);
57}
58static inline bool b43_bus_host_is_sdio(struct b43_bus_dev *dev)
59{
60 return (dev->bus_type == B43_BUS_SSB &&
61 dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO);
62}
63
64struct b43_bus_dev *b43_bus_dev_bcma_init(struct bcma_device *core);
65struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev);
66
67void *b43_bus_get_wldev(struct b43_bus_dev *dev);
68void b43_bus_set_wldev(struct b43_bus_dev *dev, void *data);
69
70#endif /* B43_BUS_H_ */
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index aa986bf3fe01..83cba22ac6e8 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -174,7 +174,7 @@ static void op64_fill_descriptor(struct b43_dmaring *ring,
174 addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK); 174 addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
175 addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK) 175 addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
176 >> SSB_DMA_TRANSLATION_SHIFT; 176 >> SSB_DMA_TRANSLATION_SHIFT;
177 addrhi |= (ring->dev->dma.translation << 1); 177 addrhi |= ring->dev->dma.translation;
178 if (slot == ring->nr_slots - 1) 178 if (slot == ring->nr_slots - 1)
179 ctl0 |= B43_DMA64_DCTL0_DTABLEEND; 179 ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
180 if (start) 180 if (start)
@@ -333,10 +333,10 @@ static inline
333 dma_addr_t dmaaddr; 333 dma_addr_t dmaaddr;
334 334
335 if (tx) { 335 if (tx) {
336 dmaaddr = dma_map_single(ring->dev->sdev->dma_dev, 336 dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
337 buf, len, DMA_TO_DEVICE); 337 buf, len, DMA_TO_DEVICE);
338 } else { 338 } else {
339 dmaaddr = dma_map_single(ring->dev->sdev->dma_dev, 339 dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
340 buf, len, DMA_FROM_DEVICE); 340 buf, len, DMA_FROM_DEVICE);
341 } 341 }
342 342
@@ -348,10 +348,10 @@ static inline
348 dma_addr_t addr, size_t len, int tx) 348 dma_addr_t addr, size_t len, int tx)
349{ 349{
350 if (tx) { 350 if (tx) {
351 dma_unmap_single(ring->dev->sdev->dma_dev, 351 dma_unmap_single(ring->dev->dev->dma_dev,
352 addr, len, DMA_TO_DEVICE); 352 addr, len, DMA_TO_DEVICE);
353 } else { 353 } else {
354 dma_unmap_single(ring->dev->sdev->dma_dev, 354 dma_unmap_single(ring->dev->dev->dma_dev,
355 addr, len, DMA_FROM_DEVICE); 355 addr, len, DMA_FROM_DEVICE);
356 } 356 }
357} 357}
@@ -361,7 +361,7 @@ static inline
361 dma_addr_t addr, size_t len) 361 dma_addr_t addr, size_t len)
362{ 362{
363 B43_WARN_ON(ring->tx); 363 B43_WARN_ON(ring->tx);
364 dma_sync_single_for_cpu(ring->dev->sdev->dma_dev, 364 dma_sync_single_for_cpu(ring->dev->dev->dma_dev,
365 addr, len, DMA_FROM_DEVICE); 365 addr, len, DMA_FROM_DEVICE);
366} 366}
367 367
@@ -370,7 +370,7 @@ static inline
370 dma_addr_t addr, size_t len) 370 dma_addr_t addr, size_t len)
371{ 371{
372 B43_WARN_ON(ring->tx); 372 B43_WARN_ON(ring->tx);
373 dma_sync_single_for_device(ring->dev->sdev->dma_dev, 373 dma_sync_single_for_device(ring->dev->dev->dma_dev,
374 addr, len, DMA_FROM_DEVICE); 374 addr, len, DMA_FROM_DEVICE);
375} 375}
376 376
@@ -401,7 +401,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
401 */ 401 */
402 if (ring->type == B43_DMA_64BIT) 402 if (ring->type == B43_DMA_64BIT)
403 flags |= GFP_DMA; 403 flags |= GFP_DMA;
404 ring->descbase = dma_alloc_coherent(ring->dev->sdev->dma_dev, 404 ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev,
405 B43_DMA_RINGMEMSIZE, 405 B43_DMA_RINGMEMSIZE,
406 &(ring->dmabase), flags); 406 &(ring->dmabase), flags);
407 if (!ring->descbase) { 407 if (!ring->descbase) {
@@ -415,7 +415,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
415 415
416static void free_ringmemory(struct b43_dmaring *ring) 416static void free_ringmemory(struct b43_dmaring *ring)
417{ 417{
418 dma_free_coherent(ring->dev->sdev->dma_dev, B43_DMA_RINGMEMSIZE, 418 dma_free_coherent(ring->dev->dev->dma_dev, B43_DMA_RINGMEMSIZE,
419 ring->descbase, ring->dmabase); 419 ring->descbase, ring->dmabase);
420} 420}
421 421
@@ -523,7 +523,7 @@ static bool b43_dma_mapping_error(struct b43_dmaring *ring,
523 dma_addr_t addr, 523 dma_addr_t addr,
524 size_t buffersize, bool dma_to_device) 524 size_t buffersize, bool dma_to_device)
525{ 525{
526 if (unlikely(dma_mapping_error(ring->dev->sdev->dma_dev, addr))) 526 if (unlikely(dma_mapping_error(ring->dev->dev->dma_dev, addr)))
527 return 1; 527 return 1;
528 528
529 switch (ring->type) { 529 switch (ring->type) {
@@ -659,6 +659,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
659 u32 value; 659 u32 value;
660 u32 addrext; 660 u32 addrext;
661 u32 trans = ring->dev->dma.translation; 661 u32 trans = ring->dev->dma.translation;
662 bool parity = ring->dev->dma.parity;
662 663
663 if (ring->tx) { 664 if (ring->tx) {
664 if (ring->type == B43_DMA_64BIT) { 665 if (ring->type == B43_DMA_64BIT) {
@@ -669,13 +670,15 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
669 value = B43_DMA64_TXENABLE; 670 value = B43_DMA64_TXENABLE;
670 value |= (addrext << B43_DMA64_TXADDREXT_SHIFT) 671 value |= (addrext << B43_DMA64_TXADDREXT_SHIFT)
671 & B43_DMA64_TXADDREXT_MASK; 672 & B43_DMA64_TXADDREXT_MASK;
673 if (!parity)
674 value |= B43_DMA64_TXPARITYDISABLE;
672 b43_dma_write(ring, B43_DMA64_TXCTL, value); 675 b43_dma_write(ring, B43_DMA64_TXCTL, value);
673 b43_dma_write(ring, B43_DMA64_TXRINGLO, 676 b43_dma_write(ring, B43_DMA64_TXRINGLO,
674 (ringbase & 0xFFFFFFFF)); 677 (ringbase & 0xFFFFFFFF));
675 b43_dma_write(ring, B43_DMA64_TXRINGHI, 678 b43_dma_write(ring, B43_DMA64_TXRINGHI,
676 ((ringbase >> 32) & 679 ((ringbase >> 32) &
677 ~SSB_DMA_TRANSLATION_MASK) 680 ~SSB_DMA_TRANSLATION_MASK)
678 | (trans << 1)); 681 | trans);
679 } else { 682 } else {
680 u32 ringbase = (u32) (ring->dmabase); 683 u32 ringbase = (u32) (ring->dmabase);
681 684
@@ -684,6 +687,8 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
684 value = B43_DMA32_TXENABLE; 687 value = B43_DMA32_TXENABLE;
685 value |= (addrext << B43_DMA32_TXADDREXT_SHIFT) 688 value |= (addrext << B43_DMA32_TXADDREXT_SHIFT)
686 & B43_DMA32_TXADDREXT_MASK; 689 & B43_DMA32_TXADDREXT_MASK;
690 if (!parity)
691 value |= B43_DMA32_TXPARITYDISABLE;
687 b43_dma_write(ring, B43_DMA32_TXCTL, value); 692 b43_dma_write(ring, B43_DMA32_TXCTL, value);
688 b43_dma_write(ring, B43_DMA32_TXRING, 693 b43_dma_write(ring, B43_DMA32_TXRING,
689 (ringbase & ~SSB_DMA_TRANSLATION_MASK) 694 (ringbase & ~SSB_DMA_TRANSLATION_MASK)
@@ -702,13 +707,15 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
702 value |= B43_DMA64_RXENABLE; 707 value |= B43_DMA64_RXENABLE;
703 value |= (addrext << B43_DMA64_RXADDREXT_SHIFT) 708 value |= (addrext << B43_DMA64_RXADDREXT_SHIFT)
704 & B43_DMA64_RXADDREXT_MASK; 709 & B43_DMA64_RXADDREXT_MASK;
710 if (!parity)
711 value |= B43_DMA64_RXPARITYDISABLE;
705 b43_dma_write(ring, B43_DMA64_RXCTL, value); 712 b43_dma_write(ring, B43_DMA64_RXCTL, value);
706 b43_dma_write(ring, B43_DMA64_RXRINGLO, 713 b43_dma_write(ring, B43_DMA64_RXRINGLO,
707 (ringbase & 0xFFFFFFFF)); 714 (ringbase & 0xFFFFFFFF));
708 b43_dma_write(ring, B43_DMA64_RXRINGHI, 715 b43_dma_write(ring, B43_DMA64_RXRINGHI,
709 ((ringbase >> 32) & 716 ((ringbase >> 32) &
710 ~SSB_DMA_TRANSLATION_MASK) 717 ~SSB_DMA_TRANSLATION_MASK)
711 | (trans << 1)); 718 | trans);
712 b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots * 719 b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
713 sizeof(struct b43_dmadesc64)); 720 sizeof(struct b43_dmadesc64));
714 } else { 721 } else {
@@ -720,6 +727,8 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
720 value |= B43_DMA32_RXENABLE; 727 value |= B43_DMA32_RXENABLE;
721 value |= (addrext << B43_DMA32_RXADDREXT_SHIFT) 728 value |= (addrext << B43_DMA32_RXADDREXT_SHIFT)
722 & B43_DMA32_RXADDREXT_MASK; 729 & B43_DMA32_RXADDREXT_MASK;
730 if (!parity)
731 value |= B43_DMA32_RXPARITYDISABLE;
723 b43_dma_write(ring, B43_DMA32_RXCTL, value); 732 b43_dma_write(ring, B43_DMA32_RXCTL, value);
724 b43_dma_write(ring, B43_DMA32_RXRING, 733 b43_dma_write(ring, B43_DMA32_RXRING,
725 (ringbase & ~SSB_DMA_TRANSLATION_MASK) 734 (ringbase & ~SSB_DMA_TRANSLATION_MASK)
@@ -757,14 +766,14 @@ static void dmacontroller_cleanup(struct b43_dmaring *ring)
757 766
758static void free_all_descbuffers(struct b43_dmaring *ring) 767static void free_all_descbuffers(struct b43_dmaring *ring)
759{ 768{
760 struct b43_dmadesc_generic *desc;
761 struct b43_dmadesc_meta *meta; 769 struct b43_dmadesc_meta *meta;
762 int i; 770 int i;
763 771
764 if (!ring->used_slots) 772 if (!ring->used_slots)
765 return; 773 return;
766 for (i = 0; i < ring->nr_slots; i++) { 774 for (i = 0; i < ring->nr_slots; i++) {
767 desc = ring->ops->idx2desc(ring, i, &meta); 775 /* get meta - ignore returned value */
776 ring->ops->idx2desc(ring, i, &meta);
768 777
769 if (!meta->skb || b43_dma_ptr_is_poisoned(meta->skb)) { 778 if (!meta->skb || b43_dma_ptr_is_poisoned(meta->skb)) {
770 B43_WARN_ON(!ring->tx); 779 B43_WARN_ON(!ring->tx);
@@ -869,7 +878,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
869 goto err_kfree_meta; 878 goto err_kfree_meta;
870 879
871 /* test for ability to dma to txhdr_cache */ 880 /* test for ability to dma to txhdr_cache */
872 dma_test = dma_map_single(dev->sdev->dma_dev, 881 dma_test = dma_map_single(dev->dev->dma_dev,
873 ring->txhdr_cache, 882 ring->txhdr_cache,
874 b43_txhdr_size(dev), 883 b43_txhdr_size(dev),
875 DMA_TO_DEVICE); 884 DMA_TO_DEVICE);
@@ -884,7 +893,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
884 if (!ring->txhdr_cache) 893 if (!ring->txhdr_cache)
885 goto err_kfree_meta; 894 goto err_kfree_meta;
886 895
887 dma_test = dma_map_single(dev->sdev->dma_dev, 896 dma_test = dma_map_single(dev->dev->dma_dev,
888 ring->txhdr_cache, 897 ring->txhdr_cache,
889 b43_txhdr_size(dev), 898 b43_txhdr_size(dev),
890 DMA_TO_DEVICE); 899 DMA_TO_DEVICE);
@@ -898,7 +907,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
898 } 907 }
899 } 908 }
900 909
901 dma_unmap_single(dev->sdev->dma_dev, 910 dma_unmap_single(dev->dev->dma_dev,
902 dma_test, b43_txhdr_size(dev), 911 dma_test, b43_txhdr_size(dev),
903 DMA_TO_DEVICE); 912 DMA_TO_DEVICE);
904 } 913 }
@@ -1013,9 +1022,9 @@ static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask)
1013 /* Try to set the DMA mask. If it fails, try falling back to a 1022 /* Try to set the DMA mask. If it fails, try falling back to a
1014 * lower mask, as we can always also support a lower one. */ 1023 * lower mask, as we can always also support a lower one. */
1015 while (1) { 1024 while (1) {
1016 err = dma_set_mask(dev->sdev->dma_dev, mask); 1025 err = dma_set_mask(dev->dev->dma_dev, mask);
1017 if (!err) { 1026 if (!err) {
1018 err = dma_set_coherent_mask(dev->sdev->dma_dev, mask); 1027 err = dma_set_coherent_mask(dev->dev->dma_dev, mask);
1019 if (!err) 1028 if (!err)
1020 break; 1029 break;
1021 } 1030 }
@@ -1055,7 +1064,26 @@ int b43_dma_init(struct b43_wldev *dev)
1055 err = b43_dma_set_mask(dev, dmamask); 1064 err = b43_dma_set_mask(dev, dmamask);
1056 if (err) 1065 if (err)
1057 return err; 1066 return err;
1058 dma->translation = ssb_dma_translation(dev->sdev); 1067
1068 switch (dev->dev->bus_type) {
1069#ifdef CONFIG_B43_BCMA
1070 case B43_BUS_BCMA:
1071 dma->translation = bcma_core_dma_translation(dev->dev->bdev);
1072 break;
1073#endif
1074#ifdef CONFIG_B43_SSB
1075 case B43_BUS_SSB:
1076 dma->translation = ssb_dma_translation(dev->dev->sdev);
1077 break;
1078#endif
1079 }
1080
1081 dma->parity = true;
1082#ifdef CONFIG_B43_BCMA
1083 /* TODO: find out which SSB devices need disabling parity */
1084 if (dev->dev->bus_type == B43_BUS_BCMA)
1085 dma->parity = false;
1086#endif
1059 1087
1060 err = -ENOMEM; 1088 err = -ENOMEM;
1061 /* setup TX DMA channels. */ 1089 /* setup TX DMA channels. */
@@ -1085,7 +1113,7 @@ int b43_dma_init(struct b43_wldev *dev)
1085 goto err_destroy_mcast; 1113 goto err_destroy_mcast;
1086 1114
1087 /* No support for the TX status DMA ring. */ 1115 /* No support for the TX status DMA ring. */
1088 B43_WARN_ON(dev->sdev->id.revision < 5); 1116 B43_WARN_ON(dev->dev->core_rev < 5);
1089 1117
1090 b43dbg(dev->wl, "%u-bit DMA initialized\n", 1118 b43dbg(dev->wl, "%u-bit DMA initialized\n",
1091 (unsigned int)type); 1119 (unsigned int)type);
@@ -1388,7 +1416,6 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
1388{ 1416{
1389 const struct b43_dma_ops *ops; 1417 const struct b43_dma_ops *ops;
1390 struct b43_dmaring *ring; 1418 struct b43_dmaring *ring;
1391 struct b43_dmadesc_generic *desc;
1392 struct b43_dmadesc_meta *meta; 1419 struct b43_dmadesc_meta *meta;
1393 int slot, firstused; 1420 int slot, firstused;
1394 bool frame_succeed; 1421 bool frame_succeed;
@@ -1416,7 +1443,8 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
1416 ops = ring->ops; 1443 ops = ring->ops;
1417 while (1) { 1444 while (1) {
1418 B43_WARN_ON(slot < 0 || slot >= ring->nr_slots); 1445 B43_WARN_ON(slot < 0 || slot >= ring->nr_slots);
1419 desc = ops->idx2desc(ring, slot, &meta); 1446 /* get meta - ignore returned value */
1447 ops->idx2desc(ring, slot, &meta);
1420 1448
1421 if (b43_dma_ptr_is_poisoned(meta->skb)) { 1449 if (b43_dma_ptr_is_poisoned(meta->skb)) {
1422 b43dbg(dev->wl, "Poisoned TX slot %d (first=%d) " 1450 b43dbg(dev->wl, "Poisoned TX slot %d (first=%d) "
@@ -1600,6 +1628,7 @@ void b43_dma_rx(struct b43_dmaring *ring)
1600 dma_rx(ring, &slot); 1628 dma_rx(ring, &slot);
1601 update_max_used_slots(ring, ++used_slots); 1629 update_max_used_slots(ring, ++used_slots);
1602 } 1630 }
1631 wmb();
1603 ops->set_current_rxslot(ring, slot); 1632 ops->set_current_rxslot(ring, slot);
1604 ring->current_slot = slot; 1633 ring->current_slot = slot;
1605} 1634}
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index e8a80a1251bf..cdf87094efe8 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -20,6 +20,7 @@
20#define B43_DMA32_TXSUSPEND 0x00000002 20#define B43_DMA32_TXSUSPEND 0x00000002
21#define B43_DMA32_TXLOOPBACK 0x00000004 21#define B43_DMA32_TXLOOPBACK 0x00000004
22#define B43_DMA32_TXFLUSH 0x00000010 22#define B43_DMA32_TXFLUSH 0x00000010
23#define B43_DMA32_TXPARITYDISABLE 0x00000800
23#define B43_DMA32_TXADDREXT_MASK 0x00030000 24#define B43_DMA32_TXADDREXT_MASK 0x00030000
24#define B43_DMA32_TXADDREXT_SHIFT 16 25#define B43_DMA32_TXADDREXT_SHIFT 16
25#define B43_DMA32_TXRING 0x04 26#define B43_DMA32_TXRING 0x04
@@ -44,6 +45,7 @@
44#define B43_DMA32_RXFROFF_MASK 0x000000FE 45#define B43_DMA32_RXFROFF_MASK 0x000000FE
45#define B43_DMA32_RXFROFF_SHIFT 1 46#define B43_DMA32_RXFROFF_SHIFT 1
46#define B43_DMA32_RXDIRECTFIFO 0x00000100 47#define B43_DMA32_RXDIRECTFIFO 0x00000100
48#define B43_DMA32_RXPARITYDISABLE 0x00000800
47#define B43_DMA32_RXADDREXT_MASK 0x00030000 49#define B43_DMA32_RXADDREXT_MASK 0x00030000
48#define B43_DMA32_RXADDREXT_SHIFT 16 50#define B43_DMA32_RXADDREXT_SHIFT 16
49#define B43_DMA32_RXRING 0x14 51#define B43_DMA32_RXRING 0x14
@@ -84,6 +86,7 @@ struct b43_dmadesc32 {
84#define B43_DMA64_TXSUSPEND 0x00000002 86#define B43_DMA64_TXSUSPEND 0x00000002
85#define B43_DMA64_TXLOOPBACK 0x00000004 87#define B43_DMA64_TXLOOPBACK 0x00000004
86#define B43_DMA64_TXFLUSH 0x00000010 88#define B43_DMA64_TXFLUSH 0x00000010
89#define B43_DMA64_TXPARITYDISABLE 0x00000800
87#define B43_DMA64_TXADDREXT_MASK 0x00030000 90#define B43_DMA64_TXADDREXT_MASK 0x00030000
88#define B43_DMA64_TXADDREXT_SHIFT 16 91#define B43_DMA64_TXADDREXT_SHIFT 16
89#define B43_DMA64_TXINDEX 0x04 92#define B43_DMA64_TXINDEX 0x04
@@ -111,6 +114,7 @@ struct b43_dmadesc32 {
111#define B43_DMA64_RXFROFF_MASK 0x000000FE 114#define B43_DMA64_RXFROFF_MASK 0x000000FE
112#define B43_DMA64_RXFROFF_SHIFT 1 115#define B43_DMA64_RXFROFF_SHIFT 1
113#define B43_DMA64_RXDIRECTFIFO 0x00000100 116#define B43_DMA64_RXDIRECTFIFO 0x00000100
117#define B43_DMA64_RXPARITYDISABLE 0x00000800
114#define B43_DMA64_RXADDREXT_MASK 0x00030000 118#define B43_DMA64_RXADDREXT_MASK 0x00030000
115#define B43_DMA64_RXADDREXT_SHIFT 16 119#define B43_DMA64_RXADDREXT_SHIFT 16
116#define B43_DMA64_RXINDEX 0x24 120#define B43_DMA64_RXINDEX 0x24
diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c
index 1125e7725456..a38c1c6446ad 100644
--- a/drivers/net/wireless/b43/leds.c
+++ b/drivers/net/wireless/b43/leds.c
@@ -138,7 +138,7 @@ static int b43_register_led(struct b43_wldev *dev, struct b43_led *led,
138 led->led_dev.default_trigger = default_trigger; 138 led->led_dev.default_trigger = default_trigger;
139 led->led_dev.brightness_set = b43_led_brightness_set; 139 led->led_dev.brightness_set = b43_led_brightness_set;
140 140
141 err = led_classdev_register(dev->sdev->dev, &led->led_dev); 141 err = led_classdev_register(dev->dev->dev, &led->led_dev);
142 if (err) { 142 if (err) {
143 b43warn(dev->wl, "LEDs: Failed to register %s\n", name); 143 b43warn(dev->wl, "LEDs: Failed to register %s\n", name);
144 led->wl = NULL; 144 led->wl = NULL;
@@ -215,13 +215,12 @@ static void b43_led_get_sprominfo(struct b43_wldev *dev,
215 enum b43_led_behaviour *behaviour, 215 enum b43_led_behaviour *behaviour,
216 bool *activelow) 216 bool *activelow)
217{ 217{
218 struct ssb_bus *bus = dev->sdev->bus;
219 u8 sprom[4]; 218 u8 sprom[4];
220 219
221 sprom[0] = bus->sprom.gpio0; 220 sprom[0] = dev->dev->bus_sprom->gpio0;
222 sprom[1] = bus->sprom.gpio1; 221 sprom[1] = dev->dev->bus_sprom->gpio1;
223 sprom[2] = bus->sprom.gpio2; 222 sprom[2] = dev->dev->bus_sprom->gpio2;
224 sprom[3] = bus->sprom.gpio3; 223 sprom[3] = dev->dev->bus_sprom->gpio3;
225 224
226 if (sprom[led_index] == 0xFF) { 225 if (sprom[led_index] == 0xFF) {
227 /* There is no LED information in the SPROM 226 /* There is no LED information in the SPROM
@@ -231,12 +230,12 @@ static void b43_led_get_sprominfo(struct b43_wldev *dev,
231 case 0: 230 case 0:
232 *behaviour = B43_LED_ACTIVITY; 231 *behaviour = B43_LED_ACTIVITY;
233 *activelow = 1; 232 *activelow = 1;
234 if (bus->boardinfo.vendor == PCI_VENDOR_ID_COMPAQ) 233 if (dev->dev->board_vendor == PCI_VENDOR_ID_COMPAQ)
235 *behaviour = B43_LED_RADIO_ALL; 234 *behaviour = B43_LED_RADIO_ALL;
236 break; 235 break;
237 case 1: 236 case 1:
238 *behaviour = B43_LED_RADIO_B; 237 *behaviour = B43_LED_RADIO_B;
239 if (bus->boardinfo.vendor == PCI_VENDOR_ID_ASUSTEK) 238 if (dev->dev->board_vendor == PCI_VENDOR_ID_ASUSTEK)
240 *behaviour = B43_LED_ASSOC; 239 *behaviour = B43_LED_ASSOC;
241 break; 240 break;
242 case 2: 241 case 2:
diff --git a/drivers/net/wireless/b43/lo.c b/drivers/net/wireless/b43/lo.c
index f47a32da534d..4c82d582a524 100644
--- a/drivers/net/wireless/b43/lo.c
+++ b/drivers/net/wireless/b43/lo.c
@@ -98,7 +98,7 @@ static u16 lo_measure_feedthrough(struct b43_wldev *dev,
98 rfover |= pga; 98 rfover |= pga;
99 rfover |= lna; 99 rfover |= lna;
100 rfover |= trsw_rx; 100 rfover |= trsw_rx;
101 if ((dev->sdev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) 101 if ((dev->dev->bus_sprom->boardflags_lo & B43_BFL_EXTLNA)
102 && phy->rev > 6) 102 && phy->rev > 6)
103 rfover |= B43_PHY_RFOVERVAL_EXTLNA; 103 rfover |= B43_PHY_RFOVERVAL_EXTLNA;
104 104
@@ -301,14 +301,12 @@ static void lo_measure_gain_values(struct b43_wldev *dev,
301 max_rx_gain = 0; 301 max_rx_gain = 0;
302 302
303 if (has_loopback_gain(phy)) { 303 if (has_loopback_gain(phy)) {
304 int trsw_rx = 0;
305 int trsw_rx_gain; 304 int trsw_rx_gain;
306 305
307 if (use_trsw_rx) { 306 if (use_trsw_rx) {
308 trsw_rx_gain = gphy->trsw_rx_gain / 2; 307 trsw_rx_gain = gphy->trsw_rx_gain / 2;
309 if (max_rx_gain >= trsw_rx_gain) { 308 if (max_rx_gain >= trsw_rx_gain) {
310 trsw_rx_gain = max_rx_gain - trsw_rx_gain; 309 trsw_rx_gain = max_rx_gain - trsw_rx_gain;
311 trsw_rx = 0x20;
312 } 310 }
313 } else 311 } else
314 trsw_rx_gain = max_rx_gain; 312 trsw_rx_gain = max_rx_gain;
@@ -387,7 +385,7 @@ struct lo_g_saved_values {
387static void lo_measure_setup(struct b43_wldev *dev, 385static void lo_measure_setup(struct b43_wldev *dev,
388 struct lo_g_saved_values *sav) 386 struct lo_g_saved_values *sav)
389{ 387{
390 struct ssb_sprom *sprom = &dev->sdev->bus->sprom; 388 struct ssb_sprom *sprom = dev->dev->bus_sprom;
391 struct b43_phy *phy = &dev->phy; 389 struct b43_phy *phy = &dev->phy;
392 struct b43_phy_g *gphy = phy->g; 390 struct b43_phy_g *gphy = phy->g;
393 struct b43_txpower_lo_control *lo = gphy->lo_control; 391 struct b43_txpower_lo_control *lo = gphy->lo_control;
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 5fb000fd41dc..032d46674f6b 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -113,6 +113,17 @@ static int b43_modparam_pio = B43_PIO_DEFAULT;
113module_param_named(pio, b43_modparam_pio, int, 0644); 113module_param_named(pio, b43_modparam_pio, int, 0644);
114MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO"); 114MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO");
115 115
116#ifdef CONFIG_B43_BCMA
117static const struct bcma_device_id b43_bcma_tbl[] = {
118 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x17, BCMA_ANY_CLASS),
119 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x18, BCMA_ANY_CLASS),
120 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x1D, BCMA_ANY_CLASS),
121 BCMA_CORETABLE_END
122};
123MODULE_DEVICE_TABLE(bcma, b43_bcma_tbl);
124#endif
125
126#ifdef CONFIG_B43_SSB
116static const struct ssb_device_id b43_ssb_tbl[] = { 127static const struct ssb_device_id b43_ssb_tbl[] = {
117 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5), 128 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5),
118 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 6), 129 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 6),
@@ -126,8 +137,8 @@ static const struct ssb_device_id b43_ssb_tbl[] = {
126 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 16), 137 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 16),
127 SSB_DEVTABLE_END 138 SSB_DEVTABLE_END
128}; 139};
129
130MODULE_DEVICE_TABLE(ssb, b43_ssb_tbl); 140MODULE_DEVICE_TABLE(ssb, b43_ssb_tbl);
141#endif
131 142
132/* Channel and ratetables are shared for all devices. 143/* Channel and ratetables are shared for all devices.
133 * They can't be const, because ieee80211 puts some precalculated 144 * They can't be const, because ieee80211 puts some precalculated
@@ -548,7 +559,7 @@ void b43_tsf_read(struct b43_wldev *dev, u64 *tsf)
548{ 559{
549 u32 low, high; 560 u32 low, high;
550 561
551 B43_WARN_ON(dev->sdev->id.revision < 3); 562 B43_WARN_ON(dev->dev->core_rev < 3);
552 563
553 /* The hardware guarantees us an atomic read, if we 564 /* The hardware guarantees us an atomic read, if we
554 * read the low register first. */ 565 * read the low register first. */
@@ -586,7 +597,7 @@ static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf)
586{ 597{
587 u32 low, high; 598 u32 low, high;
588 599
589 B43_WARN_ON(dev->sdev->id.revision < 3); 600 B43_WARN_ON(dev->dev->core_rev < 3);
590 601
591 low = tsf; 602 low = tsf;
592 high = (tsf >> 32); 603 high = (tsf >> 32);
@@ -714,7 +725,7 @@ void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on)
714 b43_ram_write(dev, i * 4, buffer[i]); 725 b43_ram_write(dev, i * 4, buffer[i]);
715 726
716 b43_write16(dev, 0x0568, 0x0000); 727 b43_write16(dev, 0x0568, 0x0000);
717 if (dev->sdev->id.revision < 11) 728 if (dev->dev->core_rev < 11)
718 b43_write16(dev, 0x07C0, 0x0000); 729 b43_write16(dev, 0x07C0, 0x0000);
719 else 730 else
720 b43_write16(dev, 0x07C0, 0x0100); 731 b43_write16(dev, 0x07C0, 0x0100);
@@ -1132,7 +1143,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1132 b43_write32(dev, B43_MMIO_MACCTL, macctl); 1143 b43_write32(dev, B43_MMIO_MACCTL, macctl);
1133 /* Commit write */ 1144 /* Commit write */
1134 b43_read32(dev, B43_MMIO_MACCTL); 1145 b43_read32(dev, B43_MMIO_MACCTL);
1135 if (awake && dev->sdev->id.revision >= 5) { 1146 if (awake && dev->dev->core_rev >= 5) {
1136 /* Wait for the microcode to wake up. */ 1147 /* Wait for the microcode to wake up. */
1137 for (i = 0; i < 100; i++) { 1148 for (i = 0; i < 100; i++) {
1138 ucstat = b43_shm_read16(dev, B43_SHM_SHARED, 1149 ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
@@ -1144,35 +1155,85 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1144 } 1155 }
1145} 1156}
1146 1157
1147static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, u32 flags) 1158#ifdef CONFIG_B43_BCMA
1159static void b43_bcma_phy_reset(struct b43_wldev *dev)
1160{
1161 u32 flags;
1162
1163 /* Put PHY into reset */
1164 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1165 flags |= B43_BCMA_IOCTL_PHY_RESET;
1166 flags |= B43_BCMA_IOCTL_PHY_BW_20MHZ; /* Make 20 MHz def */
1167 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags);
1168 udelay(2);
1169
1170 /* Take PHY out of reset */
1171 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1172 flags &= ~B43_BCMA_IOCTL_PHY_RESET;
1173 flags |= BCMA_IOCTL_FGC;
1174 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags);
1175 udelay(1);
1176
1177 /* Do not force clock anymore */
1178 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1179 flags &= ~BCMA_IOCTL_FGC;
1180 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags);
1181 udelay(1);
1182}
1183
1184static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1185{
1186 b43_device_enable(dev, B43_BCMA_IOCTL_PHY_CLKEN);
1187 bcma_core_set_clockmode(dev->dev->bdev, BCMA_CLKMODE_FAST);
1188 b43_bcma_phy_reset(dev);
1189 bcma_core_pll_ctl(dev->dev->bdev, 0x300, 0x3000000, true);
1190}
1191#endif
1192
1193static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1148{ 1194{
1195 struct ssb_device *sdev = dev->dev->sdev;
1149 u32 tmslow; 1196 u32 tmslow;
1197 u32 flags = 0;
1150 1198
1199 if (gmode)
1200 flags |= B43_TMSLOW_GMODE;
1151 flags |= B43_TMSLOW_PHYCLKEN; 1201 flags |= B43_TMSLOW_PHYCLKEN;
1152 flags |= B43_TMSLOW_PHYRESET; 1202 flags |= B43_TMSLOW_PHYRESET;
1153 if (dev->phy.type == B43_PHYTYPE_N) 1203 if (dev->phy.type == B43_PHYTYPE_N)
1154 flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */ 1204 flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */
1155 ssb_device_enable(dev->sdev, flags); 1205 b43_device_enable(dev, flags);
1156 msleep(2); /* Wait for the PLL to turn on. */ 1206 msleep(2); /* Wait for the PLL to turn on. */
1157 1207
1158 /* Now take the PHY out of Reset again */ 1208 /* Now take the PHY out of Reset again */
1159 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW); 1209 tmslow = ssb_read32(sdev, SSB_TMSLOW);
1160 tmslow |= SSB_TMSLOW_FGC; 1210 tmslow |= SSB_TMSLOW_FGC;
1161 tmslow &= ~B43_TMSLOW_PHYRESET; 1211 tmslow &= ~B43_TMSLOW_PHYRESET;
1162 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow); 1212 ssb_write32(sdev, SSB_TMSLOW, tmslow);
1163 ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */ 1213 ssb_read32(sdev, SSB_TMSLOW); /* flush */
1164 msleep(1); 1214 msleep(1);
1165 tmslow &= ~SSB_TMSLOW_FGC; 1215 tmslow &= ~SSB_TMSLOW_FGC;
1166 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow); 1216 ssb_write32(sdev, SSB_TMSLOW, tmslow);
1167 ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */ 1217 ssb_read32(sdev, SSB_TMSLOW); /* flush */
1168 msleep(1); 1218 msleep(1);
1169} 1219}
1170 1220
1171void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags) 1221void b43_wireless_core_reset(struct b43_wldev *dev, bool gmode)
1172{ 1222{
1173 u32 macctl; 1223 u32 macctl;
1174 1224
1175 b43_ssb_wireless_core_reset(dev, flags); 1225 switch (dev->dev->bus_type) {
1226#ifdef CONFIG_B43_BCMA
1227 case B43_BUS_BCMA:
1228 b43_bcma_wireless_core_reset(dev, gmode);
1229 break;
1230#endif
1231#ifdef CONFIG_B43_SSB
1232 case B43_BUS_SSB:
1233 b43_ssb_wireless_core_reset(dev, gmode);
1234 break;
1235#endif
1236 }
1176 1237
1177 /* Turn Analog ON, but only if we already know the PHY-type. 1238 /* Turn Analog ON, but only if we already know the PHY-type.
1178 * This protects against very early setup where we don't know the 1239 * This protects against very early setup where we don't know the
@@ -1183,7 +1244,7 @@ void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
1183 1244
1184 macctl = b43_read32(dev, B43_MMIO_MACCTL); 1245 macctl = b43_read32(dev, B43_MMIO_MACCTL);
1185 macctl &= ~B43_MACCTL_GMODE; 1246 macctl &= ~B43_MACCTL_GMODE;
1186 if (flags & B43_TMSLOW_GMODE) 1247 if (gmode)
1187 macctl |= B43_MACCTL_GMODE; 1248 macctl |= B43_MACCTL_GMODE;
1188 macctl |= B43_MACCTL_IHR_ENABLED; 1249 macctl |= B43_MACCTL_IHR_ENABLED;
1189 b43_write32(dev, B43_MMIO_MACCTL, macctl); 1250 b43_write32(dev, B43_MMIO_MACCTL, macctl);
@@ -1221,7 +1282,7 @@ static void drain_txstatus_queue(struct b43_wldev *dev)
1221{ 1282{
1222 u32 dummy; 1283 u32 dummy;
1223 1284
1224 if (dev->sdev->id.revision < 5) 1285 if (dev->dev->core_rev < 5)
1225 return; 1286 return;
1226 /* Read all entries from the microcode TXstatus FIFO 1287 /* Read all entries from the microcode TXstatus FIFO
1227 * and throw them away. 1288 * and throw them away.
@@ -1427,9 +1488,9 @@ u8 b43_ieee80211_antenna_sanitize(struct b43_wldev *dev,
1427 1488
1428 /* Get the mask of available antennas. */ 1489 /* Get the mask of available antennas. */
1429 if (dev->phy.gmode) 1490 if (dev->phy.gmode)
1430 antenna_mask = dev->sdev->bus->sprom.ant_available_bg; 1491 antenna_mask = dev->dev->bus_sprom->ant_available_bg;
1431 else 1492 else
1432 antenna_mask = dev->sdev->bus->sprom.ant_available_a; 1493 antenna_mask = dev->dev->bus_sprom->ant_available_a;
1433 1494
1434 if (!(antenna_mask & (1 << (antenna_nr - 1)))) { 1495 if (!(antenna_mask & (1 << (antenna_nr - 1)))) {
1435 /* This antenna is not available. Fall back to default. */ 1496 /* This antenna is not available. Fall back to default. */
@@ -1644,7 +1705,7 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
1644 mutex_lock(&wl->mutex); 1705 mutex_lock(&wl->mutex);
1645 dev = wl->current_dev; 1706 dev = wl->current_dev;
1646 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) { 1707 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
1647 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) { 1708 if (b43_bus_host_is_sdio(dev->dev)) {
1648 /* wl->mutex is enough. */ 1709 /* wl->mutex is enough. */
1649 b43_do_beacon_update_trigger_work(dev); 1710 b43_do_beacon_update_trigger_work(dev);
1650 mmiowb(); 1711 mmiowb();
@@ -1689,7 +1750,7 @@ static void b43_update_templates(struct b43_wl *wl)
1689static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int) 1750static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
1690{ 1751{
1691 b43_time_lock(dev); 1752 b43_time_lock(dev);
1692 if (dev->sdev->id.revision >= 3) { 1753 if (dev->dev->core_rev >= 3) {
1693 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16)); 1754 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
1694 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10)); 1755 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
1695 } else { 1756 } else {
@@ -1923,7 +1984,7 @@ static irqreturn_t b43_do_interrupt(struct b43_wldev *dev)
1923 return IRQ_NONE; 1984 return IRQ_NONE;
1924 reason &= dev->irq_mask; 1985 reason &= dev->irq_mask;
1925 if (!reason) 1986 if (!reason)
1926 return IRQ_HANDLED; 1987 return IRQ_NONE;
1927 1988
1928 dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON) 1989 dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON)
1929 & 0x0001DC00; 1990 & 0x0001DC00;
@@ -2063,7 +2124,7 @@ int b43_do_request_fw(struct b43_request_fw_context *ctx,
2063 B43_WARN_ON(1); 2124 B43_WARN_ON(1);
2064 return -ENOSYS; 2125 return -ENOSYS;
2065 } 2126 }
2066 err = request_firmware(&blob, ctx->fwname, ctx->dev->sdev->dev); 2127 err = request_firmware(&blob, ctx->fwname, ctx->dev->dev->dev);
2067 if (err == -ENOENT) { 2128 if (err == -ENOENT) {
2068 snprintf(ctx->errors[ctx->req_type], 2129 snprintf(ctx->errors[ctx->req_type],
2069 sizeof(ctx->errors[ctx->req_type]), 2130 sizeof(ctx->errors[ctx->req_type]),
@@ -2113,26 +2174,48 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2113{ 2174{
2114 struct b43_wldev *dev = ctx->dev; 2175 struct b43_wldev *dev = ctx->dev;
2115 struct b43_firmware *fw = &ctx->dev->fw; 2176 struct b43_firmware *fw = &ctx->dev->fw;
2116 const u8 rev = ctx->dev->sdev->id.revision; 2177 const u8 rev = ctx->dev->dev->core_rev;
2117 const char *filename; 2178 const char *filename;
2118 u32 tmshigh; 2179 u32 tmshigh;
2119 int err; 2180 int err;
2120 2181
2182 /* Files for HT and LCN were found by trying one by one */
2183
2121 /* Get microcode */ 2184 /* Get microcode */
2122 if ((rev >= 5) && (rev <= 10)) 2185 if ((rev >= 5) && (rev <= 10)) {
2123 filename = "ucode5"; 2186 filename = "ucode5";
2124 else if ((rev >= 11) && (rev <= 12)) 2187 } else if ((rev >= 11) && (rev <= 12)) {
2125 filename = "ucode11"; 2188 filename = "ucode11";
2126 else if (rev == 13) 2189 } else if (rev == 13) {
2127 filename = "ucode13"; 2190 filename = "ucode13";
2128 else if (rev == 14) 2191 } else if (rev == 14) {
2129 filename = "ucode14"; 2192 filename = "ucode14";
2130 else if (rev == 15) 2193 } else if (rev == 15) {
2131 filename = "ucode15"; 2194 filename = "ucode15";
2132 else if ((rev >= 16) && (rev <= 20)) 2195 } else {
2133 filename = "ucode16_mimo"; 2196 switch (dev->phy.type) {
2134 else 2197 case B43_PHYTYPE_N:
2135 goto err_no_ucode; 2198 if (rev >= 16)
2199 filename = "ucode16_mimo";
2200 else
2201 goto err_no_ucode;
2202 break;
2203 case B43_PHYTYPE_HT:
2204 if (rev == 29)
2205 filename = "ucode29_mimo";
2206 else
2207 goto err_no_ucode;
2208 break;
2209 case B43_PHYTYPE_LCN:
2210 if (rev == 24)
2211 filename = "ucode24_mimo";
2212 else
2213 goto err_no_ucode;
2214 break;
2215 default:
2216 goto err_no_ucode;
2217 }
2218 }
2136 err = b43_do_request_fw(ctx, filename, &fw->ucode); 2219 err = b43_do_request_fw(ctx, filename, &fw->ucode);
2137 if (err) 2220 if (err)
2138 goto err_load; 2221 goto err_load;
@@ -2157,7 +2240,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2157 switch (dev->phy.type) { 2240 switch (dev->phy.type) {
2158 case B43_PHYTYPE_A: 2241 case B43_PHYTYPE_A:
2159 if ((rev >= 5) && (rev <= 10)) { 2242 if ((rev >= 5) && (rev <= 10)) {
2160 tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH); 2243 tmshigh = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
2161 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY) 2244 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
2162 filename = "a0g1initvals5"; 2245 filename = "a0g1initvals5";
2163 else 2246 else
@@ -2191,6 +2274,18 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2191 else 2274 else
2192 goto err_no_initvals; 2275 goto err_no_initvals;
2193 break; 2276 break;
2277 case B43_PHYTYPE_HT:
2278 if (rev == 29)
2279 filename = "ht0initvals29";
2280 else
2281 goto err_no_initvals;
2282 break;
2283 case B43_PHYTYPE_LCN:
2284 if (rev == 24)
2285 filename = "lcn0initvals24";
2286 else
2287 goto err_no_initvals;
2288 break;
2194 default: 2289 default:
2195 goto err_no_initvals; 2290 goto err_no_initvals;
2196 } 2291 }
@@ -2202,7 +2297,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2202 switch (dev->phy.type) { 2297 switch (dev->phy.type) {
2203 case B43_PHYTYPE_A: 2298 case B43_PHYTYPE_A:
2204 if ((rev >= 5) && (rev <= 10)) { 2299 if ((rev >= 5) && (rev <= 10)) {
2205 tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH); 2300 tmshigh = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
2206 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY) 2301 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
2207 filename = "a0g1bsinitvals5"; 2302 filename = "a0g1bsinitvals5";
2208 else 2303 else
@@ -2238,6 +2333,18 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2238 else 2333 else
2239 goto err_no_initvals; 2334 goto err_no_initvals;
2240 break; 2335 break;
2336 case B43_PHYTYPE_HT:
2337 if (rev == 29)
2338 filename = "ht0bsinitvals29";
2339 else
2340 goto err_no_initvals;
2341 break;
2342 case B43_PHYTYPE_LCN:
2343 if (rev == 24)
2344 filename = "lcn0bsinitvals24";
2345 else
2346 goto err_no_initvals;
2347 break;
2241 default: 2348 default:
2242 goto err_no_initvals; 2349 goto err_no_initvals;
2243 } 2350 }
@@ -2448,7 +2555,7 @@ static int b43_upload_microcode(struct b43_wldev *dev)
2448 2555
2449 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u", 2556 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
2450 dev->fw.rev, dev->fw.patch); 2557 dev->fw.rev, dev->fw.patch);
2451 wiphy->hw_version = dev->sdev->id.coreid; 2558 wiphy->hw_version = dev->dev->core_id;
2452 2559
2453 if (b43_is_old_txhdr_format(dev)) { 2560 if (b43_is_old_txhdr_format(dev)) {
2454 /* We're over the deadline, but we keep support for old fw 2561 /* We're over the deadline, but we keep support for old fw
@@ -2566,7 +2673,7 @@ out:
2566 */ 2673 */
2567static struct ssb_device *b43_ssb_gpio_dev(struct b43_wldev *dev) 2674static struct ssb_device *b43_ssb_gpio_dev(struct b43_wldev *dev)
2568{ 2675{
2569 struct ssb_bus *bus = dev->sdev->bus; 2676 struct ssb_bus *bus = dev->dev->sdev->bus;
2570 2677
2571#ifdef CONFIG_SSB_DRIVER_PCICORE 2678#ifdef CONFIG_SSB_DRIVER_PCICORE
2572 return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev); 2679 return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
@@ -2588,7 +2695,7 @@ static int b43_gpio_init(struct b43_wldev *dev)
2588 2695
2589 mask = 0x0000001F; 2696 mask = 0x0000001F;
2590 set = 0x0000000F; 2697 set = 0x0000000F;
2591 if (dev->sdev->bus->chip_id == 0x4301) { 2698 if (dev->dev->chip_id == 0x4301) {
2592 mask |= 0x0060; 2699 mask |= 0x0060;
2593 set |= 0x0060; 2700 set |= 0x0060;
2594 } 2701 }
@@ -2599,21 +2706,34 @@ static int b43_gpio_init(struct b43_wldev *dev)
2599 mask |= 0x0180; 2706 mask |= 0x0180;
2600 set |= 0x0180; 2707 set |= 0x0180;
2601 } 2708 }
2602 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) { 2709 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL) {
2603 b43_write16(dev, B43_MMIO_GPIO_MASK, 2710 b43_write16(dev, B43_MMIO_GPIO_MASK,
2604 b43_read16(dev, B43_MMIO_GPIO_MASK) 2711 b43_read16(dev, B43_MMIO_GPIO_MASK)
2605 | 0x0200); 2712 | 0x0200);
2606 mask |= 0x0200; 2713 mask |= 0x0200;
2607 set |= 0x0200; 2714 set |= 0x0200;
2608 } 2715 }
2609 if (dev->sdev->id.revision >= 2) 2716 if (dev->dev->core_rev >= 2)
2610 mask |= 0x0010; /* FIXME: This is redundant. */ 2717 mask |= 0x0010; /* FIXME: This is redundant. */
2611 2718
2612 gpiodev = b43_ssb_gpio_dev(dev); 2719 switch (dev->dev->bus_type) {
2613 if (gpiodev) 2720#ifdef CONFIG_B43_BCMA
2614 ssb_write32(gpiodev, B43_GPIO_CONTROL, 2721 case B43_BUS_BCMA:
2615 (ssb_read32(gpiodev, B43_GPIO_CONTROL) 2722 bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL,
2616 & mask) | set); 2723 (bcma_cc_read32(&dev->dev->bdev->bus->drv_cc,
2724 BCMA_CC_GPIOCTL) & mask) | set);
2725 break;
2726#endif
2727#ifdef CONFIG_B43_SSB
2728 case B43_BUS_SSB:
2729 gpiodev = b43_ssb_gpio_dev(dev);
2730 if (gpiodev)
2731 ssb_write32(gpiodev, B43_GPIO_CONTROL,
2732 (ssb_read32(gpiodev, B43_GPIO_CONTROL)
2733 & mask) | set);
2734 break;
2735#endif
2736 }
2617 2737
2618 return 0; 2738 return 0;
2619} 2739}
@@ -2623,9 +2743,21 @@ static void b43_gpio_cleanup(struct b43_wldev *dev)
2623{ 2743{
2624 struct ssb_device *gpiodev; 2744 struct ssb_device *gpiodev;
2625 2745
2626 gpiodev = b43_ssb_gpio_dev(dev); 2746 switch (dev->dev->bus_type) {
2627 if (gpiodev) 2747#ifdef CONFIG_B43_BCMA
2628 ssb_write32(gpiodev, B43_GPIO_CONTROL, 0); 2748 case B43_BUS_BCMA:
2749 bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL,
2750 0);
2751 break;
2752#endif
2753#ifdef CONFIG_B43_SSB
2754 case B43_BUS_SSB:
2755 gpiodev = b43_ssb_gpio_dev(dev);
2756 if (gpiodev)
2757 ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
2758 break;
2759#endif
2760 }
2629} 2761}
2630 2762
2631/* http://bcm-specs.sipsolutions.net/EnableMac */ 2763/* http://bcm-specs.sipsolutions.net/EnableMac */
@@ -2697,12 +2829,30 @@ out:
2697/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */ 2829/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
2698void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on) 2830void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
2699{ 2831{
2700 u32 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW); 2832 u32 tmp;
2701 if (on) 2833
2702 tmslow |= B43_TMSLOW_MACPHYCLKEN; 2834 switch (dev->dev->bus_type) {
2703 else 2835#ifdef CONFIG_B43_BCMA
2704 tmslow &= ~B43_TMSLOW_MACPHYCLKEN; 2836 case B43_BUS_BCMA:
2705 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow); 2837 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
2838 if (on)
2839 tmp |= B43_BCMA_IOCTL_MACPHYCLKEN;
2840 else
2841 tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN;
2842 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
2843 break;
2844#endif
2845#ifdef CONFIG_B43_SSB
2846 case B43_BUS_SSB:
2847 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
2848 if (on)
2849 tmp |= B43_TMSLOW_MACPHYCLKEN;
2850 else
2851 tmp &= ~B43_TMSLOW_MACPHYCLKEN;
2852 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
2853 break;
2854#endif
2855 }
2706} 2856}
2707 2857
2708static void b43_adjust_opmode(struct b43_wldev *dev) 2858static void b43_adjust_opmode(struct b43_wldev *dev)
@@ -2741,15 +2891,15 @@ static void b43_adjust_opmode(struct b43_wldev *dev)
2741 /* Workaround: On old hardware the HW-MAC-address-filter 2891 /* Workaround: On old hardware the HW-MAC-address-filter
2742 * doesn't work properly, so always run promisc in filter 2892 * doesn't work properly, so always run promisc in filter
2743 * it in software. */ 2893 * it in software. */
2744 if (dev->sdev->id.revision <= 4) 2894 if (dev->dev->core_rev <= 4)
2745 ctl |= B43_MACCTL_PROMISC; 2895 ctl |= B43_MACCTL_PROMISC;
2746 2896
2747 b43_write32(dev, B43_MMIO_MACCTL, ctl); 2897 b43_write32(dev, B43_MMIO_MACCTL, ctl);
2748 2898
2749 cfp_pretbtt = 2; 2899 cfp_pretbtt = 2;
2750 if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) { 2900 if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) {
2751 if (dev->sdev->bus->chip_id == 0x4306 && 2901 if (dev->dev->chip_id == 0x4306 &&
2752 dev->sdev->bus->chip_rev == 3) 2902 dev->dev->chip_rev == 3)
2753 cfp_pretbtt = 100; 2903 cfp_pretbtt = 100;
2754 else 2904 else
2755 cfp_pretbtt = 50; 2905 cfp_pretbtt = 50;
@@ -2907,7 +3057,7 @@ static int b43_chip_init(struct b43_wldev *dev)
2907 b43_write16(dev, 0x005E, value16); 3057 b43_write16(dev, 0x005E, value16);
2908 } 3058 }
2909 b43_write32(dev, 0x0100, 0x01000000); 3059 b43_write32(dev, 0x0100, 0x01000000);
2910 if (dev->sdev->id.revision < 5) 3060 if (dev->dev->core_rev < 5)
2911 b43_write32(dev, 0x010C, 0x01000000); 3061 b43_write32(dev, 0x010C, 0x01000000);
2912 3062
2913 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL) 3063 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
@@ -2922,7 +3072,7 @@ static int b43_chip_init(struct b43_wldev *dev)
2922 /* Initially set the wireless operation mode. */ 3072 /* Initially set the wireless operation mode. */
2923 b43_adjust_opmode(dev); 3073 b43_adjust_opmode(dev);
2924 3074
2925 if (dev->sdev->id.revision < 3) { 3075 if (dev->dev->core_rev < 3) {
2926 b43_write16(dev, 0x060E, 0x0000); 3076 b43_write16(dev, 0x060E, 0x0000);
2927 b43_write16(dev, 0x0610, 0x8000); 3077 b43_write16(dev, 0x0610, 0x8000);
2928 b43_write16(dev, 0x0604, 0x0000); 3078 b43_write16(dev, 0x0604, 0x0000);
@@ -2941,8 +3091,20 @@ static int b43_chip_init(struct b43_wldev *dev)
2941 3091
2942 b43_mac_phy_clock_set(dev, true); 3092 b43_mac_phy_clock_set(dev, true);
2943 3093
2944 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 3094 switch (dev->dev->bus_type) {
2945 dev->sdev->bus->chipco.fast_pwrup_delay); 3095#ifdef CONFIG_B43_BCMA
3096 case B43_BUS_BCMA:
3097 /* FIXME: 0xE74 is quite common, but should be read from CC */
3098 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74);
3099 break;
3100#endif
3101#ifdef CONFIG_B43_SSB
3102 case B43_BUS_SSB:
3103 b43_write16(dev, B43_MMIO_POWERUP_DELAY,
3104 dev->dev->sdev->bus->chipco.fast_pwrup_delay);
3105 break;
3106#endif
3107 }
2946 3108
2947 err = 0; 3109 err = 0;
2948 b43dbg(dev->wl, "Chip initialized\n"); 3110 b43dbg(dev->wl, "Chip initialized\n");
@@ -3105,7 +3267,7 @@ static int b43_validate_chipaccess(struct b43_wldev *dev)
3105 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0); 3267 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0);
3106 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4); 3268 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4);
3107 3269
3108 if ((dev->sdev->id.revision >= 3) && (dev->sdev->id.revision <= 10)) { 3270 if ((dev->dev->core_rev >= 3) && (dev->dev->core_rev <= 10)) {
3109 /* The 32bit register shadows the two 16bit registers 3271 /* The 32bit register shadows the two 16bit registers
3110 * with update sideeffects. Validate this. */ 3272 * with update sideeffects. Validate this. */
3111 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA); 3273 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
@@ -3458,21 +3620,33 @@ static void b43_op_set_tsf(struct ieee80211_hw *hw, u64 tsf)
3458 3620
3459static void b43_put_phy_into_reset(struct b43_wldev *dev) 3621static void b43_put_phy_into_reset(struct b43_wldev *dev)
3460{ 3622{
3461 struct ssb_device *sdev = dev->sdev; 3623 u32 tmp;
3462 u32 tmslow;
3463 3624
3464 tmslow = ssb_read32(sdev, SSB_TMSLOW); 3625 switch (dev->dev->bus_type) {
3465 tmslow &= ~B43_TMSLOW_GMODE; 3626#ifdef CONFIG_B43_BCMA
3466 tmslow |= B43_TMSLOW_PHYRESET; 3627 case B43_BUS_BCMA:
3467 tmslow |= SSB_TMSLOW_FGC; 3628 b43err(dev->wl,
3468 ssb_write32(sdev, SSB_TMSLOW, tmslow); 3629 "Putting PHY into reset not supported on BCMA\n");
3469 msleep(1); 3630 break;
3631#endif
3632#ifdef CONFIG_B43_SSB
3633 case B43_BUS_SSB:
3634 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
3635 tmp &= ~B43_TMSLOW_GMODE;
3636 tmp |= B43_TMSLOW_PHYRESET;
3637 tmp |= SSB_TMSLOW_FGC;
3638 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
3639 msleep(1);
3640
3641 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
3642 tmp &= ~SSB_TMSLOW_FGC;
3643 tmp |= B43_TMSLOW_PHYRESET;
3644 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
3645 msleep(1);
3470 3646
3471 tmslow = ssb_read32(sdev, SSB_TMSLOW); 3647 break;
3472 tmslow &= ~SSB_TMSLOW_FGC; 3648#endif
3473 tmslow |= B43_TMSLOW_PHYRESET; 3649 }
3474 ssb_write32(sdev, SSB_TMSLOW, tmslow);
3475 msleep(1);
3476} 3650}
3477 3651
3478static const char *band_to_string(enum ieee80211_band band) 3652static const char *band_to_string(enum ieee80211_band band)
@@ -3954,7 +4128,7 @@ redo:
3954 4128
3955 /* Disable interrupts on the device. */ 4129 /* Disable interrupts on the device. */
3956 b43_set_status(dev, B43_STAT_INITIALIZED); 4130 b43_set_status(dev, B43_STAT_INITIALIZED);
3957 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) { 4131 if (b43_bus_host_is_sdio(dev->dev)) {
3958 /* wl->mutex is locked. That is enough. */ 4132 /* wl->mutex is locked. That is enough. */
3959 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); 4133 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
3960 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */ 4134 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */
@@ -3967,11 +4141,11 @@ redo:
3967 /* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */ 4141 /* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */
3968 orig_dev = dev; 4142 orig_dev = dev;
3969 mutex_unlock(&wl->mutex); 4143 mutex_unlock(&wl->mutex);
3970 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) { 4144 if (b43_bus_host_is_sdio(dev->dev)) {
3971 b43_sdio_free_irq(dev); 4145 b43_sdio_free_irq(dev);
3972 } else { 4146 } else {
3973 synchronize_irq(dev->sdev->irq); 4147 synchronize_irq(dev->dev->irq);
3974 free_irq(dev->sdev->irq, dev); 4148 free_irq(dev->dev->irq, dev);
3975 } 4149 }
3976 mutex_lock(&wl->mutex); 4150 mutex_lock(&wl->mutex);
3977 dev = wl->current_dev; 4151 dev = wl->current_dev;
@@ -4004,19 +4178,19 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
4004 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED); 4178 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED);
4005 4179
4006 drain_txstatus_queue(dev); 4180 drain_txstatus_queue(dev);
4007 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) { 4181 if (b43_bus_host_is_sdio(dev->dev)) {
4008 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler); 4182 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler);
4009 if (err) { 4183 if (err) {
4010 b43err(dev->wl, "Cannot request SDIO IRQ\n"); 4184 b43err(dev->wl, "Cannot request SDIO IRQ\n");
4011 goto out; 4185 goto out;
4012 } 4186 }
4013 } else { 4187 } else {
4014 err = request_threaded_irq(dev->sdev->irq, b43_interrupt_handler, 4188 err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler,
4015 b43_interrupt_thread_handler, 4189 b43_interrupt_thread_handler,
4016 IRQF_SHARED, KBUILD_MODNAME, dev); 4190 IRQF_SHARED, KBUILD_MODNAME, dev);
4017 if (err) { 4191 if (err) {
4018 b43err(dev->wl, "Cannot request IRQ-%d\n", 4192 b43err(dev->wl, "Cannot request IRQ-%d\n",
4019 dev->sdev->irq); 4193 dev->dev->irq);
4020 goto out; 4194 goto out;
4021 } 4195 }
4022 } 4196 }
@@ -4083,9 +4257,21 @@ static int b43_phy_versioning(struct b43_wldev *dev)
4083 unsupported = 1; 4257 unsupported = 1;
4084 break; 4258 break;
4085#endif 4259#endif
4260#ifdef CONFIG_B43_PHY_HT
4261 case B43_PHYTYPE_HT:
4262 if (phy_rev > 1)
4263 unsupported = 1;
4264 break;
4265#endif
4266#ifdef CONFIG_B43_PHY_LCN
4267 case B43_PHYTYPE_LCN:
4268 if (phy_rev > 1)
4269 unsupported = 1;
4270 break;
4271#endif
4086 default: 4272 default:
4087 unsupported = 1; 4273 unsupported = 1;
4088 }; 4274 }
4089 if (unsupported) { 4275 if (unsupported) {
4090 b43err(dev->wl, "FOUND UNSUPPORTED PHY " 4276 b43err(dev->wl, "FOUND UNSUPPORTED PHY "
4091 "(Analog %u, Type %u, Revision %u)\n", 4277 "(Analog %u, Type %u, Revision %u)\n",
@@ -4096,22 +4282,42 @@ static int b43_phy_versioning(struct b43_wldev *dev)
4096 analog_type, phy_type, phy_rev); 4282 analog_type, phy_type, phy_rev);
4097 4283
4098 /* Get RADIO versioning */ 4284 /* Get RADIO versioning */
4099 if (dev->sdev->bus->chip_id == 0x4317) { 4285 if (dev->dev->core_rev >= 24) {
4100 if (dev->sdev->bus->chip_rev == 0) 4286 u16 radio24[3];
4101 tmp = 0x3205017F; 4287
4102 else if (dev->sdev->bus->chip_rev == 1) 4288 for (tmp = 0; tmp < 3; tmp++) {
4103 tmp = 0x4205017F; 4289 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, tmp);
4104 else 4290 radio24[tmp] = b43_read16(dev, B43_MMIO_RADIO24_DATA);
4105 tmp = 0x5205017F; 4291 }
4292
4293 /* Broadcom uses "id" for our "ver" and has separated "ver" */
4294 /* radio_ver = (radio24[0] & 0xF0) >> 4; */
4295
4296 radio_manuf = 0x17F;
4297 radio_ver = (radio24[2] << 8) | radio24[1];
4298 radio_rev = (radio24[0] & 0xF);
4106 } else { 4299 } else {
4107 b43_write16(dev, B43_MMIO_RADIO_CONTROL, B43_RADIOCTL_ID); 4300 if (dev->dev->chip_id == 0x4317) {
4108 tmp = b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); 4301 if (dev->dev->chip_rev == 0)
4109 b43_write16(dev, B43_MMIO_RADIO_CONTROL, B43_RADIOCTL_ID); 4302 tmp = 0x3205017F;
4110 tmp |= (u32)b43_read16(dev, B43_MMIO_RADIO_DATA_HIGH) << 16; 4303 else if (dev->dev->chip_rev == 1)
4111 } 4304 tmp = 0x4205017F;
4112 radio_manuf = (tmp & 0x00000FFF); 4305 else
4113 radio_ver = (tmp & 0x0FFFF000) >> 12; 4306 tmp = 0x5205017F;
4114 radio_rev = (tmp & 0xF0000000) >> 28; 4307 } else {
4308 b43_write16(dev, B43_MMIO_RADIO_CONTROL,
4309 B43_RADIOCTL_ID);
4310 tmp = b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
4311 b43_write16(dev, B43_MMIO_RADIO_CONTROL,
4312 B43_RADIOCTL_ID);
4313 tmp |= (u32)b43_read16(dev, B43_MMIO_RADIO_DATA_HIGH)
4314 << 16;
4315 }
4316 radio_manuf = (tmp & 0x00000FFF);
4317 radio_ver = (tmp & 0x0FFFF000) >> 12;
4318 radio_rev = (tmp & 0xF0000000) >> 28;
4319 }
4320
4115 if (radio_manuf != 0x17F /* Broadcom */) 4321 if (radio_manuf != 0x17F /* Broadcom */)
4116 unsupported = 1; 4322 unsupported = 1;
4117 switch (phy_type) { 4323 switch (phy_type) {
@@ -4139,6 +4345,14 @@ static int b43_phy_versioning(struct b43_wldev *dev)
4139 if (radio_ver != 0x2062 && radio_ver != 0x2063) 4345 if (radio_ver != 0x2062 && radio_ver != 0x2063)
4140 unsupported = 1; 4346 unsupported = 1;
4141 break; 4347 break;
4348 case B43_PHYTYPE_HT:
4349 if (radio_ver != 0x2059)
4350 unsupported = 1;
4351 break;
4352 case B43_PHYTYPE_LCN:
4353 if (radio_ver != 0x2064)
4354 unsupported = 1;
4355 break;
4142 default: 4356 default:
4143 B43_WARN_ON(1); 4357 B43_WARN_ON(1);
4144 } 4358 }
@@ -4204,7 +4418,7 @@ static void setup_struct_wldev_for_init(struct b43_wldev *dev)
4204 4418
4205static void b43_bluetooth_coext_enable(struct b43_wldev *dev) 4419static void b43_bluetooth_coext_enable(struct b43_wldev *dev)
4206{ 4420{
4207 struct ssb_sprom *sprom = &dev->sdev->bus->sprom; 4421 struct ssb_sprom *sprom = dev->dev->bus_sprom;
4208 u64 hf; 4422 u64 hf;
4209 4423
4210 if (!modparam_btcoex) 4424 if (!modparam_btcoex)
@@ -4231,16 +4445,21 @@ static void b43_bluetooth_coext_disable(struct b43_wldev *dev)
4231 4445
4232static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev) 4446static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev)
4233{ 4447{
4234 struct ssb_bus *bus = dev->sdev->bus; 4448 struct ssb_bus *bus;
4235 u32 tmp; 4449 u32 tmp;
4236 4450
4451 if (dev->dev->bus_type != B43_BUS_SSB)
4452 return;
4453
4454 bus = dev->dev->sdev->bus;
4455
4237 if ((bus->chip_id == 0x4311 && bus->chip_rev == 2) || 4456 if ((bus->chip_id == 0x4311 && bus->chip_rev == 2) ||
4238 (bus->chip_id == 0x4312)) { 4457 (bus->chip_id == 0x4312)) {
4239 tmp = ssb_read32(dev->sdev, SSB_IMCFGLO); 4458 tmp = ssb_read32(dev->dev->sdev, SSB_IMCFGLO);
4240 tmp &= ~SSB_IMCFGLO_REQTO; 4459 tmp &= ~SSB_IMCFGLO_REQTO;
4241 tmp &= ~SSB_IMCFGLO_SERTO; 4460 tmp &= ~SSB_IMCFGLO_SERTO;
4242 tmp |= 0x3; 4461 tmp |= 0x3;
4243 ssb_write32(dev->sdev, SSB_IMCFGLO, tmp); 4462 ssb_write32(dev->dev->sdev, SSB_IMCFGLO, tmp);
4244 ssb_commit_settings(bus); 4463 ssb_commit_settings(bus);
4245 } 4464 }
4246} 4465}
@@ -4310,36 +4529,45 @@ static void b43_wireless_core_exit(struct b43_wldev *dev)
4310 dev->wl->current_beacon = NULL; 4529 dev->wl->current_beacon = NULL;
4311 } 4530 }
4312 4531
4313 ssb_device_disable(dev->sdev, 0); 4532 b43_device_disable(dev, 0);
4314 ssb_bus_may_powerdown(dev->sdev->bus); 4533 b43_bus_may_powerdown(dev);
4315} 4534}
4316 4535
4317/* Initialize a wireless core */ 4536/* Initialize a wireless core */
4318static int b43_wireless_core_init(struct b43_wldev *dev) 4537static int b43_wireless_core_init(struct b43_wldev *dev)
4319{ 4538{
4320 struct ssb_bus *bus = dev->sdev->bus; 4539 struct ssb_sprom *sprom = dev->dev->bus_sprom;
4321 struct ssb_sprom *sprom = &bus->sprom;
4322 struct b43_phy *phy = &dev->phy; 4540 struct b43_phy *phy = &dev->phy;
4323 int err; 4541 int err;
4324 u64 hf; 4542 u64 hf;
4325 u32 tmp;
4326 4543
4327 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT); 4544 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT);
4328 4545
4329 err = ssb_bus_powerup(bus, 0); 4546 err = b43_bus_powerup(dev, 0);
4330 if (err) 4547 if (err)
4331 goto out; 4548 goto out;
4332 if (!ssb_device_is_enabled(dev->sdev)) { 4549 if (!b43_device_is_enabled(dev))
4333 tmp = phy->gmode ? B43_TMSLOW_GMODE : 0; 4550 b43_wireless_core_reset(dev, phy->gmode);
4334 b43_wireless_core_reset(dev, tmp);
4335 }
4336 4551
4337 /* Reset all data structures. */ 4552 /* Reset all data structures. */
4338 setup_struct_wldev_for_init(dev); 4553 setup_struct_wldev_for_init(dev);
4339 phy->ops->prepare_structs(dev); 4554 phy->ops->prepare_structs(dev);
4340 4555
4341 /* Enable IRQ routing to this device. */ 4556 /* Enable IRQ routing to this device. */
4342 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->sdev); 4557 switch (dev->dev->bus_type) {
4558#ifdef CONFIG_B43_BCMA
4559 case B43_BUS_BCMA:
4560 bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci,
4561 dev->dev->bdev, true);
4562 break;
4563#endif
4564#ifdef CONFIG_B43_SSB
4565 case B43_BUS_SSB:
4566 ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore,
4567 dev->dev->sdev);
4568 break;
4569#endif
4570 }
4343 4571
4344 b43_imcfglo_timeouts_workaround(dev); 4572 b43_imcfglo_timeouts_workaround(dev);
4345 b43_bluetooth_coext_disable(dev); 4573 b43_bluetooth_coext_disable(dev);
@@ -4352,7 +4580,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4352 if (err) 4580 if (err)
4353 goto err_busdown; 4581 goto err_busdown;
4354 b43_shm_write16(dev, B43_SHM_SHARED, 4582 b43_shm_write16(dev, B43_SHM_SHARED,
4355 B43_SHM_SH_WLCOREREV, dev->sdev->id.revision); 4583 B43_SHM_SH_WLCOREREV, dev->dev->core_rev);
4356 hf = b43_hf_read(dev); 4584 hf = b43_hf_read(dev);
4357 if (phy->type == B43_PHYTYPE_G) { 4585 if (phy->type == B43_PHYTYPE_G) {
4358 hf |= B43_HF_SYMW; 4586 hf |= B43_HF_SYMW;
@@ -4370,8 +4598,9 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4370 if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW) 4598 if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
4371 hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */ 4599 hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
4372#ifdef CONFIG_SSB_DRIVER_PCICORE 4600#ifdef CONFIG_SSB_DRIVER_PCICORE
4373 if ((bus->bustype == SSB_BUSTYPE_PCI) && 4601 if (dev->dev->bus_type == B43_BUS_SSB &&
4374 (bus->pcicore.dev->id.revision <= 10)) 4602 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI &&
4603 dev->dev->sdev->bus->pcicore.dev->id.revision <= 10)
4375 hf |= B43_HF_PCISCW; /* PCI slow clock workaround. */ 4604 hf |= B43_HF_PCISCW; /* PCI slow clock workaround. */
4376#endif 4605#endif
4377 hf &= ~B43_HF_SKCFPUP; 4606 hf &= ~B43_HF_SKCFPUP;
@@ -4399,8 +4628,8 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4399 /* Maximum Contention Window */ 4628 /* Maximum Contention Window */
4400 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF); 4629 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF);
4401 4630
4402 if ((dev->sdev->bus->bustype == SSB_BUSTYPE_PCMCIA) || 4631 if (b43_bus_host_is_pcmcia(dev->dev) ||
4403 (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) || 4632 b43_bus_host_is_sdio(dev->dev) ||
4404 dev->use_pio) { 4633 dev->use_pio) {
4405 dev->__using_pio_transfers = 1; 4634 dev->__using_pio_transfers = 1;
4406 err = b43_pio_init(dev); 4635 err = b43_pio_init(dev);
@@ -4414,7 +4643,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4414 b43_set_synth_pu_delay(dev, 1); 4643 b43_set_synth_pu_delay(dev, 1);
4415 b43_bluetooth_coext_enable(dev); 4644 b43_bluetooth_coext_enable(dev);
4416 4645
4417 ssb_bus_powerup(bus, !(sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)); 4646 b43_bus_powerup(dev, !(sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW));
4418 b43_upload_card_macaddress(dev); 4647 b43_upload_card_macaddress(dev);
4419 b43_security_init(dev); 4648 b43_security_init(dev);
4420 4649
@@ -4431,7 +4660,7 @@ out:
4431err_chip_exit: 4660err_chip_exit:
4432 b43_chip_exit(dev); 4661 b43_chip_exit(dev);
4433err_busdown: 4662err_busdown:
4434 ssb_bus_may_powerdown(bus); 4663 b43_bus_may_powerdown(dev);
4435 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT); 4664 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT);
4436 return err; 4665 return err;
4437} 4666}
@@ -4737,11 +4966,10 @@ static void b43_wireless_core_detach(struct b43_wldev *dev)
4737static int b43_wireless_core_attach(struct b43_wldev *dev) 4966static int b43_wireless_core_attach(struct b43_wldev *dev)
4738{ 4967{
4739 struct b43_wl *wl = dev->wl; 4968 struct b43_wl *wl = dev->wl;
4740 struct ssb_bus *bus = dev->sdev->bus; 4969 struct pci_dev *pdev = NULL;
4741 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
4742 int err; 4970 int err;
4743 bool have_2ghz_phy = 0, have_5ghz_phy = 0;
4744 u32 tmp; 4971 u32 tmp;
4972 bool have_2ghz_phy = 0, have_5ghz_phy = 0;
4745 4973
4746 /* Do NOT do any device initialization here. 4974 /* Do NOT do any device initialization here.
4747 * Do it in wireless_core_init() instead. 4975 * Do it in wireless_core_init() instead.
@@ -4750,25 +4978,42 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4750 * that in core_init(), too. 4978 * that in core_init(), too.
4751 */ 4979 */
4752 4980
4753 err = ssb_bus_powerup(bus, 0); 4981#ifdef CONFIG_B43_SSB
4982 if (dev->dev->bus_type == B43_BUS_SSB &&
4983 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI)
4984 pdev = dev->dev->sdev->bus->host_pci;
4985#endif
4986
4987 err = b43_bus_powerup(dev, 0);
4754 if (err) { 4988 if (err) {
4755 b43err(wl, "Bus powerup failed\n"); 4989 b43err(wl, "Bus powerup failed\n");
4756 goto out; 4990 goto out;
4757 } 4991 }
4758 /* Get the PHY type. */
4759 if (dev->sdev->id.revision >= 5) {
4760 u32 tmshigh;
4761 4992
4762 tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH); 4993 /* Get the PHY type. */
4763 have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY); 4994 switch (dev->dev->bus_type) {
4764 have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY); 4995#ifdef CONFIG_B43_BCMA
4765 } else 4996 case B43_BUS_BCMA:
4766 B43_WARN_ON(1); 4997 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST);
4998 have_2ghz_phy = !!(tmp & B43_BCMA_IOST_2G_PHY);
4999 have_5ghz_phy = !!(tmp & B43_BCMA_IOST_5G_PHY);
5000 break;
5001#endif
5002#ifdef CONFIG_B43_SSB
5003 case B43_BUS_SSB:
5004 if (dev->dev->core_rev >= 5) {
5005 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
5006 have_2ghz_phy = !!(tmp & B43_TMSHIGH_HAVE_2GHZ_PHY);
5007 have_5ghz_phy = !!(tmp & B43_TMSHIGH_HAVE_5GHZ_PHY);
5008 } else
5009 B43_WARN_ON(1);
5010 break;
5011#endif
5012 }
4767 5013
4768 dev->phy.gmode = have_2ghz_phy; 5014 dev->phy.gmode = have_2ghz_phy;
4769 dev->phy.radio_on = 1; 5015 dev->phy.radio_on = 1;
4770 tmp = dev->phy.gmode ? B43_TMSLOW_GMODE : 0; 5016 b43_wireless_core_reset(dev, dev->phy.gmode);
4771 b43_wireless_core_reset(dev, tmp);
4772 5017
4773 err = b43_phy_versioning(dev); 5018 err = b43_phy_versioning(dev);
4774 if (err) 5019 if (err)
@@ -4790,6 +5035,8 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4790#endif 5035#endif
4791 case B43_PHYTYPE_G: 5036 case B43_PHYTYPE_G:
4792 case B43_PHYTYPE_N: 5037 case B43_PHYTYPE_N:
5038 case B43_PHYTYPE_HT:
5039 case B43_PHYTYPE_LCN:
4793 have_2ghz_phy = 1; 5040 have_2ghz_phy = 1;
4794 break; 5041 break;
4795 default: 5042 default:
@@ -4816,8 +5063,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4816 goto err_powerdown; 5063 goto err_powerdown;
4817 5064
4818 dev->phy.gmode = have_2ghz_phy; 5065 dev->phy.gmode = have_2ghz_phy;
4819 tmp = dev->phy.gmode ? B43_TMSLOW_GMODE : 0; 5066 b43_wireless_core_reset(dev, dev->phy.gmode);
4820 b43_wireless_core_reset(dev, tmp);
4821 5067
4822 err = b43_validate_chipaccess(dev); 5068 err = b43_validate_chipaccess(dev);
4823 if (err) 5069 if (err)
@@ -4832,8 +5078,8 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4832 INIT_WORK(&dev->restart_work, b43_chip_reset); 5078 INIT_WORK(&dev->restart_work, b43_chip_reset);
4833 5079
4834 dev->phy.ops->switch_analog(dev, 0); 5080 dev->phy.ops->switch_analog(dev, 0);
4835 ssb_device_disable(dev->sdev, 0); 5081 b43_device_disable(dev, 0);
4836 ssb_bus_may_powerdown(bus); 5082 b43_bus_may_powerdown(dev);
4837 5083
4838out: 5084out:
4839 return err; 5085 return err;
@@ -4841,11 +5087,11 @@ out:
4841err_phy_free: 5087err_phy_free:
4842 b43_phy_free(dev); 5088 b43_phy_free(dev);
4843err_powerdown: 5089err_powerdown:
4844 ssb_bus_may_powerdown(bus); 5090 b43_bus_may_powerdown(dev);
4845 return err; 5091 return err;
4846} 5092}
4847 5093
4848static void b43_one_core_detach(struct ssb_device *dev) 5094static void b43_one_core_detach(struct b43_bus_dev *dev)
4849{ 5095{
4850 struct b43_wldev *wldev; 5096 struct b43_wldev *wldev;
4851 struct b43_wl *wl; 5097 struct b43_wl *wl;
@@ -4853,17 +5099,17 @@ static void b43_one_core_detach(struct ssb_device *dev)
4853 /* Do not cancel ieee80211-workqueue based work here. 5099 /* Do not cancel ieee80211-workqueue based work here.
4854 * See comment in b43_remove(). */ 5100 * See comment in b43_remove(). */
4855 5101
4856 wldev = ssb_get_drvdata(dev); 5102 wldev = b43_bus_get_wldev(dev);
4857 wl = wldev->wl; 5103 wl = wldev->wl;
4858 b43_debugfs_remove_device(wldev); 5104 b43_debugfs_remove_device(wldev);
4859 b43_wireless_core_detach(wldev); 5105 b43_wireless_core_detach(wldev);
4860 list_del(&wldev->list); 5106 list_del(&wldev->list);
4861 wl->nr_devs--; 5107 wl->nr_devs--;
4862 ssb_set_drvdata(dev, NULL); 5108 b43_bus_set_wldev(dev, NULL);
4863 kfree(wldev); 5109 kfree(wldev);
4864} 5110}
4865 5111
4866static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl) 5112static int b43_one_core_attach(struct b43_bus_dev *dev, struct b43_wl *wl)
4867{ 5113{
4868 struct b43_wldev *wldev; 5114 struct b43_wldev *wldev;
4869 int err = -ENOMEM; 5115 int err = -ENOMEM;
@@ -4873,7 +5119,7 @@ static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
4873 goto out; 5119 goto out;
4874 5120
4875 wldev->use_pio = b43_modparam_pio; 5121 wldev->use_pio = b43_modparam_pio;
4876 wldev->sdev = dev; 5122 wldev->dev = dev;
4877 wldev->wl = wl; 5123 wldev->wl = wl;
4878 b43_set_status(wldev, B43_STAT_UNINIT); 5124 b43_set_status(wldev, B43_STAT_UNINIT);
4879 wldev->bad_frames_preempt = modparam_bad_frames_preempt; 5125 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
@@ -4885,7 +5131,7 @@ static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
4885 5131
4886 list_add(&wldev->list, &wl->devlist); 5132 list_add(&wldev->list, &wl->devlist);
4887 wl->nr_devs++; 5133 wl->nr_devs++;
4888 ssb_set_drvdata(dev, wldev); 5134 b43_bus_set_wldev(dev, wldev);
4889 b43_debugfs_add_device(wldev); 5135 b43_debugfs_add_device(wldev);
4890 5136
4891 out: 5137 out:
@@ -4926,19 +5172,20 @@ static void b43_sprom_fixup(struct ssb_bus *bus)
4926 } 5172 }
4927} 5173}
4928 5174
4929static void b43_wireless_exit(struct ssb_device *dev, struct b43_wl *wl) 5175static void b43_wireless_exit(struct b43_bus_dev *dev, struct b43_wl *wl)
4930{ 5176{
4931 struct ieee80211_hw *hw = wl->hw; 5177 struct ieee80211_hw *hw = wl->hw;
4932 5178
4933 ssb_set_devtypedata(dev, NULL); 5179 ssb_set_devtypedata(dev->sdev, NULL);
4934 ieee80211_free_hw(hw); 5180 ieee80211_free_hw(hw);
4935} 5181}
4936 5182
4937static struct b43_wl *b43_wireless_init(struct ssb_device *dev) 5183static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
4938{ 5184{
4939 struct ssb_sprom *sprom = &dev->bus->sprom; 5185 struct ssb_sprom *sprom = dev->bus_sprom;
4940 struct ieee80211_hw *hw; 5186 struct ieee80211_hw *hw;
4941 struct b43_wl *wl; 5187 struct b43_wl *wl;
5188 char chip_name[6];
4942 5189
4943 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops); 5190 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
4944 if (!hw) { 5191 if (!hw) {
@@ -4977,29 +5224,105 @@ static struct b43_wl *b43_wireless_init(struct ssb_device *dev)
4977 INIT_WORK(&wl->tx_work, b43_tx_work); 5224 INIT_WORK(&wl->tx_work, b43_tx_work);
4978 skb_queue_head_init(&wl->tx_queue); 5225 skb_queue_head_init(&wl->tx_queue);
4979 5226
4980 b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n", 5227 snprintf(chip_name, ARRAY_SIZE(chip_name),
4981 dev->bus->chip_id, dev->id.revision); 5228 (dev->chip_id > 0x9999) ? "%d" : "%04X", dev->chip_id);
5229 b43info(wl, "Broadcom %s WLAN found (core revision %u)\n", chip_name,
5230 dev->core_rev);
4982 return wl; 5231 return wl;
4983} 5232}
4984 5233
4985static int b43_ssb_probe(struct ssb_device *dev, const struct ssb_device_id *id) 5234#ifdef CONFIG_B43_BCMA
5235static int b43_bcma_probe(struct bcma_device *core)
4986{ 5236{
5237 struct b43_bus_dev *dev;
5238 struct b43_wl *wl;
5239 int err;
5240
5241 dev = b43_bus_dev_bcma_init(core);
5242 if (!dev)
5243 return -ENODEV;
5244
5245 wl = b43_wireless_init(dev);
5246 if (IS_ERR(wl)) {
5247 err = PTR_ERR(wl);
5248 goto bcma_out;
5249 }
5250
5251 err = b43_one_core_attach(dev, wl);
5252 if (err)
5253 goto bcma_err_wireless_exit;
5254
5255 err = ieee80211_register_hw(wl->hw);
5256 if (err)
5257 goto bcma_err_one_core_detach;
5258 b43_leds_register(wl->current_dev);
5259
5260bcma_out:
5261 return err;
5262
5263bcma_err_one_core_detach:
5264 b43_one_core_detach(dev);
5265bcma_err_wireless_exit:
5266 ieee80211_free_hw(wl->hw);
5267 return err;
5268}
5269
5270static void b43_bcma_remove(struct bcma_device *core)
5271{
5272 struct b43_wldev *wldev = bcma_get_drvdata(core);
5273 struct b43_wl *wl = wldev->wl;
5274
5275 /* We must cancel any work here before unregistering from ieee80211,
5276 * as the ieee80211 unreg will destroy the workqueue. */
5277 cancel_work_sync(&wldev->restart_work);
5278
5279 /* Restore the queues count before unregistering, because firmware detect
5280 * might have modified it. Restoring is important, so the networking
5281 * stack can properly free resources. */
5282 wl->hw->queues = wl->mac80211_initially_registered_queues;
5283 b43_leds_stop(wldev);
5284 ieee80211_unregister_hw(wl->hw);
5285
5286 b43_one_core_detach(wldev->dev);
5287
5288 b43_leds_unregister(wl);
5289
5290 ieee80211_free_hw(wl->hw);
5291}
5292
5293static struct bcma_driver b43_bcma_driver = {
5294 .name = KBUILD_MODNAME,
5295 .id_table = b43_bcma_tbl,
5296 .probe = b43_bcma_probe,
5297 .remove = b43_bcma_remove,
5298};
5299#endif
5300
5301#ifdef CONFIG_B43_SSB
5302static
5303int b43_ssb_probe(struct ssb_device *sdev, const struct ssb_device_id *id)
5304{
5305 struct b43_bus_dev *dev;
4987 struct b43_wl *wl; 5306 struct b43_wl *wl;
4988 int err; 5307 int err;
4989 int first = 0; 5308 int first = 0;
4990 5309
4991 wl = ssb_get_devtypedata(dev); 5310 dev = b43_bus_dev_ssb_init(sdev);
5311 if (!dev)
5312 return -ENOMEM;
5313
5314 wl = ssb_get_devtypedata(sdev);
4992 if (!wl) { 5315 if (!wl) {
4993 /* Probing the first core. Must setup common struct b43_wl */ 5316 /* Probing the first core. Must setup common struct b43_wl */
4994 first = 1; 5317 first = 1;
4995 b43_sprom_fixup(dev->bus); 5318 b43_sprom_fixup(sdev->bus);
4996 wl = b43_wireless_init(dev); 5319 wl = b43_wireless_init(dev);
4997 if (IS_ERR(wl)) { 5320 if (IS_ERR(wl)) {
4998 err = PTR_ERR(wl); 5321 err = PTR_ERR(wl);
4999 goto out; 5322 goto out;
5000 } 5323 }
5001 ssb_set_devtypedata(dev, wl); 5324 ssb_set_devtypedata(sdev, wl);
5002 B43_WARN_ON(ssb_get_devtypedata(dev) != wl); 5325 B43_WARN_ON(ssb_get_devtypedata(sdev) != wl);
5003 } 5326 }
5004 err = b43_one_core_attach(dev, wl); 5327 err = b43_one_core_attach(dev, wl);
5005 if (err) 5328 if (err)
@@ -5023,10 +5346,10 @@ static int b43_ssb_probe(struct ssb_device *dev, const struct ssb_device_id *id)
5023 return err; 5346 return err;
5024} 5347}
5025 5348
5026static void b43_ssb_remove(struct ssb_device *dev) 5349static void b43_ssb_remove(struct ssb_device *sdev)
5027{ 5350{
5028 struct b43_wl *wl = ssb_get_devtypedata(dev); 5351 struct b43_wl *wl = ssb_get_devtypedata(sdev);
5029 struct b43_wldev *wldev = ssb_get_drvdata(dev); 5352 struct b43_wldev *wldev = ssb_get_drvdata(sdev);
5030 5353
5031 /* We must cancel any work here before unregistering from ieee80211, 5354 /* We must cancel any work here before unregistering from ieee80211,
5032 * as the ieee80211 unreg will destroy the workqueue. */ 5355 * as the ieee80211 unreg will destroy the workqueue. */
@@ -5042,17 +5365,25 @@ static void b43_ssb_remove(struct ssb_device *dev)
5042 ieee80211_unregister_hw(wl->hw); 5365 ieee80211_unregister_hw(wl->hw);
5043 } 5366 }
5044 5367
5045 b43_one_core_detach(dev); 5368 b43_one_core_detach(wldev->dev);
5046 5369
5047 if (list_empty(&wl->devlist)) { 5370 if (list_empty(&wl->devlist)) {
5048 b43_leds_unregister(wl); 5371 b43_leds_unregister(wl);
5049 /* Last core on the chip unregistered. 5372 /* Last core on the chip unregistered.
5050 * We can destroy common struct b43_wl. 5373 * We can destroy common struct b43_wl.
5051 */ 5374 */
5052 b43_wireless_exit(dev, wl); 5375 b43_wireless_exit(wldev->dev, wl);
5053 } 5376 }
5054} 5377}
5055 5378
5379static struct ssb_driver b43_ssb_driver = {
5380 .name = KBUILD_MODNAME,
5381 .id_table = b43_ssb_tbl,
5382 .probe = b43_ssb_probe,
5383 .remove = b43_ssb_remove,
5384};
5385#endif /* CONFIG_B43_SSB */
5386
5056/* Perform a hardware reset. This can be called from any context. */ 5387/* Perform a hardware reset. This can be called from any context. */
5057void b43_controller_restart(struct b43_wldev *dev, const char *reason) 5388void b43_controller_restart(struct b43_wldev *dev, const char *reason)
5058{ 5389{
@@ -5063,13 +5394,6 @@ void b43_controller_restart(struct b43_wldev *dev, const char *reason)
5063 ieee80211_queue_work(dev->wl->hw, &dev->restart_work); 5394 ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
5064} 5395}
5065 5396
5066static struct ssb_driver b43_ssb_driver = {
5067 .name = KBUILD_MODNAME,
5068 .id_table = b43_ssb_tbl,
5069 .probe = b43_ssb_probe,
5070 .remove = b43_ssb_remove,
5071};
5072
5073static void b43_print_driverinfo(void) 5397static void b43_print_driverinfo(void)
5074{ 5398{
5075 const char *feat_pci = "", *feat_pcmcia = "", *feat_nphy = "", 5399 const char *feat_pci = "", *feat_pcmcia = "", *feat_nphy = "",
@@ -5108,14 +5432,27 @@ static int __init b43_init(void)
5108 err = b43_sdio_init(); 5432 err = b43_sdio_init();
5109 if (err) 5433 if (err)
5110 goto err_pcmcia_exit; 5434 goto err_pcmcia_exit;
5111 err = ssb_driver_register(&b43_ssb_driver); 5435#ifdef CONFIG_B43_BCMA
5436 err = bcma_driver_register(&b43_bcma_driver);
5112 if (err) 5437 if (err)
5113 goto err_sdio_exit; 5438 goto err_sdio_exit;
5439#endif
5440#ifdef CONFIG_B43_SSB
5441 err = ssb_driver_register(&b43_ssb_driver);
5442 if (err)
5443 goto err_bcma_driver_exit;
5444#endif
5114 b43_print_driverinfo(); 5445 b43_print_driverinfo();
5115 5446
5116 return err; 5447 return err;
5117 5448
5449#ifdef CONFIG_B43_SSB
5450err_bcma_driver_exit:
5451#endif
5452#ifdef CONFIG_B43_BCMA
5453 bcma_driver_unregister(&b43_bcma_driver);
5118err_sdio_exit: 5454err_sdio_exit:
5455#endif
5119 b43_sdio_exit(); 5456 b43_sdio_exit();
5120err_pcmcia_exit: 5457err_pcmcia_exit:
5121 b43_pcmcia_exit(); 5458 b43_pcmcia_exit();
@@ -5126,7 +5463,12 @@ err_dfs_exit:
5126 5463
5127static void __exit b43_exit(void) 5464static void __exit b43_exit(void)
5128{ 5465{
5466#ifdef CONFIG_B43_SSB
5129 ssb_driver_unregister(&b43_ssb_driver); 5467 ssb_driver_unregister(&b43_ssb_driver);
5468#endif
5469#ifdef CONFIG_B43_BCMA
5470 bcma_driver_unregister(&b43_bcma_driver);
5471#endif
5130 b43_sdio_exit(); 5472 b43_sdio_exit();
5131 b43_pcmcia_exit(); 5473 b43_pcmcia_exit();
5132 b43_debugfs_exit(); 5474 b43_debugfs_exit();
diff --git a/drivers/net/wireless/b43/main.h b/drivers/net/wireless/b43/main.h
index df69033b6516..8c684cd33529 100644
--- a/drivers/net/wireless/b43/main.h
+++ b/drivers/net/wireless/b43/main.h
@@ -121,7 +121,7 @@ void b43_hf_write(struct b43_wldev *dev, u64 value);
121 121
122void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on); 122void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on);
123 123
124void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags); 124void b43_wireless_core_reset(struct b43_wldev *dev, bool gmode);
125 125
126void b43_controller_restart(struct b43_wldev *dev, const char *reason); 126void b43_controller_restart(struct b43_wldev *dev, const char *reason);
127 127
diff --git a/drivers/net/wireless/b43/phy_a.c b/drivers/net/wireless/b43/phy_a.c
index 64ea93338acc..a6c38104693d 100644
--- a/drivers/net/wireless/b43/phy_a.c
+++ b/drivers/net/wireless/b43/phy_a.c
@@ -265,7 +265,6 @@ static void hardware_pctl_init_aphy(struct b43_wldev *dev)
265 265
266void b43_phy_inita(struct b43_wldev *dev) 266void b43_phy_inita(struct b43_wldev *dev)
267{ 267{
268 struct ssb_bus *bus = dev->sdev->bus;
269 struct b43_phy *phy = &dev->phy; 268 struct b43_phy *phy = &dev->phy;
270 269
271 /* This lowlevel A-PHY init is also called from G-PHY init. 270 /* This lowlevel A-PHY init is also called from G-PHY init.
@@ -296,9 +295,9 @@ void b43_phy_inita(struct b43_wldev *dev)
296 295
297 b43_radio_init2060(dev); 296 b43_radio_init2060(dev);
298 297
299 if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) && 298 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) &&
300 ((bus->boardinfo.type == SSB_BOARD_BU4306) || 299 ((dev->dev->board_type == SSB_BOARD_BU4306) ||
301 (bus->boardinfo.type == SSB_BOARD_BU4309))) { 300 (dev->dev->board_type == SSB_BOARD_BU4309))) {
302 ; //TODO: A PHY LO 301 ; //TODO: A PHY LO
303 } 302 }
304 303
@@ -311,7 +310,7 @@ void b43_phy_inita(struct b43_wldev *dev)
311 } 310 }
312 311
313 if ((phy->type == B43_PHYTYPE_G) && 312 if ((phy->type == B43_PHYTYPE_G) &&
314 (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)) { 313 (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL)) {
315 b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF); 314 b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF);
316 } 315 }
317} 316}
@@ -323,17 +322,17 @@ static int b43_aphy_init_tssi2dbm_table(struct b43_wldev *dev)
323 struct b43_phy_a *aphy = phy->a; 322 struct b43_phy_a *aphy = phy->a;
324 s16 pab0, pab1, pab2; 323 s16 pab0, pab1, pab2;
325 324
326 pab0 = (s16) (dev->sdev->bus->sprom.pa1b0); 325 pab0 = (s16) (dev->dev->bus_sprom->pa1b0);
327 pab1 = (s16) (dev->sdev->bus->sprom.pa1b1); 326 pab1 = (s16) (dev->dev->bus_sprom->pa1b1);
328 pab2 = (s16) (dev->sdev->bus->sprom.pa1b2); 327 pab2 = (s16) (dev->dev->bus_sprom->pa1b2);
329 328
330 if (pab0 != 0 && pab1 != 0 && pab2 != 0 && 329 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
331 pab0 != -1 && pab1 != -1 && pab2 != -1) { 330 pab0 != -1 && pab1 != -1 && pab2 != -1) {
332 /* The pabX values are set in SPROM. Use them. */ 331 /* The pabX values are set in SPROM. Use them. */
333 if ((s8) dev->sdev->bus->sprom.itssi_a != 0 && 332 if ((s8) dev->dev->bus_sprom->itssi_a != 0 &&
334 (s8) dev->sdev->bus->sprom.itssi_a != -1) 333 (s8) dev->dev->bus_sprom->itssi_a != -1)
335 aphy->tgt_idle_tssi = 334 aphy->tgt_idle_tssi =
336 (s8) (dev->sdev->bus->sprom.itssi_a); 335 (s8) (dev->dev->bus_sprom->itssi_a);
337 else 336 else
338 aphy->tgt_idle_tssi = 62; 337 aphy->tgt_idle_tssi = 62;
339 aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0, 338 aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,
diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
index 2502ea584198..07f009ff5ee2 100644
--- a/drivers/net/wireless/b43/phy_common.c
+++ b/drivers/net/wireless/b43/phy_common.c
@@ -31,6 +31,8 @@
31#include "phy_a.h" 31#include "phy_a.h"
32#include "phy_n.h" 32#include "phy_n.h"
33#include "phy_lp.h" 33#include "phy_lp.h"
34#include "phy_ht.h"
35#include "phy_lcn.h"
34#include "b43.h" 36#include "b43.h"
35#include "main.h" 37#include "main.h"
36 38
@@ -59,6 +61,16 @@ int b43_phy_allocate(struct b43_wldev *dev)
59 phy->ops = &b43_phyops_lp; 61 phy->ops = &b43_phyops_lp;
60#endif 62#endif
61 break; 63 break;
64 case B43_PHYTYPE_HT:
65#ifdef CONFIG_B43_PHY_HT
66 phy->ops = &b43_phyops_ht;
67#endif
68 break;
69 case B43_PHYTYPE_LCN:
70#ifdef CONFIG_B43_PHY_LCN
71 phy->ops = &b43_phyops_lcn;
72#endif
73 break;
62 } 74 }
63 if (B43_WARN_ON(!phy->ops)) 75 if (B43_WARN_ON(!phy->ops))
64 return -ENODEV; 76 return -ENODEV;
@@ -168,7 +180,7 @@ void b43_phy_lock(struct b43_wldev *dev)
168 B43_WARN_ON(dev->phy.phy_locked); 180 B43_WARN_ON(dev->phy.phy_locked);
169 dev->phy.phy_locked = 1; 181 dev->phy.phy_locked = 1;
170#endif 182#endif
171 B43_WARN_ON(dev->sdev->id.revision < 3); 183 B43_WARN_ON(dev->dev->core_rev < 3);
172 184
173 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) 185 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
174 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); 186 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
@@ -180,7 +192,7 @@ void b43_phy_unlock(struct b43_wldev *dev)
180 B43_WARN_ON(!dev->phy.phy_locked); 192 B43_WARN_ON(!dev->phy.phy_locked);
181 dev->phy.phy_locked = 0; 193 dev->phy.phy_locked = 0;
182#endif 194#endif
183 B43_WARN_ON(dev->sdev->id.revision < 3); 195 B43_WARN_ON(dev->dev->core_rev < 3);
184 196
185 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) 197 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
186 b43_power_saving_ctl_bits(dev, 0); 198 b43_power_saving_ctl_bits(dev, 0);
@@ -368,8 +380,8 @@ void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags)
368 /* The next check will be needed in two seconds, or later. */ 380 /* The next check will be needed in two seconds, or later. */
369 phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2)); 381 phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2));
370 382
371 if ((dev->sdev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) && 383 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) &&
372 (dev->sdev->bus->boardinfo.type == SSB_BOARD_BU4306)) 384 (dev->dev->board_type == SSB_BOARD_BU4306))
373 return; /* No software txpower adjustment needed */ 385 return; /* No software txpower adjustment needed */
374 386
375 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI)); 387 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI));
diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
index 2401bee8b081..aa77ba612a92 100644
--- a/drivers/net/wireless/b43/phy_common.h
+++ b/drivers/net/wireless/b43/phy_common.h
@@ -194,6 +194,8 @@ struct b43_phy_a;
194struct b43_phy_g; 194struct b43_phy_g;
195struct b43_phy_n; 195struct b43_phy_n;
196struct b43_phy_lp; 196struct b43_phy_lp;
197struct b43_phy_ht;
198struct b43_phy_lcn;
197 199
198struct b43_phy { 200struct b43_phy {
199 /* Hardware operation callbacks. */ 201 /* Hardware operation callbacks. */
@@ -216,6 +218,10 @@ struct b43_phy {
216 struct b43_phy_n *n; 218 struct b43_phy_n *n;
217 /* LP-PHY specific information */ 219 /* LP-PHY specific information */
218 struct b43_phy_lp *lp; 220 struct b43_phy_lp *lp;
221 /* HT-PHY specific information */
222 struct b43_phy_ht *ht;
223 /* LCN-PHY specific information */
224 struct b43_phy_lcn *lcn;
219 }; 225 };
220 226
221 /* Band support flags. */ 227 /* Band support flags. */
diff --git a/drivers/net/wireless/b43/phy_g.c b/drivers/net/wireless/b43/phy_g.c
index e4c9b4658d3e..8e157bc213f3 100644
--- a/drivers/net/wireless/b43/phy_g.c
+++ b/drivers/net/wireless/b43/phy_g.c
@@ -718,7 +718,7 @@ static void b43_calc_nrssi_threshold(struct b43_wldev *dev)
718 B43_WARN_ON(phy->type != B43_PHYTYPE_G); 718 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
719 719
720 if (!phy->gmode || 720 if (!phy->gmode ||
721 !(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) { 721 !(dev->dev->bus_sprom->boardflags_lo & B43_BFL_RSSI)) {
722 tmp16 = b43_nrssi_hw_read(dev, 0x20); 722 tmp16 = b43_nrssi_hw_read(dev, 0x20);
723 if (tmp16 >= 0x20) 723 if (tmp16 >= 0x20)
724 tmp16 -= 0x40; 724 tmp16 -= 0x40;
@@ -1114,7 +1114,7 @@ static u16 radio2050_rfover_val(struct b43_wldev *dev,
1114{ 1114{
1115 struct b43_phy *phy = &dev->phy; 1115 struct b43_phy *phy = &dev->phy;
1116 struct b43_phy_g *gphy = phy->g; 1116 struct b43_phy_g *gphy = phy->g;
1117 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom); 1117 struct ssb_sprom *sprom = dev->dev->bus_sprom;
1118 1118
1119 if (!phy->gmode) 1119 if (!phy->gmode)
1120 return 0; 1120 return 0;
@@ -1491,7 +1491,6 @@ static u16 b43_radio_init2050(struct b43_wldev *dev)
1491 1491
1492static void b43_phy_initb5(struct b43_wldev *dev) 1492static void b43_phy_initb5(struct b43_wldev *dev)
1493{ 1493{
1494 struct ssb_bus *bus = dev->sdev->bus;
1495 struct b43_phy *phy = &dev->phy; 1494 struct b43_phy *phy = &dev->phy;
1496 struct b43_phy_g *gphy = phy->g; 1495 struct b43_phy_g *gphy = phy->g;
1497 u16 offset, value; 1496 u16 offset, value;
@@ -1500,8 +1499,8 @@ static void b43_phy_initb5(struct b43_wldev *dev)
1500 if (phy->analog == 1) { 1499 if (phy->analog == 1) {
1501 b43_radio_set(dev, 0x007A, 0x0050); 1500 b43_radio_set(dev, 0x007A, 0x0050);
1502 } 1501 }
1503 if ((bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM) && 1502 if ((dev->dev->board_vendor != SSB_BOARDVENDOR_BCM) &&
1504 (bus->boardinfo.type != SSB_BOARD_BU4306)) { 1503 (dev->dev->board_type != SSB_BOARD_BU4306)) {
1505 value = 0x2120; 1504 value = 0x2120;
1506 for (offset = 0x00A8; offset < 0x00C7; offset++) { 1505 for (offset = 0x00A8; offset < 0x00C7; offset++) {
1507 b43_phy_write(dev, offset, value); 1506 b43_phy_write(dev, offset, value);
@@ -1620,7 +1619,7 @@ static void b43_phy_initb6(struct b43_wldev *dev)
1620 b43_radio_write16(dev, 0x5A, 0x88); 1619 b43_radio_write16(dev, 0x5A, 0x88);
1621 b43_radio_write16(dev, 0x5B, 0x6B); 1620 b43_radio_write16(dev, 0x5B, 0x6B);
1622 b43_radio_write16(dev, 0x5C, 0x0F); 1621 b43_radio_write16(dev, 0x5C, 0x0F);
1623 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_ALTIQ) { 1622 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_ALTIQ) {
1624 b43_radio_write16(dev, 0x5D, 0xFA); 1623 b43_radio_write16(dev, 0x5D, 0xFA);
1625 b43_radio_write16(dev, 0x5E, 0xD8); 1624 b43_radio_write16(dev, 0x5E, 0xD8);
1626 } else { 1625 } else {
@@ -1787,7 +1786,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1787 b43_phy_set(dev, B43_PHY_RFOVER, 0x0100); 1786 b43_phy_set(dev, B43_PHY_RFOVER, 0x0100);
1788 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF); 1787 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF);
1789 1788
1790 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) { 1789 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_EXTLNA) {
1791 if (phy->rev >= 7) { 1790 if (phy->rev >= 7) {
1792 b43_phy_set(dev, B43_PHY_RFOVER, 0x0800); 1791 b43_phy_set(dev, B43_PHY_RFOVER, 0x0800);
1793 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000); 1792 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000);
@@ -1922,7 +1921,6 @@ static void b43_hardware_pctl_init_gphy(struct b43_wldev *dev)
1922/* Initialize B/G PHY power control */ 1921/* Initialize B/G PHY power control */
1923static void b43_phy_init_pctl(struct b43_wldev *dev) 1922static void b43_phy_init_pctl(struct b43_wldev *dev)
1924{ 1923{
1925 struct ssb_bus *bus = dev->sdev->bus;
1926 struct b43_phy *phy = &dev->phy; 1924 struct b43_phy *phy = &dev->phy;
1927 struct b43_phy_g *gphy = phy->g; 1925 struct b43_phy_g *gphy = phy->g;
1928 struct b43_rfatt old_rfatt; 1926 struct b43_rfatt old_rfatt;
@@ -1931,8 +1929,8 @@ static void b43_phy_init_pctl(struct b43_wldev *dev)
1931 1929
1932 B43_WARN_ON(phy->type != B43_PHYTYPE_G); 1930 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
1933 1931
1934 if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) && 1932 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) &&
1935 (bus->boardinfo.type == SSB_BOARD_BU4306)) 1933 (dev->dev->board_type == SSB_BOARD_BU4306))
1936 return; 1934 return;
1937 1935
1938 b43_phy_write(dev, 0x0028, 0x8018); 1936 b43_phy_write(dev, 0x0028, 0x8018);
@@ -2053,7 +2051,7 @@ static void b43_phy_initg(struct b43_wldev *dev)
2053 if (phy->rev >= 6) { 2051 if (phy->rev >= 6) {
2054 b43_phy_maskset(dev, B43_PHY_CCK(0x36), 0x0FFF, (gphy->lo_control->tx_bias << 12)); 2052 b43_phy_maskset(dev, B43_PHY_CCK(0x36), 0x0FFF, (gphy->lo_control->tx_bias << 12));
2055 } 2053 }
2056 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) 2054 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL)
2057 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8075); 2055 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8075);
2058 else 2056 else
2059 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x807F); 2057 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x807F);
@@ -2066,7 +2064,7 @@ static void b43_phy_initg(struct b43_wldev *dev)
2066 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078); 2064 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);
2067 } 2065 }
2068 2066
2069 if (!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) { 2067 if (!(dev->dev->bus_sprom->boardflags_lo & B43_BFL_RSSI)) {
2070 /* The specs state to update the NRSSI LT with 2068 /* The specs state to update the NRSSI LT with
2071 * the value 0x7FFFFFFF here. I think that is some weird 2069 * the value 0x7FFFFFFF here. I think that is some weird
2072 * compiler optimization in the original driver. 2070 * compiler optimization in the original driver.
@@ -2088,8 +2086,8 @@ static void b43_phy_initg(struct b43_wldev *dev)
2088 /* FIXME: The spec says in the following if, the 0 should be replaced 2086 /* FIXME: The spec says in the following if, the 0 should be replaced
2089 'if OFDM may not be used in the current locale' 2087 'if OFDM may not be used in the current locale'
2090 but OFDM is legal everywhere */ 2088 but OFDM is legal everywhere */
2091 if ((dev->sdev->bus->chip_id == 0x4306 2089 if ((dev->dev->chip_id == 0x4306
2092 && dev->sdev->bus->chip_package == 2) || 0) { 2090 && dev->dev->chip_pkg == 2) || 0) {
2093 b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF); 2091 b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF);
2094 b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF); 2092 b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF);
2095 } 2093 }
@@ -2105,7 +2103,7 @@ void b43_gphy_channel_switch(struct b43_wldev *dev,
2105 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel)); 2103 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));
2106 2104
2107 if (channel == 14) { 2105 if (channel == 14) {
2108 if (dev->sdev->bus->sprom.country_code == 2106 if (dev->dev->bus_sprom->country_code ==
2109 SSB_SPROM1CCODE_JAPAN) 2107 SSB_SPROM1CCODE_JAPAN)
2110 b43_hf_write(dev, 2108 b43_hf_write(dev,
2111 b43_hf_read(dev) & ~B43_HF_ACPR); 2109 b43_hf_read(dev) & ~B43_HF_ACPR);
@@ -2136,17 +2134,17 @@ static void default_baseband_attenuation(struct b43_wldev *dev,
2136static void default_radio_attenuation(struct b43_wldev *dev, 2134static void default_radio_attenuation(struct b43_wldev *dev,
2137 struct b43_rfatt *rf) 2135 struct b43_rfatt *rf)
2138{ 2136{
2139 struct ssb_bus *bus = dev->sdev->bus; 2137 struct b43_bus_dev *bdev = dev->dev;
2140 struct b43_phy *phy = &dev->phy; 2138 struct b43_phy *phy = &dev->phy;
2141 2139
2142 rf->with_padmix = 0; 2140 rf->with_padmix = 0;
2143 2141
2144 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM && 2142 if (dev->dev->board_vendor == SSB_BOARDVENDOR_BCM &&
2145 bus->boardinfo.type == SSB_BOARD_BCM4309G) { 2143 dev->dev->board_type == SSB_BOARD_BCM4309G) {
2146 if (bus->boardinfo.rev < 0x43) { 2144 if (dev->dev->board_rev < 0x43) {
2147 rf->att = 2; 2145 rf->att = 2;
2148 return; 2146 return;
2149 } else if (bus->boardinfo.rev < 0x51) { 2147 } else if (dev->dev->board_rev < 0x51) {
2150 rf->att = 3; 2148 rf->att = 3;
2151 return; 2149 return;
2152 } 2150 }
@@ -2172,21 +2170,21 @@ static void default_radio_attenuation(struct b43_wldev *dev,
2172 return; 2170 return;
2173 case 1: 2171 case 1:
2174 if (phy->type == B43_PHYTYPE_G) { 2172 if (phy->type == B43_PHYTYPE_G) {
2175 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM 2173 if (bdev->board_vendor == SSB_BOARDVENDOR_BCM
2176 && bus->boardinfo.type == SSB_BOARD_BCM4309G 2174 && bdev->board_type == SSB_BOARD_BCM4309G
2177 && bus->boardinfo.rev >= 30) 2175 && bdev->board_rev >= 30)
2178 rf->att = 3; 2176 rf->att = 3;
2179 else if (bus->boardinfo.vendor == 2177 else if (bdev->board_vendor ==
2180 SSB_BOARDVENDOR_BCM 2178 SSB_BOARDVENDOR_BCM
2181 && bus->boardinfo.type == 2179 && bdev->board_type ==
2182 SSB_BOARD_BU4306) 2180 SSB_BOARD_BU4306)
2183 rf->att = 3; 2181 rf->att = 3;
2184 else 2182 else
2185 rf->att = 1; 2183 rf->att = 1;
2186 } else { 2184 } else {
2187 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM 2185 if (bdev->board_vendor == SSB_BOARDVENDOR_BCM
2188 && bus->boardinfo.type == SSB_BOARD_BCM4309G 2186 && bdev->board_type == SSB_BOARD_BCM4309G
2189 && bus->boardinfo.rev >= 30) 2187 && bdev->board_rev >= 30)
2190 rf->att = 7; 2188 rf->att = 7;
2191 else 2189 else
2192 rf->att = 6; 2190 rf->att = 6;
@@ -2194,16 +2192,16 @@ static void default_radio_attenuation(struct b43_wldev *dev,
2194 return; 2192 return;
2195 case 2: 2193 case 2:
2196 if (phy->type == B43_PHYTYPE_G) { 2194 if (phy->type == B43_PHYTYPE_G) {
2197 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM 2195 if (bdev->board_vendor == SSB_BOARDVENDOR_BCM
2198 && bus->boardinfo.type == SSB_BOARD_BCM4309G 2196 && bdev->board_type == SSB_BOARD_BCM4309G
2199 && bus->boardinfo.rev >= 30) 2197 && bdev->board_rev >= 30)
2200 rf->att = 3; 2198 rf->att = 3;
2201 else if (bus->boardinfo.vendor == 2199 else if (bdev->board_vendor ==
2202 SSB_BOARDVENDOR_BCM 2200 SSB_BOARDVENDOR_BCM
2203 && bus->boardinfo.type == 2201 && bdev->board_type ==
2204 SSB_BOARD_BU4306) 2202 SSB_BOARD_BU4306)
2205 rf->att = 5; 2203 rf->att = 5;
2206 else if (bus->chip_id == 0x4320) 2204 else if (bdev->chip_id == 0x4320)
2207 rf->att = 4; 2205 rf->att = 4;
2208 else 2206 else
2209 rf->att = 3; 2207 rf->att = 3;
@@ -2384,11 +2382,11 @@ static int b43_gphy_init_tssi2dbm_table(struct b43_wldev *dev)
2384 struct b43_phy_g *gphy = phy->g; 2382 struct b43_phy_g *gphy = phy->g;
2385 s16 pab0, pab1, pab2; 2383 s16 pab0, pab1, pab2;
2386 2384
2387 pab0 = (s16) (dev->sdev->bus->sprom.pa0b0); 2385 pab0 = (s16) (dev->dev->bus_sprom->pa0b0);
2388 pab1 = (s16) (dev->sdev->bus->sprom.pa0b1); 2386 pab1 = (s16) (dev->dev->bus_sprom->pa0b1);
2389 pab2 = (s16) (dev->sdev->bus->sprom.pa0b2); 2387 pab2 = (s16) (dev->dev->bus_sprom->pa0b2);
2390 2388
2391 B43_WARN_ON((dev->sdev->bus->chip_id == 0x4301) && 2389 B43_WARN_ON((dev->dev->chip_id == 0x4301) &&
2392 (phy->radio_ver != 0x2050)); /* Not supported anymore */ 2390 (phy->radio_ver != 0x2050)); /* Not supported anymore */
2393 2391
2394 gphy->dyn_tssi_tbl = 0; 2392 gphy->dyn_tssi_tbl = 0;
@@ -2396,10 +2394,10 @@ static int b43_gphy_init_tssi2dbm_table(struct b43_wldev *dev)
2396 if (pab0 != 0 && pab1 != 0 && pab2 != 0 && 2394 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2397 pab0 != -1 && pab1 != -1 && pab2 != -1) { 2395 pab0 != -1 && pab1 != -1 && pab2 != -1) {
2398 /* The pabX values are set in SPROM. Use them. */ 2396 /* The pabX values are set in SPROM. Use them. */
2399 if ((s8) dev->sdev->bus->sprom.itssi_bg != 0 && 2397 if ((s8) dev->dev->bus_sprom->itssi_bg != 0 &&
2400 (s8) dev->sdev->bus->sprom.itssi_bg != -1) { 2398 (s8) dev->dev->bus_sprom->itssi_bg != -1) {
2401 gphy->tgt_idle_tssi = 2399 gphy->tgt_idle_tssi =
2402 (s8) (dev->sdev->bus->sprom.itssi_bg); 2400 (s8) (dev->dev->bus_sprom->itssi_bg);
2403 } else 2401 } else
2404 gphy->tgt_idle_tssi = 62; 2402 gphy->tgt_idle_tssi = 62;
2405 gphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0, 2403 gphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,
@@ -2537,7 +2535,7 @@ static int b43_gphy_op_prepare_hardware(struct b43_wldev *dev)
2537 b43_wireless_core_reset(dev, 0); 2535 b43_wireless_core_reset(dev, 0);
2538 b43_phy_initg(dev); 2536 b43_phy_initg(dev);
2539 phy->gmode = 1; 2537 phy->gmode = 1;
2540 b43_wireless_core_reset(dev, B43_TMSLOW_GMODE); 2538 b43_wireless_core_reset(dev, 1);
2541 } 2539 }
2542 2540
2543 return 0; 2541 return 0;
@@ -2840,7 +2838,7 @@ static void b43_gphy_op_adjust_txpower(struct b43_wldev *dev)
2840 B43_TXCTL_TXMIX; 2838 B43_TXCTL_TXMIX;
2841 rfatt += 2; 2839 rfatt += 2;
2842 bbatt += 2; 2840 bbatt += 2;
2843 } else if (dev->sdev->bus->sprom. 2841 } else if (dev->dev->bus_sprom->
2844 boardflags_lo & 2842 boardflags_lo &
2845 B43_BFL_PACTRL) { 2843 B43_BFL_PACTRL) {
2846 bbatt += 4 * (rfatt - 2); 2844 bbatt += 4 * (rfatt - 2);
@@ -2914,14 +2912,14 @@ static enum b43_txpwr_result b43_gphy_op_recalc_txpower(struct b43_wldev *dev,
2914 estimated_pwr = b43_gphy_estimate_power_out(dev, average_tssi); 2912 estimated_pwr = b43_gphy_estimate_power_out(dev, average_tssi);
2915 2913
2916 B43_WARN_ON(phy->type != B43_PHYTYPE_G); 2914 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
2917 max_pwr = dev->sdev->bus->sprom.maxpwr_bg; 2915 max_pwr = dev->dev->bus_sprom->maxpwr_bg;
2918 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) 2916 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL)
2919 max_pwr -= 3; /* minus 0.75 */ 2917 max_pwr -= 3; /* minus 0.75 */
2920 if (unlikely(max_pwr >= INT_TO_Q52(30/*dBm*/))) { 2918 if (unlikely(max_pwr >= INT_TO_Q52(30/*dBm*/))) {
2921 b43warn(dev->wl, 2919 b43warn(dev->wl,
2922 "Invalid max-TX-power value in SPROM.\n"); 2920 "Invalid max-TX-power value in SPROM.\n");
2923 max_pwr = INT_TO_Q52(20); /* fake it */ 2921 max_pwr = INT_TO_Q52(20); /* fake it */
2924 dev->sdev->bus->sprom.maxpwr_bg = max_pwr; 2922 dev->dev->bus_sprom->maxpwr_bg = max_pwr;
2925 } 2923 }
2926 2924
2927 /* Get desired power (in Q5.2) */ 2925 /* Get desired power (in Q5.2) */
@@ -3014,7 +3012,7 @@ static void b43_gphy_op_pwork_60sec(struct b43_wldev *dev)
3014{ 3012{
3015 struct b43_phy *phy = &dev->phy; 3013 struct b43_phy *phy = &dev->phy;
3016 3014
3017 if (!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) 3015 if (!(dev->dev->bus_sprom->boardflags_lo & B43_BFL_RSSI))
3018 return; 3016 return;
3019 3017
3020 b43_mac_suspend(dev); 3018 b43_mac_suspend(dev);
diff --git a/drivers/net/wireless/b43/phy_ht.c b/drivers/net/wireless/b43/phy_ht.c
new file mode 100644
index 000000000000..7c40919651a7
--- /dev/null
+++ b/drivers/net/wireless/b43/phy_ht.c
@@ -0,0 +1,413 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n HT-PHY support
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include <linux/slab.h>
24
25#include "b43.h"
26#include "phy_ht.h"
27#include "tables_phy_ht.h"
28#include "radio_2059.h"
29#include "main.h"
30
31/**************************************************
32 * Radio 2059.
33 **************************************************/
34
35static void b43_radio_2059_channel_setup(struct b43_wldev *dev,
36 const struct b43_phy_ht_channeltab_e_radio2059 *e)
37{
38 u8 i;
39 u16 routing;
40
41 b43_radio_write(dev, 0x16, e->radio_syn16);
42 b43_radio_write(dev, 0x17, e->radio_syn17);
43 b43_radio_write(dev, 0x22, e->radio_syn22);
44 b43_radio_write(dev, 0x25, e->radio_syn25);
45 b43_radio_write(dev, 0x27, e->radio_syn27);
46 b43_radio_write(dev, 0x28, e->radio_syn28);
47 b43_radio_write(dev, 0x29, e->radio_syn29);
48 b43_radio_write(dev, 0x2c, e->radio_syn2c);
49 b43_radio_write(dev, 0x2d, e->radio_syn2d);
50 b43_radio_write(dev, 0x37, e->radio_syn37);
51 b43_radio_write(dev, 0x41, e->radio_syn41);
52 b43_radio_write(dev, 0x43, e->radio_syn43);
53 b43_radio_write(dev, 0x47, e->radio_syn47);
54 b43_radio_write(dev, 0x4a, e->radio_syn4a);
55 b43_radio_write(dev, 0x58, e->radio_syn58);
56 b43_radio_write(dev, 0x5a, e->radio_syn5a);
57 b43_radio_write(dev, 0x6a, e->radio_syn6a);
58 b43_radio_write(dev, 0x6d, e->radio_syn6d);
59 b43_radio_write(dev, 0x6e, e->radio_syn6e);
60 b43_radio_write(dev, 0x92, e->radio_syn92);
61 b43_radio_write(dev, 0x98, e->radio_syn98);
62
63 for (i = 0; i < 2; i++) {
64 routing = i ? R2059_RXRX1 : R2059_TXRX0;
65 b43_radio_write(dev, routing | 0x4a, e->radio_rxtx4a);
66 b43_radio_write(dev, routing | 0x58, e->radio_rxtx58);
67 b43_radio_write(dev, routing | 0x5a, e->radio_rxtx5a);
68 b43_radio_write(dev, routing | 0x6a, e->radio_rxtx6a);
69 b43_radio_write(dev, routing | 0x6d, e->radio_rxtx6d);
70 b43_radio_write(dev, routing | 0x6e, e->radio_rxtx6e);
71 b43_radio_write(dev, routing | 0x92, e->radio_rxtx92);
72 b43_radio_write(dev, routing | 0x98, e->radio_rxtx98);
73 }
74
75 udelay(50);
76
77 /* Calibration */
78 b43_radio_mask(dev, 0x2b, ~0x1);
79 b43_radio_mask(dev, 0x2e, ~0x4);
80 b43_radio_set(dev, 0x2e, 0x4);
81 b43_radio_set(dev, 0x2b, 0x1);
82
83 udelay(300);
84}
85
86static void b43_radio_2059_init(struct b43_wldev *dev)
87{
88 const u16 routing[] = { R2059_SYN, R2059_TXRX0, R2059_RXRX1 };
89 const u16 radio_values[3][2] = {
90 { 0x61, 0xE9 }, { 0x69, 0xD5 }, { 0x73, 0x99 },
91 };
92 u16 i, j;
93
94 b43_radio_write(dev, R2059_ALL | 0x51, 0x0070);
95 b43_radio_write(dev, R2059_ALL | 0x5a, 0x0003);
96
97 for (i = 0; i < ARRAY_SIZE(routing); i++)
98 b43_radio_set(dev, routing[i] | 0x146, 0x3);
99
100 b43_radio_set(dev, 0x2e, 0x0078);
101 b43_radio_set(dev, 0xc0, 0x0080);
102 msleep(2);
103 b43_radio_mask(dev, 0x2e, ~0x0078);
104 b43_radio_mask(dev, 0xc0, ~0x0080);
105
106 if (1) { /* FIXME */
107 b43_radio_set(dev, R2059_RXRX1 | 0x4, 0x1);
108 udelay(10);
109 b43_radio_set(dev, R2059_RXRX1 | 0x0BF, 0x1);
110 b43_radio_maskset(dev, R2059_RXRX1 | 0x19B, 0x3, 0x2);
111
112 b43_radio_set(dev, R2059_RXRX1 | 0x4, 0x2);
113 udelay(100);
114 b43_radio_mask(dev, R2059_RXRX1 | 0x4, ~0x2);
115
116 for (i = 0; i < 10000; i++) {
117 if (b43_radio_read(dev, R2059_RXRX1 | 0x145) & 1) {
118 i = 0;
119 break;
120 }
121 udelay(100);
122 }
123 if (i)
124 b43err(dev->wl, "radio 0x945 timeout\n");
125
126 b43_radio_mask(dev, R2059_RXRX1 | 0x4, ~0x1);
127 b43_radio_set(dev, 0xa, 0x60);
128
129 for (i = 0; i < 3; i++) {
130 b43_radio_write(dev, 0x17F, radio_values[i][0]);
131 b43_radio_write(dev, 0x13D, 0x6E);
132 b43_radio_write(dev, 0x13E, radio_values[i][1]);
133 b43_radio_write(dev, 0x13C, 0x55);
134
135 for (j = 0; j < 10000; j++) {
136 if (b43_radio_read(dev, 0x140) & 2) {
137 j = 0;
138 break;
139 }
140 udelay(500);
141 }
142 if (j)
143 b43err(dev->wl, "radio 0x140 timeout\n");
144
145 b43_radio_write(dev, 0x13C, 0x15);
146 }
147
148 b43_radio_mask(dev, 0x17F, ~0x1);
149 }
150
151 b43_radio_mask(dev, 0x11, ~0x0008);
152}
153
154/**************************************************
155 * Channel switching ops.
156 **************************************************/
157
158static void b43_phy_ht_channel_setup(struct b43_wldev *dev,
159 const struct b43_phy_ht_channeltab_e_phy *e,
160 struct ieee80211_channel *new_channel)
161{
162 bool old_band_5ghz;
163 u8 i;
164
165 old_band_5ghz = b43_phy_read(dev, B43_PHY_HT_BANDCTL) & 0; /* FIXME */
166 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
167 /* TODO */
168 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
169 /* TODO */
170 }
171
172 b43_phy_write(dev, B43_PHY_HT_BW1, e->bw1);
173 b43_phy_write(dev, B43_PHY_HT_BW2, e->bw2);
174 b43_phy_write(dev, B43_PHY_HT_BW3, e->bw3);
175 b43_phy_write(dev, B43_PHY_HT_BW4, e->bw4);
176 b43_phy_write(dev, B43_PHY_HT_BW5, e->bw5);
177 b43_phy_write(dev, B43_PHY_HT_BW6, e->bw6);
178
179 /* TODO: some ops on PHY regs 0x0B0 and 0xC0A */
180
181 /* TODO: separated function? */
182 for (i = 0; i < 3; i++) {
183 u16 mask;
184 u32 tmp = b43_httab_read(dev, B43_HTTAB32(26, 0xE8));
185
186 if (0) /* FIXME */
187 mask = 0x2 << (i * 4);
188 else
189 mask = 0;
190 b43_phy_mask(dev, B43_PHY_EXTG(0x108), mask);
191
192 b43_httab_write(dev, B43_HTTAB16(7, 0x110 + i), tmp >> 16);
193 b43_httab_write(dev, B43_HTTAB8(13, 0x63 + (i * 4)),
194 tmp & 0xFF);
195 b43_httab_write(dev, B43_HTTAB8(13, 0x73 + (i * 4)),
196 tmp & 0xFF);
197 }
198
199 b43_phy_write(dev, 0x017e, 0x3830);
200}
201
202static int b43_phy_ht_set_channel(struct b43_wldev *dev,
203 struct ieee80211_channel *channel,
204 enum nl80211_channel_type channel_type)
205{
206 struct b43_phy *phy = &dev->phy;
207
208 const struct b43_phy_ht_channeltab_e_radio2059 *chent_r2059 = NULL;
209
210 if (phy->radio_ver == 0x2059) {
211 chent_r2059 = b43_phy_ht_get_channeltab_e_r2059(dev,
212 channel->center_freq);
213 if (!chent_r2059)
214 return -ESRCH;
215 } else {
216 return -ESRCH;
217 }
218
219 /* TODO: In case of N-PHY some bandwidth switching goes here */
220
221 if (phy->radio_ver == 0x2059) {
222 b43_radio_2059_channel_setup(dev, chent_r2059);
223 b43_phy_ht_channel_setup(dev, &(chent_r2059->phy_regs),
224 channel);
225 } else {
226 return -ESRCH;
227 }
228
229 return 0;
230}
231
232/**************************************************
233 * Basic PHY ops.
234 **************************************************/
235
236static int b43_phy_ht_op_allocate(struct b43_wldev *dev)
237{
238 struct b43_phy_ht *phy_ht;
239
240 phy_ht = kzalloc(sizeof(*phy_ht), GFP_KERNEL);
241 if (!phy_ht)
242 return -ENOMEM;
243 dev->phy.ht = phy_ht;
244
245 return 0;
246}
247
248static void b43_phy_ht_op_prepare_structs(struct b43_wldev *dev)
249{
250 struct b43_phy *phy = &dev->phy;
251 struct b43_phy_ht *phy_ht = phy->ht;
252
253 memset(phy_ht, 0, sizeof(*phy_ht));
254}
255
256static int b43_phy_ht_op_init(struct b43_wldev *dev)
257{
258 b43_phy_ht_tables_init(dev);
259
260 return 0;
261}
262
263static void b43_phy_ht_op_free(struct b43_wldev *dev)
264{
265 struct b43_phy *phy = &dev->phy;
266 struct b43_phy_ht *phy_ht = phy->ht;
267
268 kfree(phy_ht);
269 phy->ht = NULL;
270}
271
272/* http://bcm-v4.sipsolutions.net/802.11/Radio/Switch%20Radio */
273static void b43_phy_ht_op_software_rfkill(struct b43_wldev *dev,
274 bool blocked)
275{
276 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
277 b43err(dev->wl, "MAC not suspended\n");
278
279 /* In the following PHY ops we copy wl's dummy behaviour.
280 * TODO: Find out if reads (currently hidden in masks/masksets) are
281 * needed and replace following ops with just writes or w&r.
282 * Note: B43_PHY_HT_RF_CTL1 register is tricky, wrong operation can
283 * cause delayed (!) machine lock up. */
284 if (blocked) {
285 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
286 } else {
287 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
288 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, 0, 0x1);
289 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
290 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, 0, 0x2);
291
292 if (dev->phy.radio_ver == 0x2059)
293 b43_radio_2059_init(dev);
294 else
295 B43_WARN_ON(1);
296
297 b43_switch_channel(dev, dev->phy.channel);
298 }
299}
300
301static void b43_phy_ht_op_switch_analog(struct b43_wldev *dev, bool on)
302{
303 if (on) {
304 b43_phy_write(dev, B43_PHY_HT_AFE_CTL2, 0x00cd);
305 b43_phy_write(dev, B43_PHY_HT_AFE_CTL1, 0x0000);
306 b43_phy_write(dev, B43_PHY_HT_AFE_CTL4, 0x00cd);
307 b43_phy_write(dev, B43_PHY_HT_AFE_CTL3, 0x0000);
308 b43_phy_write(dev, B43_PHY_HT_AFE_CTL6, 0x00cd);
309 b43_phy_write(dev, B43_PHY_HT_AFE_CTL5, 0x0000);
310 } else {
311 b43_phy_write(dev, B43_PHY_HT_AFE_CTL1, 0x07ff);
312 b43_phy_write(dev, B43_PHY_HT_AFE_CTL2, 0x00fd);
313 b43_phy_write(dev, B43_PHY_HT_AFE_CTL3, 0x07ff);
314 b43_phy_write(dev, B43_PHY_HT_AFE_CTL4, 0x00fd);
315 b43_phy_write(dev, B43_PHY_HT_AFE_CTL5, 0x07ff);
316 b43_phy_write(dev, B43_PHY_HT_AFE_CTL6, 0x00fd);
317 }
318}
319
320static int b43_phy_ht_op_switch_channel(struct b43_wldev *dev,
321 unsigned int new_channel)
322{
323 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
324 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
325
326 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
327 if ((new_channel < 1) || (new_channel > 14))
328 return -EINVAL;
329 } else {
330 return -EINVAL;
331 }
332
333 return b43_phy_ht_set_channel(dev, channel, channel_type);
334}
335
336static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev)
337{
338 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
339 return 11;
340 return 36;
341}
342
343/**************************************************
344 * R/W ops.
345 **************************************************/
346
347static u16 b43_phy_ht_op_read(struct b43_wldev *dev, u16 reg)
348{
349 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
350 return b43_read16(dev, B43_MMIO_PHY_DATA);
351}
352
353static void b43_phy_ht_op_write(struct b43_wldev *dev, u16 reg, u16 value)
354{
355 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
356 b43_write16(dev, B43_MMIO_PHY_DATA, value);
357}
358
359static void b43_phy_ht_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
360 u16 set)
361{
362 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
363 b43_write16(dev, B43_MMIO_PHY_DATA,
364 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
365}
366
367static u16 b43_phy_ht_op_radio_read(struct b43_wldev *dev, u16 reg)
368{
369 /* HT-PHY needs 0x200 for read access */
370 reg |= 0x200;
371
372 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
373 return b43_read16(dev, B43_MMIO_RADIO24_DATA);
374}
375
376static void b43_phy_ht_op_radio_write(struct b43_wldev *dev, u16 reg,
377 u16 value)
378{
379 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
380 b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
381}
382
383static enum b43_txpwr_result
384b43_phy_ht_op_recalc_txpower(struct b43_wldev *dev, bool ignore_tssi)
385{
386 return B43_TXPWR_RES_DONE;
387}
388
389static void b43_phy_ht_op_adjust_txpower(struct b43_wldev *dev)
390{
391}
392
393/**************************************************
394 * PHY ops struct.
395 **************************************************/
396
397const struct b43_phy_operations b43_phyops_ht = {
398 .allocate = b43_phy_ht_op_allocate,
399 .free = b43_phy_ht_op_free,
400 .prepare_structs = b43_phy_ht_op_prepare_structs,
401 .init = b43_phy_ht_op_init,
402 .phy_read = b43_phy_ht_op_read,
403 .phy_write = b43_phy_ht_op_write,
404 .phy_maskset = b43_phy_ht_op_maskset,
405 .radio_read = b43_phy_ht_op_radio_read,
406 .radio_write = b43_phy_ht_op_radio_write,
407 .software_rfkill = b43_phy_ht_op_software_rfkill,
408 .switch_analog = b43_phy_ht_op_switch_analog,
409 .switch_channel = b43_phy_ht_op_switch_channel,
410 .get_default_chan = b43_phy_ht_op_get_default_chan,
411 .recalc_txpower = b43_phy_ht_op_recalc_txpower,
412 .adjust_txpower = b43_phy_ht_op_adjust_txpower,
413};
diff --git a/drivers/net/wireless/b43/phy_ht.h b/drivers/net/wireless/b43/phy_ht.h
new file mode 100644
index 000000000000..7ad7affc8df0
--- /dev/null
+++ b/drivers/net/wireless/b43/phy_ht.h
@@ -0,0 +1,46 @@
1#ifndef B43_PHY_HT_H_
2#define B43_PHY_HT_H_
3
4#include "phy_common.h"
5
6
7#define B43_PHY_HT_BANDCTL 0x009 /* Band control */
8#define B43_PHY_HT_TABLE_ADDR 0x072 /* Table address */
9#define B43_PHY_HT_TABLE_DATALO 0x073 /* Table data low */
10#define B43_PHY_HT_TABLE_DATAHI 0x074 /* Table data high */
11#define B43_PHY_HT_BW1 0x1CE
12#define B43_PHY_HT_BW2 0x1CF
13#define B43_PHY_HT_BW3 0x1D0
14#define B43_PHY_HT_BW4 0x1D1
15#define B43_PHY_HT_BW5 0x1D2
16#define B43_PHY_HT_BW6 0x1D3
17
18#define B43_PHY_HT_RF_CTL1 B43_PHY_EXTG(0x010)
19
20#define B43_PHY_HT_AFE_CTL1 B43_PHY_EXTG(0x110)
21#define B43_PHY_HT_AFE_CTL2 B43_PHY_EXTG(0x111)
22#define B43_PHY_HT_AFE_CTL3 B43_PHY_EXTG(0x114)
23#define B43_PHY_HT_AFE_CTL4 B43_PHY_EXTG(0x115)
24#define B43_PHY_HT_AFE_CTL5 B43_PHY_EXTG(0x118)
25#define B43_PHY_HT_AFE_CTL6 B43_PHY_EXTG(0x119)
26
27
28/* Values for PHY registers used on channel switching */
29struct b43_phy_ht_channeltab_e_phy {
30 u16 bw1;
31 u16 bw2;
32 u16 bw3;
33 u16 bw4;
34 u16 bw5;
35 u16 bw6;
36};
37
38
39struct b43_phy_ht {
40};
41
42
43struct b43_phy_operations;
44extern const struct b43_phy_operations b43_phyops_ht;
45
46#endif /* B43_PHY_HT_H_ */
diff --git a/drivers/net/wireless/b43/phy_lcn.c b/drivers/net/wireless/b43/phy_lcn.c
new file mode 100644
index 000000000000..9f7dbbd5ced6
--- /dev/null
+++ b/drivers/net/wireless/b43/phy_lcn.c
@@ -0,0 +1,52 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n LCN-PHY support
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include <linux/slab.h>
24
25#include "b43.h"
26#include "phy_lcn.h"
27#include "tables_phy_lcn.h"
28#include "main.h"
29
30/**************************************************
31 * PHY ops struct.
32 **************************************************/
33
34const struct b43_phy_operations b43_phyops_lcn = {
35 /*
36 .allocate = b43_phy_lcn_op_allocate,
37 .free = b43_phy_lcn_op_free,
38 .prepare_structs = b43_phy_lcn_op_prepare_structs,
39 .init = b43_phy_lcn_op_init,
40 .phy_read = b43_phy_lcn_op_read,
41 .phy_write = b43_phy_lcn_op_write,
42 .phy_maskset = b43_phy_lcn_op_maskset,
43 .radio_read = b43_phy_lcn_op_radio_read,
44 .radio_write = b43_phy_lcn_op_radio_write,
45 .software_rfkill = b43_phy_lcn_op_software_rfkill,
46 .switch_analog = b43_phy_lcn_op_switch_analog,
47 .switch_channel = b43_phy_lcn_op_switch_channel,
48 .get_default_chan = b43_phy_lcn_op_get_default_chan,
49 .recalc_txpower = b43_phy_lcn_op_recalc_txpower,
50 .adjust_txpower = b43_phy_lcn_op_adjust_txpower,
51 */
52};
diff --git a/drivers/net/wireless/b43/phy_lcn.h b/drivers/net/wireless/b43/phy_lcn.h
new file mode 100644
index 000000000000..c046c2a6cab4
--- /dev/null
+++ b/drivers/net/wireless/b43/phy_lcn.h
@@ -0,0 +1,14 @@
1#ifndef B43_PHY_LCN_H_
2#define B43_PHY_LCN_H_
3
4#include "phy_common.h"
5
6
7struct b43_phy_lcn {
8};
9
10
11struct b43_phy_operations;
12extern const struct b43_phy_operations b43_phyops_lcn;
13
14#endif /* B43_PHY_LCN_H_ */ \ No newline at end of file
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index 014d5de966c0..f93d66b1817b 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -85,39 +85,39 @@ static void b43_lpphy_op_free(struct b43_wldev *dev)
85/* http://bcm-v4.sipsolutions.net/802.11/PHY/LP/ReadBandSrom */ 85/* http://bcm-v4.sipsolutions.net/802.11/PHY/LP/ReadBandSrom */
86static void lpphy_read_band_sprom(struct b43_wldev *dev) 86static void lpphy_read_band_sprom(struct b43_wldev *dev)
87{ 87{
88 struct ssb_sprom *sprom = dev->dev->bus_sprom;
88 struct b43_phy_lp *lpphy = dev->phy.lp; 89 struct b43_phy_lp *lpphy = dev->phy.lp;
89 struct ssb_bus *bus = dev->sdev->bus;
90 u16 cckpo, maxpwr; 90 u16 cckpo, maxpwr;
91 u32 ofdmpo; 91 u32 ofdmpo;
92 int i; 92 int i;
93 93
94 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 94 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
95 lpphy->tx_isolation_med_band = bus->sprom.tri2g; 95 lpphy->tx_isolation_med_band = sprom->tri2g;
96 lpphy->bx_arch = bus->sprom.bxa2g; 96 lpphy->bx_arch = sprom->bxa2g;
97 lpphy->rx_pwr_offset = bus->sprom.rxpo2g; 97 lpphy->rx_pwr_offset = sprom->rxpo2g;
98 lpphy->rssi_vf = bus->sprom.rssismf2g; 98 lpphy->rssi_vf = sprom->rssismf2g;
99 lpphy->rssi_vc = bus->sprom.rssismc2g; 99 lpphy->rssi_vc = sprom->rssismc2g;
100 lpphy->rssi_gs = bus->sprom.rssisav2g; 100 lpphy->rssi_gs = sprom->rssisav2g;
101 lpphy->txpa[0] = bus->sprom.pa0b0; 101 lpphy->txpa[0] = sprom->pa0b0;
102 lpphy->txpa[1] = bus->sprom.pa0b1; 102 lpphy->txpa[1] = sprom->pa0b1;
103 lpphy->txpa[2] = bus->sprom.pa0b2; 103 lpphy->txpa[2] = sprom->pa0b2;
104 maxpwr = bus->sprom.maxpwr_bg; 104 maxpwr = sprom->maxpwr_bg;
105 lpphy->max_tx_pwr_med_band = maxpwr; 105 lpphy->max_tx_pwr_med_band = maxpwr;
106 cckpo = bus->sprom.cck2gpo; 106 cckpo = sprom->cck2gpo;
107 /* 107 /*
108 * We don't read SPROM's opo as specs say. On rev8 SPROMs 108 * We don't read SPROM's opo as specs say. On rev8 SPROMs
109 * opo == ofdm2gpo and we don't know any SSB with LP-PHY 109 * opo == ofdm2gpo and we don't know any SSB with LP-PHY
110 * and SPROM rev below 8. 110 * and SPROM rev below 8.
111 */ 111 */
112 B43_WARN_ON(bus->sprom.revision < 8); 112 B43_WARN_ON(sprom->revision < 8);
113 ofdmpo = bus->sprom.ofdm2gpo; 113 ofdmpo = sprom->ofdm2gpo;
114 if (cckpo) { 114 if (cckpo) {
115 for (i = 0; i < 4; i++) { 115 for (i = 0; i < 4; i++) {
116 lpphy->tx_max_rate[i] = 116 lpphy->tx_max_rate[i] =
117 maxpwr - (ofdmpo & 0xF) * 2; 117 maxpwr - (ofdmpo & 0xF) * 2;
118 ofdmpo >>= 4; 118 ofdmpo >>= 4;
119 } 119 }
120 ofdmpo = bus->sprom.ofdm2gpo; 120 ofdmpo = sprom->ofdm2gpo;
121 for (i = 4; i < 15; i++) { 121 for (i = 4; i < 15; i++) {
122 lpphy->tx_max_rate[i] = 122 lpphy->tx_max_rate[i] =
123 maxpwr - (ofdmpo & 0xF) * 2; 123 maxpwr - (ofdmpo & 0xF) * 2;
@@ -131,39 +131,39 @@ static void lpphy_read_band_sprom(struct b43_wldev *dev)
131 lpphy->tx_max_rate[i] = maxpwr - ofdmpo; 131 lpphy->tx_max_rate[i] = maxpwr - ofdmpo;
132 } 132 }
133 } else { /* 5GHz */ 133 } else { /* 5GHz */
134 lpphy->tx_isolation_low_band = bus->sprom.tri5gl; 134 lpphy->tx_isolation_low_band = sprom->tri5gl;
135 lpphy->tx_isolation_med_band = bus->sprom.tri5g; 135 lpphy->tx_isolation_med_band = sprom->tri5g;
136 lpphy->tx_isolation_hi_band = bus->sprom.tri5gh; 136 lpphy->tx_isolation_hi_band = sprom->tri5gh;
137 lpphy->bx_arch = bus->sprom.bxa5g; 137 lpphy->bx_arch = sprom->bxa5g;
138 lpphy->rx_pwr_offset = bus->sprom.rxpo5g; 138 lpphy->rx_pwr_offset = sprom->rxpo5g;
139 lpphy->rssi_vf = bus->sprom.rssismf5g; 139 lpphy->rssi_vf = sprom->rssismf5g;
140 lpphy->rssi_vc = bus->sprom.rssismc5g; 140 lpphy->rssi_vc = sprom->rssismc5g;
141 lpphy->rssi_gs = bus->sprom.rssisav5g; 141 lpphy->rssi_gs = sprom->rssisav5g;
142 lpphy->txpa[0] = bus->sprom.pa1b0; 142 lpphy->txpa[0] = sprom->pa1b0;
143 lpphy->txpa[1] = bus->sprom.pa1b1; 143 lpphy->txpa[1] = sprom->pa1b1;
144 lpphy->txpa[2] = bus->sprom.pa1b2; 144 lpphy->txpa[2] = sprom->pa1b2;
145 lpphy->txpal[0] = bus->sprom.pa1lob0; 145 lpphy->txpal[0] = sprom->pa1lob0;
146 lpphy->txpal[1] = bus->sprom.pa1lob1; 146 lpphy->txpal[1] = sprom->pa1lob1;
147 lpphy->txpal[2] = bus->sprom.pa1lob2; 147 lpphy->txpal[2] = sprom->pa1lob2;
148 lpphy->txpah[0] = bus->sprom.pa1hib0; 148 lpphy->txpah[0] = sprom->pa1hib0;
149 lpphy->txpah[1] = bus->sprom.pa1hib1; 149 lpphy->txpah[1] = sprom->pa1hib1;
150 lpphy->txpah[2] = bus->sprom.pa1hib2; 150 lpphy->txpah[2] = sprom->pa1hib2;
151 maxpwr = bus->sprom.maxpwr_al; 151 maxpwr = sprom->maxpwr_al;
152 ofdmpo = bus->sprom.ofdm5glpo; 152 ofdmpo = sprom->ofdm5glpo;
153 lpphy->max_tx_pwr_low_band = maxpwr; 153 lpphy->max_tx_pwr_low_band = maxpwr;
154 for (i = 4; i < 12; i++) { 154 for (i = 4; i < 12; i++) {
155 lpphy->tx_max_ratel[i] = maxpwr - (ofdmpo & 0xF) * 2; 155 lpphy->tx_max_ratel[i] = maxpwr - (ofdmpo & 0xF) * 2;
156 ofdmpo >>= 4; 156 ofdmpo >>= 4;
157 } 157 }
158 maxpwr = bus->sprom.maxpwr_a; 158 maxpwr = sprom->maxpwr_a;
159 ofdmpo = bus->sprom.ofdm5gpo; 159 ofdmpo = sprom->ofdm5gpo;
160 lpphy->max_tx_pwr_med_band = maxpwr; 160 lpphy->max_tx_pwr_med_band = maxpwr;
161 for (i = 4; i < 12; i++) { 161 for (i = 4; i < 12; i++) {
162 lpphy->tx_max_rate[i] = maxpwr - (ofdmpo & 0xF) * 2; 162 lpphy->tx_max_rate[i] = maxpwr - (ofdmpo & 0xF) * 2;
163 ofdmpo >>= 4; 163 ofdmpo >>= 4;
164 } 164 }
165 maxpwr = bus->sprom.maxpwr_ah; 165 maxpwr = sprom->maxpwr_ah;
166 ofdmpo = bus->sprom.ofdm5ghpo; 166 ofdmpo = sprom->ofdm5ghpo;
167 lpphy->max_tx_pwr_hi_band = maxpwr; 167 lpphy->max_tx_pwr_hi_band = maxpwr;
168 for (i = 4; i < 12; i++) { 168 for (i = 4; i < 12; i++) {
169 lpphy->tx_max_rateh[i] = maxpwr - (ofdmpo & 0xF) * 2; 169 lpphy->tx_max_rateh[i] = maxpwr - (ofdmpo & 0xF) * 2;
@@ -214,7 +214,8 @@ static void lpphy_table_init(struct b43_wldev *dev)
214 214
215static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev) 215static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
216{ 216{
217 struct ssb_bus *bus = dev->sdev->bus; 217 struct ssb_bus *bus = dev->dev->sdev->bus;
218 struct ssb_sprom *sprom = dev->dev->bus_sprom;
218 struct b43_phy_lp *lpphy = dev->phy.lp; 219 struct b43_phy_lp *lpphy = dev->phy.lp;
219 u16 tmp, tmp2; 220 u16 tmp, tmp2;
220 221
@@ -242,9 +243,9 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
242 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00); 243 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00);
243 b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB, 244 b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB,
244 0xFF00, lpphy->rx_pwr_offset); 245 0xFF00, lpphy->rx_pwr_offset);
245 if ((bus->sprom.boardflags_lo & B43_BFL_FEM) && 246 if ((sprom->boardflags_lo & B43_BFL_FEM) &&
246 ((b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) || 247 ((b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
247 (bus->sprom.boardflags_hi & B43_BFH_PAREF))) { 248 (sprom->boardflags_hi & B43_BFH_PAREF))) {
248 ssb_pmu_set_ldo_voltage(&bus->chipco, LDO_PAREF, 0x28); 249 ssb_pmu_set_ldo_voltage(&bus->chipco, LDO_PAREF, 0x28);
249 ssb_pmu_set_ldo_paref(&bus->chipco, true); 250 ssb_pmu_set_ldo_paref(&bus->chipco, true);
250 if (dev->phy.rev == 0) { 251 if (dev->phy.rev == 0) {
@@ -260,7 +261,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
260 } 261 }
261 tmp = lpphy->rssi_vf | lpphy->rssi_vc << 4 | 0xA000; 262 tmp = lpphy->rssi_vf | lpphy->rssi_vc << 4 | 0xA000;
262 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, tmp); 263 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, tmp);
263 if (bus->sprom.boardflags_hi & B43_BFH_RSSIINV) 264 if (sprom->boardflags_hi & B43_BFH_RSSIINV)
264 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x0AAA); 265 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x0AAA);
265 else 266 else
266 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x02AA); 267 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x02AA);
@@ -268,7 +269,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
268 b43_phy_maskset(dev, B43_LPPHY_RX_RADIO_CTL, 269 b43_phy_maskset(dev, B43_LPPHY_RX_RADIO_CTL,
269 0xFFF9, (lpphy->bx_arch << 1)); 270 0xFFF9, (lpphy->bx_arch << 1));
270 if (dev->phy.rev == 1 && 271 if (dev->phy.rev == 1 &&
271 (bus->sprom.boardflags_hi & B43_BFH_FEM_BT)) { 272 (sprom->boardflags_hi & B43_BFH_FEM_BT)) {
272 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A); 273 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A);
273 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0x3F00, 0x0900); 274 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0x3F00, 0x0900);
274 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A); 275 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A);
@@ -286,8 +287,8 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
286 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xFFC0, 0x000A); 287 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xFFC0, 0x000A);
287 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xC0FF, 0x0B00); 288 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xC0FF, 0x0B00);
288 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ || 289 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ ||
289 (bus->boardinfo.type == 0x048A) || ((dev->phy.rev == 0) && 290 (dev->dev->board_type == 0x048A) || ((dev->phy.rev == 0) &&
290 (bus->sprom.boardflags_lo & B43_BFL_FEM))) { 291 (sprom->boardflags_lo & B43_BFL_FEM))) {
291 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0001); 292 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0001);
292 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0400); 293 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0400);
293 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0001); 294 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0001);
@@ -297,7 +298,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
297 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002); 298 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002);
298 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0A00); 299 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0A00);
299 } else if (dev->phy.rev == 1 || 300 } else if (dev->phy.rev == 1 ||
300 (bus->sprom.boardflags_lo & B43_BFL_FEM)) { 301 (sprom->boardflags_lo & B43_BFL_FEM)) {
301 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0004); 302 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0004);
302 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0800); 303 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0800);
303 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0004); 304 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0004);
@@ -316,15 +317,15 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
316 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0006); 317 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0006);
317 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0700); 318 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0700);
318 } 319 }
319 if (dev->phy.rev == 1 && (bus->sprom.boardflags_hi & B43_BFH_PAREF)) { 320 if (dev->phy.rev == 1 && (sprom->boardflags_hi & B43_BFH_PAREF)) {
320 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_5, B43_LPPHY_TR_LOOKUP_1); 321 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_5, B43_LPPHY_TR_LOOKUP_1);
321 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_6, B43_LPPHY_TR_LOOKUP_2); 322 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_6, B43_LPPHY_TR_LOOKUP_2);
322 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_7, B43_LPPHY_TR_LOOKUP_3); 323 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_7, B43_LPPHY_TR_LOOKUP_3);
323 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_8, B43_LPPHY_TR_LOOKUP_4); 324 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_8, B43_LPPHY_TR_LOOKUP_4);
324 } 325 }
325 if ((bus->sprom.boardflags_hi & B43_BFH_FEM_BT) && 326 if ((sprom->boardflags_hi & B43_BFH_FEM_BT) &&
326 (bus->chip_id == 0x5354) && 327 (dev->dev->chip_id == 0x5354) &&
327 (bus->chip_package == SSB_CHIPPACK_BCM4712S)) { 328 (dev->dev->chip_pkg == SSB_CHIPPACK_BCM4712S)) {
328 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006); 329 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006);
329 b43_phy_write(dev, B43_LPPHY_GPIO_SELECT, 0x0005); 330 b43_phy_write(dev, B43_LPPHY_GPIO_SELECT, 0x0005);
330 b43_phy_write(dev, B43_LPPHY_GPIO_OUTEN, 0xFFFF); 331 b43_phy_write(dev, B43_LPPHY_GPIO_OUTEN, 0xFFFF);
@@ -412,7 +413,6 @@ static void lpphy_restore_dig_flt_state(struct b43_wldev *dev)
412 413
413static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) 414static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
414{ 415{
415 struct ssb_bus *bus = dev->sdev->bus;
416 struct b43_phy_lp *lpphy = dev->phy.lp; 416 struct b43_phy_lp *lpphy = dev->phy.lp;
417 417
418 b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50); 418 b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
@@ -432,7 +432,7 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
432 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000); 432 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000);
433 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000); 433 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000);
434 b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1); 434 b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);
435 if (bus->boardinfo.rev >= 0x18) { 435 if (dev->dev->board_rev >= 0x18) {
436 b43_lptab_write(dev, B43_LPTAB32(17, 65), 0xEC); 436 b43_lptab_write(dev, B43_LPTAB32(17, 65), 0xEC);
437 b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x14); 437 b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x14);
438 } else { 438 } else {
@@ -449,7 +449,7 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
449 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0xA0); 449 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0xA0);
450 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300); 450 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300);
451 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00); 451 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00);
452 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) { 452 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) {
453 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100); 453 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100);
454 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xA); 454 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xA);
455 } else { 455 } else {
@@ -467,7 +467,7 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
467 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12); 467 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12);
468 b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000); 468 b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000);
469 469
470 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) { 470 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) {
471 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x14), 0); 471 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x14), 0);
472 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x12), 0x40); 472 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x12), 0x40);
473 } 473 }
@@ -492,7 +492,7 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
492 0x2000 | ((u16)lpphy->rssi_gs << 10) | 492 0x2000 | ((u16)lpphy->rssi_gs << 10) |
493 ((u16)lpphy->rssi_vc << 4) | lpphy->rssi_vf); 493 ((u16)lpphy->rssi_vc << 4) | lpphy->rssi_vf);
494 494
495 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) { 495 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) {
496 b43_phy_set(dev, B43_LPPHY_AFE_ADC_CTL_0, 0x1C); 496 b43_phy_set(dev, B43_LPPHY_AFE_ADC_CTL_0, 0x1C);
497 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL, 0x00FF, 0x8800); 497 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL, 0x00FF, 0x8800);
498 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_1, 0xFC3C, 0x0400); 498 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_1, 0xFC3C, 0x0400);
@@ -519,7 +519,7 @@ struct b2062_freqdata {
519static void lpphy_2062_init(struct b43_wldev *dev) 519static void lpphy_2062_init(struct b43_wldev *dev)
520{ 520{
521 struct b43_phy_lp *lpphy = dev->phy.lp; 521 struct b43_phy_lp *lpphy = dev->phy.lp;
522 struct ssb_bus *bus = dev->sdev->bus; 522 struct ssb_bus *bus = dev->dev->sdev->bus;
523 u32 crystalfreq, tmp, ref; 523 u32 crystalfreq, tmp, ref;
524 unsigned int i; 524 unsigned int i;
525 const struct b2062_freqdata *fd = NULL; 525 const struct b2062_freqdata *fd = NULL;
@@ -697,7 +697,7 @@ static void lpphy_radio_init(struct b43_wldev *dev)
697 lpphy_sync_stx(dev); 697 lpphy_sync_stx(dev);
698 b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80); 698 b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80);
699 b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0); 699 b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0);
700 if (dev->sdev->bus->chip_id == 0x4325) { 700 if (dev->dev->chip_id == 0x4325) {
701 // TODO SSB PMU recalibration 701 // TODO SSB PMU recalibration
702 } 702 }
703 } 703 }
@@ -1289,7 +1289,7 @@ finish:
1289 1289
1290static void lpphy_rev2plus_rc_calib(struct b43_wldev *dev) 1290static void lpphy_rev2plus_rc_calib(struct b43_wldev *dev)
1291{ 1291{
1292 struct ssb_bus *bus = dev->sdev->bus; 1292 struct ssb_bus *bus = dev->dev->sdev->bus;
1293 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000; 1293 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
1294 u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF; 1294 u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF;
1295 int i; 1295 int i;
@@ -1840,7 +1840,6 @@ static void lpphy_papd_cal(struct b43_wldev *dev, struct lpphy_tx_gains gains,
1840static void lpphy_papd_cal_txpwr(struct b43_wldev *dev) 1840static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
1841{ 1841{
1842 struct b43_phy_lp *lpphy = dev->phy.lp; 1842 struct b43_phy_lp *lpphy = dev->phy.lp;
1843 struct ssb_bus *bus = dev->sdev->bus;
1844 struct lpphy_tx_gains gains, oldgains; 1843 struct lpphy_tx_gains gains, oldgains;
1845 int old_txpctl, old_afe_ovr, old_rf, old_bbmult; 1844 int old_txpctl, old_afe_ovr, old_rf, old_bbmult;
1846 1845
@@ -1854,7 +1853,7 @@ static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
1854 1853
1855 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); 1854 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1856 1855
1857 if (bus->chip_id == 0x4325 && bus->chip_rev == 0) 1856 if (dev->dev->chip_id == 0x4325 && dev->dev->chip_rev == 0)
1858 lpphy_papd_cal(dev, gains, 0, 1, 30); 1857 lpphy_papd_cal(dev, gains, 0, 1, 30);
1859 else 1858 else
1860 lpphy_papd_cal(dev, gains, 0, 1, 65); 1859 lpphy_papd_cal(dev, gains, 0, 1, 65);
@@ -1870,7 +1869,6 @@ static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
1870 bool rx, bool pa, struct lpphy_tx_gains *gains) 1869 bool rx, bool pa, struct lpphy_tx_gains *gains)
1871{ 1870{
1872 struct b43_phy_lp *lpphy = dev->phy.lp; 1871 struct b43_phy_lp *lpphy = dev->phy.lp;
1873 struct ssb_bus *bus = dev->sdev->bus;
1874 const struct lpphy_rx_iq_comp *iqcomp = NULL; 1872 const struct lpphy_rx_iq_comp *iqcomp = NULL;
1875 struct lpphy_tx_gains nogains, oldgains; 1873 struct lpphy_tx_gains nogains, oldgains;
1876 u16 tmp; 1874 u16 tmp;
@@ -1879,7 +1877,7 @@ static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
1879 memset(&nogains, 0, sizeof(nogains)); 1877 memset(&nogains, 0, sizeof(nogains));
1880 memset(&oldgains, 0, sizeof(oldgains)); 1878 memset(&oldgains, 0, sizeof(oldgains));
1881 1879
1882 if (bus->chip_id == 0x5354) { 1880 if (dev->dev->chip_id == 0x5354) {
1883 for (i = 0; i < ARRAY_SIZE(lpphy_5354_iq_table); i++) { 1881 for (i = 0; i < ARRAY_SIZE(lpphy_5354_iq_table); i++) {
1884 if (lpphy_5354_iq_table[i].chan == lpphy->channel) { 1882 if (lpphy_5354_iq_table[i].chan == lpphy->channel) {
1885 iqcomp = &lpphy_5354_iq_table[i]; 1883 iqcomp = &lpphy_5354_iq_table[i];
@@ -2408,11 +2406,9 @@ static const struct b206x_channel b2063_chantbl[] = {
2408 2406
2409static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev) 2407static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
2410{ 2408{
2411 struct ssb_bus *bus = dev->sdev->bus;
2412
2413 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF); 2409 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF);
2414 udelay(20); 2410 udelay(20);
2415 if (bus->chip_id == 0x5354) { 2411 if (dev->dev->chip_id == 0x5354) {
2416 b43_radio_write(dev, B2062_N_COMM1, 4); 2412 b43_radio_write(dev, B2062_N_COMM1, 4);
2417 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 4); 2413 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 4);
2418 } else { 2414 } else {
@@ -2432,7 +2428,7 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
2432 unsigned int channel) 2428 unsigned int channel)
2433{ 2429{
2434 struct b43_phy_lp *lpphy = dev->phy.lp; 2430 struct b43_phy_lp *lpphy = dev->phy.lp;
2435 struct ssb_bus *bus = dev->sdev->bus; 2431 struct ssb_bus *bus = dev->dev->sdev->bus;
2436 const struct b206x_channel *chandata = NULL; 2432 const struct b206x_channel *chandata = NULL;
2437 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000; 2433 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
2438 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9; 2434 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
@@ -2522,7 +2518,7 @@ static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
2522static int lpphy_b2063_tune(struct b43_wldev *dev, 2518static int lpphy_b2063_tune(struct b43_wldev *dev,
2523 unsigned int channel) 2519 unsigned int channel)
2524{ 2520{
2525 struct ssb_bus *bus = dev->sdev->bus; 2521 struct ssb_bus *bus = dev->dev->sdev->bus;
2526 2522
2527 static const struct b206x_channel *chandata = NULL; 2523 static const struct b206x_channel *chandata = NULL;
2528 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000; 2524 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
@@ -2670,6 +2666,11 @@ static int b43_lpphy_op_init(struct b43_wldev *dev)
2670{ 2666{
2671 int err; 2667 int err;
2672 2668
2669 if (dev->dev->bus_type != B43_BUS_SSB) {
2670 b43err(dev->wl, "LP-PHY is supported only on SSB!\n");
2671 return -EOPNOTSUPP;
2672 }
2673
2673 lpphy_read_band_sprom(dev); //FIXME should this be in prepare_structs? 2674 lpphy_read_band_sprom(dev); //FIXME should this be in prepare_structs?
2674 lpphy_baseband_init(dev); 2675 lpphy_baseband_init(dev);
2675 lpphy_radio_init(dev); 2676 lpphy_radio_init(dev);
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 3909a230a487..3b46360da99b 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -299,7 +299,7 @@ static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
299static void b43_nphy_tx_power_fix(struct b43_wldev *dev) 299static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
300{ 300{
301 struct b43_phy_n *nphy = dev->phy.n; 301 struct b43_phy_n *nphy = dev->phy.n;
302 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom); 302 struct ssb_sprom *sprom = dev->dev->bus_sprom;
303 303
304 u8 txpi[2], bbmult, i; 304 u8 txpi[2], bbmult, i;
305 u16 tmp, radio_gain, dac_gain; 305 u16 tmp, radio_gain, dac_gain;
@@ -423,16 +423,15 @@ static void b43_radio_init2055_pre(struct b43_wldev *dev)
423static void b43_radio_init2055_post(struct b43_wldev *dev) 423static void b43_radio_init2055_post(struct b43_wldev *dev)
424{ 424{
425 struct b43_phy_n *nphy = dev->phy.n; 425 struct b43_phy_n *nphy = dev->phy.n;
426 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom); 426 struct ssb_sprom *sprom = dev->dev->bus_sprom;
427 struct ssb_boardinfo *binfo = &(dev->sdev->bus->boardinfo);
428 int i; 427 int i;
429 u16 val; 428 u16 val;
430 bool workaround = false; 429 bool workaround = false;
431 430
432 if (sprom->revision < 4) 431 if (sprom->revision < 4)
433 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM && 432 workaround = (dev->dev->board_vendor != PCI_VENDOR_ID_BROADCOM
434 binfo->type == 0x46D && 433 && dev->dev->board_type == 0x46D
435 binfo->rev >= 0x41); 434 && dev->dev->board_rev >= 0x41);
436 else 435 else
437 workaround = 436 workaround =
438 !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS); 437 !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS);
@@ -604,17 +603,33 @@ static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
604/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ 603/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
605static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force) 604static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
606{ 605{
607 u32 tmslow; 606 u32 tmp;
608 607
609 if (dev->phy.type != B43_PHYTYPE_N) 608 if (dev->phy.type != B43_PHYTYPE_N)
610 return; 609 return;
611 610
612 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW); 611 switch (dev->dev->bus_type) {
613 if (force) 612#ifdef CONFIG_B43_BCMA
614 tmslow |= SSB_TMSLOW_FGC; 613 case B43_BUS_BCMA:
615 else 614 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
616 tmslow &= ~SSB_TMSLOW_FGC; 615 if (force)
617 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow); 616 tmp |= BCMA_IOCTL_FGC;
617 else
618 tmp &= ~BCMA_IOCTL_FGC;
619 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
620 break;
621#endif
622#ifdef CONFIG_B43_SSB
623 case B43_BUS_SSB:
624 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
625 if (force)
626 tmp |= SSB_TMSLOW_FGC;
627 else
628 tmp &= ~SSB_TMSLOW_FGC;
629 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
630 break;
631#endif
632 }
618} 633}
619 634
620/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */ 635/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
@@ -959,8 +974,21 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
959 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0); 974 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
960 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0); 975 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
961 976
962 ssb_chipco_gpio_control(&dev->sdev->bus->chipco, 0xFC00, 977 switch (dev->dev->bus_type) {
963 0xFC00); 978#ifdef CONFIG_B43_BCMA
979 case B43_BUS_BCMA:
980 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc,
981 0xFC00, 0xFC00);
982 break;
983#endif
984#ifdef CONFIG_B43_SSB
985 case B43_BUS_SSB:
986 ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco,
987 0xFC00, 0xFC00);
988 break;
989#endif
990 }
991
964 b43_write32(dev, B43_MMIO_MACCTL, 992 b43_write32(dev, B43_MMIO_MACCTL,
965 b43_read32(dev, B43_MMIO_MACCTL) & 993 b43_read32(dev, B43_MMIO_MACCTL) &
966 ~B43_MACCTL_GPOUTSMSK); 994 ~B43_MACCTL_GPOUTSMSK);
@@ -983,7 +1011,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
983{ 1011{
984 u16 tmp; 1012 u16 tmp;
985 1013
986 if (dev->sdev->id.revision == 16) 1014 if (dev->dev->core_rev == 16)
987 b43_mac_suspend(dev); 1015 b43_mac_suspend(dev);
988 1016
989 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL); 1017 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
@@ -993,7 +1021,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
993 tmp |= (val & mask); 1021 tmp |= (val & mask);
994 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp); 1022 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
995 1023
996 if (dev->sdev->id.revision == 16) 1024 if (dev->dev->core_rev == 16)
997 b43_mac_enable(dev); 1025 b43_mac_enable(dev);
998 1026
999 return tmp; 1027 return tmp;
@@ -1168,7 +1196,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
1168static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev) 1196static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
1169{ 1197{
1170 struct b43_phy_n *nphy = dev->phy.n; 1198 struct b43_phy_n *nphy = dev->phy.n;
1171 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom); 1199 struct ssb_sprom *sprom = dev->dev->bus_sprom;
1172 1200
1173 /* PHY rev 0, 1, 2 */ 1201 /* PHY rev 0, 1, 2 */
1174 u8 i, j; 1202 u8 i, j;
@@ -1373,7 +1401,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
1373/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */ 1401/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1374static void b43_nphy_workarounds(struct b43_wldev *dev) 1402static void b43_nphy_workarounds(struct b43_wldev *dev)
1375{ 1403{
1376 struct ssb_bus *bus = dev->sdev->bus; 1404 struct ssb_sprom *sprom = dev->dev->bus_sprom;
1377 struct b43_phy *phy = &dev->phy; 1405 struct b43_phy *phy = &dev->phy;
1378 struct b43_phy_n *nphy = phy->n; 1406 struct b43_phy_n *nphy = phy->n;
1379 1407
@@ -1443,9 +1471,9 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1443 1471
1444 /* N PHY WAR TX Chain Update with hw_phytxchain as argument */ 1472 /* N PHY WAR TX Chain Update with hw_phytxchain as argument */
1445 1473
1446 if ((bus->sprom.boardflags2_lo & B43_BFL2_APLL_WAR && 1474 if ((sprom->boardflags2_lo & B43_BFL2_APLL_WAR &&
1447 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) || 1475 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
1448 (bus->sprom.boardflags2_lo & B43_BFL2_GPLL_WAR && 1476 (sprom->boardflags2_lo & B43_BFL2_GPLL_WAR &&
1449 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) 1477 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ))
1450 tmp32 = 0x00088888; 1478 tmp32 = 0x00088888;
1451 else 1479 else
@@ -1503,8 +1531,8 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1503 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8); 1531 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1504 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301); 1532 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1505 1533
1506 if (bus->sprom.boardflags2_lo & 0x100 && 1534 if (sprom->boardflags2_lo & 0x100 &&
1507 bus->boardinfo.type == 0x8B) { 1535 dev->dev->board_type == 0x8B) {
1508 delays1[0] = 0x1; 1536 delays1[0] = 0x1;
1509 delays1[5] = 0x14; 1537 delays1[5] = 0x14;
1510 } 1538 }
@@ -3586,7 +3614,7 @@ static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
3586 */ 3614 */
3587int b43_phy_initn(struct b43_wldev *dev) 3615int b43_phy_initn(struct b43_wldev *dev)
3588{ 3616{
3589 struct ssb_bus *bus = dev->sdev->bus; 3617 struct ssb_sprom *sprom = dev->dev->bus_sprom;
3590 struct b43_phy *phy = &dev->phy; 3618 struct b43_phy *phy = &dev->phy;
3591 struct b43_phy_n *nphy = phy->n; 3619 struct b43_phy_n *nphy = phy->n;
3592 u8 tx_pwr_state; 3620 u8 tx_pwr_state;
@@ -3599,9 +3627,22 @@ int b43_phy_initn(struct b43_wldev *dev)
3599 bool do_cal = false; 3627 bool do_cal = false;
3600 3628
3601 if ((dev->phy.rev >= 3) && 3629 if ((dev->phy.rev >= 3) &&
3602 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) && 3630 (sprom->boardflags_lo & B43_BFL_EXTLNA) &&
3603 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) { 3631 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3604 chipco_set32(&dev->sdev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40); 3632 switch (dev->dev->bus_type) {
3633#ifdef CONFIG_B43_BCMA
3634 case B43_BUS_BCMA:
3635 bcma_cc_set32(&dev->dev->bdev->bus->drv_cc,
3636 BCMA_CC_CHIPCTL, 0x40);
3637 break;
3638#endif
3639#ifdef CONFIG_B43_SSB
3640 case B43_BUS_SSB:
3641 chipco_set32(&dev->dev->sdev->bus->chipco,
3642 SSB_CHIPCO_CHIPCTL, 0x40);
3643 break;
3644#endif
3645 }
3605 } 3646 }
3606 nphy->deaf_count = 0; 3647 nphy->deaf_count = 0;
3607 b43_nphy_tables_init(dev); 3648 b43_nphy_tables_init(dev);
@@ -3639,9 +3680,9 @@ int b43_phy_initn(struct b43_wldev *dev)
3639 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20); 3680 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
3640 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20); 3681 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
3641 3682
3642 if (bus->sprom.boardflags2_lo & 0x100 || 3683 if (sprom->boardflags2_lo & 0x100 ||
3643 (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && 3684 (dev->dev->board_vendor == PCI_VENDOR_ID_APPLE &&
3644 bus->boardinfo.type == 0x8B)) 3685 dev->dev->board_type == 0x8B))
3645 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0); 3686 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
3646 else 3687 else
3647 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8); 3688 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
@@ -4026,11 +4067,24 @@ static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
4026/* http://bcm-v4.sipsolutions.net/802.11/PHY/Anacore */ 4067/* http://bcm-v4.sipsolutions.net/802.11/PHY/Anacore */
4027static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on) 4068static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
4028{ 4069{
4029 u16 val = on ? 0 : 0x7FFF; 4070 u16 override = on ? 0x0 : 0x7FFF;
4071 u16 core = on ? 0xD : 0x00FD;
4030 4072
4031 if (dev->phy.rev >= 3) 4073 if (dev->phy.rev >= 3) {
4032 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, val); 4074 if (on) {
4033 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, val); 4075 b43_phy_write(dev, B43_NPHY_AFECTL_C1, core);
4076 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, override);
4077 b43_phy_write(dev, B43_NPHY_AFECTL_C2, core);
4078 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override);
4079 } else {
4080 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, override);
4081 b43_phy_write(dev, B43_NPHY_AFECTL_C1, core);
4082 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override);
4083 b43_phy_write(dev, B43_NPHY_AFECTL_C2, core);
4084 }
4085 } else {
4086 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override);
4087 }
4034} 4088}
4035 4089
4036static int b43_nphy_op_switch_channel(struct b43_wldev *dev, 4090static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
diff --git a/drivers/net/wireless/b43/pio.c b/drivers/net/wireless/b43/pio.c
index 5af029442632..6e4228c3ed1b 100644
--- a/drivers/net/wireless/b43/pio.c
+++ b/drivers/net/wireless/b43/pio.c
@@ -111,7 +111,7 @@ static u16 index_to_pioqueue_base(struct b43_wldev *dev,
111 B43_MMIO_PIO11_BASE5, 111 B43_MMIO_PIO11_BASE5,
112 }; 112 };
113 113
114 if (dev->sdev->id.revision >= 11) { 114 if (dev->dev->core_rev >= 11) {
115 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11)); 115 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
116 return bases_rev11[index]; 116 return bases_rev11[index];
117 } 117 }
@@ -121,14 +121,14 @@ static u16 index_to_pioqueue_base(struct b43_wldev *dev,
121 121
122static u16 pio_txqueue_offset(struct b43_wldev *dev) 122static u16 pio_txqueue_offset(struct b43_wldev *dev)
123{ 123{
124 if (dev->sdev->id.revision >= 11) 124 if (dev->dev->core_rev >= 11)
125 return 0x18; 125 return 0x18;
126 return 0; 126 return 0;
127} 127}
128 128
129static u16 pio_rxqueue_offset(struct b43_wldev *dev) 129static u16 pio_rxqueue_offset(struct b43_wldev *dev)
130{ 130{
131 if (dev->sdev->id.revision >= 11) 131 if (dev->dev->core_rev >= 11)
132 return 0x38; 132 return 0x38;
133 return 8; 133 return 8;
134} 134}
@@ -144,7 +144,7 @@ static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
144 if (!q) 144 if (!q)
145 return NULL; 145 return NULL;
146 q->dev = dev; 146 q->dev = dev;
147 q->rev = dev->sdev->id.revision; 147 q->rev = dev->dev->core_rev;
148 q->mmio_base = index_to_pioqueue_base(dev, index) + 148 q->mmio_base = index_to_pioqueue_base(dev, index) +
149 pio_txqueue_offset(dev); 149 pio_txqueue_offset(dev);
150 q->index = index; 150 q->index = index;
@@ -178,7 +178,7 @@ static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
178 if (!q) 178 if (!q)
179 return NULL; 179 return NULL;
180 q->dev = dev; 180 q->dev = dev;
181 q->rev = dev->sdev->id.revision; 181 q->rev = dev->dev->core_rev;
182 q->mmio_base = index_to_pioqueue_base(dev, index) + 182 q->mmio_base = index_to_pioqueue_base(dev, index) +
183 pio_rxqueue_offset(dev); 183 pio_rxqueue_offset(dev);
184 184
diff --git a/drivers/net/wireless/b43/radio_2055.h b/drivers/net/wireless/b43/radio_2055.h
index d9bfa0f21b72..67f96122f8d8 100644
--- a/drivers/net/wireless/b43/radio_2055.h
+++ b/drivers/net/wireless/b43/radio_2055.h
@@ -251,4 +251,9 @@ struct b43_nphy_channeltab_entry_rev2 {
251void b2055_upload_inittab(struct b43_wldev *dev, 251void b2055_upload_inittab(struct b43_wldev *dev,
252 bool ghz5, bool ignore_uploadflag); 252 bool ghz5, bool ignore_uploadflag);
253 253
254/* Get the NPHY Channel Switch Table entry for a channel.
255 * Returns NULL on failure to find an entry. */
256const struct b43_nphy_channeltab_entry_rev2 *
257b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
258
254#endif /* B43_RADIO_2055_H_ */ 259#endif /* B43_RADIO_2055_H_ */
diff --git a/drivers/net/wireless/b43/radio_2056.h b/drivers/net/wireless/b43/radio_2056.h
index d601f6e7e313..d52df6be705a 100644
--- a/drivers/net/wireless/b43/radio_2056.h
+++ b/drivers/net/wireless/b43/radio_2056.h
@@ -1117,4 +1117,9 @@ struct b43_nphy_channeltab_entry_rev3 {
1117void b2056_upload_inittabs(struct b43_wldev *dev, 1117void b2056_upload_inittabs(struct b43_wldev *dev,
1118 bool ghz5, bool ignore_uploadflag); 1118 bool ghz5, bool ignore_uploadflag);
1119 1119
1120/* Get the NPHY Channel Switch Table entry for a channel.
1121 * Returns NULL on failure to find an entry. */
1122const struct b43_nphy_channeltab_entry_rev3 *
1123b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
1124
1120#endif /* B43_RADIO_2056_H_ */ 1125#endif /* B43_RADIO_2056_H_ */
diff --git a/drivers/net/wireless/b43/radio_2059.c b/drivers/net/wireless/b43/radio_2059.c
new file mode 100644
index 000000000000..f029f6e1f5d1
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2059.c
@@ -0,0 +1,174 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n 2059 radio device data tables
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include "b43.h"
24#include "radio_2059.h"
25
26#define RADIOREGS(r00, r01, r02, r03, r04, r05, r06, r07, r08, r09, \
27 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
28 r20, r21, r22, r23, r24, r25, r26, r27, r28) \
29 .radio_syn16 = r00, \
30 .radio_syn17 = r01, \
31 .radio_syn22 = r02, \
32 .radio_syn25 = r03, \
33 .radio_syn27 = r04, \
34 .radio_syn28 = r05, \
35 .radio_syn29 = r06, \
36 .radio_syn2c = r07, \
37 .radio_syn2d = r08, \
38 .radio_syn37 = r09, \
39 .radio_syn41 = r10, \
40 .radio_syn43 = r11, \
41 .radio_syn47 = r12, \
42 .radio_syn4a = r13, \
43 .radio_syn58 = r14, \
44 .radio_syn5a = r15, \
45 .radio_syn6a = r16, \
46 .radio_syn6d = r17, \
47 .radio_syn6e = r18, \
48 .radio_syn92 = r19, \
49 .radio_syn98 = r20, \
50 .radio_rxtx4a = r21, \
51 .radio_rxtx58 = r22, \
52 .radio_rxtx5a = r23, \
53 .radio_rxtx6a = r24, \
54 .radio_rxtx6d = r25, \
55 .radio_rxtx6e = r26, \
56 .radio_rxtx92 = r27, \
57 .radio_rxtx98 = r28
58
59#define PHYREGS(r0, r1, r2, r3, r4, r5) \
60 .phy_regs.bw1 = r0, \
61 .phy_regs.bw2 = r1, \
62 .phy_regs.bw3 = r2, \
63 .phy_regs.bw4 = r3, \
64 .phy_regs.bw5 = r4, \
65 .phy_regs.bw6 = r5
66
67static const struct b43_phy_ht_channeltab_e_radio2059 b43_phy_ht_channeltab_radio2059[] = {
68 { .freq = 2412,
69 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
70 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x03,
71 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
72 0x00, 0x00, 0x00, 0xf0, 0x00),
73 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
74 },
75 { .freq = 2417,
76 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
77 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x03,
78 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
79 0x00, 0x00, 0x00, 0xf0, 0x00),
80 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
81 },
82 { .freq = 2422,
83 RADIOREGS(0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76,
84 0x09, 0x0f, 0x09, 0x00, 0x09, 0x00, 0x61, 0x03,
85 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
86 0x00, 0x00, 0x00, 0xf0, 0x00),
87 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
88 },
89 { .freq = 2427,
90 RADIOREGS(0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b,
91 0x09, 0x0f, 0x09, 0x00, 0x09, 0x00, 0x61, 0x03,
92 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
93 0x00, 0x00, 0x00, 0xf0, 0x00),
94 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
95 },
96 { .freq = 2432,
97 RADIOREGS(0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80,
98 0x09, 0x0f, 0x08, 0x00, 0x08, 0x00, 0x61, 0x03,
99 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
100 0x00, 0x00, 0x00, 0xf0, 0x00),
101 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
102 },
103 { .freq = 2437,
104 RADIOREGS(0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85,
105 0x09, 0x0f, 0x08, 0x00, 0x08, 0x00, 0x61, 0x03,
106 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
107 0x00, 0x00, 0x00, 0xf0, 0x00),
108 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
109 },
110 { .freq = 2442,
111 RADIOREGS(0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a,
112 0x09, 0x0f, 0x07, 0x00, 0x07, 0x00, 0x61, 0x03,
113 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
114 0x00, 0x00, 0x00, 0xf0, 0x00),
115 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
116 },
117 { .freq = 2447,
118 RADIOREGS(0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f,
119 0x09, 0x0f, 0x07, 0x00, 0x07, 0x00, 0x61, 0x03,
120 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
121 0x00, 0x00, 0x00, 0xf0, 0x00),
122 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
123 },
124 { .freq = 2452,
125 RADIOREGS(0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94,
126 0x09, 0x0f, 0x07, 0x00, 0x07, 0x00, 0x61, 0x03,
127 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
128 0x00, 0x00, 0x00, 0xf0, 0x00),
129 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
130 },
131 { .freq = 2457,
132 RADIOREGS(0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99,
133 0x09, 0x0f, 0x06, 0x00, 0x06, 0x00, 0x61, 0x03,
134 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
135 0x00, 0x00, 0x00, 0xf0, 0x00),
136 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
137 },
138 { .freq = 2462,
139 RADIOREGS(0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e,
140 0x09, 0x0f, 0x06, 0x00, 0x06, 0x00, 0x61, 0x03,
141 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
142 0x00, 0x00, 0x00, 0xf0, 0x00),
143 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
144 },
145 { .freq = 2467,
146 RADIOREGS(0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3,
147 0x09, 0x0f, 0x05, 0x00, 0x05, 0x00, 0x61, 0x03,
148 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
149 0x00, 0x00, 0x00, 0xf0, 0x00),
150 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
151 },
152 { .freq = 2472,
153 RADIOREGS(0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8,
154 0x09, 0x0f, 0x05, 0x00, 0x05, 0x00, 0x61, 0x03,
155 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x61, 0x03,
156 0x00, 0x00, 0x00, 0xf0, 0x00),
157 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
158 },
159};
160
161const struct b43_phy_ht_channeltab_e_radio2059
162*b43_phy_ht_get_channeltab_e_r2059(struct b43_wldev *dev, u16 freq)
163{
164 const struct b43_phy_ht_channeltab_e_radio2059 *e;
165 unsigned int i;
166
167 e = b43_phy_ht_channeltab_radio2059;
168 for (i = 0; i < ARRAY_SIZE(b43_phy_ht_channeltab_radio2059); i++, e++) {
169 if (e->freq == freq)
170 return e;
171 }
172
173 return NULL;
174}
diff --git a/drivers/net/wireless/b43/radio_2059.h b/drivers/net/wireless/b43/radio_2059.h
new file mode 100644
index 000000000000..e4d69e55e9fe
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2059.h
@@ -0,0 +1,54 @@
1#ifndef B43_RADIO_2059_H_
2#define B43_RADIO_2059_H_
3
4#include <linux/types.h>
5
6#include "phy_ht.h"
7
8#define R2059_SYN 0x000
9#define R2059_TXRX0 0x400
10#define R2059_RXRX1 0x800
11#define R2059_ALL 0xC00
12
13/* Values for various registers uploaded on channel switching */
14struct b43_phy_ht_channeltab_e_radio2059 {
15 /* The channel frequency in MHz */
16 u16 freq;
17 /* Values for radio registers */
18 u8 radio_syn16;
19 u8 radio_syn17;
20 u8 radio_syn22;
21 u8 radio_syn25;
22 u8 radio_syn27;
23 u8 radio_syn28;
24 u8 radio_syn29;
25 u8 radio_syn2c;
26 u8 radio_syn2d;
27 u8 radio_syn37;
28 u8 radio_syn41;
29 u8 radio_syn43;
30 u8 radio_syn47;
31 u8 radio_syn4a;
32 u8 radio_syn58;
33 u8 radio_syn5a;
34 u8 radio_syn6a;
35 u8 radio_syn6d;
36 u8 radio_syn6e;
37 u8 radio_syn92;
38 u8 radio_syn98;
39 u8 radio_rxtx4a;
40 u8 radio_rxtx58;
41 u8 radio_rxtx5a;
42 u8 radio_rxtx6a;
43 u8 radio_rxtx6d;
44 u8 radio_rxtx6e;
45 u8 radio_rxtx92;
46 u8 radio_rxtx98;
47 /* Values for PHY registers */
48 struct b43_phy_ht_channeltab_e_phy phy_regs;
49};
50
51const struct b43_phy_ht_channeltab_e_radio2059
52*b43_phy_ht_get_channeltab_e_r2059(struct b43_wldev *dev, u16 freq);
53
54#endif /* B43_RADIO_2059_H_ */
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c
index acba64ffb330..70c2fcedd1bb 100644
--- a/drivers/net/wireless/b43/rfkill.c
+++ b/drivers/net/wireless/b43/rfkill.c
@@ -37,17 +37,16 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
37{ 37{
38 struct b43_wl *wl = hw_to_b43_wl(hw); 38 struct b43_wl *wl = hw_to_b43_wl(hw);
39 struct b43_wldev *dev = wl->current_dev; 39 struct b43_wldev *dev = wl->current_dev;
40 struct ssb_bus *bus = dev->sdev->bus;
41 bool enabled; 40 bool enabled;
42 bool brought_up = false; 41 bool brought_up = false;
43 42
44 mutex_lock(&wl->mutex); 43 mutex_lock(&wl->mutex);
45 if (unlikely(b43_status(dev) < B43_STAT_INITIALIZED)) { 44 if (unlikely(b43_status(dev) < B43_STAT_INITIALIZED)) {
46 if (ssb_bus_powerup(bus, 0)) { 45 if (b43_bus_powerup(dev, 0)) {
47 mutex_unlock(&wl->mutex); 46 mutex_unlock(&wl->mutex);
48 return; 47 return;
49 } 48 }
50 ssb_device_enable(dev->sdev, 0); 49 b43_device_enable(dev, 0);
51 brought_up = true; 50 brought_up = true;
52 } 51 }
53 52
@@ -63,8 +62,8 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
63 } 62 }
64 63
65 if (brought_up) { 64 if (brought_up) {
66 ssb_device_disable(dev->sdev, 0); 65 b43_device_disable(dev, 0);
67 ssb_bus_may_powerdown(bus); 66 b43_bus_may_powerdown(dev);
68 } 67 }
69 68
70 mutex_unlock(&wl->mutex); 69 mutex_unlock(&wl->mutex);
diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c
index cd9a24b1e438..80b0755ed3af 100644
--- a/drivers/net/wireless/b43/sdio.c
+++ b/drivers/net/wireless/b43/sdio.c
@@ -66,7 +66,7 @@ static void b43_sdio_interrupt_dispatcher(struct sdio_func *func)
66int b43_sdio_request_irq(struct b43_wldev *dev, 66int b43_sdio_request_irq(struct b43_wldev *dev,
67 void (*handler)(struct b43_wldev *dev)) 67 void (*handler)(struct b43_wldev *dev))
68{ 68{
69 struct ssb_bus *bus = dev->sdev->bus; 69 struct ssb_bus *bus = dev->dev->sdev->bus;
70 struct sdio_func *func = bus->host_sdio; 70 struct sdio_func *func = bus->host_sdio;
71 struct b43_sdio *sdio = sdio_get_drvdata(func); 71 struct b43_sdio *sdio = sdio_get_drvdata(func);
72 int err; 72 int err;
@@ -82,7 +82,7 @@ int b43_sdio_request_irq(struct b43_wldev *dev,
82 82
83void b43_sdio_free_irq(struct b43_wldev *dev) 83void b43_sdio_free_irq(struct b43_wldev *dev)
84{ 84{
85 struct ssb_bus *bus = dev->sdev->bus; 85 struct ssb_bus *bus = dev->dev->sdev->bus;
86 struct sdio_func *func = bus->host_sdio; 86 struct sdio_func *func = bus->host_sdio;
87 struct b43_sdio *sdio = sdio_get_drvdata(func); 87 struct b43_sdio *sdio = sdio_get_drvdata(func);
88 88
@@ -93,8 +93,8 @@ void b43_sdio_free_irq(struct b43_wldev *dev)
93 sdio->irq_handler = NULL; 93 sdio->irq_handler = NULL;
94} 94}
95 95
96static int b43_sdio_probe(struct sdio_func *func, 96static int __devinit b43_sdio_probe(struct sdio_func *func,
97 const struct sdio_device_id *id) 97 const struct sdio_device_id *id)
98{ 98{
99 struct b43_sdio *sdio; 99 struct b43_sdio *sdio;
100 struct sdio_func_tuple *tuple; 100 struct sdio_func_tuple *tuple;
@@ -171,7 +171,7 @@ out:
171 return error; 171 return error;
172} 172}
173 173
174static void b43_sdio_remove(struct sdio_func *func) 174static void __devexit b43_sdio_remove(struct sdio_func *func)
175{ 175{
176 struct b43_sdio *sdio = sdio_get_drvdata(func); 176 struct b43_sdio *sdio = sdio_get_drvdata(func);
177 177
diff --git a/drivers/net/wireless/b43/sysfs.c b/drivers/net/wireless/b43/sysfs.c
index 1fba982cd635..8e8431d4eb0c 100644
--- a/drivers/net/wireless/b43/sysfs.c
+++ b/drivers/net/wireless/b43/sysfs.c
@@ -140,7 +140,7 @@ static DEVICE_ATTR(interference, 0644,
140 140
141int b43_sysfs_register(struct b43_wldev *wldev) 141int b43_sysfs_register(struct b43_wldev *wldev)
142{ 142{
143 struct device *dev = wldev->sdev->dev; 143 struct device *dev = wldev->dev->dev;
144 144
145 B43_WARN_ON(b43_status(wldev) != B43_STAT_INITIALIZED); 145 B43_WARN_ON(b43_status(wldev) != B43_STAT_INITIALIZED);
146 146
@@ -149,7 +149,7 @@ int b43_sysfs_register(struct b43_wldev *wldev)
149 149
150void b43_sysfs_unregister(struct b43_wldev *wldev) 150void b43_sysfs_unregister(struct b43_wldev *wldev)
151{ 151{
152 struct device *dev = wldev->sdev->dev; 152 struct device *dev = wldev->dev->dev;
153 153
154 device_remove_file(dev, &dev_attr_interference); 154 device_remove_file(dev, &dev_attr_interference);
155} 155}
diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c
index b20311ed2093..cff187c5616d 100644
--- a/drivers/net/wireless/b43/tables_lpphy.c
+++ b/drivers/net/wireless/b43/tables_lpphy.c
@@ -2304,7 +2304,6 @@ void lpphy_rev0_1_table_init(struct b43_wldev *dev)
2304 2304
2305void lpphy_rev2plus_table_init(struct b43_wldev *dev) 2305void lpphy_rev2plus_table_init(struct b43_wldev *dev)
2306{ 2306{
2307 struct ssb_bus *bus = dev->sdev->bus;
2308 int i; 2307 int i;
2309 2308
2310 B43_WARN_ON(dev->phy.rev < 2); 2309 B43_WARN_ON(dev->phy.rev < 2);
@@ -2341,7 +2340,7 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
2341 b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0), 2340 b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
2342 ARRAY_SIZE(lpphy_papd_mult_table), lpphy_papd_mult_table); 2341 ARRAY_SIZE(lpphy_papd_mult_table), lpphy_papd_mult_table);
2343 2342
2344 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) { 2343 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) {
2345 b43_lptab_write_bulk(dev, B43_LPTAB32(13, 0), 2344 b43_lptab_write_bulk(dev, B43_LPTAB32(13, 0),
2346 ARRAY_SIZE(lpphy_a0_gain_idx_table), lpphy_a0_gain_idx_table); 2345 ARRAY_SIZE(lpphy_a0_gain_idx_table), lpphy_a0_gain_idx_table);
2347 b43_lptab_write_bulk(dev, B43_LPTAB16(14, 0), 2346 b43_lptab_write_bulk(dev, B43_LPTAB16(14, 0),
@@ -2416,12 +2415,12 @@ void lpphy_write_gain_table_bulk(struct b43_wldev *dev, int offset, int count,
2416 2415
2417void lpphy_init_tx_gain_table(struct b43_wldev *dev) 2416void lpphy_init_tx_gain_table(struct b43_wldev *dev)
2418{ 2417{
2419 struct ssb_bus *bus = dev->sdev->bus; 2418 struct ssb_sprom *sprom = dev->dev->bus_sprom;
2420 2419
2421 switch (dev->phy.rev) { 2420 switch (dev->phy.rev) {
2422 case 0: 2421 case 0:
2423 if ((bus->sprom.boardflags_hi & B43_BFH_NOPA) || 2422 if ((sprom->boardflags_hi & B43_BFH_NOPA) ||
2424 (bus->sprom.boardflags_lo & B43_BFL_HGPA)) 2423 (sprom->boardflags_lo & B43_BFL_HGPA))
2425 lpphy_write_gain_table_bulk(dev, 0, 128, 2424 lpphy_write_gain_table_bulk(dev, 0, 128,
2426 lpphy_rev0_nopa_tx_gain_table); 2425 lpphy_rev0_nopa_tx_gain_table);
2427 else if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 2426 else if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
@@ -2432,8 +2431,8 @@ void lpphy_init_tx_gain_table(struct b43_wldev *dev)
2432 lpphy_rev0_5ghz_tx_gain_table); 2431 lpphy_rev0_5ghz_tx_gain_table);
2433 break; 2432 break;
2434 case 1: 2433 case 1:
2435 if ((bus->sprom.boardflags_hi & B43_BFH_NOPA) || 2434 if ((sprom->boardflags_hi & B43_BFH_NOPA) ||
2436 (bus->sprom.boardflags_lo & B43_BFL_HGPA)) 2435 (sprom->boardflags_lo & B43_BFL_HGPA))
2437 lpphy_write_gain_table_bulk(dev, 0, 128, 2436 lpphy_write_gain_table_bulk(dev, 0, 128,
2438 lpphy_rev1_nopa_tx_gain_table); 2437 lpphy_rev1_nopa_tx_gain_table);
2439 else if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 2438 else if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
@@ -2444,7 +2443,7 @@ void lpphy_init_tx_gain_table(struct b43_wldev *dev)
2444 lpphy_rev1_5ghz_tx_gain_table); 2443 lpphy_rev1_5ghz_tx_gain_table);
2445 break; 2444 break;
2446 default: 2445 default:
2447 if (bus->sprom.boardflags_hi & B43_BFH_NOPA) 2446 if (sprom->boardflags_hi & B43_BFH_NOPA)
2448 lpphy_write_gain_table_bulk(dev, 0, 128, 2447 lpphy_write_gain_table_bulk(dev, 0, 128,
2449 lpphy_rev2_nopa_tx_gain_table); 2448 lpphy_rev2_nopa_tx_gain_table);
2450 else if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 2449 else if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
diff --git a/drivers/net/wireless/b43/tables_nphy.h b/drivers/net/wireless/b43/tables_nphy.h
index 18569367ce43..a81696bff0ed 100644
--- a/drivers/net/wireless/b43/tables_nphy.h
+++ b/drivers/net/wireless/b43/tables_nphy.h
@@ -60,16 +60,8 @@ struct nphy_gain_ctl_workaround_entry {
60struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent( 60struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
61 struct b43_wldev *dev, bool ghz5, bool ext_lna); 61 struct b43_wldev *dev, bool ghz5, bool ext_lna);
62 62
63/* Get the NPHY Channel Switch Table entry for a channel.
64 * Returns NULL on failure to find an entry. */
65const struct b43_nphy_channeltab_entry_rev2 *
66b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
67const struct b43_nphy_channeltab_entry_rev3 *
68b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
69
70 63
71/* The N-PHY tables. */ 64/* The N-PHY tables. */
72
73#define B43_NTAB_TYPEMASK 0xF0000000 65#define B43_NTAB_TYPEMASK 0xF0000000
74#define B43_NTAB_8BIT 0x10000000 66#define B43_NTAB_8BIT 0x10000000
75#define B43_NTAB_16BIT 0x20000000 67#define B43_NTAB_16BIT 0x20000000
diff --git a/drivers/net/wireless/b43/tables_phy_ht.c b/drivers/net/wireless/b43/tables_phy_ht.c
new file mode 100644
index 000000000000..603938657b15
--- /dev/null
+++ b/drivers/net/wireless/b43/tables_phy_ht.c
@@ -0,0 +1,750 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n HT-PHY data tables
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include "b43.h"
24#include "tables_phy_ht.h"
25#include "phy_common.h"
26#include "phy_ht.h"
27
28static const u16 b43_httab_0x12[] = {
29 0x0000, 0x0008, 0x000a, 0x0010, 0x0012, 0x0019,
30 0x001a, 0x001c, 0x0080, 0x0088, 0x008a, 0x0090,
31 0x0092, 0x0099, 0x009a, 0x009c, 0x0100, 0x0108,
32 0x010a, 0x0110, 0x0112, 0x0119, 0x011a, 0x011c,
33 0x0180, 0x0188, 0x018a, 0x0190, 0x0192, 0x0199,
34 0x019a, 0x019c, 0x0000, 0x0098, 0x00a0, 0x00a8,
35 0x009a, 0x00a2, 0x00aa, 0x0120, 0x0128, 0x0128,
36 0x0130, 0x0138, 0x0138, 0x0140, 0x0122, 0x012a,
37 0x012a, 0x0132, 0x013a, 0x013a, 0x0142, 0x01a8,
38 0x01b0, 0x01b8, 0x01b0, 0x01b8, 0x01c0, 0x01c8,
39 0x01c0, 0x01c8, 0x01d0, 0x01d0, 0x01d8, 0x01aa,
40 0x01b2, 0x01ba, 0x01b2, 0x01ba, 0x01c2, 0x01ca,
41 0x01c2, 0x01ca, 0x01d2, 0x01d2, 0x01da, 0x0001,
42 0x0002, 0x0004, 0x0009, 0x000c, 0x0011, 0x0014,
43 0x0018, 0x0020, 0x0021, 0x0022, 0x0024, 0x0081,
44 0x0082, 0x0084, 0x0089, 0x008c, 0x0091, 0x0094,
45 0x0098, 0x00a0, 0x00a1, 0x00a2, 0x00a4, 0x0007,
46 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
47 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
48 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
49 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
50 0x0007, 0x0007,
51};
52
53static const u16 b43_httab_0x27[] = {
54 0x0009, 0x000e, 0x0011, 0x0014, 0x0017, 0x001a,
55 0x001d, 0x0020, 0x0009, 0x000e, 0x0011, 0x0014,
56 0x0017, 0x001a, 0x001d, 0x0020, 0x0009, 0x000e,
57 0x0011, 0x0014, 0x0017, 0x001a, 0x001d, 0x0020,
58 0x0009, 0x000e, 0x0011, 0x0014, 0x0017, 0x001a,
59 0x001d, 0x0020,
60};
61
62static const u16 b43_httab_0x26[] = {
63 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
64 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
65 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
66 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
67 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
68 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
69 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
70 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
71 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
72 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
73 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
74 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
75 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
76 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
77 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
78 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
79 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
80 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
81 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
82 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
83 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
84 0x0000, 0x0000,
85};
86
87static const u32 b43_httab_0x25[] = {
88 0x00000000, 0x00000000, 0x00000000, 0x00000000,
89 0x00000000, 0x00000000, 0x00000000, 0x00000000,
90 0x00000000, 0x00000000, 0x00000000, 0x00000000,
91 0x00000000, 0x00000000, 0x00000000, 0x00000000,
92 0x00000000, 0x00000000, 0x00000000, 0x00000000,
93 0x00000000, 0x00000000, 0x00000000, 0x00000000,
94 0x00000000, 0x00000000, 0x00000000, 0x00000000,
95 0x00000000, 0x00000000, 0x00000000, 0x00000000,
96 0x00000000, 0x00000000, 0x00000000, 0x00000000,
97 0x00000000, 0x00000000, 0x00000000, 0x00000000,
98 0x00000000, 0x00000000, 0x00000000, 0x00000000,
99 0x00000000, 0x00000000, 0x00000000, 0x00000000,
100 0x00000000, 0x00000000, 0x00000000, 0x00000000,
101 0x00000000, 0x00000000, 0x00000000, 0x00000000,
102 0x00000000, 0x00000000, 0x00000000, 0x00000000,
103 0x00000000, 0x00000000, 0x00000000, 0x00000000,
104 0x00000000, 0x00000000, 0x00000000, 0x00000000,
105 0x00000000, 0x00000000, 0x00000000, 0x00000000,
106 0x00000000, 0x00000000, 0x00000000, 0x00000000,
107 0x00000000, 0x00000000, 0x00000000, 0x00000000,
108 0x00000000, 0x00000000, 0x00000000, 0x00000000,
109 0x00000000, 0x00000000, 0x00000000, 0x00000000,
110 0x00000000, 0x00000000, 0x00000000, 0x00000000,
111 0x00000000, 0x00000000, 0x00000000, 0x00000000,
112 0x00000000, 0x00000000, 0x00000000, 0x00000000,
113 0x00000000, 0x00000000, 0x00000000, 0x00000000,
114 0x00000000, 0x00000000, 0x00000000, 0x00000000,
115 0x00000000, 0x00000000, 0x00000000, 0x00000000,
116 0x00000000, 0x00000000, 0x00000000, 0x00000000,
117 0x00000000, 0x00000000, 0x00000000, 0x00000000,
118 0x00000000, 0x00000000, 0x00000000, 0x00000000,
119 0x00000000, 0x00000000, 0x00000000, 0x00000000,
120};
121
122static const u32 b43_httab_0x2f[] = {
123 0x00035700, 0x0002cc9a, 0x00026666, 0x0001581f,
124 0x0001581f, 0x0001581f, 0x0001581f, 0x0001581f,
125 0x0001581f, 0x0001581f, 0x0001581f, 0x00035700,
126 0x0002cc9a, 0x00026666, 0x0001581f, 0x0001581f,
127 0x0001581f, 0x0001581f, 0x0001581f, 0x0001581f,
128 0x0001581f, 0x0001581f,
129};
130
131static const u16 b43_httab_0x1a[] = {
132 0x0055, 0x0054, 0x0054, 0x0053, 0x0052, 0x0052,
133 0x0051, 0x0051, 0x0050, 0x004f, 0x004f, 0x004e,
134 0x004e, 0x004d, 0x004c, 0x004c, 0x004b, 0x004a,
135 0x0049, 0x0049, 0x0048, 0x0047, 0x0046, 0x0046,
136 0x0045, 0x0044, 0x0043, 0x0042, 0x0041, 0x0040,
137 0x0040, 0x003f, 0x003e, 0x003d, 0x003c, 0x003a,
138 0x0039, 0x0038, 0x0037, 0x0036, 0x0035, 0x0033,
139 0x0032, 0x0031, 0x002f, 0x002e, 0x002c, 0x002b,
140 0x0029, 0x0027, 0x0025, 0x0023, 0x0021, 0x001f,
141 0x001d, 0x001a, 0x0018, 0x0015, 0x0012, 0x000e,
142 0x000b, 0x0007, 0x0002, 0x00fd,
143};
144
145static const u16 b43_httab_0x1b[] = {
146 0x0055, 0x0054, 0x0054, 0x0053, 0x0052, 0x0052,
147 0x0051, 0x0051, 0x0050, 0x004f, 0x004f, 0x004e,
148 0x004e, 0x004d, 0x004c, 0x004c, 0x004b, 0x004a,
149 0x0049, 0x0049, 0x0048, 0x0047, 0x0046, 0x0046,
150 0x0045, 0x0044, 0x0043, 0x0042, 0x0041, 0x0040,
151 0x0040, 0x003f, 0x003e, 0x003d, 0x003c, 0x003a,
152 0x0039, 0x0038, 0x0037, 0x0036, 0x0035, 0x0033,
153 0x0032, 0x0031, 0x002f, 0x002e, 0x002c, 0x002b,
154 0x0029, 0x0027, 0x0025, 0x0023, 0x0021, 0x001f,
155 0x001d, 0x001a, 0x0018, 0x0015, 0x0012, 0x000e,
156 0x000b, 0x0007, 0x0002, 0x00fd,
157};
158
159static const u16 b43_httab_0x1c[] = {
160 0x0055, 0x0054, 0x0054, 0x0053, 0x0052, 0x0052,
161 0x0051, 0x0051, 0x0050, 0x004f, 0x004f, 0x004e,
162 0x004e, 0x004d, 0x004c, 0x004c, 0x004b, 0x004a,
163 0x0049, 0x0049, 0x0048, 0x0047, 0x0046, 0x0046,
164 0x0045, 0x0044, 0x0043, 0x0042, 0x0041, 0x0040,
165 0x0040, 0x003f, 0x003e, 0x003d, 0x003c, 0x003a,
166 0x0039, 0x0038, 0x0037, 0x0036, 0x0035, 0x0033,
167 0x0032, 0x0031, 0x002f, 0x002e, 0x002c, 0x002b,
168 0x0029, 0x0027, 0x0025, 0x0023, 0x0021, 0x001f,
169 0x001d, 0x001a, 0x0018, 0x0015, 0x0012, 0x000e,
170 0x000b, 0x0007, 0x0002, 0x00fd,
171};
172
173static const u32 b43_httab_0x1a_0xc0[] = {
174 0x5bf70044, 0x5bf70042, 0x5bf70040, 0x5bf7003e,
175 0x5bf7003c, 0x5bf7003b, 0x5bf70039, 0x5bf70037,
176 0x5bf70036, 0x5bf70034, 0x5bf70033, 0x5bf70031,
177 0x5bf70030, 0x5ba70044, 0x5ba70042, 0x5ba70040,
178 0x5ba7003e, 0x5ba7003c, 0x5ba7003b, 0x5ba70039,
179 0x5ba70037, 0x5ba70036, 0x5ba70034, 0x5ba70033,
180 0x5b770044, 0x5b770042, 0x5b770040, 0x5b77003e,
181 0x5b77003c, 0x5b77003b, 0x5b770039, 0x5b770037,
182 0x5b770036, 0x5b770034, 0x5b770033, 0x5b770031,
183 0x5b770030, 0x5b77002f, 0x5b77002d, 0x5b77002c,
184 0x5b470044, 0x5b470042, 0x5b470040, 0x5b47003e,
185 0x5b47003c, 0x5b47003b, 0x5b470039, 0x5b470037,
186 0x5b470036, 0x5b470034, 0x5b470033, 0x5b470031,
187 0x5b470030, 0x5b47002f, 0x5b47002d, 0x5b47002c,
188 0x5b47002b, 0x5b47002a, 0x5b270044, 0x5b270042,
189 0x5b270040, 0x5b27003e, 0x5b27003c, 0x5b27003b,
190 0x5b270039, 0x5b270037, 0x5b270036, 0x5b270034,
191 0x5b270033, 0x5b270031, 0x5b270030, 0x5b27002f,
192 0x5b170044, 0x5b170042, 0x5b170040, 0x5b17003e,
193 0x5b17003c, 0x5b17003b, 0x5b170039, 0x5b170037,
194 0x5b170036, 0x5b170034, 0x5b170033, 0x5b170031,
195 0x5b170030, 0x5b17002f, 0x5b17002d, 0x5b17002c,
196 0x5b17002b, 0x5b17002a, 0x5b170028, 0x5b170027,
197 0x5b170026, 0x5b170025, 0x5b170024, 0x5b170023,
198 0x5b070044, 0x5b070042, 0x5b070040, 0x5b07003e,
199 0x5b07003c, 0x5b07003b, 0x5b070039, 0x5b070037,
200 0x5b070036, 0x5b070034, 0x5b070033, 0x5b070031,
201 0x5b070030, 0x5b07002f, 0x5b07002d, 0x5b07002c,
202 0x5b07002b, 0x5b07002a, 0x5b070028, 0x5b070027,
203 0x5b070026, 0x5b070025, 0x5b070024, 0x5b070023,
204 0x5b070022, 0x5b070021, 0x5b070020, 0x5b07001f,
205 0x5b07001e, 0x5b07001d, 0x5b07001d, 0x5b07001c,
206};
207
208static const u32 b43_httab_0x1a_0x140[] = {
209 0x00000000, 0x00000000, 0x00000000, 0x00000000,
210 0x00000000, 0x00000000, 0x00000000, 0x00000000,
211 0x00000000, 0x00000000, 0x00000000, 0x00000000,
212 0x00000000, 0x00000000, 0x00000000, 0x00000000,
213 0x00000000, 0x00000000, 0x00000000, 0x00000000,
214 0x00000000, 0x00000000, 0x00000000, 0x00000000,
215 0x00000000, 0x00000000, 0x00000000, 0x00000000,
216 0x00000000, 0x00000000, 0x00000000, 0x00000000,
217 0x00000000, 0x00000000, 0x00000000, 0x00000000,
218 0x00000000, 0x00000000, 0x00000000, 0x00000000,
219 0x00000000, 0x00000000, 0x00000000, 0x00000000,
220 0x00000000, 0x00000000, 0x00000000, 0x00000000,
221 0x00000000, 0x00000000, 0x00000000, 0x00000000,
222 0x00000000, 0x00000000, 0x00000000, 0x00000000,
223 0x00000000, 0x00000000, 0x00000000, 0x00000000,
224 0x00000000, 0x00000000, 0x00000000, 0x00000000,
225 0x00000000, 0x00000000, 0x00000000, 0x00000000,
226 0x00000000, 0x00000000, 0x00000000, 0x00000000,
227 0x00000000, 0x00000000, 0x00000000, 0x00000000,
228 0x00000000, 0x00000000, 0x00000000, 0x00000000,
229 0x00000000, 0x00000000, 0x00000000, 0x00000000,
230 0x00000000, 0x00000000, 0x00000000, 0x00000000,
231 0x00000000, 0x00000000, 0x00000000, 0x00000000,
232 0x00000000, 0x00000000, 0x00000000, 0x00000000,
233 0x00000000, 0x00000000, 0x00000000, 0x00000000,
234 0x00000000, 0x00000000, 0x00000000, 0x00000000,
235 0x00000000, 0x00000000, 0x00000000, 0x00000000,
236 0x00000000, 0x00000000, 0x00000000, 0x00000000,
237 0x00000000, 0x00000000, 0x00000000, 0x00000000,
238 0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000,
241};
242
243static const u32 b43_httab_0x1b_0x140[] = {
244 0x00000000, 0x00000000, 0x00000000, 0x00000000,
245 0x00000000, 0x00000000, 0x00000000, 0x00000000,
246 0x00000000, 0x00000000, 0x00000000, 0x00000000,
247 0x00000000, 0x00000000, 0x00000000, 0x00000000,
248 0x00000000, 0x00000000, 0x00000000, 0x00000000,
249 0x00000000, 0x00000000, 0x00000000, 0x00000000,
250 0x00000000, 0x00000000, 0x00000000, 0x00000000,
251 0x00000000, 0x00000000, 0x00000000, 0x00000000,
252 0x00000000, 0x00000000, 0x00000000, 0x00000000,
253 0x00000000, 0x00000000, 0x00000000, 0x00000000,
254 0x00000000, 0x00000000, 0x00000000, 0x00000000,
255 0x00000000, 0x00000000, 0x00000000, 0x00000000,
256 0x00000000, 0x00000000, 0x00000000, 0x00000000,
257 0x00000000, 0x00000000, 0x00000000, 0x00000000,
258 0x00000000, 0x00000000, 0x00000000, 0x00000000,
259 0x00000000, 0x00000000, 0x00000000, 0x00000000,
260 0x00000000, 0x00000000, 0x00000000, 0x00000000,
261 0x00000000, 0x00000000, 0x00000000, 0x00000000,
262 0x00000000, 0x00000000, 0x00000000, 0x00000000,
263 0x00000000, 0x00000000, 0x00000000, 0x00000000,
264 0x00000000, 0x00000000, 0x00000000, 0x00000000,
265 0x00000000, 0x00000000, 0x00000000, 0x00000000,
266 0x00000000, 0x00000000, 0x00000000, 0x00000000,
267 0x00000000, 0x00000000, 0x00000000, 0x00000000,
268 0x00000000, 0x00000000, 0x00000000, 0x00000000,
269 0x00000000, 0x00000000, 0x00000000, 0x00000000,
270 0x00000000, 0x00000000, 0x00000000, 0x00000000,
271 0x00000000, 0x00000000, 0x00000000, 0x00000000,
272 0x00000000, 0x00000000, 0x00000000, 0x00000000,
273 0x00000000, 0x00000000, 0x00000000, 0x00000000,
274 0x00000000, 0x00000000, 0x00000000, 0x00000000,
275 0x00000000, 0x00000000, 0x00000000, 0x00000000,
276};
277
278static const u32 b43_httab_0x1c_0x140[] = {
279 0x00000000, 0x00000000, 0x00000000, 0x00000000,
280 0x00000000, 0x00000000, 0x00000000, 0x00000000,
281 0x00000000, 0x00000000, 0x00000000, 0x00000000,
282 0x00000000, 0x00000000, 0x00000000, 0x00000000,
283 0x00000000, 0x00000000, 0x00000000, 0x00000000,
284 0x00000000, 0x00000000, 0x00000000, 0x00000000,
285 0x00000000, 0x00000000, 0x00000000, 0x00000000,
286 0x00000000, 0x00000000, 0x00000000, 0x00000000,
287 0x00000000, 0x00000000, 0x00000000, 0x00000000,
288 0x00000000, 0x00000000, 0x00000000, 0x00000000,
289 0x00000000, 0x00000000, 0x00000000, 0x00000000,
290 0x00000000, 0x00000000, 0x00000000, 0x00000000,
291 0x00000000, 0x00000000, 0x00000000, 0x00000000,
292 0x00000000, 0x00000000, 0x00000000, 0x00000000,
293 0x00000000, 0x00000000, 0x00000000, 0x00000000,
294 0x00000000, 0x00000000, 0x00000000, 0x00000000,
295 0x00000000, 0x00000000, 0x00000000, 0x00000000,
296 0x00000000, 0x00000000, 0x00000000, 0x00000000,
297 0x00000000, 0x00000000, 0x00000000, 0x00000000,
298 0x00000000, 0x00000000, 0x00000000, 0x00000000,
299 0x00000000, 0x00000000, 0x00000000, 0x00000000,
300 0x00000000, 0x00000000, 0x00000000, 0x00000000,
301 0x00000000, 0x00000000, 0x00000000, 0x00000000,
302 0x00000000, 0x00000000, 0x00000000, 0x00000000,
303 0x00000000, 0x00000000, 0x00000000, 0x00000000,
304 0x00000000, 0x00000000, 0x00000000, 0x00000000,
305 0x00000000, 0x00000000, 0x00000000, 0x00000000,
306 0x00000000, 0x00000000, 0x00000000, 0x00000000,
307 0x00000000, 0x00000000, 0x00000000, 0x00000000,
308 0x00000000, 0x00000000, 0x00000000, 0x00000000,
309 0x00000000, 0x00000000, 0x00000000, 0x00000000,
310 0x00000000, 0x00000000, 0x00000000, 0x00000000,
311};
312
313static const u16 b43_httab_0x1a_0x1c0[] = {
314 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
315 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
316 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
317 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
318 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
319 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
320 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
321 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
322 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
323 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
324 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
325 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
326 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
327 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
328 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
329 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
330 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
331 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
332 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
333 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
334 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
335 0x0000, 0x0000,
336};
337
338static const u16 b43_httab_0x1b_0x1c0[] = {
339 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
340 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
341 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
342 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
343 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
344 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
345 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
346 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
347 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
348 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
349 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
350 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
351 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
352 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
353 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
354 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
355 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
356 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
357 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
358 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
359 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
360 0x0000, 0x0000,
361};
362
363static const u16 b43_httab_0x1c_0x1c0[] = {
364 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
365 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
366 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
367 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
368 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
369 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
370 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
371 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
372 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
373 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
374 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
375 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
376 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
377 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
378 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
379 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
380 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
381 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
382 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
383 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
384 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
385 0x0000, 0x0000,
386};
387
388static const u16 b43_httab_0x1a_0x240[] = {
389 0x0036, 0x0036, 0x0036, 0x0036, 0x0036, 0x0036,
390 0x0036, 0x0036, 0x0036, 0x0036, 0x0036, 0x0036,
391 0x0036, 0x002a, 0x002a, 0x002a, 0x002a, 0x002a,
392 0x002a, 0x002a, 0x002a, 0x002a, 0x002a, 0x002a,
393 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e,
394 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e,
395 0x001e, 0x001e, 0x001e, 0x001e, 0x000e, 0x000e,
396 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
397 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
398 0x000e, 0x000e, 0x000e, 0x000e, 0x01fc, 0x01fc,
399 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc,
400 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc,
401 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
402 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
403 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
404 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
405 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
406 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
407 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
408 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
409 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
410 0x01d6, 0x01d6,
411};
412
413static const u16 b43_httab_0x1b_0x240[] = {
414 0x0036, 0x0036, 0x0036, 0x0036, 0x0036, 0x0036,
415 0x0036, 0x0036, 0x0036, 0x0036, 0x0036, 0x0036,
416 0x0036, 0x002a, 0x002a, 0x002a, 0x002a, 0x002a,
417 0x002a, 0x002a, 0x002a, 0x002a, 0x002a, 0x002a,
418 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e,
419 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e,
420 0x001e, 0x001e, 0x001e, 0x001e, 0x000e, 0x000e,
421 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
422 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
423 0x000e, 0x000e, 0x000e, 0x000e, 0x01fc, 0x01fc,
424 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc,
425 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc,
426 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
427 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
428 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
429 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
430 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
431 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
432 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
433 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
434 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
435 0x01d6, 0x01d6,
436};
437
438static const u16 b43_httab_0x1c_0x240[] = {
439 0x0036, 0x0036, 0x0036, 0x0036, 0x0036, 0x0036,
440 0x0036, 0x0036, 0x0036, 0x0036, 0x0036, 0x0036,
441 0x0036, 0x002a, 0x002a, 0x002a, 0x002a, 0x002a,
442 0x002a, 0x002a, 0x002a, 0x002a, 0x002a, 0x002a,
443 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e,
444 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e,
445 0x001e, 0x001e, 0x001e, 0x001e, 0x000e, 0x000e,
446 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
447 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
448 0x000e, 0x000e, 0x000e, 0x000e, 0x01fc, 0x01fc,
449 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc,
450 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc, 0x01fc,
451 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
452 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
453 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
454 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee, 0x01ee,
455 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
456 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
457 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
458 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
459 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6, 0x01d6,
460 0x01d6, 0x01d6,
461};
462
463static const u32 b43_httab_0x1f[] = {
464 0x00000000, 0x00000000, 0x00016023, 0x00006028,
465 0x00034036, 0x0003402e, 0x0007203c, 0x0006e037,
466 0x00070030, 0x0009401f, 0x0009a00f, 0x000b600d,
467 0x000c8007, 0x000ce007, 0x00101fff, 0x00121ff9,
468 0x0012e004, 0x0014dffc, 0x0016dff6, 0x0018dfe9,
469 0x001b3fe5, 0x001c5fd0, 0x001ddfc2, 0x001f1fb6,
470 0x00207fa4, 0x00219f8f, 0x0022ff7d, 0x00247f6c,
471 0x0024df5b, 0x00267f4b, 0x0027df3b, 0x0029bf3b,
472 0x002b5f2f, 0x002d3f2e, 0x002f5f2a, 0x002fff15,
473 0x00315f0b, 0x0032defa, 0x0033beeb, 0x0034fed9,
474 0x00353ec5, 0x00361eb0, 0x00363e9b, 0x0036be87,
475 0x0036be70, 0x0038fe67, 0x0044beb2, 0x00513ef3,
476 0x00595f11, 0x00669f3d, 0x0078dfdf, 0x00a143aa,
477 0x01642fff, 0x0162afff, 0x01620fff, 0x0160cfff,
478 0x015f0fff, 0x015dafff, 0x015bcfff, 0x015bcfff,
479 0x015b4fff, 0x015acfff, 0x01590fff, 0x0156cfff,
480};
481
482static const u32 b43_httab_0x21[] = {
483 0x00000000, 0x00000000, 0x00016023, 0x00006028,
484 0x00034036, 0x0003402e, 0x0007203c, 0x0006e037,
485 0x00070030, 0x0009401f, 0x0009a00f, 0x000b600d,
486 0x000c8007, 0x000ce007, 0x00101fff, 0x00121ff9,
487 0x0012e004, 0x0014dffc, 0x0016dff6, 0x0018dfe9,
488 0x001b3fe5, 0x001c5fd0, 0x001ddfc2, 0x001f1fb6,
489 0x00207fa4, 0x00219f8f, 0x0022ff7d, 0x00247f6c,
490 0x0024df5b, 0x00267f4b, 0x0027df3b, 0x0029bf3b,
491 0x002b5f2f, 0x002d3f2e, 0x002f5f2a, 0x002fff15,
492 0x00315f0b, 0x0032defa, 0x0033beeb, 0x0034fed9,
493 0x00353ec5, 0x00361eb0, 0x00363e9b, 0x0036be87,
494 0x0036be70, 0x0038fe67, 0x0044beb2, 0x00513ef3,
495 0x00595f11, 0x00669f3d, 0x0078dfdf, 0x00a143aa,
496 0x01642fff, 0x0162afff, 0x01620fff, 0x0160cfff,
497 0x015f0fff, 0x015dafff, 0x015bcfff, 0x015bcfff,
498 0x015b4fff, 0x015acfff, 0x01590fff, 0x0156cfff,
499};
500
501static const u32 b43_httab_0x23[] = {
502 0x00000000, 0x00000000, 0x00016023, 0x00006028,
503 0x00034036, 0x0003402e, 0x0007203c, 0x0006e037,
504 0x00070030, 0x0009401f, 0x0009a00f, 0x000b600d,
505 0x000c8007, 0x000ce007, 0x00101fff, 0x00121ff9,
506 0x0012e004, 0x0014dffc, 0x0016dff6, 0x0018dfe9,
507 0x001b3fe5, 0x001c5fd0, 0x001ddfc2, 0x001f1fb6,
508 0x00207fa4, 0x00219f8f, 0x0022ff7d, 0x00247f6c,
509 0x0024df5b, 0x00267f4b, 0x0027df3b, 0x0029bf3b,
510 0x002b5f2f, 0x002d3f2e, 0x002f5f2a, 0x002fff15,
511 0x00315f0b, 0x0032defa, 0x0033beeb, 0x0034fed9,
512 0x00353ec5, 0x00361eb0, 0x00363e9b, 0x0036be87,
513 0x0036be70, 0x0038fe67, 0x0044beb2, 0x00513ef3,
514 0x00595f11, 0x00669f3d, 0x0078dfdf, 0x00a143aa,
515 0x01642fff, 0x0162afff, 0x01620fff, 0x0160cfff,
516 0x015f0fff, 0x015dafff, 0x015bcfff, 0x015bcfff,
517 0x015b4fff, 0x015acfff, 0x01590fff, 0x0156cfff,
518};
519
520static const u32 b43_httab_0x20[] = {
521 0x0b5e002d, 0x0ae2002f, 0x0a3b0032, 0x09a70035,
522 0x09220038, 0x08ab003b, 0x081f003f, 0x07a20043,
523 0x07340047, 0x06d2004b, 0x067a004f, 0x06170054,
524 0x05bf0059, 0x0571005e, 0x051e0064, 0x04d3006a,
525 0x04910070, 0x044c0077, 0x040f007e, 0x03d90085,
526 0x03a1008d, 0x036f0095, 0x033d009e, 0x030b00a8,
527 0x02e000b2, 0x02b900bc, 0x029200c7, 0x026d00d3,
528 0x024900e0, 0x022900ed, 0x020a00fb, 0x01ec010a,
529 0x01d20119, 0x01b7012a, 0x019e013c, 0x0188014e,
530 0x01720162, 0x015d0177, 0x0149018e, 0x013701a5,
531 0x012601be, 0x011501d8, 0x010601f4, 0x00f70212,
532 0x00e90231, 0x00dc0253, 0x00d00276, 0x00c4029b,
533 0x00b902c3, 0x00af02ed, 0x00a50319, 0x009c0348,
534 0x0093037a, 0x008b03af, 0x008303e6, 0x007c0422,
535 0x00750460, 0x006e04a3, 0x006804e9, 0x00620533,
536 0x005d0582, 0x005805d6, 0x0053062e, 0x004e068c,
537};
538
539static const u32 b43_httab_0x22[] = {
540 0x0b5e002d, 0x0ae2002f, 0x0a3b0032, 0x09a70035,
541 0x09220038, 0x08ab003b, 0x081f003f, 0x07a20043,
542 0x07340047, 0x06d2004b, 0x067a004f, 0x06170054,
543 0x05bf0059, 0x0571005e, 0x051e0064, 0x04d3006a,
544 0x04910070, 0x044c0077, 0x040f007e, 0x03d90085,
545 0x03a1008d, 0x036f0095, 0x033d009e, 0x030b00a8,
546 0x02e000b2, 0x02b900bc, 0x029200c7, 0x026d00d3,
547 0x024900e0, 0x022900ed, 0x020a00fb, 0x01ec010a,
548 0x01d20119, 0x01b7012a, 0x019e013c, 0x0188014e,
549 0x01720162, 0x015d0177, 0x0149018e, 0x013701a5,
550 0x012601be, 0x011501d8, 0x010601f4, 0x00f70212,
551 0x00e90231, 0x00dc0253, 0x00d00276, 0x00c4029b,
552 0x00b902c3, 0x00af02ed, 0x00a50319, 0x009c0348,
553 0x0093037a, 0x008b03af, 0x008303e6, 0x007c0422,
554 0x00750460, 0x006e04a3, 0x006804e9, 0x00620533,
555 0x005d0582, 0x005805d6, 0x0053062e, 0x004e068c,
556};
557
558static const u32 b43_httab_0x24[] = {
559 0x0b5e002d, 0x0ae2002f, 0x0a3b0032, 0x09a70035,
560 0x09220038, 0x08ab003b, 0x081f003f, 0x07a20043,
561 0x07340047, 0x06d2004b, 0x067a004f, 0x06170054,
562 0x05bf0059, 0x0571005e, 0x051e0064, 0x04d3006a,
563 0x04910070, 0x044c0077, 0x040f007e, 0x03d90085,
564 0x03a1008d, 0x036f0095, 0x033d009e, 0x030b00a8,
565 0x02e000b2, 0x02b900bc, 0x029200c7, 0x026d00d3,
566 0x024900e0, 0x022900ed, 0x020a00fb, 0x01ec010a,
567 0x01d20119, 0x01b7012a, 0x019e013c, 0x0188014e,
568 0x01720162, 0x015d0177, 0x0149018e, 0x013701a5,
569 0x012601be, 0x011501d8, 0x010601f4, 0x00f70212,
570 0x00e90231, 0x00dc0253, 0x00d00276, 0x00c4029b,
571 0x00b902c3, 0x00af02ed, 0x00a50319, 0x009c0348,
572 0x0093037a, 0x008b03af, 0x008303e6, 0x007c0422,
573 0x00750460, 0x006e04a3, 0x006804e9, 0x00620533,
574 0x005d0582, 0x005805d6, 0x0053062e, 0x004e068c,
575};
576
577/**************************************************
578 * R/W ops.
579 **************************************************/
580
581u32 b43_httab_read(struct b43_wldev *dev, u32 offset)
582{
583 u32 type, value;
584
585 type = offset & B43_HTTAB_TYPEMASK;
586 offset &= ~B43_HTTAB_TYPEMASK;
587 B43_WARN_ON(offset > 0xFFFF);
588
589 switch (type) {
590 case B43_HTTAB_8BIT:
591 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
592 value = b43_phy_read(dev, B43_PHY_HT_TABLE_DATALO) & 0xFF;
593 break;
594 case B43_HTTAB_16BIT:
595 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
596 value = b43_phy_read(dev, B43_PHY_HT_TABLE_DATALO);
597 break;
598 case B43_HTTAB_32BIT:
599 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
600 value = b43_phy_read(dev, B43_PHY_HT_TABLE_DATAHI);
601 value <<= 16;
602 value |= b43_phy_read(dev, B43_PHY_HT_TABLE_DATALO);
603 break;
604 default:
605 B43_WARN_ON(1);
606 value = 0;
607 }
608
609 return value;
610}
611
612void b43_httab_read_bulk(struct b43_wldev *dev, u32 offset,
613 unsigned int nr_elements, void *_data)
614{
615 u32 type;
616 u8 *data = _data;
617 unsigned int i;
618
619 type = offset & B43_HTTAB_TYPEMASK;
620 offset &= ~B43_HTTAB_TYPEMASK;
621 B43_WARN_ON(offset > 0xFFFF);
622
623 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
624
625 for (i = 0; i < nr_elements; i++) {
626 switch (type) {
627 case B43_HTTAB_8BIT:
628 *data = b43_phy_read(dev, B43_PHY_HT_TABLE_DATALO) & 0xFF;
629 data++;
630 break;
631 case B43_HTTAB_16BIT:
632 *((u16 *)data) = b43_phy_read(dev, B43_PHY_HT_TABLE_DATALO);
633 data += 2;
634 break;
635 case B43_HTTAB_32BIT:
636 *((u32 *)data) = b43_phy_read(dev, B43_PHY_HT_TABLE_DATAHI);
637 *((u32 *)data) <<= 16;
638 *((u32 *)data) |= b43_phy_read(dev, B43_PHY_HT_TABLE_DATALO);
639 data += 4;
640 break;
641 default:
642 B43_WARN_ON(1);
643 }
644 }
645}
646
647void b43_httab_write(struct b43_wldev *dev, u32 offset, u32 value)
648{
649 u32 type;
650
651 type = offset & B43_HTTAB_TYPEMASK;
652 offset &= 0xFFFF;
653
654 switch (type) {
655 case B43_HTTAB_8BIT:
656 B43_WARN_ON(value & ~0xFF);
657 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
658 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value);
659 break;
660 case B43_HTTAB_16BIT:
661 B43_WARN_ON(value & ~0xFFFF);
662 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
663 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value);
664 break;
665 case B43_HTTAB_32BIT:
666 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
667 b43_phy_write(dev, B43_PHY_HT_TABLE_DATAHI, value >> 16);
668 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value & 0xFFFF);
669 break;
670 default:
671 B43_WARN_ON(1);
672 }
673
674 return;
675}
676
677void b43_httab_write_bulk(struct b43_wldev *dev, u32 offset,
678 unsigned int nr_elements, const void *_data)
679{
680 u32 type, value;
681 const u8 *data = _data;
682 unsigned int i;
683
684 type = offset & B43_HTTAB_TYPEMASK;
685 offset &= ~B43_HTTAB_TYPEMASK;
686 B43_WARN_ON(offset > 0xFFFF);
687
688 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset);
689
690 for (i = 0; i < nr_elements; i++) {
691 switch (type) {
692 case B43_HTTAB_8BIT:
693 value = *data;
694 data++;
695 B43_WARN_ON(value & ~0xFF);
696 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value);
697 break;
698 case B43_HTTAB_16BIT:
699 value = *((u16 *)data);
700 data += 2;
701 B43_WARN_ON(value & ~0xFFFF);
702 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value);
703 break;
704 case B43_HTTAB_32BIT:
705 value = *((u32 *)data);
706 data += 4;
707 b43_phy_write(dev, B43_PHY_HT_TABLE_DATAHI, value >> 16);
708 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO,
709 value & 0xFFFF);
710 break;
711 default:
712 B43_WARN_ON(1);
713 }
714 }
715}
716
717/**************************************************
718 * Tables ops.
719 **************************************************/
720
721#define httab_upload(dev, offset, data) do { \
722 b43_httab_write_bulk(dev, offset, ARRAY_SIZE(data), data); \
723 } while (0)
724void b43_phy_ht_tables_init(struct b43_wldev *dev)
725{
726 httab_upload(dev, B43_HTTAB16(0x12, 0), b43_httab_0x12);
727 httab_upload(dev, B43_HTTAB16(0x27, 0), b43_httab_0x27);
728 httab_upload(dev, B43_HTTAB16(0x26, 0), b43_httab_0x26);
729 httab_upload(dev, B43_HTTAB32(0x25, 0), b43_httab_0x25);
730 httab_upload(dev, B43_HTTAB32(0x2f, 0), b43_httab_0x2f);
731 httab_upload(dev, B43_HTTAB16(0x1a, 0), b43_httab_0x1a);
732 httab_upload(dev, B43_HTTAB16(0x1b, 0), b43_httab_0x1b);
733 httab_upload(dev, B43_HTTAB16(0x1c, 0), b43_httab_0x1c);
734 httab_upload(dev, B43_HTTAB32(0x1a, 0x0c0), b43_httab_0x1a_0xc0);
735 httab_upload(dev, B43_HTTAB32(0x1a, 0x140), b43_httab_0x1a_0x140);
736 httab_upload(dev, B43_HTTAB32(0x1b, 0x140), b43_httab_0x1b_0x140);
737 httab_upload(dev, B43_HTTAB32(0x1c, 0x140), b43_httab_0x1c_0x140);
738 httab_upload(dev, B43_HTTAB16(0x1a, 0x1c0), b43_httab_0x1a_0x1c0);
739 httab_upload(dev, B43_HTTAB16(0x1b, 0x1c0), b43_httab_0x1b_0x1c0);
740 httab_upload(dev, B43_HTTAB16(0x1c, 0x1c0), b43_httab_0x1c_0x1c0);
741 httab_upload(dev, B43_HTTAB16(0x1a, 0x240), b43_httab_0x1a_0x240);
742 httab_upload(dev, B43_HTTAB16(0x1b, 0x240), b43_httab_0x1b_0x240);
743 httab_upload(dev, B43_HTTAB16(0x1c, 0x240), b43_httab_0x1c_0x240);
744 httab_upload(dev, B43_HTTAB32(0x1f, 0), b43_httab_0x1f);
745 httab_upload(dev, B43_HTTAB32(0x21, 0), b43_httab_0x21);
746 httab_upload(dev, B43_HTTAB32(0x23, 0), b43_httab_0x23);
747 httab_upload(dev, B43_HTTAB32(0x20, 0), b43_httab_0x20);
748 httab_upload(dev, B43_HTTAB32(0x22, 0), b43_httab_0x22);
749 httab_upload(dev, B43_HTTAB32(0x24, 0), b43_httab_0x24);
750}
diff --git a/drivers/net/wireless/b43/tables_phy_ht.h b/drivers/net/wireless/b43/tables_phy_ht.h
new file mode 100644
index 000000000000..ea3be382c894
--- /dev/null
+++ b/drivers/net/wireless/b43/tables_phy_ht.h
@@ -0,0 +1,22 @@
1#ifndef B43_TABLES_PHY_HT_H_
2#define B43_TABLES_PHY_HT_H_
3
4/* The HT-PHY tables. */
5#define B43_HTTAB_TYPEMASK 0xF0000000
6#define B43_HTTAB_8BIT 0x10000000
7#define B43_HTTAB_16BIT 0x20000000
8#define B43_HTTAB_32BIT 0x30000000
9#define B43_HTTAB8(table, offset) (((table) << 10) | (offset) | B43_HTTAB_8BIT)
10#define B43_HTTAB16(table, offset) (((table) << 10) | (offset) | B43_HTTAB_16BIT)
11#define B43_HTTAB32(table, offset) (((table) << 10) | (offset) | B43_HTTAB_32BIT)
12
13u32 b43_httab_read(struct b43_wldev *dev, u32 offset);
14void b43_httab_read_bulk(struct b43_wldev *dev, u32 offset,
15 unsigned int nr_elements, void *_data);
16void b43_httab_write(struct b43_wldev *dev, u32 offset, u32 value);
17void b43_httab_write_bulk(struct b43_wldev *dev, u32 offset,
18 unsigned int nr_elements, const void *_data);
19
20void b43_phy_ht_tables_init(struct b43_wldev *dev);
21
22#endif /* B43_TABLES_PHY_HT_H_ */
diff --git a/drivers/net/wireless/b43/tables_phy_lcn.c b/drivers/net/wireless/b43/tables_phy_lcn.c
new file mode 100644
index 000000000000..40c1d0915dd3
--- /dev/null
+++ b/drivers/net/wireless/b43/tables_phy_lcn.c
@@ -0,0 +1,34 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n LCN-PHY data tables
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include "b43.h"
24#include "tables_phy_lcn.h"
25#include "phy_common.h"
26#include "phy_lcn.h"
27
28/**************************************************
29 * Tables ops.
30 **************************************************/
31
32void b43_phy_lcn_tables_init(struct b43_wldev *dev)
33{
34}
diff --git a/drivers/net/wireless/b43/tables_phy_lcn.h b/drivers/net/wireless/b43/tables_phy_lcn.h
new file mode 100644
index 000000000000..5e31b15b81ec
--- /dev/null
+++ b/drivers/net/wireless/b43/tables_phy_lcn.h
@@ -0,0 +1,6 @@
1#ifndef B43_TABLES_PHY_LCN_H_
2#define B43_TABLES_PHY_LCN_H_
3
4void b43_phy_lcn_tables_init(struct b43_wldev *dev);
5
6#endif /* B43_TABLES_PHY_LCN_H_ */
diff --git a/drivers/net/wireless/b43/wa.c b/drivers/net/wireless/b43/wa.c
index 51fc5c61698c..9b1a038be08b 100644
--- a/drivers/net/wireless/b43/wa.c
+++ b/drivers/net/wireless/b43/wa.c
@@ -458,17 +458,15 @@ static void b43_wa_rssi_adc(struct b43_wldev *dev)
458 458
459static void b43_wa_boards_a(struct b43_wldev *dev) 459static void b43_wa_boards_a(struct b43_wldev *dev)
460{ 460{
461 struct ssb_bus *bus = dev->sdev->bus; 461 if (dev->dev->board_vendor == SSB_BOARDVENDOR_BCM &&
462 462 dev->dev->board_type == SSB_BOARD_BU4306 &&
463 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM && 463 dev->dev->board_rev < 0x30) {
464 bus->boardinfo.type == SSB_BOARD_BU4306 &&
465 bus->boardinfo.rev < 0x30) {
466 b43_phy_write(dev, 0x0010, 0xE000); 464 b43_phy_write(dev, 0x0010, 0xE000);
467 b43_phy_write(dev, 0x0013, 0x0140); 465 b43_phy_write(dev, 0x0013, 0x0140);
468 b43_phy_write(dev, 0x0014, 0x0280); 466 b43_phy_write(dev, 0x0014, 0x0280);
469 } else { 467 } else {
470 if (bus->boardinfo.type == SSB_BOARD_MP4318 && 468 if (dev->dev->board_type == SSB_BOARD_MP4318 &&
471 bus->boardinfo.rev < 0x20) { 469 dev->dev->board_rev < 0x20) {
472 b43_phy_write(dev, 0x0013, 0x0210); 470 b43_phy_write(dev, 0x0013, 0x0210);
473 b43_phy_write(dev, 0x0014, 0x0840); 471 b43_phy_write(dev, 0x0014, 0x0840);
474 } else { 472 } else {
@@ -486,19 +484,19 @@ static void b43_wa_boards_a(struct b43_wldev *dev)
486 484
487static void b43_wa_boards_g(struct b43_wldev *dev) 485static void b43_wa_boards_g(struct b43_wldev *dev)
488{ 486{
489 struct ssb_bus *bus = dev->sdev->bus; 487 struct ssb_sprom *sprom = dev->dev->bus_sprom;
490 struct b43_phy *phy = &dev->phy; 488 struct b43_phy *phy = &dev->phy;
491 489
492 if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM || 490 if (dev->dev->board_vendor != SSB_BOARDVENDOR_BCM ||
493 bus->boardinfo.type != SSB_BOARD_BU4306 || 491 dev->dev->board_type != SSB_BOARD_BU4306 ||
494 bus->boardinfo.rev != 0x17) { 492 dev->dev->board_rev != 0x17) {
495 if (phy->rev < 2) { 493 if (phy->rev < 2) {
496 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002); 494 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
497 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001); 495 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
498 } else { 496 } else {
499 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002); 497 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
500 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001); 498 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
501 if ((bus->sprom.boardflags_lo & B43_BFL_EXTLNA) && 499 if ((sprom->boardflags_lo & B43_BFL_EXTLNA) &&
502 (phy->rev >= 7)) { 500 (phy->rev >= 7)) {
503 b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF); 501 b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF);
504 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001); 502 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
@@ -510,7 +508,7 @@ static void b43_wa_boards_g(struct b43_wldev *dev)
510 } 508 }
511 } 509 }
512 } 510 }
513 if (bus->sprom.boardflags_lo & B43_BFL_FEM) { 511 if (sprom->boardflags_lo & B43_BFL_FEM) {
514 b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120); 512 b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
515 b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480); 513 b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
516 } 514 }
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c
index 8b2421e755f1..b74f25ec1ab4 100644
--- a/drivers/net/wireless/b43/xmit.c
+++ b/drivers/net/wireless/b43/xmit.c
@@ -323,8 +323,7 @@ int b43_generate_txhdr(struct b43_wldev *dev,
323 /* we give the phase1key and iv16 here, the key is stored in 323 /* we give the phase1key and iv16 here, the key is stored in
324 * shm. With that the hardware can do phase 2 and encryption. 324 * shm. With that the hardware can do phase 2 and encryption.
325 */ 325 */
326 ieee80211_get_tkip_key(info->control.hw_key, skb_frag, 326 ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key);
327 IEEE80211_TKIP_P1_KEY, (u8*)phase1key);
328 /* phase1key is in host endian. Copy to little-endian txhdr->iv. */ 327 /* phase1key is in host endian. Copy to little-endian txhdr->iv. */
329 for (i = 0; i < 5; i++) { 328 for (i = 0; i < 5; i++) {
330 txhdr->iv[i * 2 + 0] = phase1key[i]; 329 txhdr->iv[i * 2 + 0] = phase1key[i];
@@ -547,7 +546,7 @@ static s8 b43_rssi_postprocess(struct b43_wldev *dev,
547 else 546 else
548 tmp -= 3; 547 tmp -= 3;
549 } else { 548 } else {
550 if (dev->sdev->bus->sprom. 549 if (dev->dev->bus_sprom->
551 boardflags_lo & B43_BFL_RSSI) { 550 boardflags_lo & B43_BFL_RSSI) {
552 if (in_rssi > 63) 551 if (in_rssi > 63)
553 in_rssi = 63; 552 in_rssi = 63;