diff options
Diffstat (limited to 'drivers/net/wireless/b43/wa.c')
-rw-r--r-- | drivers/net/wireless/b43/wa.c | 85 |
1 files changed, 28 insertions, 57 deletions
diff --git a/drivers/net/wireless/b43/wa.c b/drivers/net/wireless/b43/wa.c index 701dff84e997..fecb86bd72ef 100644 --- a/drivers/net/wireless/b43/wa.c +++ b/drivers/net/wireless/b43/wa.c | |||
@@ -72,11 +72,9 @@ void b43_wa_initgains(struct b43_wldev *dev) | |||
72 | b43_phy_write(dev, 0x001D, 0x0F40); | 72 | b43_phy_write(dev, 0x001D, 0x0F40); |
73 | b43_phy_write(dev, 0x001F, 0x1C00); | 73 | b43_phy_write(dev, 0x001F, 0x1C00); |
74 | if (phy->rev <= 3) | 74 | if (phy->rev <= 3) |
75 | b43_phy_write(dev, 0x002A, | 75 | b43_phy_maskset(dev, 0x002A, 0x00FF, 0x0400); |
76 | (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x0400); | ||
77 | else if (phy->rev == 5) { | 76 | else if (phy->rev == 5) { |
78 | b43_phy_write(dev, 0x002A, | 77 | b43_phy_maskset(dev, 0x002A, 0x00FF, 0x1A00); |
79 | (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x1A00); | ||
80 | b43_phy_write(dev, 0x00CC, 0x2121); | 78 | b43_phy_write(dev, 0x00CC, 0x2121); |
81 | } | 79 | } |
82 | if (phy->rev >= 3) | 80 | if (phy->rev >= 3) |
@@ -271,8 +269,7 @@ static void b43_wa_2060txlna_gain(struct b43_wldev *dev) | |||
271 | 269 | ||
272 | static void b43_wa_lms(struct b43_wldev *dev) | 270 | static void b43_wa_lms(struct b43_wldev *dev) |
273 | { | 271 | { |
274 | b43_phy_write(dev, 0x0055, | 272 | b43_phy_maskset(dev, 0x0055, 0xFFC0, 0x0004); |
275 | (b43_phy_read(dev, 0x0055) & 0xFFC0) | 0x0004); | ||
276 | } | 273 | } |
277 | 274 | ||
278 | static void b43_wa_mixedsignal(struct b43_wldev *dev) | 275 | static void b43_wa_mixedsignal(struct b43_wldev *dev) |
@@ -328,8 +325,7 @@ static void b43_wa_crs_ed(struct b43_wldev *dev) | |||
328 | 325 | ||
329 | static void b43_wa_crs_thr(struct b43_wldev *dev) | 326 | static void b43_wa_crs_thr(struct b43_wldev *dev) |
330 | { | 327 | { |
331 | b43_phy_write(dev, B43_PHY_CRS0, | 328 | b43_phy_maskset(dev, B43_PHY_CRS0, ~0x03C0, 0xD000); |
332 | (b43_phy_read(dev, B43_PHY_CRS0) & ~0x03C0) | 0xD000); | ||
333 | } | 329 | } |
334 | 330 | ||
335 | static void b43_wa_crs_blank(struct b43_wldev *dev) | 331 | static void b43_wa_crs_blank(struct b43_wldev *dev) |
@@ -386,71 +382,46 @@ static void b43_wa_altagc(struct b43_wldev *dev) | |||
386 | b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25); | 382 | b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25); |
387 | } | 383 | } |
388 | 384 | ||
389 | b43_phy_write(dev, B43_PHY_CCKSHIFTBITS_WA, | 385 | b43_phy_maskset(dev, B43_PHY_CCKSHIFTBITS_WA, ~0xFF00, 0x5700); |
390 | (b43_phy_read(dev, B43_PHY_CCKSHIFTBITS_WA) & ~0xFF00) | 0x5700); | 386 | b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x007F, 0x000F); |
391 | b43_phy_write(dev, B43_PHY_OFDM(0x1A), | 387 | b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x3F80, 0x2B80); |
392 | (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x007F) | 0x000F); | 388 | b43_phy_maskset(dev, B43_PHY_ANTWRSETT, 0xF0FF, 0x0300); |
393 | b43_phy_write(dev, B43_PHY_OFDM(0x1A), | ||
394 | (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x3F80) | 0x2B80); | ||
395 | b43_phy_write(dev, B43_PHY_ANTWRSETT, | ||
396 | (b43_phy_read(dev, B43_PHY_ANTWRSETT) & 0xF0FF) | 0x0300); | ||
397 | b43_radio_write16(dev, 0x7A, | 389 | b43_radio_write16(dev, 0x7A, |
398 | b43_radio_read16(dev, 0x7A) | 0x0008); | 390 | b43_radio_read16(dev, 0x7A) | 0x0008); |
399 | b43_phy_write(dev, B43_PHY_N1P1GAIN, | 391 | b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x000F, 0x0008); |
400 | (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x000F) | 0x0008); | 392 | b43_phy_maskset(dev, B43_PHY_P1P2GAIN, ~0x0F00, 0x0600); |
401 | b43_phy_write(dev, B43_PHY_P1P2GAIN, | 393 | b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x0F00, 0x0700); |
402 | (b43_phy_read(dev, B43_PHY_P1P2GAIN) & ~0x0F00) | 0x0600); | 394 | b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x0F00, 0x0100); |
403 | b43_phy_write(dev, B43_PHY_N1N2GAIN, | ||
404 | (b43_phy_read(dev, B43_PHY_N1N2GAIN) & ~0x0F00) | 0x0700); | ||
405 | b43_phy_write(dev, B43_PHY_N1P1GAIN, | ||
406 | (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x0F00) | 0x0100); | ||
407 | if (phy->rev == 1) { | 395 | if (phy->rev == 1) { |
408 | b43_phy_write(dev, B43_PHY_N1N2GAIN, | 396 | b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x000F, 0x0007); |
409 | (b43_phy_read(dev, B43_PHY_N1N2GAIN) | ||
410 | & ~0x000F) | 0x0007); | ||
411 | } | 397 | } |
412 | b43_phy_write(dev, B43_PHY_OFDM(0x88), | 398 | b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x00FF, 0x001C); |
413 | (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x00FF) | 0x001C); | 399 | b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x3F00, 0x0200); |
414 | b43_phy_write(dev, B43_PHY_OFDM(0x88), | 400 | b43_phy_maskset(dev, B43_PHY_OFDM(0x96), ~0x00FF, 0x001C); |
415 | (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x3F00) | 0x0200); | 401 | b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x00FF, 0x0020); |
416 | b43_phy_write(dev, B43_PHY_OFDM(0x96), | 402 | b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x3F00, 0x0200); |
417 | (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0x00FF) | 0x001C); | 403 | b43_phy_maskset(dev, B43_PHY_OFDM(0x82), ~0x00FF, 0x002E); |
418 | b43_phy_write(dev, B43_PHY_OFDM(0x89), | 404 | b43_phy_maskset(dev, B43_PHY_OFDM(0x96), ~0xFF00, 0x1A00); |
419 | (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x00FF) | 0x0020); | 405 | b43_phy_maskset(dev, B43_PHY_OFDM(0x81), ~0x00FF, 0x0028); |
420 | b43_phy_write(dev, B43_PHY_OFDM(0x89), | 406 | b43_phy_maskset(dev, B43_PHY_OFDM(0x81), ~0xFF00, 0x2C00); |
421 | (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x3F00) | 0x0200); | ||
422 | b43_phy_write(dev, B43_PHY_OFDM(0x82), | ||
423 | (b43_phy_read(dev, B43_PHY_OFDM(0x82)) & ~0x00FF) | 0x002E); | ||
424 | b43_phy_write(dev, B43_PHY_OFDM(0x96), | ||
425 | (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0xFF00) | 0x1A00); | ||
426 | b43_phy_write(dev, B43_PHY_OFDM(0x81), | ||
427 | (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0x00FF) | 0x0028); | ||
428 | b43_phy_write(dev, B43_PHY_OFDM(0x81), | ||
429 | (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0xFF00) | 0x2C00); | ||
430 | if (phy->rev == 1) { | 407 | if (phy->rev == 1) { |
431 | b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B); | 408 | b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B); |
432 | b43_phy_write(dev, B43_PHY_OFDM(0x1B), | 409 | b43_phy_maskset(dev, B43_PHY_OFDM(0x1B), ~0x001E, 0x0002); |
433 | (b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E) | 0x0002); | ||
434 | } else { | 410 | } else { |
435 | b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E); | 411 | b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E); |
436 | b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A); | 412 | b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A); |
437 | b43_phy_write(dev, B43_PHY_LPFGAINCTL, | 413 | b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, ~0x000F, 0x0004); |
438 | (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0x000F) | 0x0004); | ||
439 | if (phy->rev >= 6) { | 414 | if (phy->rev >= 6) { |
440 | b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A); | 415 | b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A); |
441 | b43_phy_write(dev, B43_PHY_LPFGAINCTL, | 416 | b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, ~0xF000, 0x3000); |
442 | (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0xF000) | 0x3000); | ||
443 | } | 417 | } |
444 | } | 418 | } |
445 | b43_phy_write(dev, B43_PHY_DIVSRCHIDX, | 419 | b43_phy_maskset(dev, B43_PHY_DIVSRCHIDX, 0x8080, 0x7874); |
446 | (b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x8080) | 0x7874); | ||
447 | b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00); | 420 | b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00); |
448 | if (phy->rev == 1) { | 421 | if (phy->rev == 1) { |
449 | b43_phy_write(dev, B43_PHY_DIVP1P2GAIN, | 422 | b43_phy_maskset(dev, B43_PHY_DIVP1P2GAIN, ~0x0F00, 0x0600); |
450 | (b43_phy_read(dev, B43_PHY_DIVP1P2GAIN) & ~0x0F00) | 0x0600); | ||
451 | b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E); | 423 | b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E); |
452 | b43_phy_write(dev, B43_PHY_ANTWRSETT, | 424 | b43_phy_maskset(dev, B43_PHY_ANTWRSETT, ~0x00FF, 0x001E); |
453 | (b43_phy_read(dev, B43_PHY_ANTWRSETT) & ~0x00FF) | 0x001E); | ||
454 | b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002); | 425 | b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002); |
455 | b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0); | 426 | b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0); |
456 | b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7); | 427 | b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7); |