aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/ath
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c5
-rw-r--r--drivers/net/wireless/ath/ath6kl/cfg80211.c16
-rw-r--r--drivers/net/wireless/ath/ath9k/ahb.c22
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c33
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.h8
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_initvals.h8
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_phy.c50
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9001_initvals.h4
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_hw.c23
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_phy.c66
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h180
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_calib.c143
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c128
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_hw.c69
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c95
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9340_initvals.h100
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9485_initvals.h146
-rw-r--r--drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h132
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h76
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h162
-rw-r--r--drivers/net/wireless/ath/ath9k/beacon.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c115
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h5
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_init.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_main.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/hw-ops.h16
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c48
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h58
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c116
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h3
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c147
-rw-r--r--drivers/net/wireless/ath/ath9k/mci.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c39
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c117
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h7
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c145
-rw-r--r--drivers/net/wireless/ath/carl9170/carl9170.h19
-rw-r--r--drivers/net/wireless/ath/carl9170/fw.c37
-rw-r--r--drivers/net/wireless/ath/carl9170/fwcmd.h8
-rw-r--r--drivers/net/wireless/ath/carl9170/hw.h2
-rw-r--r--drivers/net/wireless/ath/carl9170/main.c113
-rw-r--r--drivers/net/wireless/ath/carl9170/tx.c133
-rw-r--r--drivers/net/wireless/ath/carl9170/version.h6
-rw-r--r--drivers/net/wireless/ath/regd.c37
-rw-r--r--drivers/net/wireless/ath/regd.h10
46 files changed, 1896 insertions, 774 deletions
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 30ca0a60a64c..1d264c0f5a9b 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -240,13 +240,14 @@ static const struct ath_ops ath5k_common_ops = {
240* Driver Initialization * 240* Driver Initialization *
241\***********************/ 241\***********************/
242 242
243static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) 243static void ath5k_reg_notifier(struct wiphy *wiphy,
244 struct regulatory_request *request)
244{ 245{
245 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 246 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
246 struct ath5k_hw *ah = hw->priv; 247 struct ath5k_hw *ah = hw->priv;
247 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah); 248 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
248 249
249 return ath_reg_notifier_apply(wiphy, request, regulatory); 250 ath_reg_notifier_apply(wiphy, request, regulatory);
250} 251}
251 252
252/********************\ 253/********************\
diff --git a/drivers/net/wireless/ath/ath6kl/cfg80211.c b/drivers/net/wireless/ath/ath6kl/cfg80211.c
index 5516a8ccc3c6..4225cca0f198 100644
--- a/drivers/net/wireless/ath/ath6kl/cfg80211.c
+++ b/drivers/net/wireless/ath/ath6kl/cfg80211.c
@@ -3492,8 +3492,8 @@ void ath6kl_cfg80211_stop_all(struct ath6kl *ar)
3492 ath6kl_cfg80211_stop(vif); 3492 ath6kl_cfg80211_stop(vif);
3493} 3493}
3494 3494
3495static int ath6kl_cfg80211_reg_notify(struct wiphy *wiphy, 3495static void ath6kl_cfg80211_reg_notify(struct wiphy *wiphy,
3496 struct regulatory_request *request) 3496 struct regulatory_request *request)
3497{ 3497{
3498 struct ath6kl *ar = wiphy_priv(wiphy); 3498 struct ath6kl *ar = wiphy_priv(wiphy);
3499 u32 rates[IEEE80211_NUM_BANDS]; 3499 u32 rates[IEEE80211_NUM_BANDS];
@@ -3506,17 +3506,13 @@ static int ath6kl_cfg80211_reg_notify(struct wiphy *wiphy,
3506 request->processed ? " processed" : "", 3506 request->processed ? " processed" : "",
3507 request->initiator, request->user_reg_hint_type); 3507 request->initiator, request->user_reg_hint_type);
3508 3508
3509 /*
3510 * As firmware is not able intersect regdoms, we can only listen to
3511 * cellular hints.
3512 */
3513 if (request->user_reg_hint_type != NL80211_USER_REG_HINT_CELL_BASE) 3509 if (request->user_reg_hint_type != NL80211_USER_REG_HINT_CELL_BASE)
3514 return -EOPNOTSUPP; 3510 return;
3515 3511
3516 ret = ath6kl_wmi_set_regdomain_cmd(ar->wmi, request->alpha2); 3512 ret = ath6kl_wmi_set_regdomain_cmd(ar->wmi, request->alpha2);
3517 if (ret) { 3513 if (ret) {
3518 ath6kl_err("failed to set regdomain: %d\n", ret); 3514 ath6kl_err("failed to set regdomain: %d\n", ret);
3519 return ret; 3515 return;
3520 } 3516 }
3521 3517
3522 /* 3518 /*
@@ -3536,10 +3532,8 @@ static int ath6kl_cfg80211_reg_notify(struct wiphy *wiphy,
3536 if (ret) { 3532 if (ret) {
3537 ath6kl_err("failed to start scan for a regdomain change: %d\n", 3533 ath6kl_err("failed to start scan for a regdomain change: %d\n",
3538 ret); 3534 ret);
3539 return ret; 3535 return;
3540 } 3536 }
3541
3542 return 0;
3543} 3537}
3544 3538
3545static int ath6kl_cfg80211_vif_init(struct ath6kl_vif *vif) 3539static int ath6kl_cfg80211_vif_init(struct ath6kl_vif *vif)
diff --git a/drivers/net/wireless/ath/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
index 3a69804f4c16..d1ff3c246a12 100644
--- a/drivers/net/wireless/ath/ath9k/ahb.c
+++ b/drivers/net/wireless/ath/ath9k/ahb.c
@@ -86,29 +86,25 @@ static int ath_ahb_probe(struct platform_device *pdev)
86 86
87 if (!pdev->dev.platform_data) { 87 if (!pdev->dev.platform_data) {
88 dev_err(&pdev->dev, "no platform data specified\n"); 88 dev_err(&pdev->dev, "no platform data specified\n");
89 ret = -EINVAL; 89 return -EINVAL;
90 goto err_out;
91 } 90 }
92 91
93 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 92 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
94 if (res == NULL) { 93 if (res == NULL) {
95 dev_err(&pdev->dev, "no memory resource found\n"); 94 dev_err(&pdev->dev, "no memory resource found\n");
96 ret = -ENXIO; 95 return -ENXIO;
97 goto err_out;
98 } 96 }
99 97
100 mem = ioremap_nocache(res->start, resource_size(res)); 98 mem = devm_ioremap_nocache(&pdev->dev, res->start, resource_size(res));
101 if (mem == NULL) { 99 if (mem == NULL) {
102 dev_err(&pdev->dev, "ioremap failed\n"); 100 dev_err(&pdev->dev, "ioremap failed\n");
103 ret = -ENOMEM; 101 return -ENOMEM;
104 goto err_out;
105 } 102 }
106 103
107 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 104 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
108 if (res == NULL) { 105 if (res == NULL) {
109 dev_err(&pdev->dev, "no IRQ resource found\n"); 106 dev_err(&pdev->dev, "no IRQ resource found\n");
110 ret = -ENXIO; 107 return -ENXIO;
111 goto err_iounmap;
112 } 108 }
113 109
114 irq = res->start; 110 irq = res->start;
@@ -116,8 +112,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
116 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops); 112 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
117 if (hw == NULL) { 113 if (hw == NULL) {
118 dev_err(&pdev->dev, "no memory for ieee80211_hw\n"); 114 dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
119 ret = -ENOMEM; 115 return -ENOMEM;
120 goto err_iounmap;
121 } 116 }
122 117
123 SET_IEEE80211_DEV(hw, &pdev->dev); 118 SET_IEEE80211_DEV(hw, &pdev->dev);
@@ -156,9 +151,6 @@ static int ath_ahb_probe(struct platform_device *pdev)
156 err_free_hw: 151 err_free_hw:
157 ieee80211_free_hw(hw); 152 ieee80211_free_hw(hw);
158 platform_set_drvdata(pdev, NULL); 153 platform_set_drvdata(pdev, NULL);
159 err_iounmap:
160 iounmap(mem);
161 err_out:
162 return ret; 154 return ret;
163} 155}
164 156
@@ -168,12 +160,10 @@ static int ath_ahb_remove(struct platform_device *pdev)
168 160
169 if (hw) { 161 if (hw) {
170 struct ath_softc *sc = hw->priv; 162 struct ath_softc *sc = hw->priv;
171 void __iomem *mem = sc->mem;
172 163
173 ath9k_deinit_device(sc); 164 ath9k_deinit_device(sc);
174 free_irq(sc->irq, sc); 165 free_irq(sc->irq, sc);
175 ieee80211_free_hw(sc->hw); 166 ieee80211_free_hw(sc->hw);
176 iounmap(mem);
177 platform_set_drvdata(pdev, NULL); 167 platform_set_drvdata(pdev, NULL);
178 } 168 }
179 169
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index e09ec40ce71a..7ecd40f07a74 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -152,7 +152,8 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel,
152 ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n", 152 ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
153 aniState->ofdmNoiseImmunityLevel, 153 aniState->ofdmNoiseImmunityLevel,
154 immunityLevel, BEACON_RSSI(ah), 154 immunityLevel, BEACON_RSSI(ah),
155 aniState->rssiThrLow, aniState->rssiThrHigh); 155 ATH9K_ANI_RSSI_THR_LOW,
156 ATH9K_ANI_RSSI_THR_HIGH);
156 157
157 if (!scan) 158 if (!scan)
158 aniState->ofdmNoiseImmunityLevel = immunityLevel; 159 aniState->ofdmNoiseImmunityLevel = immunityLevel;
@@ -173,7 +174,7 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel,
173 174
174 weak_sig = entry_ofdm->ofdm_weak_signal_on; 175 weak_sig = entry_ofdm->ofdm_weak_signal_on;
175 if (ah->opmode == NL80211_IFTYPE_STATION && 176 if (ah->opmode == NL80211_IFTYPE_STATION &&
176 BEACON_RSSI(ah) <= aniState->rssiThrHigh) 177 BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_HIGH)
177 weak_sig = true; 178 weak_sig = true;
178 179
179 if (aniState->ofdmWeakSigDetect != weak_sig) 180 if (aniState->ofdmWeakSigDetect != weak_sig)
@@ -216,11 +217,11 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel,
216 217
217 ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n", 218 ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
218 aniState->cckNoiseImmunityLevel, immunityLevel, 219 aniState->cckNoiseImmunityLevel, immunityLevel,
219 BEACON_RSSI(ah), aniState->rssiThrLow, 220 BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW,
220 aniState->rssiThrHigh); 221 ATH9K_ANI_RSSI_THR_HIGH);
221 222
222 if (ah->opmode == NL80211_IFTYPE_STATION && 223 if (ah->opmode == NL80211_IFTYPE_STATION &&
223 BEACON_RSSI(ah) <= aniState->rssiThrLow && 224 BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW &&
224 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI) 225 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
225 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI; 226 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
226 227
@@ -418,9 +419,6 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)
418 return; 419 return;
419 420
420 aniState = &ah->curchan->ani; 421 aniState = &ah->curchan->ani;
421 if (WARN_ON(!aniState))
422 return;
423
424 if (!ath9k_hw_ani_read_counters(ah)) 422 if (!ath9k_hw_ani_read_counters(ah))
425 return; 423 return;
426 424
@@ -489,23 +487,6 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
489} 487}
490EXPORT_SYMBOL(ath9k_hw_disable_mib_counters); 488EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
491 489
492void ath9k_hw_ani_setup(struct ath_hw *ah)
493{
494 int i;
495
496 static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
497 static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
498 static const int coarseLow[] = { -64, -64, -64, -64, -70 };
499 static const int firpwr[] = { -78, -78, -78, -78, -80 };
500
501 for (i = 0; i < 5; i++) {
502 ah->totalSizeDesired[i] = totalSizeDesired[i];
503 ah->coarse_high[i] = coarseHigh[i];
504 ah->coarse_low[i] = coarseLow[i];
505 ah->firpwr[i] = firpwr[i];
506 }
507}
508
509void ath9k_hw_ani_init(struct ath_hw *ah) 490void ath9k_hw_ani_init(struct ath_hw *ah)
510{ 491{
511 struct ath_common *common = ath9k_hw_common(ah); 492 struct ath_common *common = ath9k_hw_common(ah);
@@ -531,8 +512,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
531 512
532 ani->ofdmsTurn = true; 513 ani->ofdmsTurn = true;
533 514
534 ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
535 ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
536 ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG; 515 ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG;
537 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL; 516 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
538 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL; 517 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h
index 1485bf5e3518..dddb1361039a 100644
--- a/drivers/net/wireless/ath/ath9k/ani.h
+++ b/drivers/net/wireless/ath/ath9k/ani.h
@@ -104,7 +104,6 @@ struct ath9k_ani_default {
104}; 104};
105 105
106struct ar5416AniState { 106struct ar5416AniState {
107 struct ath9k_channel *c;
108 u8 noiseImmunityLevel; 107 u8 noiseImmunityLevel;
109 u8 ofdmNoiseImmunityLevel; 108 u8 ofdmNoiseImmunityLevel;
110 u8 cckNoiseImmunityLevel; 109 u8 cckNoiseImmunityLevel;
@@ -113,15 +112,9 @@ struct ar5416AniState {
113 u8 spurImmunityLevel; 112 u8 spurImmunityLevel;
114 u8 firstepLevel; 113 u8 firstepLevel;
115 u8 ofdmWeakSigDetect; 114 u8 ofdmWeakSigDetect;
116 u8 cckWeakSigThreshold;
117 u32 listenTime; 115 u32 listenTime;
118 int32_t rssiThrLow;
119 int32_t rssiThrHigh;
120 u32 ofdmPhyErrCount; 116 u32 ofdmPhyErrCount;
121 u32 cckPhyErrCount; 117 u32 cckPhyErrCount;
122 int16_t pktRssi[2];
123 int16_t ofdmErrRssi[2];
124 int16_t cckErrRssi[2];
125 struct ath9k_ani_default iniDef; 118 struct ath9k_ani_default iniDef;
126}; 119};
127 120
@@ -147,7 +140,6 @@ struct ar5416Stats {
147 140
148void ath9k_enable_mib_counters(struct ath_hw *ah); 141void ath9k_enable_mib_counters(struct ath_hw *ah);
149void ath9k_hw_disable_mib_counters(struct ath_hw *ah); 142void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
150void ath9k_hw_ani_setup(struct ath_hw *ah);
151void ath9k_hw_ani_init(struct ath_hw *ah); 143void ath9k_hw_ani_init(struct ath_hw *ah);
152 144
153#endif /* ANI_H */ 145#endif /* ANI_H */
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
index f81e7fc60a36..467ccfae2cee 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
@@ -466,7 +466,7 @@ static const u32 ar5416Bank0[][2] = {
466}; 466};
467 467
468static const u32 ar5416BB_RfGain[][3] = { 468static const u32 ar5416BB_RfGain[][3] = {
469 /* Addr 5G_HT20 5G_HT40 */ 469 /* Addr 5G 2G */
470 {0x00009a00, 0x00000000, 0x00000000}, 470 {0x00009a00, 0x00000000, 0x00000000},
471 {0x00009a04, 0x00000040, 0x00000040}, 471 {0x00009a04, 0x00000040, 0x00000040},
472 {0x00009a08, 0x00000080, 0x00000080}, 472 {0x00009a08, 0x00000080, 0x00000080},
@@ -546,12 +546,12 @@ static const u32 ar5416Bank2[][2] = {
546}; 546};
547 547
548static const u32 ar5416Bank3[][3] = { 548static const u32 ar5416Bank3[][3] = {
549 /* Addr 5G_HT20 5G_HT40 */ 549 /* Addr 5G 2G */
550 {0x000098f0, 0x01400018, 0x01c00018}, 550 {0x000098f0, 0x01400018, 0x01c00018},
551}; 551};
552 552
553static const u32 ar5416Bank6[][3] = { 553static const u32 ar5416Bank6[][3] = {
554 /* Addr 5G_HT20 5G_HT40 */ 554 /* Addr 5G 2G */
555 {0x0000989c, 0x00000000, 0x00000000}, 555 {0x0000989c, 0x00000000, 0x00000000},
556 {0x0000989c, 0x00000000, 0x00000000}, 556 {0x0000989c, 0x00000000, 0x00000000},
557 {0x0000989c, 0x00000000, 0x00000000}, 557 {0x0000989c, 0x00000000, 0x00000000},
@@ -588,7 +588,7 @@ static const u32 ar5416Bank6[][3] = {
588}; 588};
589 589
590static const u32 ar5416Bank6TPC[][3] = { 590static const u32 ar5416Bank6TPC[][3] = {
591 /* Addr 5G_HT20 5G_HT40 */ 591 /* Addr 5G 2G */
592 {0x0000989c, 0x00000000, 0x00000000}, 592 {0x0000989c, 0x00000000, 0x00000000},
593 {0x0000989c, 0x00000000, 0x00000000}, 593 {0x0000989c, 0x00000000, 0x00000000},
594 {0x0000989c, 0x00000000, 0x00000000}, 594 {0x0000989c, 0x00000000, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index 874186bfda41..fd69376ecc83 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -470,16 +470,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
470static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah) 470static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
471{ 471{
472#define ATH_ALLOC_BANK(bank, size) do { \ 472#define ATH_ALLOC_BANK(bank, size) do { \
473 bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \ 473 bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
474 if (!bank) { \ 474 if (!bank) \
475 ath_err(common, "Cannot allocate RF banks\n"); \ 475 goto error; \
476 return -ENOMEM; \
477 } \
478 } while (0); 476 } while (0);
479 477
480 struct ath_common *common = ath9k_hw_common(ah); 478 struct ath_common *common = ath9k_hw_common(ah);
481 479
482 BUG_ON(AR_SREV_9280_20_OR_LATER(ah)); 480 if (AR_SREV_9280_20_OR_LATER(ah))
481 return 0;
483 482
484 ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows); 483 ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
485 ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows); 484 ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
@@ -492,35 +491,12 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
492 491
493 return 0; 492 return 0;
494#undef ATH_ALLOC_BANK 493#undef ATH_ALLOC_BANK
494error:
495 ath_err(common, "Cannot allocate RF banks\n");
496 return -ENOMEM;
495} 497}
496 498
497 499
498/**
499 * ar5008_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
500 * @ah: atheros hardware struture
501 * For the external AR2133/AR5133 radios banks.
502 */
503static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah)
504{
505#define ATH_FREE_BANK(bank) do { \
506 kfree(bank); \
507 bank = NULL; \
508 } while (0);
509
510 BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
511
512 ATH_FREE_BANK(ah->analogBank0Data);
513 ATH_FREE_BANK(ah->analogBank1Data);
514 ATH_FREE_BANK(ah->analogBank2Data);
515 ATH_FREE_BANK(ah->analogBank3Data);
516 ATH_FREE_BANK(ah->analogBank6Data);
517 ATH_FREE_BANK(ah->analogBank6TPCData);
518 ATH_FREE_BANK(ah->analogBank7Data);
519 ATH_FREE_BANK(ah->bank6Temp);
520
521#undef ATH_FREE_BANK
522}
523
524/* * 500/* *
525 * ar5008_hw_set_rf_regs - programs rf registers based on EEPROM 501 * ar5008_hw_set_rf_regs - programs rf registers based on EEPROM
526 * @ah: atheros hardware structure 502 * @ah: atheros hardware structure
@@ -1380,7 +1356,7 @@ static void ar5008_hw_set_radar_conf(struct ath_hw *ah)
1380 conf->radar_inband = 8; 1356 conf->radar_inband = 8;
1381} 1357}
1382 1358
1383void ar5008_hw_attach_phy_ops(struct ath_hw *ah) 1359int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1384{ 1360{
1385 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 1361 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1386 static const u32 ar5416_cca_regs[6] = { 1362 static const u32 ar5416_cca_regs[6] = {
@@ -1391,12 +1367,15 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1391 AR_PHY_CH1_EXT_CCA, 1367 AR_PHY_CH1_EXT_CCA,
1392 AR_PHY_CH2_EXT_CCA 1368 AR_PHY_CH2_EXT_CCA
1393 }; 1369 };
1370 int ret;
1371
1372 ret = ar5008_hw_rf_alloc_ext_banks(ah);
1373 if (ret)
1374 return ret;
1394 1375
1395 priv_ops->rf_set_freq = ar5008_hw_set_channel; 1376 priv_ops->rf_set_freq = ar5008_hw_set_channel;
1396 priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate; 1377 priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
1397 1378
1398 priv_ops->rf_alloc_ext_banks = ar5008_hw_rf_alloc_ext_banks;
1399 priv_ops->rf_free_ext_banks = ar5008_hw_rf_free_ext_banks;
1400 priv_ops->set_rf_regs = ar5008_hw_set_rf_regs; 1379 priv_ops->set_rf_regs = ar5008_hw_set_rf_regs;
1401 priv_ops->set_channel_regs = ar5008_hw_set_channel_regs; 1380 priv_ops->set_channel_regs = ar5008_hw_set_channel_regs;
1402 priv_ops->init_bb = ar5008_hw_init_bb; 1381 priv_ops->init_bb = ar5008_hw_init_bb;
@@ -1421,4 +1400,5 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1421 ar5008_hw_set_nf_limits(ah); 1400 ar5008_hw_set_nf_limits(ah);
1422 ar5008_hw_set_radar_conf(ah); 1401 ar5008_hw_set_radar_conf(ah);
1423 memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs)); 1402 memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs));
1403 return 0;
1424} 1404}
diff --git a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
index ea4a230997ac..59524e1d4678 100644
--- a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
@@ -460,7 +460,7 @@ static const u32 ar5416Common_9100[][2] = {
460}; 460};
461 461
462static const u32 ar5416Bank6_9100[][3] = { 462static const u32 ar5416Bank6_9100[][3] = {
463 /* Addr 5G_HT20 5G_HT40 */ 463 /* Addr 5G 2G */
464 {0x0000989c, 0x00000000, 0x00000000}, 464 {0x0000989c, 0x00000000, 0x00000000},
465 {0x0000989c, 0x00000000, 0x00000000}, 465 {0x0000989c, 0x00000000, 0x00000000},
466 {0x0000989c, 0x00000000, 0x00000000}, 466 {0x0000989c, 0x00000000, 0x00000000},
@@ -497,7 +497,7 @@ static const u32 ar5416Bank6_9100[][3] = {
497}; 497};
498 498
499static const u32 ar5416Bank6TPC_9100[][3] = { 499static const u32 ar5416Bank6TPC_9100[][3] = {
500 /* Addr 5G_HT20 5G_HT40 */ 500 /* Addr 5G 2G */
501 {0x0000989c, 0x00000000, 0x00000000}, 501 {0x0000989c, 0x00000000, 0x00000000},
502 {0x0000989c, 0x00000000, 0x00000000}, 502 {0x0000989c, 0x00000000, 0x00000000},
503 {0x0000989c, 0x00000000, 0x00000000}, 503 {0x0000989c, 0x00000000, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index 648da3e885e9..f053d978540e 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -23,13 +23,13 @@
23 23
24/* General hardware code for the A5008/AR9001/AR9002 hadware families */ 24/* General hardware code for the A5008/AR9001/AR9002 hadware families */
25 25
26static void ar9002_hw_init_mode_regs(struct ath_hw *ah) 26static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
27{ 27{
28 if (AR_SREV_9271(ah)) { 28 if (AR_SREV_9271(ah)) {
29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271); 29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271); 30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg); 31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
32 return; 32 return 0;
33 } 33 }
34 34
35 if (ah->config.pcie_clock_req) 35 if (ah->config.pcie_clock_req)
@@ -102,9 +102,9 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
102 u32 size = sizeof(u32) * addac->ia_rows * addac->ia_columns; 102 u32 size = sizeof(u32) * addac->ia_rows * addac->ia_columns;
103 u32 *data; 103 u32 *data;
104 104
105 data = kmalloc(size, GFP_KERNEL); 105 data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
106 if (!data) 106 if (!data)
107 return; 107 return -ENOMEM;
108 108
109 memcpy(data, addac->ia_array, size); 109 memcpy(data, addac->ia_array, size);
110 addac->ia_array = data; 110 addac->ia_array = data;
@@ -120,6 +120,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
120 INIT_INI_ARRAY(&ah->iniCckfirJapan2484, 120 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
121 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1); 121 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
122 } 122 }
123 return 0;
123} 124}
124 125
125static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah) 126static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
@@ -409,22 +410,30 @@ void ar9002_hw_enable_async_fifo(struct ath_hw *ah)
409} 410}
410 411
411/* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */ 412/* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */
412void ar9002_hw_attach_ops(struct ath_hw *ah) 413int ar9002_hw_attach_ops(struct ath_hw *ah)
413{ 414{
414 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 415 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
415 struct ath_hw_ops *ops = ath9k_hw_ops(ah); 416 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
417 int ret;
418
419 ret = ar9002_hw_init_mode_regs(ah);
420 if (ret)
421 return ret;
416 422
417 priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
418 priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs; 423 priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
419 424
420 ops->config_pci_powersave = ar9002_hw_configpcipowersave; 425 ops->config_pci_powersave = ar9002_hw_configpcipowersave;
421 426
422 ar5008_hw_attach_phy_ops(ah); 427 ret = ar5008_hw_attach_phy_ops(ah);
428 if (ret)
429 return ret;
430
423 if (AR_SREV_9280_20_OR_LATER(ah)) 431 if (AR_SREV_9280_20_OR_LATER(ah))
424 ar9002_hw_attach_phy_ops(ah); 432 ar9002_hw_attach_phy_ops(ah);
425 433
426 ar9002_hw_attach_calib_ops(ah); 434 ar9002_hw_attach_calib_ops(ah);
427 ar9002_hw_attach_mac_ops(ah); 435 ar9002_hw_attach_mac_ops(ah);
436 return 0;
428} 437}
429 438
430void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan) 439void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan)
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
index 846dd7974eb8..f4003512d8d5 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
@@ -555,14 +555,73 @@ static void ar9002_hw_antdiv_comb_conf_set(struct ath_hw *ah,
555 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); 555 REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
556} 556}
557 557
558static void ar9002_hw_spectral_scan_config(struct ath_hw *ah,
559 struct ath_spec_scan *param)
560{
561 u8 count;
562
563 if (!param->enabled) {
564 REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
565 AR_PHY_SPECTRAL_SCAN_ENABLE);
566 return;
567 }
568 REG_SET_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_FFT_ENA);
569 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN, AR_PHY_SPECTRAL_SCAN_ENABLE);
570
571 if (param->short_repeat)
572 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
573 AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
574 else
575 REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
576 AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
577
578 /* on AR92xx, the highest bit of count will make the the chip send
579 * spectral samples endlessly. Check if this really was intended,
580 * and fix otherwise.
581 */
582 count = param->count;
583 if (param->endless)
584 count = 0x80;
585 else if (count & 0x80)
586 count = 0x7f;
587
588 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
589 AR_PHY_SPECTRAL_SCAN_COUNT, count);
590 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
591 AR_PHY_SPECTRAL_SCAN_PERIOD, param->period);
592 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
593 AR_PHY_SPECTRAL_SCAN_FFT_PERIOD, param->fft_period);
594
595 return;
596}
597
598static void ar9002_hw_spectral_scan_trigger(struct ath_hw *ah)
599{
600 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN, AR_PHY_SPECTRAL_SCAN_ENABLE);
601 /* Activate spectral scan */
602 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
603 AR_PHY_SPECTRAL_SCAN_ACTIVE);
604}
605
606static void ar9002_hw_spectral_scan_wait(struct ath_hw *ah)
607{
608 struct ath_common *common = ath9k_hw_common(ah);
609
610 /* Poll for spectral scan complete */
611 if (!ath9k_hw_wait(ah, AR_PHY_SPECTRAL_SCAN,
612 AR_PHY_SPECTRAL_SCAN_ACTIVE,
613 0, AH_WAIT_TIMEOUT)) {
614 ath_err(common, "spectral scan wait failed\n");
615 return;
616 }
617}
618
558void ar9002_hw_attach_phy_ops(struct ath_hw *ah) 619void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
559{ 620{
560 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 621 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
561 struct ath_hw_ops *ops = ath9k_hw_ops(ah); 622 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
562 623
563 priv_ops->set_rf_regs = NULL; 624 priv_ops->set_rf_regs = NULL;
564 priv_ops->rf_alloc_ext_banks = NULL;
565 priv_ops->rf_free_ext_banks = NULL;
566 priv_ops->rf_set_freq = ar9002_hw_set_channel; 625 priv_ops->rf_set_freq = ar9002_hw_set_channel;
567 priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate; 626 priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate;
568 priv_ops->olc_init = ar9002_olc_init; 627 priv_ops->olc_init = ar9002_olc_init;
@@ -571,6 +630,9 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
571 630
572 ops->antdiv_comb_conf_get = ar9002_hw_antdiv_comb_conf_get; 631 ops->antdiv_comb_conf_get = ar9002_hw_antdiv_comb_conf_get;
573 ops->antdiv_comb_conf_set = ar9002_hw_antdiv_comb_conf_set; 632 ops->antdiv_comb_conf_set = ar9002_hw_antdiv_comb_conf_set;
633 ops->spectral_scan_config = ar9002_hw_spectral_scan_config;
634 ops->spectral_scan_trigger = ar9002_hw_spectral_scan_trigger;
635 ops->spectral_scan_wait = ar9002_hw_spectral_scan_wait;
574 636
575 ar9002_hw_set_nf_limits(ah); 637 ar9002_hw_set_nf_limits(ah);
576} 638}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
index 262e1e036fd7..db5ffada2217 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
@@ -744,6 +744,186 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = {
744 {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 744 {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
745}; 745};
746 746
747static const u32 ar9300Modes_mixed_ob_db_tx_gain_table_2p2[][5] = {
748 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
749 {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
750 {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
751 {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
752 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
753 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
754 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
755 {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
756 {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
757 {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
758 {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
759 {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
760 {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
761 {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
762 {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
763 {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
764 {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04},
765 {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20},
766 {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20},
767 {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
768 {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
769 {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
770 {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
771 {0x0000a544, 0x52022470, 0x52022470, 0x3b001861, 0x3b001861},
772 {0x0000a548, 0x55022490, 0x55022490, 0x3e001a81, 0x3e001a81},
773 {0x0000a54c, 0x59022492, 0x59022492, 0x42001a83, 0x42001a83},
774 {0x0000a550, 0x5d022692, 0x5d022692, 0x44001c84, 0x44001c84},
775 {0x0000a554, 0x61022892, 0x61022892, 0x48001ce3, 0x48001ce3},
776 {0x0000a558, 0x65024890, 0x65024890, 0x4c001ce5, 0x4c001ce5},
777 {0x0000a55c, 0x69024892, 0x69024892, 0x50001ce9, 0x50001ce9},
778 {0x0000a560, 0x6e024c92, 0x6e024c92, 0x54001ceb, 0x54001ceb},
779 {0x0000a564, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
780 {0x0000a568, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
781 {0x0000a56c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
782 {0x0000a570, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
783 {0x0000a574, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
784 {0x0000a578, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
785 {0x0000a57c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
786 {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
787 {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
788 {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
789 {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
790 {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
791 {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
792 {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402},
793 {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
794 {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
795 {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
796 {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
797 {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
798 {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
799 {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
800 {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
801 {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
802 {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
803 {0x0000a5c4, 0x52822470, 0x52822470, 0x3b801861, 0x3b801861},
804 {0x0000a5c8, 0x55822490, 0x55822490, 0x3e801a81, 0x3e801a81},
805 {0x0000a5cc, 0x59822492, 0x59822492, 0x42801a83, 0x42801a83},
806 {0x0000a5d0, 0x5d822692, 0x5d822692, 0x44801c84, 0x44801c84},
807 {0x0000a5d4, 0x61822892, 0x61822892, 0x48801ce3, 0x48801ce3},
808 {0x0000a5d8, 0x65824890, 0x65824890, 0x4c801ce5, 0x4c801ce5},
809 {0x0000a5dc, 0x69824892, 0x69824892, 0x50801ce9, 0x50801ce9},
810 {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x54801ceb, 0x54801ceb},
811 {0x0000a5e4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
812 {0x0000a5e8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
813 {0x0000a5ec, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
814 {0x0000a5f0, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
815 {0x0000a5f4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
816 {0x0000a5f8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
817 {0x0000a5fc, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
818 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
819 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
820 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
821 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
822 {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
823 {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
824 {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
825 {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
826 {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
827 {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
828 {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
829 {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
830 {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
831 {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
832 {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
833 {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
834 {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
835 {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
836 {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
837 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
838 {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
839 {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
840 {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
841 {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
842 {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
843 {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
844 {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
845 {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
846 {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
847 {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
848 {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
849 {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
850 {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
851};
852
853static const u32 ar9300Modes_type5_tx_gain_table_2p2[][5] = {
854 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
855 {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
856 {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
857 {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
858 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
859 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
860 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
861 {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
862 {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
863 {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
864 {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
865 {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
866 {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
867 {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
868 {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
869 {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
870 {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
871 {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
872 {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
873 {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
874 {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
875 {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
876 {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
877 {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
878 {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
879 {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
880 {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
881 {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
882 {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
883 {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
884 {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
885 {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
886 {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
887 {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
888 {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
889 {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
890 {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
891 {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
892 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
893 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
894 {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
895 {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
896 {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
897 {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
898 {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
899 {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
900 {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
901 {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
902 {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
903 {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
904 {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
905 {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
906 {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
907 {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
908 {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
909 {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
910 {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
911 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
912 {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
913 {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
914 {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
915 {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
916 {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
917 {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
918 {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
919 {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
920 {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
921 {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
922 {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
923 {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
924 {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
925};
926
747static const u32 ar9300Common_rx_gain_table_2p2[][2] = { 927static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
748 /* Addr allmodes */ 928 /* Addr allmodes */
749 {0x0000a000, 0x00010000}, 929 {0x0000a000, 0x00010000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 56317b0fb6b6..4cc13940c895 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -32,7 +32,6 @@ struct coeff {
32 32
33enum ar9003_cal_types { 33enum ar9003_cal_types {
34 IQ_MISMATCH_CAL = BIT(0), 34 IQ_MISMATCH_CAL = BIT(0),
35 TEMP_COMP_CAL = BIT(1),
36}; 35};
37 36
38static void ar9003_hw_setup_calibration(struct ath_hw *ah, 37static void ar9003_hw_setup_calibration(struct ath_hw *ah,
@@ -49,7 +48,7 @@ static void ar9003_hw_setup_calibration(struct ath_hw *ah,
49 */ 48 */
50 REG_RMW_FIELD(ah, AR_PHY_TIMING4, 49 REG_RMW_FIELD(ah, AR_PHY_TIMING4,
51 AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX, 50 AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
52 currCal->calData->calCountMax); 51 currCal->calData->calCountMax);
53 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); 52 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
54 53
55 ath_dbg(common, CALIBRATE, 54 ath_dbg(common, CALIBRATE,
@@ -58,14 +57,8 @@ static void ar9003_hw_setup_calibration(struct ath_hw *ah,
58 /* Kick-off cal */ 57 /* Kick-off cal */
59 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL); 58 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
60 break; 59 break;
61 case TEMP_COMP_CAL: 60 default:
62 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM, 61 ath_err(common, "Invalid calibration type\n");
63 AR_PHY_65NM_CH0_THERM_LOCAL, 1);
64 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
65 AR_PHY_65NM_CH0_THERM_START, 1);
66
67 ath_dbg(common, CALIBRATE,
68 "starting Temperature Compensation Calibration\n");
69 break; 62 break;
70 } 63 }
71} 64}
@@ -323,6 +316,14 @@ static const struct ath9k_percal_data iq_cal_single_sample = {
323static void ar9003_hw_init_cal_settings(struct ath_hw *ah) 316static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
324{ 317{
325 ah->iq_caldata.calData = &iq_cal_single_sample; 318 ah->iq_caldata.calData = &iq_cal_single_sample;
319
320 if (AR_SREV_9300_20_OR_LATER(ah)) {
321 ah->enabled_cals |= TX_IQ_CAL;
322 if (AR_SREV_9485_OR_LATER(ah) && !AR_SREV_9340(ah))
323 ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
324 }
325
326 ah->supp_cals = IQ_MISMATCH_CAL;
326} 327}
327 328
328/* 329/*
@@ -959,22 +960,68 @@ static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
959 AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0); 960 AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0);
960} 961}
961 962
963static void ar9003_hw_do_manual_peak_cal(struct ath_hw *ah,
964 struct ath9k_channel *chan)
965{
966 int i;
967
968 if (!AR_SREV_9462(ah) && !AR_SREV_9565(ah))
969 return;
970
971 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
972 if (!(ah->rxchainmask & (1 << i)))
973 continue;
974 ar9003_hw_manual_peak_cal(ah, i, IS_CHAN_2GHZ(chan));
975 }
976}
977
978static void ar9003_hw_cl_cal_post_proc(struct ath_hw *ah, bool is_reusable)
979{
980 u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
981 AR_PHY_CL_TAB_1,
982 AR_PHY_CL_TAB_2 };
983 struct ath9k_hw_cal_data *caldata = ah->caldata;
984 bool txclcal_done = false;
985 int i, j;
986
987 if (!caldata || !(ah->enabled_cals & TX_CL_CAL))
988 return;
989
990 txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
991 AR_PHY_AGC_CONTROL_CLC_SUCCESS);
992
993 if (caldata->done_txclcal_once) {
994 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
995 if (!(ah->txchainmask & (1 << i)))
996 continue;
997 for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
998 REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
999 caldata->tx_clcal[i][j]);
1000 }
1001 } else if (is_reusable && txclcal_done) {
1002 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1003 if (!(ah->txchainmask & (1 << i)))
1004 continue;
1005 for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1006 caldata->tx_clcal[i][j] =
1007 REG_READ(ah, CL_TAB_ENTRY(cl_idx[i]));
1008 }
1009 caldata->done_txclcal_once = true;
1010 }
1011}
1012
962static bool ar9003_hw_init_cal(struct ath_hw *ah, 1013static bool ar9003_hw_init_cal(struct ath_hw *ah,
963 struct ath9k_channel *chan) 1014 struct ath9k_channel *chan)
964{ 1015{
965 struct ath_common *common = ath9k_hw_common(ah); 1016 struct ath_common *common = ath9k_hw_common(ah);
966 struct ath9k_hw_cal_data *caldata = ah->caldata; 1017 struct ath9k_hw_cal_data *caldata = ah->caldata;
967 bool txiqcal_done = false, txclcal_done = false; 1018 bool txiqcal_done = false;
968 bool is_reusable = true, status = true; 1019 bool is_reusable = true, status = true;
969 bool run_rtt_cal = false, run_agc_cal; 1020 bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
970 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT); 1021 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
971 u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL | 1022 u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
972 AR_PHY_AGC_CONTROL_FLTR_CAL | 1023 AR_PHY_AGC_CONTROL_FLTR_CAL |
973 AR_PHY_AGC_CONTROL_PKDET_CAL; 1024 AR_PHY_AGC_CONTROL_PKDET_CAL;
974 int i, j;
975 u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
976 AR_PHY_CL_TAB_1,
977 AR_PHY_CL_TAB_2 };
978 1025
979 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); 1026 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
980 1027
@@ -1014,7 +1061,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
1014 } 1061 }
1015 } 1062 }
1016 1063
1017 if (!(ah->enabled_cals & TX_IQ_CAL)) 1064 if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
1065 !(ah->enabled_cals & TX_IQ_CAL))
1018 goto skip_tx_iqcal; 1066 goto skip_tx_iqcal;
1019 1067
1020 /* Do Tx IQ Calibration */ 1068 /* Do Tx IQ Calibration */
@@ -1034,21 +1082,22 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
1034 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, 1082 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
1035 AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL); 1083 AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
1036 txiqcal_done = run_agc_cal = true; 1084 txiqcal_done = run_agc_cal = true;
1037 goto skip_tx_iqcal; 1085 } else if (caldata && !caldata->done_txiqcal_once) {
1038 } else if (caldata && !caldata->done_txiqcal_once)
1039 run_agc_cal = true; 1086 run_agc_cal = true;
1087 sep_iq_cal = true;
1088 }
1040 1089
1090skip_tx_iqcal:
1041 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) 1091 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
1042 ar9003_mci_init_cal_req(ah, &is_reusable); 1092 ar9003_mci_init_cal_req(ah, &is_reusable);
1043 1093
1044 if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) { 1094 if (sep_iq_cal) {
1045 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah); 1095 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
1046 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); 1096 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
1047 udelay(5); 1097 udelay(5);
1048 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); 1098 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1049 } 1099 }
1050 1100
1051skip_tx_iqcal:
1052 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) { 1101 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
1053 /* Calibrate the AGC */ 1102 /* Calibrate the AGC */
1054 REG_WRITE(ah, AR_PHY_AGC_CONTROL, 1103 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
@@ -1059,14 +1108,8 @@ skip_tx_iqcal:
1059 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, 1108 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
1060 AR_PHY_AGC_CONTROL_CAL, 1109 AR_PHY_AGC_CONTROL_CAL,
1061 0, AH_WAIT_TIMEOUT); 1110 0, AH_WAIT_TIMEOUT);
1062 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { 1111
1063 for (i = 0; i < AR9300_MAX_CHAINS; i++) { 1112 ar9003_hw_do_manual_peak_cal(ah, chan);
1064 if (!(ah->rxchainmask & (1 << i)))
1065 continue;
1066 ar9003_hw_manual_peak_cal(ah, i,
1067 IS_CHAN_2GHZ(chan));
1068 }
1069 }
1070 } 1113 }
1071 1114
1072 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) 1115 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
@@ -1091,31 +1134,7 @@ skip_tx_iqcal:
1091 else if (caldata && caldata->done_txiqcal_once) 1134 else if (caldata && caldata->done_txiqcal_once)
1092 ar9003_hw_tx_iq_cal_reload(ah); 1135 ar9003_hw_tx_iq_cal_reload(ah);
1093 1136
1094#define CL_TAB_ENTRY(reg_base) (reg_base + (4 * j)) 1137 ar9003_hw_cl_cal_post_proc(ah, is_reusable);
1095 if (caldata && (ah->enabled_cals & TX_CL_CAL)) {
1096 txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
1097 AR_PHY_AGC_CONTROL_CLC_SUCCESS);
1098 if (caldata->done_txclcal_once) {
1099 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1100 if (!(ah->txchainmask & (1 << i)))
1101 continue;
1102 for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1103 REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
1104 caldata->tx_clcal[i][j]);
1105 }
1106 } else if (is_reusable && txclcal_done) {
1107 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1108 if (!(ah->txchainmask & (1 << i)))
1109 continue;
1110 for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
1111 caldata->tx_clcal[i][j] =
1112 REG_READ(ah,
1113 CL_TAB_ENTRY(cl_idx[i]));
1114 }
1115 caldata->done_txclcal_once = true;
1116 }
1117 }
1118#undef CL_TAB_ENTRY
1119 1138
1120 if (run_rtt_cal && caldata) { 1139 if (run_rtt_cal && caldata) {
1121 if (is_reusable) { 1140 if (is_reusable) {
@@ -1133,20 +1152,10 @@ skip_tx_iqcal:
1133 1152
1134 /* Initialize list pointers */ 1153 /* Initialize list pointers */
1135 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; 1154 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
1136 ah->supp_cals = IQ_MISMATCH_CAL;
1137
1138 if (ah->supp_cals & IQ_MISMATCH_CAL) {
1139 INIT_CAL(&ah->iq_caldata);
1140 INSERT_CAL(ah, &ah->iq_caldata);
1141 ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
1142 }
1143 1155
1144 if (ah->supp_cals & TEMP_COMP_CAL) { 1156 INIT_CAL(&ah->iq_caldata);
1145 INIT_CAL(&ah->tempCompCalData); 1157 INSERT_CAL(ah, &ah->iq_caldata);
1146 INSERT_CAL(ah, &ah->tempCompCalData); 1158 ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
1147 ath_dbg(common, CALIBRATE,
1148 "enabling Temperature Compensation Calibration\n");
1149 }
1150 1159
1151 /* Initialize current pointer to first element in list */ 1160 /* Initialize current pointer to first element in list */
1152 ah->cal_list_curr = ah->cal_list; 1161 ah->cal_list_curr = ah->cal_list;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 562186ca9b52..881e989ea470 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
4586 return 0; 4586 return 0;
4587} 4587}
4588 4588
4589static int ar9003_hw_power_control_override(struct ath_hw *ah, 4589static void ar9003_hw_power_control_override(struct ath_hw *ah,
4590 int frequency, 4590 int frequency,
4591 int *correction, 4591 int *correction,
4592 int *voltage, int *temperature) 4592 int *voltage, int *temperature)
4593{ 4593{
4594 int tempSlope = 0; 4594 int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
4595 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; 4595 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
4596 int f[8], t[8], i; 4596 int f[8], t[8], t1[3], t2[3], i;
4597 4597
4598 REG_RMW(ah, AR_PHY_TPC_11_B0, 4598 REG_RMW(ah, AR_PHY_TPC_11_B0,
4599 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S), 4599 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
@@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
4624 * enable temperature compensation 4624 * enable temperature compensation
4625 * Need to use register names 4625 * Need to use register names
4626 */ 4626 */
4627 if (frequency < 4000) 4627 if (frequency < 4000) {
4628 tempSlope = eep->modalHeader2G.tempSlope; 4628 temp_slope = eep->modalHeader2G.tempSlope;
4629 else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) { 4629 } else {
4630 for (i = 0; i < 8; i++) { 4630 if (AR_SREV_9550(ah)) {
4631 t[i] = eep->base_ext1.tempslopextension[i]; 4631 t[0] = eep->base_ext1.tempslopextension[2];
4632 f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0); 4632 t1[0] = eep->base_ext1.tempslopextension[3];
4633 t2[0] = eep->base_ext1.tempslopextension[4];
4634 f[0] = 5180;
4635
4636 t[1] = eep->modalHeader5G.tempSlope;
4637 t1[1] = eep->base_ext1.tempslopextension[0];
4638 t2[1] = eep->base_ext1.tempslopextension[1];
4639 f[1] = 5500;
4640
4641 t[2] = eep->base_ext1.tempslopextension[5];
4642 t1[2] = eep->base_ext1.tempslopextension[6];
4643 t2[2] = eep->base_ext1.tempslopextension[7];
4644 f[2] = 5785;
4645
4646 temp_slope = ar9003_hw_power_interpolate(frequency,
4647 f, t, 3);
4648 temp_slope1 = ar9003_hw_power_interpolate(frequency,
4649 f, t1, 3);
4650 temp_slope2 = ar9003_hw_power_interpolate(frequency,
4651 f, t2, 3);
4652
4653 goto tempslope;
4633 } 4654 }
4634 tempSlope = ar9003_hw_power_interpolate((s32) frequency,
4635 f, t, 8);
4636 } else if (eep->base_ext2.tempSlopeLow != 0) {
4637 t[0] = eep->base_ext2.tempSlopeLow;
4638 f[0] = 5180;
4639 t[1] = eep->modalHeader5G.tempSlope;
4640 f[1] = 5500;
4641 t[2] = eep->base_ext2.tempSlopeHigh;
4642 f[2] = 5785;
4643 tempSlope = ar9003_hw_power_interpolate((s32) frequency,
4644 f, t, 3);
4645 } else
4646 tempSlope = eep->modalHeader5G.tempSlope;
4647 4655
4648 REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope); 4656 if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
4657 for (i = 0; i < 8; i++) {
4658 t[i] = eep->base_ext1.tempslopextension[i];
4659 f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
4660 }
4661 temp_slope = ar9003_hw_power_interpolate((s32) frequency,
4662 f, t, 8);
4663 } else if (eep->base_ext2.tempSlopeLow != 0) {
4664 t[0] = eep->base_ext2.tempSlopeLow;
4665 f[0] = 5180;
4666 t[1] = eep->modalHeader5G.tempSlope;
4667 f[1] = 5500;
4668 t[2] = eep->base_ext2.tempSlopeHigh;
4669 f[2] = 5785;
4670 temp_slope = ar9003_hw_power_interpolate((s32) frequency,
4671 f, t, 3);
4672 } else {
4673 temp_slope = eep->modalHeader5G.tempSlope;
4674 }
4675 }
4676
4677tempslope:
4678 if (AR_SREV_9550(ah)) {
4679 /*
4680 * AR955x has tempSlope register for each chain.
4681 * Check whether temp_compensation feature is enabled or not.
4682 */
4683 if (eep->baseEepHeader.featureEnable & 0x1) {
4684 if (frequency < 4000) {
4685 REG_RMW_FIELD(ah, AR_PHY_TPC_19,
4686 AR_PHY_TPC_19_ALPHA_THERM,
4687 eep->base_ext2.tempSlopeLow);
4688 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
4689 AR_PHY_TPC_19_ALPHA_THERM,
4690 temp_slope);
4691 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
4692 AR_PHY_TPC_19_ALPHA_THERM,
4693 eep->base_ext2.tempSlopeHigh);
4694 } else {
4695 REG_RMW_FIELD(ah, AR_PHY_TPC_19,
4696 AR_PHY_TPC_19_ALPHA_THERM,
4697 temp_slope);
4698 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
4699 AR_PHY_TPC_19_ALPHA_THERM,
4700 temp_slope1);
4701 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
4702 AR_PHY_TPC_19_ALPHA_THERM,
4703 temp_slope2);
4704 }
4705 } else {
4706 /*
4707 * If temp compensation is not enabled,
4708 * set all registers to 0.
4709 */
4710 REG_RMW_FIELD(ah, AR_PHY_TPC_19,
4711 AR_PHY_TPC_19_ALPHA_THERM, 0);
4712 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
4713 AR_PHY_TPC_19_ALPHA_THERM, 0);
4714 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
4715 AR_PHY_TPC_19_ALPHA_THERM, 0);
4716 }
4717 } else {
4718 REG_RMW_FIELD(ah, AR_PHY_TPC_19,
4719 AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
4720 }
4649 4721
4650 if (AR_SREV_9462_20(ah)) 4722 if (AR_SREV_9462_20(ah))
4651 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, 4723 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
4652 AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope); 4724 AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
4653 4725
4654 4726
4655 REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE, 4727 REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
4656 temperature[0]); 4728 temperature[0]);
4657
4658 return 0;
4659} 4729}
4660 4730
4661/* Apply the recorded correction values. */ 4731/* Apply the recorded correction values. */
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 59bf5f31e212..a3523c969a3a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -507,28 +507,59 @@ static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
507 else if (AR_SREV_9580(ah)) 507 else if (AR_SREV_9580(ah))
508 INIT_INI_ARRAY(&ah->iniModesTxGain, 508 INIT_INI_ARRAY(&ah->iniModesTxGain,
509 ar9580_1p0_mixed_ob_db_tx_gain_table); 509 ar9580_1p0_mixed_ob_db_tx_gain_table);
510 else
511 INIT_INI_ARRAY(&ah->iniModesTxGain,
512 ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
513}
514
515static void ar9003_tx_gain_table_mode5(struct ath_hw *ah)
516{
517 if (AR_SREV_9485_11(ah))
518 INIT_INI_ARRAY(&ah->iniModesTxGain,
519 ar9485Modes_green_ob_db_tx_gain_1_1);
520 else if (AR_SREV_9340(ah))
521 INIT_INI_ARRAY(&ah->iniModesTxGain,
522 ar9340Modes_ub124_tx_gain_table_1p0);
523 else if (AR_SREV_9580(ah))
524 INIT_INI_ARRAY(&ah->iniModesTxGain,
525 ar9580_1p0_type5_tx_gain_table);
526 else if (AR_SREV_9300_22(ah))
527 INIT_INI_ARRAY(&ah->iniModesTxGain,
528 ar9300Modes_type5_tx_gain_table_2p2);
510} 529}
511 530
531static void ar9003_tx_gain_table_mode6(struct ath_hw *ah)
532{
533 if (AR_SREV_9340(ah))
534 INIT_INI_ARRAY(&ah->iniModesTxGain,
535 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0);
536 else if (AR_SREV_9485_11(ah))
537 INIT_INI_ARRAY(&ah->iniModesTxGain,
538 ar9485Modes_green_spur_ob_db_tx_gain_1_1);
539 else if (AR_SREV_9580(ah))
540 INIT_INI_ARRAY(&ah->iniModesTxGain,
541 ar9580_1p0_type6_tx_gain_table);
542}
543
544typedef void (*ath_txgain_tab)(struct ath_hw *ah);
545
512static void ar9003_tx_gain_table_apply(struct ath_hw *ah) 546static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
513{ 547{
514 switch (ar9003_hw_get_tx_gain_idx(ah)) { 548 static const ath_txgain_tab modes[] = {
515 case 0: 549 ar9003_tx_gain_table_mode0,
516 default: 550 ar9003_tx_gain_table_mode1,
517 ar9003_tx_gain_table_mode0(ah); 551 ar9003_tx_gain_table_mode2,
518 break; 552 ar9003_tx_gain_table_mode3,
519 case 1: 553 ar9003_tx_gain_table_mode4,
520 ar9003_tx_gain_table_mode1(ah); 554 ar9003_tx_gain_table_mode5,
521 break; 555 ar9003_tx_gain_table_mode6,
522 case 2: 556 };
523 ar9003_tx_gain_table_mode2(ah); 557 int idx = ar9003_hw_get_tx_gain_idx(ah);
524 break; 558
525 case 3: 559 if (idx >= ARRAY_SIZE(modes))
526 ar9003_tx_gain_table_mode3(ah); 560 idx = 0;
527 break; 561
528 case 4: 562 modes[idx](ah);
529 ar9003_tx_gain_table_mode4(ah);
530 break;
531 }
532} 563}
533 564
534static void ar9003_rx_gain_table_mode0(struct ath_hw *ah) 565static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
@@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw *ah)
673 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 704 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
674 struct ath_hw_ops *ops = ath9k_hw_ops(ah); 705 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
675 706
676 priv_ops->init_mode_regs = ar9003_hw_init_mode_regs; 707 ar9003_hw_init_mode_regs(ah);
677 priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs; 708 priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
678 709
679 ops->config_pci_powersave = ar9003_hw_configpcipowersave; 710 ops->config_pci_powersave = ar9003_hw_configpcipowersave;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 3afc24bde6d6..2bf6548dd143 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
68static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) 68static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
69{ 69{
70 u16 bMode, fracMode = 0, aModeRefSel = 0; 70 u16 bMode, fracMode = 0, aModeRefSel = 0;
71 u32 freq, channelSel = 0, reg32 = 0; 71 u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
72 struct chan_centers centers; 72 struct chan_centers centers;
73 int loadSynthChannel; 73 int loadSynthChannel;
74 74
@@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
77 77
78 if (freq < 4800) { /* 2 GHz, fractional mode */ 78 if (freq < 4800) { /* 2 GHz, fractional mode */
79 if (AR_SREV_9330(ah)) { 79 if (AR_SREV_9330(ah)) {
80 u32 chan_frac;
81 u32 div;
82
83 if (ah->is_clk_25mhz) 80 if (ah->is_clk_25mhz)
84 div = 75; 81 div = 75;
85 else 82 else
@@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
89 chan_frac = (((freq * 4) % div) * 0x20000) / div; 86 chan_frac = (((freq * 4) % div) * 0x20000) / div;
90 channelSel = (channelSel << 17) | chan_frac; 87 channelSel = (channelSel << 17) | chan_frac;
91 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) { 88 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
92 u32 chan_frac;
93
94 /* 89 /*
95 * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0 90 * freq_ref = 40 / (refdiva >> amoderefsel);
91 * where refdiva=1 and amoderefsel=0
96 * ndiv = ((chan_mhz * 4) / 3) / freq_ref; 92 * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
97 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000 93 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
98 */ 94 */
99 channelSel = (freq * 4) / 120; 95 channelSel = (freq * 4) / 120;
100 chan_frac = (((freq * 4) % 120) * 0x20000) / 120; 96 chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
101 channelSel = (channelSel << 17) | chan_frac; 97 channelSel = (channelSel << 17) | chan_frac;
102 } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) { 98 } else if (AR_SREV_9340(ah)) {
103 if (ah->is_clk_25mhz) { 99 if (ah->is_clk_25mhz) {
104 u32 chan_frac;
105
106 channelSel = (freq * 2) / 75; 100 channelSel = (freq * 2) / 75;
107 chan_frac = (((freq * 2) % 75) * 0x20000) / 75; 101 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
108 channelSel = (channelSel << 17) | chan_frac; 102 channelSel = (channelSel << 17) | chan_frac;
109 } else 103 } else {
110 channelSel = CHANSEL_2G(freq) >> 1; 104 channelSel = CHANSEL_2G(freq) >> 1;
111 } else 105 }
106 } else if (AR_SREV_9550(ah)) {
107 if (ah->is_clk_25mhz)
108 div = 75;
109 else
110 div = 120;
111
112 channelSel = (freq * 4) / div;
113 chan_frac = (((freq * 4) % div) * 0x20000) / div;
114 channelSel = (channelSel << 17) | chan_frac;
115 } else {
112 channelSel = CHANSEL_2G(freq); 116 channelSel = CHANSEL_2G(freq);
117 }
113 /* Set to 2G mode */ 118 /* Set to 2G mode */
114 bMode = 1; 119 bMode = 1;
115 } else { 120 } else {
116 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) && 121 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
117 ah->is_clk_25mhz) { 122 ah->is_clk_25mhz) {
118 u32 chan_frac;
119
120 channelSel = freq / 75; 123 channelSel = freq / 75;
121 chan_frac = ((freq % 75) * 0x20000) / 75; 124 chan_frac = ((freq % 75) * 0x20000) / 75;
122 channelSel = (channelSel << 17) | chan_frac; 125 channelSel = (channelSel << 17) | chan_frac;
@@ -1437,6 +1440,67 @@ set_rfmode:
1437 return 0; 1440 return 0;
1438} 1441}
1439 1442
1443static void ar9003_hw_spectral_scan_config(struct ath_hw *ah,
1444 struct ath_spec_scan *param)
1445{
1446 u8 count;
1447
1448 if (!param->enabled) {
1449 REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
1450 AR_PHY_SPECTRAL_SCAN_ENABLE);
1451 return;
1452 }
1453
1454 REG_SET_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_FFT_ENA);
1455 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN, AR_PHY_SPECTRAL_SCAN_ENABLE);
1456
1457 /* on AR93xx and newer, count = 0 will make the the chip send
1458 * spectral samples endlessly. Check if this really was intended,
1459 * and fix otherwise.
1460 */
1461 count = param->count;
1462 if (param->endless)
1463 count = 0;
1464 else if (param->count == 0)
1465 count = 1;
1466
1467 if (param->short_repeat)
1468 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
1469 AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
1470 else
1471 REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
1472 AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
1473
1474 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
1475 AR_PHY_SPECTRAL_SCAN_COUNT, count);
1476 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
1477 AR_PHY_SPECTRAL_SCAN_PERIOD, param->period);
1478 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
1479 AR_PHY_SPECTRAL_SCAN_FFT_PERIOD, param->fft_period);
1480
1481 return;
1482}
1483
1484static void ar9003_hw_spectral_scan_trigger(struct ath_hw *ah)
1485{
1486 /* Activate spectral scan */
1487 REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
1488 AR_PHY_SPECTRAL_SCAN_ACTIVE);
1489}
1490
1491static void ar9003_hw_spectral_scan_wait(struct ath_hw *ah)
1492{
1493 struct ath_common *common = ath9k_hw_common(ah);
1494
1495 /* Poll for spectral scan complete */
1496 if (!ath9k_hw_wait(ah, AR_PHY_SPECTRAL_SCAN,
1497 AR_PHY_SPECTRAL_SCAN_ACTIVE,
1498 0, AH_WAIT_TIMEOUT)) {
1499 ath_err(common, "spectral scan wait failed\n");
1500 return;
1501 }
1502}
1503
1440void ar9003_hw_attach_phy_ops(struct ath_hw *ah) 1504void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
1441{ 1505{
1442 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 1506 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -1470,6 +1534,9 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
1470 ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get; 1534 ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
1471 ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set; 1535 ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
1472 ops->antctrl_shared_chain_lnadiv = ar9003_hw_antctrl_shared_chain_lnadiv; 1536 ops->antctrl_shared_chain_lnadiv = ar9003_hw_antctrl_shared_chain_lnadiv;
1537 ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
1538 ops->spectral_scan_trigger = ar9003_hw_spectral_scan_trigger;
1539 ops->spectral_scan_wait = ar9003_hw_spectral_scan_wait;
1473 1540
1474 ar9003_hw_set_nf_limits(ah); 1541 ar9003_hw_set_nf_limits(ah);
1475 ar9003_hw_set_radar_conf(ah); 1542 ar9003_hw_set_radar_conf(ah);
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 107956298488..e71774196c01 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -1028,7 +1028,7 @@
1028#define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208) 1028#define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208)
1029#define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c) 1029#define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c)
1030#define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220) 1030#define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220)
1031#define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240) 1031#define AR_PHY_TPC_19_B2 (AR_SM2_BASE + 0x240)
1032#define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c) 1032#define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c)
1033#define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2)) 1033#define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2))
1034 1034
diff --git a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
index f69d292bdc02..25db9215985a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
@@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db_tx_gain_table_1p0[][5] = {
1172 {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266}, 1172 {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
1173}; 1173};
1174 1174
1175static const u32 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0[][5] = {
1176 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1177 {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1178 {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1179 {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1180 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1181 {0x0000a394, 0x00000444, 0x00000444, 0x00000404, 0x00000404},
1182 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1183 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1184 {0x0000a504, 0x06000003, 0x06000003, 0x02000001, 0x02000001},
1185 {0x0000a508, 0x0a000020, 0x0a000020, 0x05000003, 0x05000003},
1186 {0x0000a50c, 0x10000023, 0x10000023, 0x0a000005, 0x0a000005},
1187 {0x0000a510, 0x16000220, 0x16000220, 0x0e000201, 0x0e000201},
1188 {0x0000a514, 0x1c000223, 0x1c000223, 0x11000203, 0x11000203},
1189 {0x0000a518, 0x21002220, 0x21002220, 0x14000401, 0x14000401},
1190 {0x0000a51c, 0x27002223, 0x27002223, 0x18000403, 0x18000403},
1191 {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000602, 0x1b000602},
1192 {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000802, 0x1f000802},
1193 {0x0000a528, 0x34022225, 0x34022225, 0x21000620, 0x21000620},
1194 {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x25000820, 0x25000820},
1195 {0x0000a530, 0x3e02222c, 0x3e02222c, 0x29000822, 0x29000822},
1196 {0x0000a534, 0x4202242a, 0x4202242a, 0x2d000824, 0x2d000824},
1197 {0x0000a538, 0x4702244a, 0x4702244a, 0x30000828, 0x30000828},
1198 {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x3400082a, 0x3400082a},
1199 {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38000849, 0x38000849},
1200 {0x0000a544, 0x5302266c, 0x5302266c, 0x3b000a2c, 0x3b000a2c},
1201 {0x0000a548, 0x5702286c, 0x5702286c, 0x3e000e2b, 0x3e000e2b},
1202 {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42000e2d, 0x42000e2d},
1203 {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4500124a, 0x4500124a},
1204 {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4900124c, 0x4900124c},
1205 {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c00126c, 0x4c00126c},
1206 {0x0000a55c, 0x7002708c, 0x7002708c, 0x4f00128c, 0x4f00128c},
1207 {0x0000a560, 0x7302b08a, 0x7302b08a, 0x52001290, 0x52001290},
1208 {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1209 {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1210 {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1211 {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1212 {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1213 {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1214 {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1215 {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1216 {0x0000a584, 0x06800003, 0x06800003, 0x02800001, 0x02800001},
1217 {0x0000a588, 0x0a800020, 0x0a800020, 0x05800003, 0x05800003},
1218 {0x0000a58c, 0x10800023, 0x10800023, 0x0a800005, 0x0a800005},
1219 {0x0000a590, 0x16800220, 0x16800220, 0x0e800201, 0x0e800201},
1220 {0x0000a594, 0x1c800223, 0x1c800223, 0x11800203, 0x11800203},
1221 {0x0000a598, 0x21820220, 0x21820220, 0x14800401, 0x14800401},
1222 {0x0000a59c, 0x27820223, 0x27820223, 0x18800403, 0x18800403},
1223 {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800602, 0x1b800602},
1224 {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800802, 0x1f800802},
1225 {0x0000a5a8, 0x34822225, 0x34822225, 0x21800620, 0x21800620},
1226 {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x25800820, 0x25800820},
1227 {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x29800822, 0x29800822},
1228 {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2d800824, 0x2d800824},
1229 {0x0000a5b8, 0x4782244a, 0x4782244a, 0x30800828, 0x30800828},
1230 {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x3480082a, 0x3480082a},
1231 {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38800849, 0x38800849},
1232 {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b800a2c, 0x3b800a2c},
1233 {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e800e2b, 0x3e800e2b},
1234 {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42800e2d, 0x42800e2d},
1235 {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4580124a, 0x4580124a},
1236 {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4980124c, 0x4980124c},
1237 {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c80126c, 0x4c80126c},
1238 {0x0000a5dc, 0x7086308c, 0x7086308c, 0x4f80128c, 0x4f80128c},
1239 {0x0000a5e0, 0x738a308a, 0x738a308a, 0x52801290, 0x52801290},
1240 {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1241 {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1242 {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1243 {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1244 {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1245 {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1246 {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1247 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1248 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1249 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1250 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1251 {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1252 {0x0000a614, 0x01404000, 0x01404000, 0x01404501, 0x01404501},
1253 {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
1254 {0x0000a61c, 0x02008802, 0x02008802, 0x01404501, 0x01404501},
1255 {0x0000a620, 0x0300cc03, 0x0300cc03, 0x03c0cf02, 0x03c0cf02},
1256 {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03c0cf03, 0x03c0cf03},
1257 {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04011004, 0x04011004},
1258 {0x0000a62c, 0x03810c03, 0x03810c03, 0x05419405, 0x05419405},
1259 {0x0000a630, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1260 {0x0000a634, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1261 {0x0000a638, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1262 {0x0000a63c, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1263 {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1264 {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1265 {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1266 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1267 {0x00016044, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1268 {0x00016048, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1269 {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
1270 {0x00016288, 0xf0318000, 0xf0318000, 0xf0318000, 0xf0318000},
1271 {0x00016444, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1272 {0x00016448, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1273};
1274
1175static const u32 ar9340_1p0_mac_core[][2] = { 1275static const u32 ar9340_1p0_mac_core[][2] = {
1176 /* Addr allmodes */ 1276 /* Addr allmodes */
1177 {0x00000008, 0x00000000}, 1277 {0x00000008, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
index a3710f3bb90c..712f415b8c08 100644
--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
@@ -260,6 +260,79 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
260 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260}, 260 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
261}; 261};
262 262
263static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
264 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
265 {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
266 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
267 {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
268 {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
269 {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
270 {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
271 {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
272 {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
273 {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
274 {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
275 {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
276 {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
277 {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
278 {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
279 {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
280 {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
281 {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
282 {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
283 {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
284 {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
285 {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
286 {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
287 {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
288 {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
289 {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
290 {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
291 {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
292 {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
293 {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
294 {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
295 {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
296 {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
297 {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
298 {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
299 {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
300 {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
301 {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
302 {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
303 {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
304 {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
305 {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
306 {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
307 {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
308 {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
309 {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
310 {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
311 {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
312 {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
313 {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
314 {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
315 {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
316 {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
317 {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
318 {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
319 {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
320 {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
321 {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
322 {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
323 {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
324 {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
325 {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
326 {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
327 {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
328 {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
329 {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
330 {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
331 {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
332 {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
333 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
334};
335
263static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = { 336static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
264 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 337 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
265 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002}, 338 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
@@ -450,6 +523,79 @@ static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
450 523
451#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1 524#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
452 525
526static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
527 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
528 {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
529 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
530 {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
531 {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
532 {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
533 {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
534 {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
535 {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
536 {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
537 {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
538 {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
539 {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
540 {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
541 {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
542 {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
543 {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
544 {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
545 {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
546 {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
547 {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
548 {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
549 {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
550 {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
551 {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
552 {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
553 {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
554 {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
555 {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
556 {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
557 {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
558 {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
559 {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
560 {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
561 {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
562 {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
563 {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
564 {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
565 {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
566 {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
567 {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
568 {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
569 {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
570 {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
571 {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
572 {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
573 {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
574 {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
575 {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
576 {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
577 {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
578 {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
579 {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
580 {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
581 {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
582 {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
583 {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
584 {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
585 {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
586 {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
587 {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
588 {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
589 {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
590 {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
591 {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
592 {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
593 {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
594 {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
595 {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
596 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
597};
598
453static const u32 ar9485_1_1[][2] = { 599static const u32 ar9485_1_1[][2] = {
454 /* Addr allmodes */ 600 /* Addr allmodes */
455 {0x0000a580, 0x00000000}, 601 {0x0000a580, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
index df97f21c52dc..ccc5b6c99add 100644
--- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
@@ -23,16 +23,16 @@
23static const u32 ar955x_1p0_radio_postamble[][5] = { 23static const u32 ar955x_1p0_radio_postamble[][5] = {
24 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 24 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
25 {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330}, 25 {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
26 {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x06345f2a, 0x06345f2a}, 26 {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a},
27 {0x000160ac, 0xa4647c00, 0xa4647c00, 0xa4646800, 0xa4646800}, 27 {0x000160ac, 0xa4647c00, 0xa4647c00, 0x24647c00, 0x24647c00},
28 {0x000160b0, 0x01885f52, 0x01885f52, 0x04accf3a, 0x04accf3a}, 28 {0x000160b0, 0x01885f52, 0x01885f52, 0x01885f52, 0x01885f52},
29 {0x00016104, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001}, 29 {0x00016104, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
30 {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000}, 30 {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
31 {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008}, 31 {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
32 {0x00016504, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001}, 32 {0x00016504, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
33 {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000}, 33 {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
34 {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008}, 34 {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
35 {0x00016904, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001}, 35 {0x00016904, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
36 {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000}, 36 {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
37 {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008}, 37 {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
38}; 38};
@@ -69,15 +69,15 @@ static const u32 ar955x_1p0_baseband_postamble[][5] = {
69 {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0}, 69 {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0},
70 {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, 70 {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
71 {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f}, 71 {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f},
72 {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, 72 {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
73 {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff}, 73 {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
74 {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018}, 74 {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018},
75 {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, 75 {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
76 {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, 76 {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
77 {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, 77 {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
78 {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, 78 {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01010e0e, 0x01010e0e},
79 {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, 79 {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
80 {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 80 {0x0000a264, 0x00000e0e, 0x00000e0e, 0x01000e0e, 0x01000e0e},
81 {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, 81 {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
82 {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010}, 82 {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
83 {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, 83 {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
@@ -125,7 +125,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
125 {0x00016094, 0x00000000}, 125 {0x00016094, 0x00000000},
126 {0x000160a0, 0x0a108ffe}, 126 {0x000160a0, 0x0a108ffe},
127 {0x000160a4, 0x812fc370}, 127 {0x000160a4, 0x812fc370},
128 {0x000160a8, 0x423c8000}, 128 {0x000160a8, 0x423c8100},
129 {0x000160b4, 0x92480080}, 129 {0x000160b4, 0x92480080},
130 {0x000160c0, 0x006db6d0}, 130 {0x000160c0, 0x006db6d0},
131 {0x000160c4, 0x6db6db60}, 131 {0x000160c4, 0x6db6db60},
@@ -134,7 +134,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
134 {0x00016100, 0x11999601}, 134 {0x00016100, 0x11999601},
135 {0x00016108, 0x00080010}, 135 {0x00016108, 0x00080010},
136 {0x00016144, 0x02084080}, 136 {0x00016144, 0x02084080},
137 {0x00016148, 0x000080c0}, 137 {0x00016148, 0x00008040},
138 {0x00016280, 0x01800804}, 138 {0x00016280, 0x01800804},
139 {0x00016284, 0x00038dc5}, 139 {0x00016284, 0x00038dc5},
140 {0x00016288, 0x00000000}, 140 {0x00016288, 0x00000000},
@@ -178,7 +178,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
178 {0x00016500, 0x11999601}, 178 {0x00016500, 0x11999601},
179 {0x00016508, 0x00080010}, 179 {0x00016508, 0x00080010},
180 {0x00016544, 0x02084080}, 180 {0x00016544, 0x02084080},
181 {0x00016548, 0x000080c0}, 181 {0x00016548, 0x00008040},
182 {0x00016780, 0x00000000}, 182 {0x00016780, 0x00000000},
183 {0x00016784, 0x00000000}, 183 {0x00016784, 0x00000000},
184 {0x00016788, 0x00400705}, 184 {0x00016788, 0x00400705},
@@ -218,7 +218,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
218 {0x00016900, 0x11999601}, 218 {0x00016900, 0x11999601},
219 {0x00016908, 0x00080010}, 219 {0x00016908, 0x00080010},
220 {0x00016944, 0x02084080}, 220 {0x00016944, 0x02084080},
221 {0x00016948, 0x000080c0}, 221 {0x00016948, 0x00008040},
222 {0x00016b80, 0x00000000}, 222 {0x00016b80, 0x00000000},
223 {0x00016b84, 0x00000000}, 223 {0x00016b84, 0x00000000},
224 {0x00016b88, 0x00400705}, 224 {0x00016b88, 0x00400705},
@@ -245,9 +245,9 @@ static const u32 ar955x_1p0_radio_core[][2] = {
245 245
246static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = { 246static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
247 /* Addr 5G_HT20_L 5G_HT40_L 5G_HT20_M 5G_HT40_M 5G_HT20_H 5G_HT40_H 2G_HT40 2G_HT20 */ 247 /* Addr 5G_HT20_L 5G_HT40_L 5G_HT20_M 5G_HT40_M 5G_HT20_H 5G_HT40_H 2G_HT40 2G_HT20 */
248 {0x0000a2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa}, 248 {0x0000a2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
249 {0x0000a2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc}, 249 {0x0000a2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
250 {0x0000a2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0}, 250 {0x0000a2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
251 {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00}, 251 {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
252 {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da}, 252 {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da},
253 {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000}, 253 {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000},
@@ -256,63 +256,63 @@ static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
256 {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006}, 256 {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006},
257 {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a}, 257 {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a},
258 {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c}, 258 {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c},
259 {0x0000a518, 0x19004008, 0x19004008, 0x19004008, 0x19004008, 0x18004008, 0x18004008, 0x1700000e, 0x1700000e}, 259 {0x0000a518, 0x1700002b, 0x1700002b, 0x1700002b, 0x1700002b, 0x1600002b, 0x1600002b, 0x1700000e, 0x1700000e},
260 {0x0000a51c, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1c00400a, 0x1c00400a, 0x1b000064, 0x1b000064}, 260 {0x0000a51c, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1a00002d, 0x1a00002d, 0x1b000064, 0x1b000064},
261 {0x0000a520, 0x230020a2, 0x230020a2, 0x210020a2, 0x210020a2, 0x200020a2, 0x200020a2, 0x1f000242, 0x1f000242}, 261 {0x0000a520, 0x20000031, 0x20000031, 0x1f000031, 0x1f000031, 0x1e000031, 0x1e000031, 0x1f000242, 0x1f000242},
262 {0x0000a524, 0x2500006e, 0x2500006e, 0x2500006e, 0x2500006e, 0x2400006e, 0x2400006e, 0x23000229, 0x23000229}, 262 {0x0000a524, 0x24000051, 0x24000051, 0x23000051, 0x23000051, 0x23000051, 0x23000051, 0x23000229, 0x23000229},
263 {0x0000a528, 0x29022221, 0x29022221, 0x28022221, 0x28022221, 0x27022221, 0x27022221, 0x270002a2, 0x270002a2}, 263 {0x0000a528, 0x27000071, 0x27000071, 0x27000071, 0x27000071, 0x26000071, 0x26000071, 0x270002a2, 0x270002a2},
264 {0x0000a52c, 0x2d00062a, 0x2d00062a, 0x2c00062a, 0x2c00062a, 0x2a00062a, 0x2a00062a, 0x2c001203, 0x2c001203}, 264 {0x0000a52c, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2c001203, 0x2c001203},
265 {0x0000a530, 0x340220a5, 0x340220a5, 0x320220a5, 0x320220a5, 0x2f0220a5, 0x2f0220a5, 0x30001803, 0x30001803}, 265 {0x0000a530, 0x3000028c, 0x3000028c, 0x2f00028c, 0x2f00028c, 0x2e00028c, 0x2e00028c, 0x30001803, 0x30001803},
266 {0x0000a534, 0x380022c5, 0x380022c5, 0x350022c5, 0x350022c5, 0x320022c5, 0x320022c5, 0x33000881, 0x33000881}, 266 {0x0000a534, 0x34000290, 0x34000290, 0x33000290, 0x33000290, 0x32000290, 0x32000290, 0x33000881, 0x33000881},
267 {0x0000a538, 0x3b002486, 0x3b002486, 0x39002486, 0x39002486, 0x36002486, 0x36002486, 0x38001809, 0x38001809}, 267 {0x0000a538, 0x37000292, 0x37000292, 0x36000292, 0x36000292, 0x35000292, 0x35000292, 0x38001809, 0x38001809},
268 {0x0000a53c, 0x3f00248a, 0x3f00248a, 0x3d00248a, 0x3d00248a, 0x3a00248a, 0x3a00248a, 0x3a000814, 0x3a000814}, 268 {0x0000a53c, 0x3b02028d, 0x3b02028d, 0x3a02028d, 0x3a02028d, 0x3902028d, 0x3902028d, 0x3a000814, 0x3a000814},
269 {0x0000a540, 0x4202242c, 0x4202242c, 0x4102242c, 0x4102242c, 0x3f02242c, 0x3f02242c, 0x3f001a0c, 0x3f001a0c}, 269 {0x0000a540, 0x3f020291, 0x3f020291, 0x3e020291, 0x3e020291, 0x3d020291, 0x3d020291, 0x3f001a0c, 0x3f001a0c},
270 {0x0000a544, 0x490044c6, 0x490044c6, 0x460044c6, 0x460044c6, 0x420044c6, 0x420044c6, 0x43001a0e, 0x43001a0e}, 270 {0x0000a544, 0x44020490, 0x44020490, 0x43020490, 0x43020490, 0x42020490, 0x42020490, 0x43001a0e, 0x43001a0e},
271 {0x0000a548, 0x4d024485, 0x4d024485, 0x4a024485, 0x4a024485, 0x46024485, 0x46024485, 0x46001812, 0x46001812}, 271 {0x0000a548, 0x48020492, 0x48020492, 0x47020492, 0x47020492, 0x46020492, 0x46020492, 0x46001812, 0x46001812},
272 {0x0000a54c, 0x51044483, 0x51044483, 0x4e044483, 0x4e044483, 0x4a044483, 0x4a044483, 0x49001884, 0x49001884}, 272 {0x0000a54c, 0x4c020692, 0x4c020692, 0x4b020692, 0x4b020692, 0x4a020692, 0x4a020692, 0x49001884, 0x49001884},
273 {0x0000a550, 0x5404a40c, 0x5404a40c, 0x5204a40c, 0x5204a40c, 0x4d04a40c, 0x4d04a40c, 0x4d001e84, 0x4d001e84}, 273 {0x0000a550, 0x50020892, 0x50020892, 0x4f020892, 0x4f020892, 0x4e020892, 0x4e020892, 0x4d001e84, 0x4d001e84},
274 {0x0000a554, 0x57024632, 0x57024632, 0x55024632, 0x55024632, 0x52024632, 0x52024632, 0x50001e69, 0x50001e69}, 274 {0x0000a554, 0x53040891, 0x53040891, 0x53040891, 0x53040891, 0x52040891, 0x52040891, 0x50001e69, 0x50001e69},
275 {0x0000a558, 0x5c00a634, 0x5c00a634, 0x5900a634, 0x5900a634, 0x5600a634, 0x5600a634, 0x550006f4, 0x550006f4}, 275 {0x0000a558, 0x58040893, 0x58040893, 0x57040893, 0x57040893, 0x56040893, 0x56040893, 0x550006f4, 0x550006f4},
276 {0x0000a55c, 0x5f026832, 0x5f026832, 0x5d026832, 0x5d026832, 0x5a026832, 0x5a026832, 0x59000ad3, 0x59000ad3}, 276 {0x0000a55c, 0x5c0408b4, 0x5c0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x59000ad3, 0x59000ad3},
277 {0x0000a560, 0x6602b012, 0x6602b012, 0x6202b012, 0x6202b012, 0x5d02b012, 0x5d02b012, 0x5e000ad5, 0x5e000ad5}, 277 {0x0000a560, 0x610408b6, 0x610408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e000ad5, 0x5e000ad5},
278 {0x0000a564, 0x6e02d0e1, 0x6e02d0e1, 0x6802d0e1, 0x6802d0e1, 0x6002d0e1, 0x6002d0e1, 0x61001ced, 0x61001ced}, 278 {0x0000a564, 0x670408f6, 0x670408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x61001ced, 0x61001ced},
279 {0x0000a568, 0x7202b4c4, 0x7202b4c4, 0x6c02b4c4, 0x6c02b4c4, 0x6502b4c4, 0x6502b4c4, 0x660018d4, 0x660018d4}, 279 {0x0000a568, 0x6a040cf6, 0x6a040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x660018d4, 0x660018d4},
280 {0x0000a56c, 0x75007894, 0x75007894, 0x70007894, 0x70007894, 0x6b007894, 0x6b007894, 0x660018d4, 0x660018d4}, 280 {0x0000a56c, 0x6d040d76, 0x6d040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x660018d4, 0x660018d4},
281 {0x0000a570, 0x7b025c74, 0x7b025c74, 0x75025c74, 0x75025c74, 0x70025c74, 0x70025c74, 0x660018d4, 0x660018d4}, 281 {0x0000a570, 0x70060db6, 0x70060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x660018d4, 0x660018d4},
282 {0x0000a574, 0x8300bcb5, 0x8300bcb5, 0x7a00bcb5, 0x7a00bcb5, 0x7600bcb5, 0x7600bcb5, 0x660018d4, 0x660018d4}, 282 {0x0000a574, 0x730a0df6, 0x730a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x660018d4, 0x660018d4},
283 {0x0000a578, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4}, 283 {0x0000a578, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
284 {0x0000a57c, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4}, 284 {0x0000a57c, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
285 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 285 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
286 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 286 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
287 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 287 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
288 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x03804000, 0x03804000}, 288 {0x0000a60c, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x03804000, 0x03804000},
289 {0x0000a610, 0x04c08c01, 0x04c08c01, 0x04808b01, 0x04808b01, 0x04808a01, 0x04808a01, 0x0300ca02, 0x0300ca02}, 289 {0x0000a610, 0x04008b01, 0x04008b01, 0x04008b01, 0x04008b01, 0x03c08b01, 0x03c08b01, 0x0300ca02, 0x0300ca02},
290 {0x0000a614, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00000e04, 0x00000e04}, 290 {0x0000a614, 0x05811403, 0x05811403, 0x05411303, 0x05411303, 0x05411303, 0x05411303, 0x00000e04, 0x00000e04},
291 {0x0000a618, 0x04010c01, 0x04010c01, 0x03c10b01, 0x03c10b01, 0x03810a01, 0x03810a01, 0x03014000, 0x03014000}, 291 {0x0000a618, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
292 {0x0000a61c, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x00000000, 0x00000000}, 292 {0x0000a61c, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
293 {0x0000a620, 0x04010303, 0x04010303, 0x03c10303, 0x03c10303, 0x03810303, 0x03810303, 0x00000000, 0x00000000}, 293 {0x0000a620, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
294 {0x0000a624, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03014000, 0x03014000}, 294 {0x0000a624, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
295 {0x0000a628, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x03804c05, 0x03804c05}, 295 {0x0000a628, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03804c05, 0x03804c05},
296 {0x0000a62c, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x0701de06, 0x0701de06}, 296 {0x0000a62c, 0x06815604, 0x06815604, 0x06415504, 0x06415504, 0x06015504, 0x06015504, 0x0701de06, 0x0701de06},
297 {0x0000a630, 0x03418000, 0x03418000, 0x03018000, 0x03018000, 0x02c18000, 0x02c18000, 0x07819c07, 0x07819c07}, 297 {0x0000a630, 0x07819a05, 0x07819a05, 0x07419905, 0x07419905, 0x07019805, 0x07019805, 0x07819c07, 0x07819c07},
298 {0x0000a634, 0x03815004, 0x03815004, 0x03414f04, 0x03414f04, 0x03414e04, 0x03414e04, 0x0701dc07, 0x0701dc07}, 298 {0x0000a634, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
299 {0x0000a638, 0x03005302, 0x03005302, 0x02c05202, 0x02c05202, 0x02805202, 0x02805202, 0x0701dc07, 0x0701dc07}, 299 {0x0000a638, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
300 {0x0000a63c, 0x04c09302, 0x04c09302, 0x04809202, 0x04809202, 0x04809202, 0x04809202, 0x0701dc07, 0x0701dc07}, 300 {0x0000a63c, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
301 {0x0000b2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa}, 301 {0x0000b2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
302 {0x0000b2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc}, 302 {0x0000b2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
303 {0x0000b2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0}, 303 {0x0000b2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
304 {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00}, 304 {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
305 {0x0000c2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa}, 305 {0x0000c2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
306 {0x0000c2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc}, 306 {0x0000c2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
307 {0x0000c2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0}, 307 {0x0000c2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
308 {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00}, 308 {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
309 {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4}, 309 {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
310 {0x00016048, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401}, 310 {0x00016048, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
311 {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84}, 311 {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84},
312 {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4}, 312 {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
313 {0x00016448, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401}, 313 {0x00016448, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
314 {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4}, 314 {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
315 {0x00016848, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401}, 315 {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
316}; 316};
317 317
318static const u32 ar955x_1p0_mac_core[][2] = { 318static const u32 ar955x_1p0_mac_core[][2] = {
@@ -846,7 +846,7 @@ static const u32 ar955x_1p0_baseband_core[][2] = {
846 {0x0000a44c, 0x00000001}, 846 {0x0000a44c, 0x00000001},
847 {0x0000a450, 0x00010000}, 847 {0x0000a450, 0x00010000},
848 {0x0000a458, 0x00000000}, 848 {0x0000a458, 0x00000000},
849 {0x0000a644, 0x3fad9d74}, 849 {0x0000a644, 0xbfad9d74},
850 {0x0000a648, 0x0048060a}, 850 {0x0000a648, 0x0048060a},
851 {0x0000a64c, 0x00003c37}, 851 {0x0000a64c, 0x00003c37},
852 {0x0000a670, 0x03020100}, 852 {0x0000a670, 0x03020100},
@@ -1277,7 +1277,7 @@ static const u32 ar955x_1p0_modes_fast_clock[][3] = {
1277 {0x0000801c, 0x148ec02b, 0x148ec057}, 1277 {0x0000801c, 0x148ec02b, 0x148ec057},
1278 {0x00008318, 0x000044c0, 0x00008980}, 1278 {0x00008318, 0x000044c0, 0x00008980},
1279 {0x00009e00, 0x0372131c, 0x0372131c}, 1279 {0x00009e00, 0x0372131c, 0x0372131c},
1280 {0x0000a230, 0x0000000b, 0x00000016}, 1280 {0x0000a230, 0x0000400b, 0x00004016},
1281 {0x0000a254, 0x00000898, 0x00001130}, 1281 {0x0000a254, 0x00000898, 0x00001130},
1282}; 1282};
1283 1283
diff --git a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
index 6e1915aee712..28fd99203f64 100644
--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
@@ -685,6 +685,82 @@ static const u32 ar9580_1p0_mixed_ob_db_tx_gain_table[][5] = {
685 685
686#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2 686#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
687 687
688#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
689
690static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
691 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
692 {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
693 {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
694 {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
695 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
696 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
697 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
698 {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
699 {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
700 {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
701 {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
702 {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
703 {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
704 {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
705 {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
706 {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
707 {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
708 {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
709 {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
710 {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
711 {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
712 {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
713 {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
714 {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
715 {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
716 {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
717 {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
718 {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
719 {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
720 {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
721 {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
722 {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
723 {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
724 {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
725 {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
726 {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
727 {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
728 {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
729 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
730 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
731 {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
732 {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
733 {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
734 {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
735 {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
736 {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
737 {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
738 {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
739 {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
740 {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
741 {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
742 {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
743 {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
744 {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
745 {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
746 {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
747 {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
748 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
749 {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
750 {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
751 {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
752 {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
753 {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
754 {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
755 {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
756 {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
757 {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
758 {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
759 {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
760 {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
761 {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
762};
763
688static const u32 ar9580_1p0_soc_preamble[][2] = { 764static const u32 ar9580_1p0_soc_preamble[][2] = {
689 /* Addr allmodes */ 765 /* Addr allmodes */
690 {0x000040a4, 0x00a0c1c9}, 766 {0x000040a4, 0x00a0c1c9},
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 42794c546a40..b2d6c18d1678 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -109,14 +109,11 @@ struct ath_descdma {
109 void *dd_desc; 109 void *dd_desc;
110 dma_addr_t dd_desc_paddr; 110 dma_addr_t dd_desc_paddr;
111 u32 dd_desc_len; 111 u32 dd_desc_len;
112 struct ath_buf *dd_bufptr;
113}; 112};
114 113
115int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 114int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
116 struct list_head *head, const char *name, 115 struct list_head *head, const char *name,
117 int nbuf, int ndesc, bool is_tx); 116 int nbuf, int ndesc, bool is_tx);
118void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
119 struct list_head *head);
120 117
121/***********/ 118/***********/
122/* RX / TX */ 119/* RX / TX */
@@ -319,7 +316,6 @@ struct ath_rx {
319 unsigned int rxfilter; 316 unsigned int rxfilter;
320 struct list_head rxbuf; 317 struct list_head rxbuf;
321 struct ath_descdma rxdma; 318 struct ath_descdma rxdma;
322 struct ath_buf *rx_bufptr;
323 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; 319 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
324 320
325 struct sk_buff *frag; 321 struct sk_buff *frag;
@@ -336,14 +332,12 @@ void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
336void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq); 332void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
337void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq); 333void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
338void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); 334void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
339bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx); 335bool ath_drain_all_txq(struct ath_softc *sc);
340void ath_draintxq(struct ath_softc *sc, 336void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
341 struct ath_txq *txq, bool retry_tx);
342void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); 337void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
343void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 338void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
344void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 339void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
345int ath_tx_init(struct ath_softc *sc, int nbufs); 340int ath_tx_init(struct ath_softc *sc, int nbufs);
346void ath_tx_cleanup(struct ath_softc *sc);
347int ath_txq_update(struct ath_softc *sc, int qnum, 341int ath_txq_update(struct ath_softc *sc, int qnum,
348 struct ath9k_tx_queue_info *q); 342 struct ath9k_tx_queue_info *q);
349void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop); 343void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
@@ -672,6 +666,23 @@ struct ath9k_vif_iter_data {
672 int nadhocs; /* number of adhoc vifs */ 666 int nadhocs; /* number of adhoc vifs */
673}; 667};
674 668
669/* enum spectral_mode:
670 *
671 * @SPECTRAL_DISABLED: spectral mode is disabled
672 * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
673 * something else.
674 * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
675 * is performed manually.
676 * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels
677 * during a channel scan.
678 */
679enum spectral_mode {
680 SPECTRAL_DISABLED = 0,
681 SPECTRAL_BACKGROUND,
682 SPECTRAL_MANUAL,
683 SPECTRAL_CHANSCAN,
684};
685
675struct ath_softc { 686struct ath_softc {
676 struct ieee80211_hw *hw; 687 struct ieee80211_hw *hw;
677 struct device *dev; 688 struct device *dev;
@@ -740,6 +751,10 @@ struct ath_softc {
740 u8 ant_tx, ant_rx; 751 u8 ant_tx, ant_rx;
741 struct dfs_pattern_detector *dfs_detector; 752 struct dfs_pattern_detector *dfs_detector;
742 u32 wow_enabled; 753 u32 wow_enabled;
754 /* relay(fs) channel for spectral scan */
755 struct rchan *rfs_chan_spec_scan;
756 enum spectral_mode spectral_mode;
757 int scanning;
743 758
744#ifdef CONFIG_PM_SLEEP 759#ifdef CONFIG_PM_SLEEP
745 atomic_t wow_got_bmiss_intr; 760 atomic_t wow_got_bmiss_intr;
@@ -748,6 +763,133 @@ struct ath_softc {
748#endif 763#endif
749}; 764};
750 765
766#define SPECTRAL_SCAN_BITMASK 0x10
767/* Radar info packet format, used for DFS and spectral formats. */
768struct ath_radar_info {
769 u8 pulse_length_pri;
770 u8 pulse_length_ext;
771 u8 pulse_bw_info;
772} __packed;
773
774/* The HT20 spectral data has 4 bytes of additional information at it's end.
775 *
776 * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]}
777 * [7:0]: all bins max_magnitude[9:2]
778 * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]}
779 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
780 */
781struct ath_ht20_mag_info {
782 u8 all_bins[3];
783 u8 max_exp;
784} __packed;
785
786#define SPECTRAL_HT20_NUM_BINS 56
787
788/* WARNING: don't actually use this struct! MAC may vary the amount of
789 * data by -1/+2. This struct is for reference only.
790 */
791struct ath_ht20_fft_packet {
792 u8 data[SPECTRAL_HT20_NUM_BINS];
793 struct ath_ht20_mag_info mag_info;
794 struct ath_radar_info radar_info;
795} __packed;
796
797#define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet))
798
799/* Dynamic 20/40 mode:
800 *
801 * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]}
802 * [7:0]: lower bins max_magnitude[9:2]
803 * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]}
804 * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]}
805 * [7:0]: upper bins max_magnitude[9:2]
806 * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]}
807 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
808 */
809struct ath_ht20_40_mag_info {
810 u8 lower_bins[3];
811 u8 upper_bins[3];
812 u8 max_exp;
813} __packed;
814
815#define SPECTRAL_HT20_40_NUM_BINS 128
816
817/* WARNING: don't actually use this struct! MAC may vary the amount of
818 * data. This struct is for reference only.
819 */
820struct ath_ht20_40_fft_packet {
821 u8 data[SPECTRAL_HT20_40_NUM_BINS];
822 struct ath_ht20_40_mag_info mag_info;
823 struct ath_radar_info radar_info;
824} __packed;
825
826
827#define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
828
829/* grabs the max magnitude from the all/upper/lower bins */
830static inline u16 spectral_max_magnitude(u8 *bins)
831{
832 return (bins[0] & 0xc0) >> 6 |
833 (bins[1] & 0xff) << 2 |
834 (bins[2] & 0x03) << 10;
835}
836
837/* return the max magnitude from the all/upper/lower bins */
838static inline u8 spectral_max_index(u8 *bins)
839{
840 s8 m = (bins[2] & 0xfc) >> 2;
841
842 /* TODO: this still doesn't always report the right values ... */
843 if (m > 32)
844 m |= 0xe0;
845 else
846 m &= ~0xe0;
847
848 return m + 29;
849}
850
851/* return the bitmap weight from the all/upper/lower bins */
852static inline u8 spectral_bitmap_weight(u8 *bins)
853{
854 return bins[0] & 0x3f;
855}
856
857/* FFT sample format given to userspace via debugfs.
858 *
859 * Please keep the type/length at the front position and change
860 * other fields after adding another sample type
861 *
862 * TODO: this might need rework when switching to nl80211-based
863 * interface.
864 */
865enum ath_fft_sample_type {
866 ATH_FFT_SAMPLE_HT20 = 0,
867};
868
869struct fft_sample_tlv {
870 u8 type; /* see ath_fft_sample */
871 u16 length;
872 /* type dependent data follows */
873} __packed;
874
875struct fft_sample_ht20 {
876 struct fft_sample_tlv tlv;
877
878 u8 __alignment;
879
880 u16 freq;
881 s8 rssi;
882 s8 noise;
883
884 u16 max_magnitude;
885 u8 max_index;
886 u8 bitmap_weight;
887
888 u64 tsf;
889
890 u16 data[SPECTRAL_HT20_NUM_BINS];
891} __packed;
892
751void ath9k_tasklet(unsigned long data); 893void ath9k_tasklet(unsigned long data);
752int ath_cabq_update(struct ath_softc *); 894int ath_cabq_update(struct ath_softc *);
753 895
@@ -770,6 +912,10 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
770void ath9k_reload_chainmask_settings(struct ath_softc *sc); 912void ath9k_reload_chainmask_settings(struct ath_softc *sc);
771 913
772bool ath9k_uses_beacons(int type); 914bool ath9k_uses_beacons(int type);
915void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw);
916int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
917 enum spectral_mode spectral_mode);
918
773 919
774#ifdef CONFIG_ATH9K_PCI 920#ifdef CONFIG_ATH9K_PCI
775int ath_pci_init(void); 921int ath_pci_init(void);
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index 2ca355e94da6..dd3771954bd7 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -199,7 +199,7 @@ static struct ath_buf *ath9k_beacon_generate(struct ieee80211_hw *hw,
199 if (sc->nvifs > 1) { 199 if (sc->nvifs > 1) {
200 ath_dbg(common, BEACON, 200 ath_dbg(common, BEACON,
201 "Flushing previous cabq traffic\n"); 201 "Flushing previous cabq traffic\n");
202 ath_draintxq(sc, cabq, false); 202 ath_draintxq(sc, cabq);
203 } 203 }
204 } 204 }
205 205
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index e585fc827c50..6c5d313ebcb7 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -17,6 +17,7 @@
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/vmalloc.h> 18#include <linux/vmalloc.h>
19#include <linux/export.h> 19#include <linux/export.h>
20#include <linux/relay.h>
20#include <asm/unaligned.h> 21#include <asm/unaligned.h>
21 22
22#include "ath9k.h" 23#include "ath9k.h"
@@ -965,6 +966,112 @@ static const struct file_operations fops_recv = {
965 .llseek = default_llseek, 966 .llseek = default_llseek,
966}; 967};
967 968
969static ssize_t read_file_spec_scan_ctl(struct file *file, char __user *user_buf,
970 size_t count, loff_t *ppos)
971{
972 struct ath_softc *sc = file->private_data;
973 char *mode = "";
974 unsigned int len;
975
976 switch (sc->spectral_mode) {
977 case SPECTRAL_DISABLED:
978 mode = "disable";
979 break;
980 case SPECTRAL_BACKGROUND:
981 mode = "background";
982 break;
983 case SPECTRAL_CHANSCAN:
984 mode = "chanscan";
985 break;
986 case SPECTRAL_MANUAL:
987 mode = "manual";
988 break;
989 }
990 len = strlen(mode);
991 return simple_read_from_buffer(user_buf, count, ppos, mode, len);
992}
993
994static ssize_t write_file_spec_scan_ctl(struct file *file,
995 const char __user *user_buf,
996 size_t count, loff_t *ppos)
997{
998 struct ath_softc *sc = file->private_data;
999 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1000 char buf[32];
1001 ssize_t len;
1002
1003 len = min(count, sizeof(buf) - 1);
1004 if (copy_from_user(buf, user_buf, len))
1005 return -EFAULT;
1006
1007 buf[len] = '\0';
1008
1009 if (strncmp("trigger", buf, 7) == 0) {
1010 ath9k_spectral_scan_trigger(sc->hw);
1011 } else if (strncmp("background", buf, 9) == 0) {
1012 ath9k_spectral_scan_config(sc->hw, SPECTRAL_BACKGROUND);
1013 ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n");
1014 } else if (strncmp("chanscan", buf, 8) == 0) {
1015 ath9k_spectral_scan_config(sc->hw, SPECTRAL_CHANSCAN);
1016 ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n");
1017 } else if (strncmp("manual", buf, 6) == 0) {
1018 ath9k_spectral_scan_config(sc->hw, SPECTRAL_MANUAL);
1019 ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n");
1020 } else if (strncmp("disable", buf, 7) == 0) {
1021 ath9k_spectral_scan_config(sc->hw, SPECTRAL_DISABLED);
1022 ath_dbg(common, CONFIG, "spectral scan: disabled\n");
1023 } else {
1024 return -EINVAL;
1025 }
1026
1027 return count;
1028}
1029
1030static const struct file_operations fops_spec_scan_ctl = {
1031 .read = read_file_spec_scan_ctl,
1032 .write = write_file_spec_scan_ctl,
1033 .open = simple_open,
1034 .owner = THIS_MODULE,
1035 .llseek = default_llseek,
1036};
1037
1038static struct dentry *create_buf_file_handler(const char *filename,
1039 struct dentry *parent,
1040 umode_t mode,
1041 struct rchan_buf *buf,
1042 int *is_global)
1043{
1044 struct dentry *buf_file;
1045
1046 buf_file = debugfs_create_file(filename, mode, parent, buf,
1047 &relay_file_operations);
1048 *is_global = 1;
1049 return buf_file;
1050}
1051
1052static int remove_buf_file_handler(struct dentry *dentry)
1053{
1054 debugfs_remove(dentry);
1055
1056 return 0;
1057}
1058
1059void ath_debug_send_fft_sample(struct ath_softc *sc,
1060 struct fft_sample_tlv *fft_sample_tlv)
1061{
1062 if (!sc->rfs_chan_spec_scan)
1063 return;
1064
1065 relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv,
1066 fft_sample_tlv->length + sizeof(*fft_sample_tlv));
1067}
1068
1069static struct rchan_callbacks rfs_spec_scan_cb = {
1070 .create_buf_file = create_buf_file_handler,
1071 .remove_buf_file = remove_buf_file_handler,
1072};
1073
1074
968static ssize_t read_file_regidx(struct file *file, char __user *user_buf, 1075static ssize_t read_file_regidx(struct file *file, char __user *user_buf,
969 size_t count, loff_t *ppos) 1076 size_t count, loff_t *ppos)
970{ 1077{
@@ -1779,6 +1886,14 @@ int ath9k_init_debug(struct ath_hw *ah)
1779 &fops_base_eeprom); 1886 &fops_base_eeprom);
1780 debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, 1887 debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
1781 &fops_modal_eeprom); 1888 &fops_modal_eeprom);
1889 sc->rfs_chan_spec_scan = relay_open("spectral_scan",
1890 sc->debug.debugfs_phy,
1891 262144, 4, &rfs_spec_scan_cb,
1892 NULL);
1893 debugfs_create_file("spectral_scan_ctl", S_IRUSR | S_IWUSR,
1894 sc->debug.debugfs_phy, sc,
1895 &fops_spec_scan_ctl);
1896
1782#ifdef CONFIG_ATH9K_MAC_DEBUG 1897#ifdef CONFIG_ATH9K_MAC_DEBUG
1783 debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc, 1898 debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc,
1784 &fops_samps); 1899 &fops_samps);
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 6df2ab62dcb7..a22c0d780700 100644
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -23,6 +23,7 @@
23 23
24struct ath_txq; 24struct ath_txq;
25struct ath_buf; 25struct ath_buf;
26struct fft_sample_tlv;
26 27
27#ifdef CONFIG_ATH9K_DEBUGFS 28#ifdef CONFIG_ATH9K_DEBUGFS
28#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++ 29#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
@@ -321,6 +322,10 @@ void ath9k_sta_remove_debugfs(struct ieee80211_hw *hw,
321 struct ieee80211_vif *vif, 322 struct ieee80211_vif *vif,
322 struct ieee80211_sta *sta, 323 struct ieee80211_sta *sta,
323 struct dentry *dir); 324 struct dentry *dir);
325
326void ath_debug_send_fft_sample(struct ath_softc *sc,
327 struct fft_sample_tlv *fft_sample);
328
324#else 329#else
325 330
326#define RX_STAT_INC(c) /* NOP */ 331#define RX_STAT_INC(c) /* NOP */
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
index 05d5ba66cac3..e5d7958ab948 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
@@ -280,14 +280,14 @@ err:
280 return ret; 280 return ret;
281} 281}
282 282
283static int ath9k_reg_notifier(struct wiphy *wiphy, 283static void ath9k_reg_notifier(struct wiphy *wiphy,
284 struct regulatory_request *request) 284 struct regulatory_request *request)
285{ 285{
286 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 286 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
287 struct ath9k_htc_priv *priv = hw->priv; 287 struct ath9k_htc_priv *priv = hw->priv;
288 288
289 return ath_reg_notifier_apply(wiphy, request, 289 ath_reg_notifier_apply(wiphy, request,
290 ath9k_hw_regulatory(priv->ah)); 290 ath9k_hw_regulatory(priv->ah));
291} 291}
292 292
293static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) 293static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 9c07a8fa5134..a8016d70088a 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1628,7 +1628,9 @@ static int ath9k_htc_ampdu_action(struct ieee80211_hw *hw,
1628 if (!ret) 1628 if (!ret)
1629 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1629 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1630 break; 1630 break;
1631 case IEEE80211_AMPDU_TX_STOP: 1631 case IEEE80211_AMPDU_TX_STOP_CONT:
1632 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1633 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1632 ath9k_htc_tx_aggr_oper(priv, vif, sta, action, tid); 1634 ath9k_htc_tx_aggr_oper(priv, vif, sta, action, tid);
1633 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1635 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1634 break; 1636 break;
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h
index 0f2b97f6b739..14b701140b49 100644
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
@@ -101,22 +101,6 @@ static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
101 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan); 101 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
102} 102}
103 103
104static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
105{
106 if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks)
107 return 0;
108
109 return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah);
110}
111
112static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
113{
114 if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks)
115 return;
116
117 ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah);
118}
119
120static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah, 104static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
121 struct ath9k_channel *chan, 105 struct ath9k_channel *chan,
122 u16 modesIndex) 106 u16 modesIndex)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 7cb787065913..42cf3c7f1e25 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(struct ath_hw *ah)
54 ath9k_hw_private_ops(ah)->init_cal_settings(ah); 54 ath9k_hw_private_ops(ah)->init_cal_settings(ah);
55} 55}
56 56
57static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
58{
59 ath9k_hw_private_ops(ah)->init_mode_regs(ah);
60}
61
62static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah, 57static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
63 struct ath9k_channel *chan) 58 struct ath9k_channel *chan)
64{ 59{
@@ -208,7 +203,7 @@ void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
208 udelay(hw_delay + BASE_ACTIVATE_DELAY); 203 udelay(hw_delay + BASE_ACTIVATE_DELAY);
209} 204}
210 205
211void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array, 206void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
212 int column, unsigned int *writecnt) 207 int column, unsigned int *writecnt)
213{ 208{
214 int r; 209 int r;
@@ -554,28 +549,19 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
554 ah->eep_ops->get_eeprom_ver(ah), 549 ah->eep_ops->get_eeprom_ver(ah),
555 ah->eep_ops->get_eeprom_rev(ah)); 550 ah->eep_ops->get_eeprom_rev(ah));
556 551
557 ecode = ath9k_hw_rf_alloc_ext_banks(ah); 552 if (ah->config.enable_ani)
558 if (ecode) {
559 ath_err(ath9k_hw_common(ah),
560 "Failed allocating banks for external radio\n");
561 ath9k_hw_rf_free_ext_banks(ah);
562 return ecode;
563 }
564
565 if (ah->config.enable_ani) {
566 ath9k_hw_ani_setup(ah);
567 ath9k_hw_ani_init(ah); 553 ath9k_hw_ani_init(ah);
568 }
569 554
570 return 0; 555 return 0;
571} 556}
572 557
573static void ath9k_hw_attach_ops(struct ath_hw *ah) 558static int ath9k_hw_attach_ops(struct ath_hw *ah)
574{ 559{
575 if (AR_SREV_9300_20_OR_LATER(ah)) 560 if (!AR_SREV_9300_20_OR_LATER(ah))
576 ar9003_hw_attach_ops(ah); 561 return ar9002_hw_attach_ops(ah);
577 else 562
578 ar9002_hw_attach_ops(ah); 563 ar9003_hw_attach_ops(ah);
564 return 0;
579} 565}
580 566
581/* Called for all hardware families */ 567/* Called for all hardware families */
@@ -611,7 +597,9 @@ static int __ath9k_hw_init(struct ath_hw *ah)
611 ath9k_hw_init_defaults(ah); 597 ath9k_hw_init_defaults(ah);
612 ath9k_hw_init_config(ah); 598 ath9k_hw_init_config(ah);
613 599
614 ath9k_hw_attach_ops(ah); 600 r = ath9k_hw_attach_ops(ah);
601 if (r)
602 return r;
615 603
616 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) { 604 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
617 ath_err(common, "Couldn't wakeup chip\n"); 605 ath_err(common, "Couldn't wakeup chip\n");
@@ -675,8 +663,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
675 if (!AR_SREV_9300_20_OR_LATER(ah)) 663 if (!AR_SREV_9300_20_OR_LATER(ah))
676 ah->ani_function &= ~ATH9K_ANI_MRC_CCK; 664 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
677 665
678 ath9k_hw_init_mode_regs(ah);
679
680 if (!ah->is_pciexpress) 666 if (!ah->is_pciexpress)
681 ath9k_hw_disablepcie(ah); 667 ath9k_hw_disablepcie(ah);
682 668
@@ -1153,12 +1139,9 @@ void ath9k_hw_deinit(struct ath_hw *ah)
1153 struct ath_common *common = ath9k_hw_common(ah); 1139 struct ath_common *common = ath9k_hw_common(ah);
1154 1140
1155 if (common->state < ATH_HW_INITIALIZED) 1141 if (common->state < ATH_HW_INITIALIZED)
1156 goto free_hw; 1142 return;
1157 1143
1158 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP); 1144 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
1159
1160free_hw:
1161 ath9k_hw_rf_free_ext_banks(ah);
1162} 1145}
1163EXPORT_SYMBOL(ath9k_hw_deinit); 1146EXPORT_SYMBOL(ath9k_hw_deinit);
1164 1147
@@ -2576,12 +2559,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2576 rx_chainmask >>= 1; 2559 rx_chainmask >>= 1;
2577 } 2560 }
2578 2561
2579 if (AR_SREV_9300_20_OR_LATER(ah)) {
2580 ah->enabled_cals |= TX_IQ_CAL;
2581 if (AR_SREV_9485_OR_LATER(ah))
2582 ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
2583 }
2584
2585 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { 2562 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
2586 if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE)) 2563 if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE))
2587 pCap->hw_caps |= ATH9K_HW_CAP_MCI; 2564 pCap->hw_caps |= ATH9K_HW_CAP_MCI;
@@ -2590,7 +2567,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2590 pCap->hw_caps |= ATH9K_HW_CAP_RTT; 2567 pCap->hw_caps |= ATH9K_HW_CAP_RTT;
2591 } 2568 }
2592 2569
2593
2594 if (AR_SREV_9280_20_OR_LATER(ah)) { 2570 if (AR_SREV_9280_20_OR_LATER(ah)) {
2595 pCap->hw_caps |= ATH9K_HW_WOW_DEVICE_CAPABLE | 2571 pCap->hw_caps |= ATH9K_HW_WOW_DEVICE_CAPABLE |
2596 ATH9K_HW_WOW_PATTERN_MATCH_EXACT; 2572 ATH9K_HW_WOW_PATTERN_MATCH_EXACT;
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 9d26fc56ca56..784e81ccb903 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -397,6 +397,7 @@ enum ath9k_int {
397#define MAX_RTT_TABLE_ENTRY 6 397#define MAX_RTT_TABLE_ENTRY 6
398#define MAX_IQCAL_MEASUREMENT 8 398#define MAX_IQCAL_MEASUREMENT 8
399#define MAX_CL_TAB_ENTRY 16 399#define MAX_CL_TAB_ENTRY 16
400#define CL_TAB_ENTRY(reg_base) (reg_base + (4 * j))
400 401
401struct ath9k_hw_cal_data { 402struct ath9k_hw_cal_data {
402 u16 channel; 403 u16 channel;
@@ -599,13 +600,10 @@ struct ath_hw_radar_conf {
599 * @init_cal_settings: setup types of calibrations supported 600 * @init_cal_settings: setup types of calibrations supported
600 * @init_cal: starts actual calibration 601 * @init_cal: starts actual calibration
601 * 602 *
602 * @init_mode_regs: Initializes mode registers
603 * @init_mode_gain_regs: Initialize TX/RX gain registers 603 * @init_mode_gain_regs: Initialize TX/RX gain registers
604 * 604 *
605 * @rf_set_freq: change frequency 605 * @rf_set_freq: change frequency
606 * @spur_mitigate_freq: spur mitigation 606 * @spur_mitigate_freq: spur mitigation
607 * @rf_alloc_ext_banks:
608 * @rf_free_ext_banks:
609 * @set_rf_regs: 607 * @set_rf_regs:
610 * @compute_pll_control: compute the PLL control value to use for 608 * @compute_pll_control: compute the PLL control value to use for
611 * AR_RTC_PLL_CONTROL for a given channel 609 * AR_RTC_PLL_CONTROL for a given channel
@@ -620,7 +618,6 @@ struct ath_hw_private_ops {
620 void (*init_cal_settings)(struct ath_hw *ah); 618 void (*init_cal_settings)(struct ath_hw *ah);
621 bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan); 619 bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
622 620
623 void (*init_mode_regs)(struct ath_hw *ah);
624 void (*init_mode_gain_regs)(struct ath_hw *ah); 621 void (*init_mode_gain_regs)(struct ath_hw *ah);
625 void (*setup_calibration)(struct ath_hw *ah, 622 void (*setup_calibration)(struct ath_hw *ah,
626 struct ath9k_cal_list *currCal); 623 struct ath9k_cal_list *currCal);
@@ -630,8 +627,6 @@ struct ath_hw_private_ops {
630 struct ath9k_channel *chan); 627 struct ath9k_channel *chan);
631 void (*spur_mitigate_freq)(struct ath_hw *ah, 628 void (*spur_mitigate_freq)(struct ath_hw *ah,
632 struct ath9k_channel *chan); 629 struct ath9k_channel *chan);
633 int (*rf_alloc_ext_banks)(struct ath_hw *ah);
634 void (*rf_free_ext_banks)(struct ath_hw *ah);
635 bool (*set_rf_regs)(struct ath_hw *ah, 630 bool (*set_rf_regs)(struct ath_hw *ah,
636 struct ath9k_channel *chan, 631 struct ath9k_channel *chan,
637 u16 modesIndex); 632 u16 modesIndex);
@@ -661,6 +656,37 @@ struct ath_hw_private_ops {
661}; 656};
662 657
663/** 658/**
659 * struct ath_spec_scan - parameters for Atheros spectral scan
660 *
661 * @enabled: enable/disable spectral scan
662 * @short_repeat: controls whether the chip is in spectral scan mode
663 * for 4 usec (enabled) or 204 usec (disabled)
664 * @count: number of scan results requested. There are special meanings
665 * in some chip revisions:
666 * AR92xx: highest bit set (>=128) for endless mode
667 * (spectral scan won't stopped until explicitly disabled)
668 * AR9300 and newer: 0 for endless mode
669 * @endless: true if endless mode is intended. Otherwise, count value is
670 * corrected to the next possible value.
671 * @period: time duration between successive spectral scan entry points
672 * (period*256*Tclk). Tclk = ath_common->clockrate
673 * @fft_period: PHY passes FFT frames to MAC every (fft_period+1)*4uS
674 *
675 * Note: Tclk = 40MHz or 44MHz depending upon operating mode.
676 * Typically it's 44MHz in 2/5GHz on later chips, but there's
677 * a "fast clock" check for this in 5GHz.
678 *
679 */
680struct ath_spec_scan {
681 bool enabled;
682 bool short_repeat;
683 bool endless;
684 u8 count;
685 u8 period;
686 u8 fft_period;
687};
688
689/**
664 * struct ath_hw_ops - callbacks used by hardware code and driver code 690 * struct ath_hw_ops - callbacks used by hardware code and driver code
665 * 691 *
666 * This structure contains callbacks designed to to be used internally by 692 * This structure contains callbacks designed to to be used internally by
@@ -668,6 +694,10 @@ struct ath_hw_private_ops {
668 * 694 *
669 * @config_pci_powersave: 695 * @config_pci_powersave:
670 * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC 696 * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
697 *
698 * @spectral_scan_config: set parameters for spectral scan and enable/disable it
699 * @spectral_scan_trigger: trigger a spectral scan run
700 * @spectral_scan_wait: wait for a spectral scan run to finish
671 */ 701 */
672struct ath_hw_ops { 702struct ath_hw_ops {
673 void (*config_pci_powersave)(struct ath_hw *ah, 703 void (*config_pci_powersave)(struct ath_hw *ah,
@@ -688,6 +718,10 @@ struct ath_hw_ops {
688 void (*antdiv_comb_conf_set)(struct ath_hw *ah, 718 void (*antdiv_comb_conf_set)(struct ath_hw *ah,
689 struct ath_hw_antcomb_conf *antconf); 719 struct ath_hw_antcomb_conf *antconf);
690 void (*antctrl_shared_chain_lnadiv)(struct ath_hw *hw, bool enable); 720 void (*antctrl_shared_chain_lnadiv)(struct ath_hw *hw, bool enable);
721 void (*spectral_scan_config)(struct ath_hw *ah,
722 struct ath_spec_scan *param);
723 void (*spectral_scan_trigger)(struct ath_hw *ah);
724 void (*spectral_scan_wait)(struct ath_hw *ah);
691}; 725};
692 726
693struct ath_nf_limits { 727struct ath_nf_limits {
@@ -710,6 +744,7 @@ enum ath_cal_list {
710struct ath_hw { 744struct ath_hw {
711 struct ath_ops reg_ops; 745 struct ath_ops reg_ops;
712 746
747 struct device *dev;
713 struct ieee80211_hw *hw; 748 struct ieee80211_hw *hw;
714 struct ath_common common; 749 struct ath_common common;
715 struct ath9k_hw_version hw_version; 750 struct ath9k_hw_version hw_version;
@@ -771,7 +806,6 @@ struct ath_hw {
771 struct ath9k_cal_list iq_caldata; 806 struct ath9k_cal_list iq_caldata;
772 struct ath9k_cal_list adcgain_caldata; 807 struct ath9k_cal_list adcgain_caldata;
773 struct ath9k_cal_list adcdc_caldata; 808 struct ath9k_cal_list adcdc_caldata;
774 struct ath9k_cal_list tempCompCalData;
775 struct ath9k_cal_list *cal_list; 809 struct ath9k_cal_list *cal_list;
776 struct ath9k_cal_list *cal_list_last; 810 struct ath9k_cal_list *cal_list_last;
777 struct ath9k_cal_list *cal_list_curr; 811 struct ath9k_cal_list *cal_list_curr;
@@ -830,10 +864,6 @@ struct ath_hw {
830 /* ANI */ 864 /* ANI */
831 u32 proc_phyerr; 865 u32 proc_phyerr;
832 u32 aniperiod; 866 u32 aniperiod;
833 int totalSizeDesired[5];
834 int coarse_high[5];
835 int coarse_low[5];
836 int firpwr[5];
837 enum ath9k_ani_cmd ani_function; 867 enum ath9k_ani_cmd ani_function;
838 u32 ani_skip_count; 868 u32 ani_skip_count;
839 869
@@ -979,7 +1009,7 @@ void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
979void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan, 1009void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
980 int hw_delay); 1010 int hw_delay);
981bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); 1011bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
982void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array, 1012void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
983 int column, unsigned int *writecnt); 1013 int column, unsigned int *writecnt);
984u32 ath9k_hw_reverse_bits(u32 val, u32 n); 1014u32 ath9k_hw_reverse_bits(u32 val, u32 n);
985u16 ath9k_hw_computetxtime(struct ath_hw *ah, 1015u16 ath9k_hw_computetxtime(struct ath_hw *ah,
@@ -1069,14 +1099,14 @@ bool ar9003_is_paprd_enabled(struct ath_hw *ah);
1069void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx); 1099void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx);
1070 1100
1071/* Hardware family op attach helpers */ 1101/* Hardware family op attach helpers */
1072void ar5008_hw_attach_phy_ops(struct ath_hw *ah); 1102int ar5008_hw_attach_phy_ops(struct ath_hw *ah);
1073void ar9002_hw_attach_phy_ops(struct ath_hw *ah); 1103void ar9002_hw_attach_phy_ops(struct ath_hw *ah);
1074void ar9003_hw_attach_phy_ops(struct ath_hw *ah); 1104void ar9003_hw_attach_phy_ops(struct ath_hw *ah);
1075 1105
1076void ar9002_hw_attach_calib_ops(struct ath_hw *ah); 1106void ar9002_hw_attach_calib_ops(struct ath_hw *ah);
1077void ar9003_hw_attach_calib_ops(struct ath_hw *ah); 1107void ar9003_hw_attach_calib_ops(struct ath_hw *ah);
1078 1108
1079void ar9002_hw_attach_ops(struct ath_hw *ah); 1109int ar9002_hw_attach_ops(struct ath_hw *ah);
1080void ar9003_hw_attach_ops(struct ath_hw *ah); 1110void ar9003_hw_attach_ops(struct ath_hw *ah);
1081 1111
1082void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan); 1112void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan);
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index f69ef5d48c7b..4b1abc7da98c 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -20,6 +20,7 @@
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/ath9k_platform.h> 21#include <linux/ath9k_platform.h>
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/relay.h>
23 24
24#include "ath9k.h" 25#include "ath9k.h"
25 26
@@ -302,16 +303,15 @@ static void setup_ht_cap(struct ath_softc *sc,
302 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; 303 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
303} 304}
304 305
305static int ath9k_reg_notifier(struct wiphy *wiphy, 306static void ath9k_reg_notifier(struct wiphy *wiphy,
306 struct regulatory_request *request) 307 struct regulatory_request *request)
307{ 308{
308 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 309 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
309 struct ath_softc *sc = hw->priv; 310 struct ath_softc *sc = hw->priv;
310 struct ath_hw *ah = sc->sc_ah; 311 struct ath_hw *ah = sc->sc_ah;
311 struct ath_regulatory *reg = ath9k_hw_regulatory(ah); 312 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
312 int ret;
313 313
314 ret = ath_reg_notifier_apply(wiphy, request, reg); 314 ath_reg_notifier_apply(wiphy, request, reg);
315 315
316 /* Set tx power */ 316 /* Set tx power */
317 if (ah->curchan) { 317 if (ah->curchan) {
@@ -321,8 +321,6 @@ static int ath9k_reg_notifier(struct wiphy *wiphy,
321 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit; 321 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
322 ath9k_ps_restore(sc); 322 ath9k_ps_restore(sc);
323 } 323 }
324
325 return ret;
326} 324}
327 325
328/* 326/*
@@ -337,7 +335,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
337 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 335 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
338 u8 *ds; 336 u8 *ds;
339 struct ath_buf *bf; 337 struct ath_buf *bf;
340 int i, bsize, error, desc_len; 338 int i, bsize, desc_len;
341 339
342 ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n", 340 ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n",
343 name, nbuf, ndesc); 341 name, nbuf, ndesc);
@@ -353,8 +351,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
353 if ((desc_len % 4) != 0) { 351 if ((desc_len % 4) != 0) {
354 ath_err(common, "ath_desc not DWORD aligned\n"); 352 ath_err(common, "ath_desc not DWORD aligned\n");
355 BUG_ON((desc_len % 4) != 0); 353 BUG_ON((desc_len % 4) != 0);
356 error = -ENOMEM; 354 return -ENOMEM;
357 goto fail;
358 } 355 }
359 356
360 dd->dd_desc_len = desc_len * nbuf * ndesc; 357 dd->dd_desc_len = desc_len * nbuf * ndesc;
@@ -378,12 +375,11 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
378 } 375 }
379 376
380 /* allocate descriptors */ 377 /* allocate descriptors */
381 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len, 378 dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len,
382 &dd->dd_desc_paddr, GFP_KERNEL); 379 &dd->dd_desc_paddr, GFP_KERNEL);
383 if (dd->dd_desc == NULL) { 380 if (!dd->dd_desc)
384 error = -ENOMEM; 381 return -ENOMEM;
385 goto fail; 382
386 }
387 ds = (u8 *) dd->dd_desc; 383 ds = (u8 *) dd->dd_desc;
388 ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", 384 ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
389 name, ds, (u32) dd->dd_desc_len, 385 name, ds, (u32) dd->dd_desc_len,
@@ -391,12 +387,9 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
391 387
392 /* allocate buffers */ 388 /* allocate buffers */
393 bsize = sizeof(struct ath_buf) * nbuf; 389 bsize = sizeof(struct ath_buf) * nbuf;
394 bf = kzalloc(bsize, GFP_KERNEL); 390 bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
395 if (bf == NULL) { 391 if (!bf)
396 error = -ENOMEM; 392 return -ENOMEM;
397 goto fail2;
398 }
399 dd->dd_bufptr = bf;
400 393
401 for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) { 394 for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) {
402 bf->bf_desc = ds; 395 bf->bf_desc = ds;
@@ -422,12 +415,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
422 list_add_tail(&bf->list, head); 415 list_add_tail(&bf->list, head);
423 } 416 }
424 return 0; 417 return 0;
425fail2:
426 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
427 dd->dd_desc_paddr);
428fail:
429 memset(dd, 0, sizeof(*dd));
430 return error;
431} 418}
432 419
433static int ath9k_init_queues(struct ath_softc *sc) 420static int ath9k_init_queues(struct ath_softc *sc)
@@ -457,11 +444,13 @@ static int ath9k_init_channels_rates(struct ath_softc *sc)
457 ATH9K_NUM_CHANNELS); 444 ATH9K_NUM_CHANNELS);
458 445
459 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { 446 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
460 channels = kmemdup(ath9k_2ghz_chantable, 447 channels = devm_kzalloc(sc->dev,
461 sizeof(ath9k_2ghz_chantable), GFP_KERNEL); 448 sizeof(ath9k_2ghz_chantable), GFP_KERNEL);
462 if (!channels) 449 if (!channels)
463 return -ENOMEM; 450 return -ENOMEM;
464 451
452 memcpy(channels, ath9k_2ghz_chantable,
453 sizeof(ath9k_2ghz_chantable));
465 sc->sbands[IEEE80211_BAND_2GHZ].channels = channels; 454 sc->sbands[IEEE80211_BAND_2GHZ].channels = channels;
466 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; 455 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
467 sc->sbands[IEEE80211_BAND_2GHZ].n_channels = 456 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
@@ -472,14 +461,13 @@ static int ath9k_init_channels_rates(struct ath_softc *sc)
472 } 461 }
473 462
474 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { 463 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
475 channels = kmemdup(ath9k_5ghz_chantable, 464 channels = devm_kzalloc(sc->dev,
476 sizeof(ath9k_5ghz_chantable), GFP_KERNEL); 465 sizeof(ath9k_5ghz_chantable), GFP_KERNEL);
477 if (!channels) { 466 if (!channels)
478 if (sc->sbands[IEEE80211_BAND_2GHZ].channels)
479 kfree(sc->sbands[IEEE80211_BAND_2GHZ].channels);
480 return -ENOMEM; 467 return -ENOMEM;
481 }
482 468
469 memcpy(channels, ath9k_5ghz_chantable,
470 sizeof(ath9k_5ghz_chantable));
483 sc->sbands[IEEE80211_BAND_5GHZ].channels = channels; 471 sc->sbands[IEEE80211_BAND_5GHZ].channels = channels;
484 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; 472 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
485 sc->sbands[IEEE80211_BAND_5GHZ].n_channels = 473 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
@@ -565,10 +553,11 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
565 int ret = 0, i; 553 int ret = 0, i;
566 int csz = 0; 554 int csz = 0;
567 555
568 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL); 556 ah = devm_kzalloc(sc->dev, sizeof(struct ath_hw), GFP_KERNEL);
569 if (!ah) 557 if (!ah)
570 return -ENOMEM; 558 return -ENOMEM;
571 559
560 ah->dev = sc->dev;
572 ah->hw = sc->hw; 561 ah->hw = sc->hw;
573 ah->hw_version.devid = devid; 562 ah->hw_version.devid = devid;
574 ah->reg_ops.read = ath9k_ioread32; 563 ah->reg_ops.read = ath9k_ioread32;
@@ -636,7 +625,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
636 if (pdata && pdata->eeprom_name) { 625 if (pdata && pdata->eeprom_name) {
637 ret = ath9k_eeprom_request(sc, pdata->eeprom_name); 626 ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
638 if (ret) 627 if (ret)
639 goto err_eeprom; 628 return ret;
640 } 629 }
641 630
642 /* Initializes the hardware for all supported chipsets */ 631 /* Initializes the hardware for all supported chipsets */
@@ -676,10 +665,6 @@ err_queues:
676 ath9k_hw_deinit(ah); 665 ath9k_hw_deinit(ah);
677err_hw: 666err_hw:
678 ath9k_eeprom_release(sc); 667 ath9k_eeprom_release(sc);
679err_eeprom:
680 kfree(ah);
681 sc->sc_ah = NULL;
682
683 return ret; 668 return ret;
684} 669}
685 670
@@ -844,8 +829,8 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
844 829
845 /* Bring up device */ 830 /* Bring up device */
846 error = ath9k_init_softc(devid, sc, bus_ops); 831 error = ath9k_init_softc(devid, sc, bus_ops);
847 if (error != 0) 832 if (error)
848 goto error_init; 833 return error;
849 834
850 ah = sc->sc_ah; 835 ah = sc->sc_ah;
851 common = ath9k_hw_common(ah); 836 common = ath9k_hw_common(ah);
@@ -855,19 +840,19 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
855 error = ath_regd_init(&common->regulatory, sc->hw->wiphy, 840 error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
856 ath9k_reg_notifier); 841 ath9k_reg_notifier);
857 if (error) 842 if (error)
858 goto error_regd; 843 goto deinit;
859 844
860 reg = &common->regulatory; 845 reg = &common->regulatory;
861 846
862 /* Setup TX DMA */ 847 /* Setup TX DMA */
863 error = ath_tx_init(sc, ATH_TXBUF); 848 error = ath_tx_init(sc, ATH_TXBUF);
864 if (error != 0) 849 if (error != 0)
865 goto error_tx; 850 goto deinit;
866 851
867 /* Setup RX DMA */ 852 /* Setup RX DMA */
868 error = ath_rx_init(sc, ATH_RXBUF); 853 error = ath_rx_init(sc, ATH_RXBUF);
869 if (error != 0) 854 if (error != 0)
870 goto error_rx; 855 goto deinit;
871 856
872 ath9k_init_txpower_limits(sc); 857 ath9k_init_txpower_limits(sc);
873 858
@@ -881,19 +866,19 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
881 /* Register with mac80211 */ 866 /* Register with mac80211 */
882 error = ieee80211_register_hw(hw); 867 error = ieee80211_register_hw(hw);
883 if (error) 868 if (error)
884 goto error_register; 869 goto rx_cleanup;
885 870
886 error = ath9k_init_debug(ah); 871 error = ath9k_init_debug(ah);
887 if (error) { 872 if (error) {
888 ath_err(common, "Unable to create debugfs files\n"); 873 ath_err(common, "Unable to create debugfs files\n");
889 goto error_world; 874 goto unregister;
890 } 875 }
891 876
892 /* Handle world regulatory */ 877 /* Handle world regulatory */
893 if (!ath_is_world_regd(reg)) { 878 if (!ath_is_world_regd(reg)) {
894 error = regulatory_hint(hw->wiphy, reg->alpha2); 879 error = regulatory_hint(hw->wiphy, reg->alpha2);
895 if (error) 880 if (error)
896 goto error_world; 881 goto unregister;
897 } 882 }
898 883
899 ath_init_leds(sc); 884 ath_init_leds(sc);
@@ -901,17 +886,12 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
901 886
902 return 0; 887 return 0;
903 888
904error_world: 889unregister:
905 ieee80211_unregister_hw(hw); 890 ieee80211_unregister_hw(hw);
906error_register: 891rx_cleanup:
907 ath_rx_cleanup(sc); 892 ath_rx_cleanup(sc);
908error_rx: 893deinit:
909 ath_tx_cleanup(sc);
910error_tx:
911 /* Nothing */
912error_regd:
913 ath9k_deinit_softc(sc); 894 ath9k_deinit_softc(sc);
914error_init:
915 return error; 895 return error;
916} 896}
917 897
@@ -923,12 +903,6 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
923{ 903{
924 int i = 0; 904 int i = 0;
925 905
926 if (sc->sbands[IEEE80211_BAND_2GHZ].channels)
927 kfree(sc->sbands[IEEE80211_BAND_2GHZ].channels);
928
929 if (sc->sbands[IEEE80211_BAND_5GHZ].channels)
930 kfree(sc->sbands[IEEE80211_BAND_5GHZ].channels);
931
932 ath9k_deinit_btcoex(sc); 906 ath9k_deinit_btcoex(sc);
933 907
934 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) 908 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
@@ -940,8 +914,11 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
940 sc->dfs_detector->exit(sc->dfs_detector); 914 sc->dfs_detector->exit(sc->dfs_detector);
941 915
942 ath9k_eeprom_release(sc); 916 ath9k_eeprom_release(sc);
943 kfree(sc->sc_ah); 917
944 sc->sc_ah = NULL; 918 if (sc->rfs_chan_spec_scan) {
919 relay_close(sc->rfs_chan_spec_scan);
920 sc->rfs_chan_spec_scan = NULL;
921 }
945} 922}
946 923
947void ath9k_deinit_device(struct ath_softc *sc) 924void ath9k_deinit_device(struct ath_softc *sc)
@@ -957,22 +934,9 @@ void ath9k_deinit_device(struct ath_softc *sc)
957 934
958 ieee80211_unregister_hw(hw); 935 ieee80211_unregister_hw(hw);
959 ath_rx_cleanup(sc); 936 ath_rx_cleanup(sc);
960 ath_tx_cleanup(sc);
961 ath9k_deinit_softc(sc); 937 ath9k_deinit_softc(sc);
962} 938}
963 939
964void ath_descdma_cleanup(struct ath_softc *sc,
965 struct ath_descdma *dd,
966 struct list_head *head)
967{
968 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
969 dd->dd_desc_paddr);
970
971 INIT_LIST_HEAD(head);
972 kfree(dd->dd_bufptr);
973 memset(dd, 0, sizeof(*dd));
974}
975
976/************************/ 940/************************/
977/* Module Hooks */ 941/* Module Hooks */
978/************************/ 942/************************/
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index 4a745e68dd94..1ff817061ebc 100644
--- a/drivers/net/wireless/ath/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
@@ -226,7 +226,8 @@ enum ath9k_phyerr {
226 ATH9K_PHYERR_HT_LENGTH_ILLEGAL = 35, 226 ATH9K_PHYERR_HT_LENGTH_ILLEGAL = 35,
227 ATH9K_PHYERR_HT_RATE_ILLEGAL = 36, 227 ATH9K_PHYERR_HT_RATE_ILLEGAL = 36,
228 228
229 ATH9K_PHYERR_MAX = 37, 229 ATH9K_PHYERR_SPECTRAL = 38,
230 ATH9K_PHYERR_MAX = 39,
230}; 231};
231 232
232struct ath_desc { 233struct ath_desc {
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index dd91f8fdc01c..4b72b660f180 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -182,7 +182,7 @@ static void ath_restart_work(struct ath_softc *sc)
182 ath_start_ani(sc); 182 ath_start_ani(sc);
183} 183}
184 184
185static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx) 185static bool ath_prepare_reset(struct ath_softc *sc)
186{ 186{
187 struct ath_hw *ah = sc->sc_ah; 187 struct ath_hw *ah = sc->sc_ah;
188 bool ret = true; 188 bool ret = true;
@@ -196,10 +196,10 @@ static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx)
196 ath9k_debug_samp_bb_mac(sc); 196 ath9k_debug_samp_bb_mac(sc);
197 ath9k_hw_disable_interrupts(ah); 197 ath9k_hw_disable_interrupts(ah);
198 198
199 if (!ath_stoprecv(sc)) 199 if (!ath_drain_all_txq(sc))
200 ret = false; 200 ret = false;
201 201
202 if (!ath_drain_all_txq(sc, retry_tx)) 202 if (!ath_stoprecv(sc))
203 ret = false; 203 ret = false;
204 204
205 return ret; 205 return ret;
@@ -247,8 +247,7 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)
247 return true; 247 return true;
248} 248}
249 249
250static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan, 250static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
251 bool retry_tx)
252{ 251{
253 struct ath_hw *ah = sc->sc_ah; 252 struct ath_hw *ah = sc->sc_ah;
254 struct ath_common *common = ath9k_hw_common(ah); 253 struct ath_common *common = ath9k_hw_common(ah);
@@ -271,7 +270,7 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
271 hchan = ah->curchan; 270 hchan = ah->curchan;
272 } 271 }
273 272
274 if (!ath_prepare_reset(sc, retry_tx)) 273 if (!ath_prepare_reset(sc))
275 fastcc = false; 274 fastcc = false;
276 275
277 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n", 276 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
@@ -312,7 +311,7 @@ static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
312 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) 311 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
313 return -EIO; 312 return -EIO;
314 313
315 r = ath_reset_internal(sc, hchan, false); 314 r = ath_reset_internal(sc, hchan);
316 315
317 return r; 316 return r;
318} 317}
@@ -542,23 +541,21 @@ chip_reset:
542#undef SCHED_INTR 541#undef SCHED_INTR
543} 542}
544 543
545static int ath_reset(struct ath_softc *sc, bool retry_tx) 544static int ath_reset(struct ath_softc *sc)
546{ 545{
547 int r; 546 int i, r;
548 547
549 ath9k_ps_wakeup(sc); 548 ath9k_ps_wakeup(sc);
550 549
551 r = ath_reset_internal(sc, NULL, retry_tx); 550 r = ath_reset_internal(sc, NULL);
552 551
553 if (retry_tx) { 552 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
554 int i; 553 if (!ATH_TXQ_SETUP(sc, i))
555 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 554 continue;
556 if (ATH_TXQ_SETUP(sc, i)) { 555
557 spin_lock_bh(&sc->tx.txq[i].axq_lock); 556 spin_lock_bh(&sc->tx.txq[i].axq_lock);
558 ath_txq_schedule(sc, &sc->tx.txq[i]); 557 ath_txq_schedule(sc, &sc->tx.txq[i]);
559 spin_unlock_bh(&sc->tx.txq[i].axq_lock); 558 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
560 }
561 }
562 } 559 }
563 560
564 ath9k_ps_restore(sc); 561 ath9k_ps_restore(sc);
@@ -579,7 +576,7 @@ void ath_reset_work(struct work_struct *work)
579{ 576{
580 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work); 577 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
581 578
582 ath_reset(sc, true); 579 ath_reset(sc);
583} 580}
584 581
585/**********************/ 582/**********************/
@@ -797,7 +794,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
797 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 794 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
798 } 795 }
799 796
800 ath_prepare_reset(sc, false); 797 ath_prepare_reset(sc);
801 798
802 if (sc->rx.frag) { 799 if (sc->rx.frag) {
803 dev_kfree_skb_any(sc->rx.frag); 800 dev_kfree_skb_any(sc->rx.frag);
@@ -1068,6 +1065,86 @@ static void ath9k_disable_ps(struct ath_softc *sc)
1068 ath_dbg(common, PS, "PowerSave disabled\n"); 1065 ath_dbg(common, PS, "PowerSave disabled\n");
1069} 1066}
1070 1067
1068void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1069{
1070 struct ath_softc *sc = hw->priv;
1071 struct ath_hw *ah = sc->sc_ah;
1072 struct ath_common *common = ath9k_hw_common(ah);
1073 u32 rxfilter;
1074
1075 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1076 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1077 return;
1078 }
1079
1080 ath9k_ps_wakeup(sc);
1081 rxfilter = ath9k_hw_getrxfilter(ah);
1082 ath9k_hw_setrxfilter(ah, rxfilter |
1083 ATH9K_RX_FILTER_PHYRADAR |
1084 ATH9K_RX_FILTER_PHYERR);
1085
1086 /* TODO: usually this should not be neccesary, but for some reason
1087 * (or in some mode?) the trigger must be called after the
1088 * configuration, otherwise the register will have its values reset
1089 * (on my ar9220 to value 0x01002310)
1090 */
1091 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1092 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1093 ath9k_ps_restore(sc);
1094}
1095
1096int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1097 enum spectral_mode spectral_mode)
1098{
1099 struct ath_softc *sc = hw->priv;
1100 struct ath_hw *ah = sc->sc_ah;
1101 struct ath_common *common = ath9k_hw_common(ah);
1102 struct ath_spec_scan param;
1103
1104 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1105 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1106 return -1;
1107 }
1108
1109 /* NOTE: this will generate a few samples ...
1110 *
1111 * TODO: review default parameters, and/or define an interface to set
1112 * them.
1113 */
1114 param.enabled = 1;
1115 param.short_repeat = true;
1116 param.count = 8;
1117 param.endless = false;
1118 param.period = 0xFF;
1119 param.fft_period = 0xF;
1120
1121 switch (spectral_mode) {
1122 case SPECTRAL_DISABLED:
1123 param.enabled = 0;
1124 break;
1125 case SPECTRAL_BACKGROUND:
1126 /* send endless samples.
1127 * TODO: is this really useful for "background"?
1128 */
1129 param.endless = 1;
1130 break;
1131 case SPECTRAL_CHANSCAN:
1132 break;
1133 case SPECTRAL_MANUAL:
1134 break;
1135 default:
1136 return -1;
1137 }
1138
1139 ath9k_ps_wakeup(sc);
1140 ath9k_hw_ops(ah)->spectral_scan_config(ah, &param);
1141 ath9k_ps_restore(sc);
1142
1143 sc->spectral_mode = spectral_mode;
1144
1145 return 0;
1146}
1147
1071static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1148static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1072{ 1149{
1073 struct ath_softc *sc = hw->priv; 1150 struct ath_softc *sc = hw->priv;
@@ -1181,6 +1258,11 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1181 */ 1258 */
1182 if (old_pos >= 0) 1259 if (old_pos >= 0)
1183 ath_update_survey_nf(sc, old_pos); 1260 ath_update_survey_nf(sc, old_pos);
1261
1262 /* perform spectral scan if requested. */
1263 if (sc->scanning && sc->spectral_mode == SPECTRAL_CHANSCAN)
1264 ath9k_spectral_scan_trigger(hw);
1265
1184 } 1266 }
1185 1267
1186 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1268 if (changed & IEEE80211_CONF_CHANGE_POWER) {
@@ -1603,7 +1685,9 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1603 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1685 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1604 ath9k_ps_restore(sc); 1686 ath9k_ps_restore(sc);
1605 break; 1687 break;
1606 case IEEE80211_AMPDU_TX_STOP: 1688 case IEEE80211_AMPDU_TX_STOP_CONT:
1689 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1690 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1607 ath9k_ps_wakeup(sc); 1691 ath9k_ps_wakeup(sc);
1608 ath_tx_aggr_stop(sc, sta, tid); 1692 ath_tx_aggr_stop(sc, sta, tid);
1609 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1693 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
@@ -1722,11 +1806,11 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
1722 if (drop) { 1806 if (drop) {
1723 ath9k_ps_wakeup(sc); 1807 ath9k_ps_wakeup(sc);
1724 spin_lock_bh(&sc->sc_pcu_lock); 1808 spin_lock_bh(&sc->sc_pcu_lock);
1725 drain_txq = ath_drain_all_txq(sc, false); 1809 drain_txq = ath_drain_all_txq(sc);
1726 spin_unlock_bh(&sc->sc_pcu_lock); 1810 spin_unlock_bh(&sc->sc_pcu_lock);
1727 1811
1728 if (!drain_txq) 1812 if (!drain_txq)
1729 ath_reset(sc, false); 1813 ath_reset(sc);
1730 1814
1731 ath9k_ps_restore(sc); 1815 ath9k_ps_restore(sc);
1732 ieee80211_wake_queues(hw); 1816 ieee80211_wake_queues(hw);
@@ -2234,6 +2318,19 @@ static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2234} 2318}
2235 2319
2236#endif 2320#endif
2321static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2322{
2323 struct ath_softc *sc = hw->priv;
2324
2325 sc->scanning = 1;
2326}
2327
2328static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2329{
2330 struct ath_softc *sc = hw->priv;
2331
2332 sc->scanning = 0;
2333}
2237 2334
2238struct ieee80211_ops ath9k_ops = { 2335struct ieee80211_ops ath9k_ops = {
2239 .tx = ath9k_tx, 2336 .tx = ath9k_tx,
@@ -2280,4 +2377,6 @@ struct ieee80211_ops ath9k_ops = {
2280 .sta_add_debugfs = ath9k_sta_add_debugfs, 2377 .sta_add_debugfs = ath9k_sta_add_debugfs,
2281 .sta_remove_debugfs = ath9k_sta_remove_debugfs, 2378 .sta_remove_debugfs = ath9k_sta_remove_debugfs,
2282#endif 2379#endif
2380 .sw_scan_start = ath9k_sw_scan_start,
2381 .sw_scan_complete = ath9k_sw_scan_complete,
2283}; 2382};
diff --git a/drivers/net/wireless/ath/ath9k/mci.c b/drivers/net/wireless/ath/ath9k/mci.c
index 5c02702f21e7..d2074334ec9b 100644
--- a/drivers/net/wireless/ath/ath9k/mci.c
+++ b/drivers/net/wireless/ath/ath9k/mci.c
@@ -438,7 +438,7 @@ int ath_mci_setup(struct ath_softc *sc)
438 struct ath_mci_buf *buf = &mci->sched_buf; 438 struct ath_mci_buf *buf = &mci->sched_buf;
439 int ret; 439 int ret;
440 440
441 buf->bf_addr = dma_alloc_coherent(sc->dev, 441 buf->bf_addr = dmam_alloc_coherent(sc->dev,
442 ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE, 442 ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
443 &buf->bf_paddr, GFP_KERNEL); 443 &buf->bf_paddr, GFP_KERNEL);
444 444
@@ -477,11 +477,6 @@ void ath_mci_cleanup(struct ath_softc *sc)
477 struct ath_mci_coex *mci = &sc->mci_coex; 477 struct ath_mci_coex *mci = &sc->mci_coex;
478 struct ath_mci_buf *buf = &mci->sched_buf; 478 struct ath_mci_buf *buf = &mci->sched_buf;
479 479
480 if (buf->bf_addr)
481 dma_free_coherent(sc->dev,
482 ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
483 buf->bf_addr, buf->bf_paddr);
484
485 ar9003_mci_cleanup(ah); 480 ar9003_mci_cleanup(ah);
486 481
487 ath_dbg(common, MCI, "MCI De-Initialized\n"); 482 ath_dbg(common, MCI, "MCI De-Initialized\n");
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 7ae73fbd9136..0e0d39583837 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -147,7 +147,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = {
147 147
148static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 148static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
149{ 149{
150 void __iomem *mem;
151 struct ath_softc *sc; 150 struct ath_softc *sc;
152 struct ieee80211_hw *hw; 151 struct ieee80211_hw *hw;
153 u8 csz; 152 u8 csz;
@@ -155,19 +154,19 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
155 int ret = 0; 154 int ret = 0;
156 char hw_name[64]; 155 char hw_name[64];
157 156
158 if (pci_enable_device(pdev)) 157 if (pcim_enable_device(pdev))
159 return -EIO; 158 return -EIO;
160 159
161 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 160 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
162 if (ret) { 161 if (ret) {
163 pr_err("32-bit DMA not available\n"); 162 pr_err("32-bit DMA not available\n");
164 goto err_dma; 163 return ret;
165 } 164 }
166 165
167 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 166 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
168 if (ret) { 167 if (ret) {
169 pr_err("32-bit DMA consistent DMA enable failed\n"); 168 pr_err("32-bit DMA consistent DMA enable failed\n");
170 goto err_dma; 169 return ret;
171 } 170 }
172 171
173 /* 172 /*
@@ -203,25 +202,16 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
203 if ((val & 0x0000ff00) != 0) 202 if ((val & 0x0000ff00) != 0)
204 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); 203 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
205 204
206 ret = pci_request_region(pdev, 0, "ath9k"); 205 ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
207 if (ret) { 206 if (ret) {
208 dev_err(&pdev->dev, "PCI memory region reserve error\n"); 207 dev_err(&pdev->dev, "PCI memory region reserve error\n");
209 ret = -ENODEV; 208 return -ENODEV;
210 goto err_region;
211 }
212
213 mem = pci_iomap(pdev, 0, 0);
214 if (!mem) {
215 pr_err("PCI memory map error\n") ;
216 ret = -EIO;
217 goto err_iomap;
218 } 209 }
219 210
220 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops); 211 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
221 if (!hw) { 212 if (!hw) {
222 dev_err(&pdev->dev, "No memory for ieee80211_hw\n"); 213 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
223 ret = -ENOMEM; 214 return -ENOMEM;
224 goto err_alloc_hw;
225 } 215 }
226 216
227 SET_IEEE80211_DEV(hw, &pdev->dev); 217 SET_IEEE80211_DEV(hw, &pdev->dev);
@@ -230,7 +220,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
230 sc = hw->priv; 220 sc = hw->priv;
231 sc->hw = hw; 221 sc->hw = hw;
232 sc->dev = &pdev->dev; 222 sc->dev = &pdev->dev;
233 sc->mem = mem; 223 sc->mem = pcim_iomap_table(pdev)[0];
234 224
235 /* Will be cleared in ath9k_start() */ 225 /* Will be cleared in ath9k_start() */
236 set_bit(SC_OP_INVALID, &sc->sc_flags); 226 set_bit(SC_OP_INVALID, &sc->sc_flags);
@@ -251,7 +241,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
251 241
252 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name)); 242 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
253 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n", 243 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
254 hw_name, (unsigned long)mem, pdev->irq); 244 hw_name, (unsigned long)sc->mem, pdev->irq);
255 245
256 return 0; 246 return 0;
257 247
@@ -259,14 +249,6 @@ err_init:
259 free_irq(sc->irq, sc); 249 free_irq(sc->irq, sc);
260err_irq: 250err_irq:
261 ieee80211_free_hw(hw); 251 ieee80211_free_hw(hw);
262err_alloc_hw:
263 pci_iounmap(pdev, mem);
264err_iomap:
265 pci_release_region(pdev, 0);
266err_region:
267 /* Nothing */
268err_dma:
269 pci_disable_device(pdev);
270 return ret; 252 return ret;
271} 253}
272 254
@@ -274,17 +256,12 @@ static void ath_pci_remove(struct pci_dev *pdev)
274{ 256{
275 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 257 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
276 struct ath_softc *sc = hw->priv; 258 struct ath_softc *sc = hw->priv;
277 void __iomem *mem = sc->mem;
278 259
279 if (!is_ath9k_unloaded) 260 if (!is_ath9k_unloaded)
280 sc->sc_ah->ah_flags |= AH_UNPLUGGED; 261 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
281 ath9k_deinit_device(sc); 262 ath9k_deinit_device(sc);
282 free_irq(sc->irq, sc); 263 free_irq(sc->irq, sc);
283 ieee80211_free_hw(sc->hw); 264 ieee80211_free_hw(sc->hw);
284
285 pci_iounmap(pdev, mem);
286 pci_disable_device(pdev);
287 pci_release_region(pdev, 0);
288} 265}
289 266
290#ifdef CONFIG_PM_SLEEP 267#ifdef CONFIG_PM_SLEEP
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index 90752f246970..d7c129bb571b 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -15,6 +15,7 @@
15 */ 15 */
16 16
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18#include <linux/relay.h>
18#include "ath9k.h" 19#include "ath9k.h"
19#include "ar9003_mac.h" 20#include "ar9003_mac.h"
20 21
@@ -180,11 +181,6 @@ static void ath_rx_edma_cleanup(struct ath_softc *sc)
180 bf->bf_mpdu = NULL; 181 bf->bf_mpdu = NULL;
181 } 182 }
182 } 183 }
183
184 INIT_LIST_HEAD(&sc->rx.rxbuf);
185
186 kfree(sc->rx.rx_bufptr);
187 sc->rx.rx_bufptr = NULL;
188} 184}
189 185
190static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size) 186static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
@@ -211,12 +207,11 @@ static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
211 ah->caps.rx_hp_qdepth); 207 ah->caps.rx_hp_qdepth);
212 208
213 size = sizeof(struct ath_buf) * nbufs; 209 size = sizeof(struct ath_buf) * nbufs;
214 bf = kzalloc(size, GFP_KERNEL); 210 bf = devm_kzalloc(sc->dev, size, GFP_KERNEL);
215 if (!bf) 211 if (!bf)
216 return -ENOMEM; 212 return -ENOMEM;
217 213
218 INIT_LIST_HEAD(&sc->rx.rxbuf); 214 INIT_LIST_HEAD(&sc->rx.rxbuf);
219 sc->rx.rx_bufptr = bf;
220 215
221 for (i = 0; i < nbufs; i++, bf++) { 216 for (i = 0; i < nbufs; i++, bf++) {
222 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL); 217 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
@@ -357,9 +352,6 @@ void ath_rx_cleanup(struct ath_softc *sc)
357 bf->bf_mpdu = NULL; 352 bf->bf_mpdu = NULL;
358 } 353 }
359 } 354 }
360
361 if (sc->rx.rxdma.dd_desc_len != 0)
362 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
363 } 355 }
364} 356}
365 357
@@ -1024,6 +1016,108 @@ static void ath9k_rx_skb_postprocess(struct ath_common *common,
1024 rxs->flag &= ~RX_FLAG_DECRYPTED; 1016 rxs->flag &= ~RX_FLAG_DECRYPTED;
1025} 1017}
1026 1018
1019static s8 fix_rssi_inv_only(u8 rssi_val)
1020{
1021 if (rssi_val == 128)
1022 rssi_val = 0;
1023 return (s8) rssi_val;
1024}
1025
1026
1027static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
1028 struct ath_rx_status *rs, u64 tsf)
1029{
1030#ifdef CONFIG_ATH_DEBUG
1031 struct ath_hw *ah = sc->sc_ah;
1032 u8 bins[SPECTRAL_HT20_NUM_BINS];
1033 u8 *vdata = (u8 *)hdr;
1034 struct fft_sample_ht20 fft_sample;
1035 struct ath_radar_info *radar_info;
1036 struct ath_ht20_mag_info *mag_info;
1037 int len = rs->rs_datalen;
1038 int i, dc_pos;
1039
1040 /* AR9280 and before report via ATH9K_PHYERR_RADAR, AR93xx and newer
1041 * via ATH9K_PHYERR_SPECTRAL. Haven't seen ATH9K_PHYERR_FALSE_RADAR_EXT
1042 * yet, but this is supposed to be possible as well.
1043 */
1044 if (rs->rs_phyerr != ATH9K_PHYERR_RADAR &&
1045 rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT &&
1046 rs->rs_phyerr != ATH9K_PHYERR_SPECTRAL)
1047 return;
1048
1049 /* Variation in the data length is possible and will be fixed later.
1050 * Note that we only support HT20 for now.
1051 *
1052 * TODO: add HT20_40 support as well.
1053 */
1054 if ((len > SPECTRAL_HT20_TOTAL_DATA_LEN + 2) ||
1055 (len < SPECTRAL_HT20_TOTAL_DATA_LEN - 1))
1056 return;
1057
1058 /* check if spectral scan bit is set. This does not have to be checked
1059 * if received through a SPECTRAL phy error, but shouldn't hurt.
1060 */
1061 radar_info = ((struct ath_radar_info *)&vdata[len]) - 1;
1062 if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
1063 return;
1064
1065 fft_sample.tlv.type = ATH_FFT_SAMPLE_HT20;
1066 fft_sample.tlv.length = sizeof(fft_sample) - sizeof(fft_sample.tlv);
1067
1068 fft_sample.freq = ah->curchan->chan->center_freq;
1069 fft_sample.rssi = fix_rssi_inv_only(rs->rs_rssi_ctl0);
1070 fft_sample.noise = ah->noise;
1071
1072 switch (len - SPECTRAL_HT20_TOTAL_DATA_LEN) {
1073 case 0:
1074 /* length correct, nothing to do. */
1075 memcpy(bins, vdata, SPECTRAL_HT20_NUM_BINS);
1076 break;
1077 case -1:
1078 /* first byte missing, duplicate it. */
1079 memcpy(&bins[1], vdata, SPECTRAL_HT20_NUM_BINS - 1);
1080 bins[0] = vdata[0];
1081 break;
1082 case 2:
1083 /* MAC added 2 extra bytes at bin 30 and 32, remove them. */
1084 memcpy(bins, vdata, 30);
1085 bins[30] = vdata[31];
1086 memcpy(&bins[31], &vdata[33], SPECTRAL_HT20_NUM_BINS - 31);
1087 break;
1088 case 1:
1089 /* MAC added 2 extra bytes AND first byte is missing. */
1090 bins[0] = vdata[0];
1091 memcpy(&bins[0], vdata, 30);
1092 bins[31] = vdata[31];
1093 memcpy(&bins[32], &vdata[33], SPECTRAL_HT20_NUM_BINS - 32);
1094 break;
1095 default:
1096 return;
1097 }
1098
1099 /* DC value (value in the middle) is the blind spot of the spectral
1100 * sample and invalid, interpolate it.
1101 */
1102 dc_pos = SPECTRAL_HT20_NUM_BINS / 2;
1103 bins[dc_pos] = (bins[dc_pos + 1] + bins[dc_pos - 1]) / 2;
1104
1105 /* mag data is at the end of the frame, in front of radar_info */
1106 mag_info = ((struct ath_ht20_mag_info *)radar_info) - 1;
1107
1108 /* Apply exponent and grab further auxiliary information. */
1109 for (i = 0; i < SPECTRAL_HT20_NUM_BINS; i++)
1110 fft_sample.data[i] = bins[i] << mag_info->max_exp;
1111
1112 fft_sample.max_magnitude = spectral_max_magnitude(mag_info->all_bins);
1113 fft_sample.max_index = spectral_max_index(mag_info->all_bins);
1114 fft_sample.bitmap_weight = spectral_bitmap_weight(mag_info->all_bins);
1115 fft_sample.tsf = tsf;
1116
1117 ath_debug_send_fft_sample(sc, &fft_sample.tlv);
1118#endif
1119}
1120
1027int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) 1121int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1028{ 1122{
1029 struct ath_buf *bf; 1123 struct ath_buf *bf;
@@ -1108,6 +1202,9 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1108 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000)) 1202 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1109 rxs->mactime += 0x100000000ULL; 1203 rxs->mactime += 0x100000000ULL;
1110 1204
1205 if ((rs.rs_status & ATH9K_RXERR_PHY))
1206 ath_process_fft(sc, hdr, &rs, rxs->mactime);
1207
1111 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs, 1208 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1112 rxs, &decrypt_error); 1209 rxs, &decrypt_error);
1113 if (retval) 1210 if (retval)
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index ad3c82c09177..5929850649f0 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -789,6 +789,7 @@
789#define AR_SREV_REVISION_9271_11 1 789#define AR_SREV_REVISION_9271_11 1
790#define AR_SREV_VERSION_9300 0x1c0 790#define AR_SREV_VERSION_9300 0x1c0
791#define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */ 791#define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */
792#define AR_SREV_REVISION_9300_22 3
792#define AR_SREV_VERSION_9330 0x200 793#define AR_SREV_VERSION_9330 0x200
793#define AR_SREV_REVISION_9330_10 0 794#define AR_SREV_REVISION_9330_10 0
794#define AR_SREV_REVISION_9330_11 1 795#define AR_SREV_REVISION_9330_11 1
@@ -869,6 +870,9 @@
869 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300)) 870 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
870#define AR_SREV_9300_20_OR_LATER(_ah) \ 871#define AR_SREV_9300_20_OR_LATER(_ah) \
871 ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300) 872 ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300)
873#define AR_SREV_9300_22(_ah) \
874 (AR_SREV_9300(ah) && \
875 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_22))
872 876
873#define AR_SREV_9330(_ah) \ 877#define AR_SREV_9330(_ah) \
874 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330)) 878 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
@@ -884,9 +888,6 @@
884 888
885#define AR_SREV_9485(_ah) \ 889#define AR_SREV_9485(_ah) \
886 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9485)) 890 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9485))
887#define AR_SREV_9485_10(_ah) \
888 (AR_SREV_9485(_ah) && \
889 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_10))
890#define AR_SREV_9485_11(_ah) \ 891#define AR_SREV_9485_11(_ah) \
891 (AR_SREV_9485(_ah) && \ 892 (AR_SREV_9485(_ah) && \
892 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11)) 893 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 90e48a0fafe5..feacaafee959 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -378,7 +378,7 @@ static void ath_tx_count_frames(struct ath_softc *sc, struct ath_buf *bf,
378 378
379static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, 379static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
380 struct ath_buf *bf, struct list_head *bf_q, 380 struct ath_buf *bf, struct list_head *bf_q,
381 struct ath_tx_status *ts, int txok, bool retry) 381 struct ath_tx_status *ts, int txok)
382{ 382{
383 struct ath_node *an = NULL; 383 struct ath_node *an = NULL;
384 struct sk_buff *skb; 384 struct sk_buff *skb;
@@ -490,7 +490,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
490 } else if (!isaggr && txok) { 490 } else if (!isaggr && txok) {
491 /* transmit completion */ 491 /* transmit completion */
492 acked_cnt++; 492 acked_cnt++;
493 } else if ((tid->state & AGGR_CLEANUP) || !retry) { 493 } else if (tid->state & AGGR_CLEANUP) {
494 /* 494 /*
495 * cleanup in progress, just fail 495 * cleanup in progress, just fail
496 * the un-acked sub-frames 496 * the un-acked sub-frames
@@ -604,6 +604,37 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
604 ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR); 604 ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
605} 605}
606 606
607static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
608{
609 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
610 return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
611}
612
613static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
614 struct ath_tx_status *ts, struct ath_buf *bf,
615 struct list_head *bf_head)
616{
617 bool txok, flush;
618
619 txok = !(ts->ts_status & ATH9K_TXERR_MASK);
620 flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
621 txq->axq_tx_inprogress = false;
622
623 txq->axq_depth--;
624 if (bf_is_ampdu_not_probing(bf))
625 txq->axq_ampdu_depth--;
626
627 if (!bf_isampdu(bf)) {
628 if (!flush)
629 ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
630 ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
631 } else
632 ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok);
633
634 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !flush)
635 ath_txq_schedule(sc, txq);
636}
637
607static bool ath_lookup_legacy(struct ath_buf *bf) 638static bool ath_lookup_legacy(struct ath_buf *bf)
608{ 639{
609 struct sk_buff *skb; 640 struct sk_buff *skb;
@@ -1331,23 +1362,6 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid
1331/* Queue Management */ 1362/* Queue Management */
1332/********************/ 1363/********************/
1333 1364
1334static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
1335 struct ath_txq *txq)
1336{
1337 struct ath_atx_ac *ac, *ac_tmp;
1338 struct ath_atx_tid *tid, *tid_tmp;
1339
1340 list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
1341 list_del(&ac->list);
1342 ac->sched = false;
1343 list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
1344 list_del(&tid->list);
1345 tid->sched = false;
1346 ath_tid_drain(sc, txq, tid);
1347 }
1348 }
1349}
1350
1351struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) 1365struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
1352{ 1366{
1353 struct ath_hw *ah = sc->sc_ah; 1367 struct ath_hw *ah = sc->sc_ah;
@@ -1470,14 +1484,8 @@ int ath_cabq_update(struct ath_softc *sc)
1470 return 0; 1484 return 0;
1471} 1485}
1472 1486
1473static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
1474{
1475 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
1476 return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
1477}
1478
1479static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq, 1487static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
1480 struct list_head *list, bool retry_tx) 1488 struct list_head *list)
1481{ 1489{
1482 struct ath_buf *bf, *lastbf; 1490 struct ath_buf *bf, *lastbf;
1483 struct list_head bf_head; 1491 struct list_head bf_head;
@@ -1499,16 +1507,7 @@ static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
1499 1507
1500 lastbf = bf->bf_lastbf; 1508 lastbf = bf->bf_lastbf;
1501 list_cut_position(&bf_head, list, &lastbf->list); 1509 list_cut_position(&bf_head, list, &lastbf->list);
1502 1510 ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
1503 txq->axq_depth--;
1504 if (bf_is_ampdu_not_probing(bf))
1505 txq->axq_ampdu_depth--;
1506
1507 if (bf_isampdu(bf))
1508 ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0,
1509 retry_tx);
1510 else
1511 ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
1512 } 1511 }
1513} 1512}
1514 1513
@@ -1518,7 +1517,7 @@ static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
1518 * This assumes output has been stopped and 1517 * This assumes output has been stopped and
1519 * we do not need to block ath_tx_tasklet. 1518 * we do not need to block ath_tx_tasklet.
1520 */ 1519 */
1521void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx) 1520void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq)
1522{ 1521{
1523 ath_txq_lock(sc, txq); 1522 ath_txq_lock(sc, txq);
1524 1523
@@ -1526,8 +1525,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
1526 int idx = txq->txq_tailidx; 1525 int idx = txq->txq_tailidx;
1527 1526
1528 while (!list_empty(&txq->txq_fifo[idx])) { 1527 while (!list_empty(&txq->txq_fifo[idx])) {
1529 ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx], 1528 ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx]);
1530 retry_tx);
1531 1529
1532 INCR(idx, ATH_TXFIFO_DEPTH); 1530 INCR(idx, ATH_TXFIFO_DEPTH);
1533 } 1531 }
@@ -1536,16 +1534,12 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
1536 1534
1537 txq->axq_link = NULL; 1535 txq->axq_link = NULL;
1538 txq->axq_tx_inprogress = false; 1536 txq->axq_tx_inprogress = false;
1539 ath_drain_txq_list(sc, txq, &txq->axq_q, retry_tx); 1537 ath_drain_txq_list(sc, txq, &txq->axq_q);
1540
1541 /* flush any pending frames if aggregation is enabled */
1542 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !retry_tx)
1543 ath_txq_drain_pending_buffers(sc, txq);
1544 1538
1545 ath_txq_unlock_complete(sc, txq); 1539 ath_txq_unlock_complete(sc, txq);
1546} 1540}
1547 1541
1548bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx) 1542bool ath_drain_all_txq(struct ath_softc *sc)
1549{ 1543{
1550 struct ath_hw *ah = sc->sc_ah; 1544 struct ath_hw *ah = sc->sc_ah;
1551 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1545 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
@@ -1581,7 +1575,7 @@ bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
1581 */ 1575 */
1582 txq = &sc->tx.txq[i]; 1576 txq = &sc->tx.txq[i];
1583 txq->stopped = false; 1577 txq->stopped = false;
1584 ath_draintxq(sc, txq, retry_tx); 1578 ath_draintxq(sc, txq);
1585 } 1579 }
1586 1580
1587 return !npend; 1581 return !npend;
@@ -2175,28 +2169,6 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
2175 tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1; 2169 tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1;
2176} 2170}
2177 2171
2178static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2179 struct ath_tx_status *ts, struct ath_buf *bf,
2180 struct list_head *bf_head)
2181{
2182 int txok;
2183
2184 txq->axq_depth--;
2185 txok = !(ts->ts_status & ATH9K_TXERR_MASK);
2186 txq->axq_tx_inprogress = false;
2187 if (bf_is_ampdu_not_probing(bf))
2188 txq->axq_ampdu_depth--;
2189
2190 if (!bf_isampdu(bf)) {
2191 ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
2192 ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
2193 } else
2194 ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
2195
2196 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
2197 ath_txq_schedule(sc, txq);
2198}
2199
2200static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) 2172static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
2201{ 2173{
2202 struct ath_hw *ah = sc->sc_ah; 2174 struct ath_hw *ah = sc->sc_ah;
@@ -2361,8 +2333,8 @@ static int ath_txstatus_setup(struct ath_softc *sc, int size)
2361 u8 txs_len = sc->sc_ah->caps.txs_len; 2333 u8 txs_len = sc->sc_ah->caps.txs_len;
2362 2334
2363 dd->dd_desc_len = size * txs_len; 2335 dd->dd_desc_len = size * txs_len;
2364 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len, 2336 dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len,
2365 &dd->dd_desc_paddr, GFP_KERNEL); 2337 &dd->dd_desc_paddr, GFP_KERNEL);
2366 if (!dd->dd_desc) 2338 if (!dd->dd_desc)
2367 return -ENOMEM; 2339 return -ENOMEM;
2368 2340
@@ -2382,14 +2354,6 @@ static int ath_tx_edma_init(struct ath_softc *sc)
2382 return err; 2354 return err;
2383} 2355}
2384 2356
2385static void ath_tx_edma_cleanup(struct ath_softc *sc)
2386{
2387 struct ath_descdma *dd = &sc->txsdma;
2388
2389 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
2390 dd->dd_desc_paddr);
2391}
2392
2393int ath_tx_init(struct ath_softc *sc, int nbufs) 2357int ath_tx_init(struct ath_softc *sc, int nbufs)
2394{ 2358{
2395 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2359 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
@@ -2402,7 +2366,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
2402 if (error != 0) { 2366 if (error != 0) {
2403 ath_err(common, 2367 ath_err(common,
2404 "Failed to allocate tx descriptors: %d\n", error); 2368 "Failed to allocate tx descriptors: %d\n", error);
2405 goto err; 2369 return error;
2406 } 2370 }
2407 2371
2408 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf, 2372 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
@@ -2410,36 +2374,17 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
2410 if (error != 0) { 2374 if (error != 0) {
2411 ath_err(common, 2375 ath_err(common,
2412 "Failed to allocate beacon descriptors: %d\n", error); 2376 "Failed to allocate beacon descriptors: %d\n", error);
2413 goto err; 2377 return error;
2414 } 2378 }
2415 2379
2416 INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work); 2380 INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work);
2417 2381
2418 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 2382 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
2419 error = ath_tx_edma_init(sc); 2383 error = ath_tx_edma_init(sc);
2420 if (error)
2421 goto err;
2422 }
2423
2424err:
2425 if (error != 0)
2426 ath_tx_cleanup(sc);
2427 2384
2428 return error; 2385 return error;
2429} 2386}
2430 2387
2431void ath_tx_cleanup(struct ath_softc *sc)
2432{
2433 if (sc->beacon.bdma.dd_desc_len != 0)
2434 ath_descdma_cleanup(sc, &sc->beacon.bdma, &sc->beacon.bbuf);
2435
2436 if (sc->tx.txdma.dd_desc_len != 0)
2437 ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf);
2438
2439 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
2440 ath_tx_edma_cleanup(sc);
2441}
2442
2443void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an) 2388void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2444{ 2389{
2445 struct ath_atx_tid *tid; 2390 struct ath_atx_tid *tid;
diff --git a/drivers/net/wireless/ath/carl9170/carl9170.h b/drivers/net/wireless/ath/carl9170/carl9170.h
index 2df17f1e49ef..25599741cd8a 100644
--- a/drivers/net/wireless/ath/carl9170/carl9170.h
+++ b/drivers/net/wireless/ath/carl9170/carl9170.h
@@ -85,20 +85,14 @@ enum carl9170_device_state {
85 CARL9170_STARTED, 85 CARL9170_STARTED,
86}; 86};
87 87
88#define CARL9170_NUM_TID 16
89#define WME_BA_BMP_SIZE 64 88#define WME_BA_BMP_SIZE 64
90#define CARL9170_TX_USER_RATE_TRIES 3 89#define CARL9170_TX_USER_RATE_TRIES 3
91 90
92#define WME_AC_BE 2
93#define WME_AC_BK 3
94#define WME_AC_VI 1
95#define WME_AC_VO 0
96
97#define TID_TO_WME_AC(_tid) \ 91#define TID_TO_WME_AC(_tid) \
98 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ 92 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
99 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \ 93 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
100 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ 94 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
101 WME_AC_VO) 95 IEEE80211_AC_VO)
102 96
103#define SEQ_DIFF(_start, _seq) \ 97#define SEQ_DIFF(_start, _seq) \
104 (((_start) - (_seq)) & 0x0fff) 98 (((_start) - (_seq)) & 0x0fff)
@@ -290,6 +284,7 @@ struct ar9170 {
290 unsigned int rx_size; 284 unsigned int rx_size;
291 unsigned int tx_seq_table; 285 unsigned int tx_seq_table;
292 bool ba_filter; 286 bool ba_filter;
287 bool disable_offload_fw;
293 } fw; 288 } fw;
294 289
295 /* interface configuration combinations */ 290 /* interface configuration combinations */
@@ -493,8 +488,8 @@ struct carl9170_sta_info {
493 bool sleeping; 488 bool sleeping;
494 atomic_t pending_frames; 489 atomic_t pending_frames;
495 unsigned int ampdu_max_len; 490 unsigned int ampdu_max_len;
496 struct carl9170_sta_tid __rcu *agg[CARL9170_NUM_TID]; 491 struct carl9170_sta_tid __rcu *agg[IEEE80211_NUM_TIDS];
497 struct carl9170_ba_stats stats[CARL9170_NUM_TID]; 492 struct carl9170_ba_stats stats[IEEE80211_NUM_TIDS];
498}; 493};
499 494
500struct carl9170_tx_info { 495struct carl9170_tx_info {
diff --git a/drivers/net/wireless/ath/carl9170/fw.c b/drivers/net/wireless/ath/carl9170/fw.c
index 63fd9af3fd39..47d5c2e910ad 100644
--- a/drivers/net/wireless/ath/carl9170/fw.c
+++ b/drivers/net/wireless/ath/carl9170/fw.c
@@ -215,6 +215,24 @@ static int carl9170_fw_tx_sequence(struct ar9170 *ar)
215 return 0; 215 return 0;
216} 216}
217 217
218static void carl9170_fw_set_if_combinations(struct ar9170 *ar,
219 u16 if_comb_types)
220{
221 if (ar->fw.vif_num < 2)
222 return;
223
224 ar->if_comb_limits[0].max = ar->fw.vif_num;
225 ar->if_comb_limits[0].types = if_comb_types;
226
227 ar->if_combs[0].num_different_channels = 1;
228 ar->if_combs[0].max_interfaces = ar->fw.vif_num;
229 ar->if_combs[0].limits = ar->if_comb_limits;
230 ar->if_combs[0].n_limits = ARRAY_SIZE(ar->if_comb_limits);
231
232 ar->hw->wiphy->iface_combinations = ar->if_combs;
233 ar->hw->wiphy->n_iface_combinations = ARRAY_SIZE(ar->if_combs);
234}
235
218static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len) 236static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
219{ 237{
220 const struct carl9170fw_otus_desc *otus_desc; 238 const struct carl9170fw_otus_desc *otus_desc;
@@ -264,7 +282,7 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
264 if (!SUPP(CARL9170FW_COMMAND_CAM)) { 282 if (!SUPP(CARL9170FW_COMMAND_CAM)) {
265 dev_info(&ar->udev->dev, "crypto offloading is disabled " 283 dev_info(&ar->udev->dev, "crypto offloading is disabled "
266 "by firmware.\n"); 284 "by firmware.\n");
267 ar->disable_offload = true; 285 ar->fw.disable_offload_fw = true;
268 } 286 }
269 287
270 if (SUPP(CARL9170FW_PSM) && SUPP(CARL9170FW_FIXED_5GHZ_PSM)) 288 if (SUPP(CARL9170FW_PSM) && SUPP(CARL9170FW_FIXED_5GHZ_PSM))
@@ -345,20 +363,15 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
345 } 363 }
346 } 364 }
347 365
348 ar->if_comb_limits[0].max = ar->fw.vif_num; 366 carl9170_fw_set_if_combinations(ar, if_comb_types);
349 ar->if_comb_limits[0].types = if_comb_types;
350
351 ar->if_combs[0].num_different_channels = 1;
352 ar->if_combs[0].max_interfaces = ar->fw.vif_num;
353 ar->if_combs[0].limits = ar->if_comb_limits;
354 ar->if_combs[0].n_limits = ARRAY_SIZE(ar->if_comb_limits);
355
356 ar->hw->wiphy->iface_combinations = ar->if_combs;
357 ar->hw->wiphy->n_iface_combinations = ARRAY_SIZE(ar->if_combs);
358 367
359 ar->hw->wiphy->interface_modes |= if_comb_types; 368 ar->hw->wiphy->interface_modes |= if_comb_types;
360 369
361 ar->hw->wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; 370 ar->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
371
372 /* As IBSS Encryption is software-based, IBSS RSN is supported. */
373 ar->hw->wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
374 WIPHY_FLAG_IBSS_RSN | WIPHY_FLAG_SUPPORTS_TDLS;
362 375
363#undef SUPPORTED 376#undef SUPPORTED
364 return carl9170_fw_tx_sequence(ar); 377 return carl9170_fw_tx_sequence(ar);
diff --git a/drivers/net/wireless/ath/carl9170/fwcmd.h b/drivers/net/wireless/ath/carl9170/fwcmd.h
index 9443c802b25b..9111d4ffc1b3 100644
--- a/drivers/net/wireless/ath/carl9170/fwcmd.h
+++ b/drivers/net/wireless/ath/carl9170/fwcmd.h
@@ -156,6 +156,14 @@ struct carl9170_psm {
156} __packed; 156} __packed;
157#define CARL9170_PSM_SIZE 4 157#define CARL9170_PSM_SIZE 4
158 158
159/*
160 * Note: If a bit in rx_filter is set, then it
161 * means that the particular frames which matches
162 * the condition are FILTERED/REMOVED/DISCARDED!
163 * (This is can be a bit confusing, especially
164 * because someone people think it's the exact
165 * opposite way, so watch out!)
166 */
159struct carl9170_rx_filter_cmd { 167struct carl9170_rx_filter_cmd {
160 __le32 rx_filter; 168 __le32 rx_filter;
161} __packed; 169} __packed;
diff --git a/drivers/net/wireless/ath/carl9170/hw.h b/drivers/net/wireless/ath/carl9170/hw.h
index fa834c1460f0..0db874abde50 100644
--- a/drivers/net/wireless/ath/carl9170/hw.h
+++ b/drivers/net/wireless/ath/carl9170/hw.h
@@ -384,7 +384,7 @@
384 384
385#define AR9170_MAC_REG_BCN_ADDR (AR9170_MAC_REG_BASE + 0xd84) 385#define AR9170_MAC_REG_BCN_ADDR (AR9170_MAC_REG_BASE + 0xd84)
386#define AR9170_MAC_REG_BCN_LENGTH (AR9170_MAC_REG_BASE + 0xd88) 386#define AR9170_MAC_REG_BCN_LENGTH (AR9170_MAC_REG_BASE + 0xd88)
387#define AR9170_MAC_BCN_LENGTH_MAX 256 387#define AR9170_MAC_BCN_LENGTH_MAX (512 - 32)
388 388
389#define AR9170_MAC_REG_BCN_STATUS (AR9170_MAC_REG_BASE + 0xd8c) 389#define AR9170_MAC_REG_BCN_STATUS (AR9170_MAC_REG_BASE + 0xd8c)
390 390
diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c
index 25a1e2f4f738..ef82751722e0 100644
--- a/drivers/net/wireless/ath/carl9170/main.c
+++ b/drivers/net/wireless/ath/carl9170/main.c
@@ -358,8 +358,13 @@ static int carl9170_op_start(struct ieee80211_hw *hw)
358 ar->ps.last_action = jiffies; 358 ar->ps.last_action = jiffies;
359 ar->ps.last_slept = jiffies; 359 ar->ps.last_slept = jiffies;
360 ar->erp_mode = CARL9170_ERP_AUTO; 360 ar->erp_mode = CARL9170_ERP_AUTO;
361 ar->rx_software_decryption = false; 361
362 ar->disable_offload = false; 362 /* Set "disable hw crypto offload" whenever the module parameter
363 * nohwcrypt is true or if the firmware does not support it.
364 */
365 ar->disable_offload = modparam_nohwcrypt |
366 ar->fw.disable_offload_fw;
367 ar->rx_software_decryption = ar->disable_offload;
363 368
364 for (i = 0; i < ar->hw->queues; i++) { 369 for (i = 0; i < ar->hw->queues; i++) {
365 ar->queue_stop_timeout[i] = jiffies; 370 ar->queue_stop_timeout[i] = jiffies;
@@ -565,12 +570,28 @@ static int carl9170_init_interface(struct ar9170 *ar,
565 570
566 memcpy(common->macaddr, vif->addr, ETH_ALEN); 571 memcpy(common->macaddr, vif->addr, ETH_ALEN);
567 572
568 if (modparam_nohwcrypt || 573 /* We have to fall back to software crypto, whenever
569 ((vif->type != NL80211_IFTYPE_STATION) && 574 * the user choose to participates in an IBSS. HW
570 (vif->type != NL80211_IFTYPE_AP))) { 575 * offload for IBSS RSN is not supported by this driver.
571 ar->rx_software_decryption = true; 576 *
572 ar->disable_offload = true; 577 * NOTE: If the previous main interface has already
573 } 578 * disabled hw crypto offload, we have to keep this
579 * previous disable_offload setting as it was.
580 * Altough ideally, we should notify mac80211 and tell
581 * it to forget about any HW crypto offload for now.
582 */
583 ar->disable_offload |= ((vif->type != NL80211_IFTYPE_STATION) &&
584 (vif->type != NL80211_IFTYPE_AP));
585
586 /* While the driver supports HW offload in a single
587 * P2P client configuration, it doesn't support HW
588 * offload in the favourit, concurrent P2P GO+CLIENT
589 * configuration. Hence, HW offload will always be
590 * disabled for P2P.
591 */
592 ar->disable_offload |= vif->p2p;
593
594 ar->rx_software_decryption = ar->disable_offload;
574 595
575 err = carl9170_set_operating_mode(ar); 596 err = carl9170_set_operating_mode(ar);
576 return err; 597 return err;
@@ -580,7 +601,7 @@ static int carl9170_op_add_interface(struct ieee80211_hw *hw,
580 struct ieee80211_vif *vif) 601 struct ieee80211_vif *vif)
581{ 602{
582 struct carl9170_vif_info *vif_priv = (void *) vif->drv_priv; 603 struct carl9170_vif_info *vif_priv = (void *) vif->drv_priv;
583 struct ieee80211_vif *main_vif; 604 struct ieee80211_vif *main_vif, *old_main = NULL;
584 struct ar9170 *ar = hw->priv; 605 struct ar9170 *ar = hw->priv;
585 int vif_id = -1, err = 0; 606 int vif_id = -1, err = 0;
586 607
@@ -602,6 +623,15 @@ static int carl9170_op_add_interface(struct ieee80211_hw *hw,
602 goto init; 623 goto init;
603 } 624 }
604 625
626 /* Because the AR9170 HW's MAC doesn't provide full support for
627 * multiple, independent interfaces [of different operation modes].
628 * We have to select ONE main interface [main mode of HW], but we
629 * can have multiple slaves [AKA: entry in the ACK-table].
630 *
631 * The first (from HEAD/TOP) interface in the ar->vif_list is
632 * always the main intf. All following intfs in this list
633 * are considered to be slave intfs.
634 */
605 main_vif = carl9170_get_main_vif(ar); 635 main_vif = carl9170_get_main_vif(ar);
606 636
607 if (main_vif) { 637 if (main_vif) {
@@ -610,6 +640,18 @@ static int carl9170_op_add_interface(struct ieee80211_hw *hw,
610 if (vif->type == NL80211_IFTYPE_STATION) 640 if (vif->type == NL80211_IFTYPE_STATION)
611 break; 641 break;
612 642
643 /* P2P GO [master] use-case
644 * Because the P2P GO station is selected dynamically
645 * by all participating peers of a WIFI Direct network,
646 * the driver has be able to change the main interface
647 * operating mode on the fly.
648 */
649 if (main_vif->p2p && vif->p2p &&
650 vif->type == NL80211_IFTYPE_AP) {
651 old_main = main_vif;
652 break;
653 }
654
613 err = -EBUSY; 655 err = -EBUSY;
614 rcu_read_unlock(); 656 rcu_read_unlock();
615 657
@@ -648,14 +690,41 @@ static int carl9170_op_add_interface(struct ieee80211_hw *hw,
648 vif_priv->id = vif_id; 690 vif_priv->id = vif_id;
649 vif_priv->enable_beacon = false; 691 vif_priv->enable_beacon = false;
650 ar->vifs++; 692 ar->vifs++;
651 list_add_tail_rcu(&vif_priv->list, &ar->vif_list); 693 if (old_main) {
694 /* We end up in here, if the main interface is being replaced.
695 * Put the new main interface at the HEAD of the list and the
696 * previous inteface will automatically become second in line.
697 */
698 list_add_rcu(&vif_priv->list, &ar->vif_list);
699 } else {
700 /* Add new inteface. If the list is empty, it will become the
701 * main inteface, otherwise it will be slave.
702 */
703 list_add_tail_rcu(&vif_priv->list, &ar->vif_list);
704 }
652 rcu_assign_pointer(ar->vif_priv[vif_id].vif, vif); 705 rcu_assign_pointer(ar->vif_priv[vif_id].vif, vif);
653 706
654init: 707init:
655 if (carl9170_get_main_vif(ar) == vif) { 708 main_vif = carl9170_get_main_vif(ar);
709
710 if (main_vif == vif) {
656 rcu_assign_pointer(ar->beacon_iter, vif_priv); 711 rcu_assign_pointer(ar->beacon_iter, vif_priv);
657 rcu_read_unlock(); 712 rcu_read_unlock();
658 713
714 if (old_main) {
715 struct carl9170_vif_info *old_main_priv =
716 (void *) old_main->drv_priv;
717 /* downgrade old main intf to slave intf.
718 * NOTE: We are no longer under rcu_read_lock.
719 * But we are still holding ar->mutex, so the
720 * vif data [id, addr] is safe.
721 */
722 err = carl9170_mod_virtual_mac(ar, old_main_priv->id,
723 old_main->addr);
724 if (err)
725 goto unlock;
726 }
727
659 err = carl9170_init_interface(ar, vif); 728 err = carl9170_init_interface(ar, vif);
660 if (err) 729 if (err)
661 goto unlock; 730 goto unlock;
@@ -1112,9 +1181,7 @@ static int carl9170_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1112 if (ar->disable_offload || !vif) 1181 if (ar->disable_offload || !vif)
1113 return -EOPNOTSUPP; 1182 return -EOPNOTSUPP;
1114 1183
1115 /* 1184 /* Fall back to software encryption whenever the driver is connected
1116 * We have to fall back to software encryption, whenever
1117 * the user choose to participates in an IBSS or is connected
1118 * to more than one network. 1185 * to more than one network.
1119 * 1186 *
1120 * This is very unfortunate, because some machines cannot handle 1187 * This is very unfortunate, because some machines cannot handle
@@ -1263,7 +1330,7 @@ static int carl9170_op_sta_add(struct ieee80211_hw *hw,
1263 return 0; 1330 return 0;
1264 } 1331 }
1265 1332
1266 for (i = 0; i < CARL9170_NUM_TID; i++) 1333 for (i = 0; i < ARRAY_SIZE(sta_info->agg); i++)
1267 RCU_INIT_POINTER(sta_info->agg[i], NULL); 1334 RCU_INIT_POINTER(sta_info->agg[i], NULL);
1268 1335
1269 sta_info->ampdu_max_len = 1 << (3 + sta->ht_cap.ampdu_factor); 1336 sta_info->ampdu_max_len = 1 << (3 + sta->ht_cap.ampdu_factor);
@@ -1287,7 +1354,7 @@ static int carl9170_op_sta_remove(struct ieee80211_hw *hw,
1287 sta_info->ht_sta = false; 1354 sta_info->ht_sta = false;
1288 1355
1289 rcu_read_lock(); 1356 rcu_read_lock();
1290 for (i = 0; i < CARL9170_NUM_TID; i++) { 1357 for (i = 0; i < ARRAY_SIZE(sta_info->agg); i++) {
1291 struct carl9170_sta_tid *tid_info; 1358 struct carl9170_sta_tid *tid_info;
1292 1359
1293 tid_info = rcu_dereference(sta_info->agg[i]); 1360 tid_info = rcu_dereference(sta_info->agg[i]);
@@ -1394,7 +1461,9 @@ static int carl9170_op_ampdu_action(struct ieee80211_hw *hw,
1394 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 1461 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1395 break; 1462 break;
1396 1463
1397 case IEEE80211_AMPDU_TX_STOP: 1464 case IEEE80211_AMPDU_TX_STOP_CONT:
1465 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1466 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1398 rcu_read_lock(); 1467 rcu_read_lock();
1399 tid_info = rcu_dereference(sta_info->agg[tid]); 1468 tid_info = rcu_dereference(sta_info->agg[tid]);
1400 if (tid_info) { 1469 if (tid_info) {
@@ -1805,10 +1874,6 @@ void *carl9170_alloc(size_t priv_size)
1805 for (i = 0; i < ARRAY_SIZE(ar->noise); i++) 1874 for (i = 0; i < ARRAY_SIZE(ar->noise); i++)
1806 ar->noise[i] = -95; /* ATH_DEFAULT_NOISE_FLOOR */ 1875 ar->noise[i] = -95; /* ATH_DEFAULT_NOISE_FLOOR */
1807 1876
1808 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
1809
1810 /* As IBSS Encryption is software-based, IBSS RSN is supported. */
1811 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
1812 return ar; 1877 return ar;
1813 1878
1814err_nomem: 1879err_nomem:
@@ -1916,13 +1981,13 @@ static int carl9170_parse_eeprom(struct ar9170 *ar)
1916 return 0; 1981 return 0;
1917} 1982}
1918 1983
1919static int carl9170_reg_notifier(struct wiphy *wiphy, 1984static void carl9170_reg_notifier(struct wiphy *wiphy,
1920 struct regulatory_request *request) 1985 struct regulatory_request *request)
1921{ 1986{
1922 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 1987 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1923 struct ar9170 *ar = hw->priv; 1988 struct ar9170 *ar = hw->priv;
1924 1989
1925 return ath_reg_notifier_apply(wiphy, request, &ar->common.regulatory); 1990 ath_reg_notifier_apply(wiphy, request, &ar->common.regulatory);
1926} 1991}
1927 1992
1928int carl9170_register(struct ar9170 *ar) 1993int carl9170_register(struct ar9170 *ar)
diff --git a/drivers/net/wireless/ath/carl9170/tx.c b/drivers/net/wireless/ath/carl9170/tx.c
index ef4ec0da6e49..9c0b150d5b8e 100644
--- a/drivers/net/wireless/ath/carl9170/tx.c
+++ b/drivers/net/wireless/ath/carl9170/tx.c
@@ -1520,35 +1520,92 @@ void carl9170_tx_scheduler(struct ar9170 *ar)
1520 carl9170_tx(ar); 1520 carl9170_tx(ar);
1521} 1521}
1522 1522
1523int carl9170_update_beacon(struct ar9170 *ar, const bool submit) 1523/* caller has to take rcu_read_lock */
1524static struct carl9170_vif_info *carl9170_pick_beaconing_vif(struct ar9170 *ar)
1524{ 1525{
1525 struct sk_buff *skb = NULL;
1526 struct carl9170_vif_info *cvif; 1526 struct carl9170_vif_info *cvif;
1527 int i = 1;
1528
1529 /* The AR9170 hardware has no fancy beacon queue or some
1530 * other scheduling mechanism. So, the driver has to make
1531 * due by setting the two beacon timers (pretbtt and tbtt)
1532 * once and then swapping the beacon address in the HW's
1533 * register file each time the pretbtt fires.
1534 */
1535
1536 cvif = rcu_dereference(ar->beacon_iter);
1537 if (ar->vifs > 0 && cvif) {
1538 do {
1539 list_for_each_entry_continue_rcu(cvif, &ar->vif_list,
1540 list) {
1541 if (cvif->active && cvif->enable_beacon)
1542 goto out;
1543 }
1544 } while (ar->beacon_enabled && i--);
1545 }
1546
1547out:
1548 rcu_assign_pointer(ar->beacon_iter, cvif);
1549 return cvif;
1550}
1551
1552static bool carl9170_tx_beacon_physet(struct ar9170 *ar, struct sk_buff *skb,
1553 u32 *ht1, u32 *plcp)
1554{
1527 struct ieee80211_tx_info *txinfo; 1555 struct ieee80211_tx_info *txinfo;
1528 struct ieee80211_tx_rate *rate; 1556 struct ieee80211_tx_rate *rate;
1529 __le32 *data, *old = NULL; 1557 unsigned int power, chains;
1530 unsigned int plcp, power, chains; 1558 bool ht_rate;
1531 u32 word, ht1, off, addr, len;
1532 int i = 0, err = 0;
1533 1559
1534 rcu_read_lock(); 1560 txinfo = IEEE80211_SKB_CB(skb);
1535 cvif = rcu_dereference(ar->beacon_iter); 1561 rate = &txinfo->control.rates[0];
1536retry: 1562 ht_rate = !!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS);
1537 if (ar->vifs == 0 || !cvif) 1563 carl9170_tx_rate_tpc_chains(ar, txinfo, rate, plcp, &power, &chains);
1538 goto out_unlock;
1539 1564
1540 list_for_each_entry_continue_rcu(cvif, &ar->vif_list, list) { 1565 *ht1 = AR9170_MAC_BCN_HT1_TX_ANT0;
1541 if (cvif->active && cvif->enable_beacon) 1566 if (chains == AR9170_TX_PHY_TXCHAIN_2)
1542 goto found; 1567 *ht1 |= AR9170_MAC_BCN_HT1_TX_ANT1;
1568 SET_VAL(AR9170_MAC_BCN_HT1_PWR_CTRL, *ht1, 7);
1569 SET_VAL(AR9170_MAC_BCN_HT1_TPC, *ht1, power);
1570 SET_VAL(AR9170_MAC_BCN_HT1_CHAIN_MASK, *ht1, chains);
1571
1572 if (ht_rate) {
1573 *ht1 |= AR9170_MAC_BCN_HT1_HT_EN;
1574 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
1575 *plcp |= AR9170_MAC_BCN_HT2_SGI;
1576
1577 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
1578 *ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_SHARED;
1579 *plcp |= AR9170_MAC_BCN_HT2_BW40;
1580 } else if (rate->flags & IEEE80211_TX_RC_DUP_DATA) {
1581 *ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_DUP;
1582 *plcp |= AR9170_MAC_BCN_HT2_BW40;
1583 }
1584
1585 SET_VAL(AR9170_MAC_BCN_HT2_LEN, *plcp, skb->len + FCS_LEN);
1586 } else {
1587 if (*plcp <= AR9170_TX_PHY_RATE_CCK_11M)
1588 *plcp |= ((skb->len + FCS_LEN) << (3 + 16)) + 0x0400;
1589 else
1590 *plcp |= ((skb->len + FCS_LEN) << 16) + 0x0010;
1543 } 1591 }
1544 1592
1545 if (!ar->beacon_enabled || i++) 1593 return ht_rate;
1546 goto out_unlock; 1594}
1547 1595
1548 goto retry; 1596int carl9170_update_beacon(struct ar9170 *ar, const bool submit)
1597{
1598 struct sk_buff *skb = NULL;
1599 struct carl9170_vif_info *cvif;
1600 __le32 *data, *old = NULL;
1601 u32 word, ht1, plcp, off, addr, len;
1602 int i = 0, err = 0;
1603 bool ht_rate;
1549 1604
1550found: 1605 rcu_read_lock();
1551 rcu_assign_pointer(ar->beacon_iter, cvif); 1606 cvif = carl9170_pick_beaconing_vif(ar);
1607 if (!cvif)
1608 goto out_unlock;
1552 1609
1553 skb = ieee80211_beacon_get_tim(ar->hw, carl9170_get_vif(cvif), 1610 skb = ieee80211_beacon_get_tim(ar->hw, carl9170_get_vif(cvif),
1554 NULL, NULL); 1611 NULL, NULL);
@@ -1558,7 +1615,6 @@ found:
1558 goto err_free; 1615 goto err_free;
1559 } 1616 }
1560 1617
1561 txinfo = IEEE80211_SKB_CB(skb);
1562 spin_lock_bh(&ar->beacon_lock); 1618 spin_lock_bh(&ar->beacon_lock);
1563 data = (__le32 *)skb->data; 1619 data = (__le32 *)skb->data;
1564 if (cvif->beacon) 1620 if (cvif->beacon)
@@ -1588,43 +1644,14 @@ found:
1588 goto err_unlock; 1644 goto err_unlock;
1589 } 1645 }
1590 1646
1591 ht1 = AR9170_MAC_BCN_HT1_TX_ANT0; 1647 ht_rate = carl9170_tx_beacon_physet(ar, skb, &ht1, &plcp);
1592 rate = &txinfo->control.rates[0];
1593 carl9170_tx_rate_tpc_chains(ar, txinfo, rate, &plcp, &power, &chains);
1594 if (!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS)) {
1595 if (plcp <= AR9170_TX_PHY_RATE_CCK_11M)
1596 plcp |= ((skb->len + FCS_LEN) << (3 + 16)) + 0x0400;
1597 else
1598 plcp |= ((skb->len + FCS_LEN) << 16) + 0x0010;
1599 } else {
1600 ht1 |= AR9170_MAC_BCN_HT1_HT_EN;
1601 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
1602 plcp |= AR9170_MAC_BCN_HT2_SGI;
1603
1604 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
1605 ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_SHARED;
1606 plcp |= AR9170_MAC_BCN_HT2_BW40;
1607 }
1608 if (rate->flags & IEEE80211_TX_RC_DUP_DATA) {
1609 ht1 |= AR9170_MAC_BCN_HT1_BWC_40M_DUP;
1610 plcp |= AR9170_MAC_BCN_HT2_BW40;
1611 }
1612
1613 SET_VAL(AR9170_MAC_BCN_HT2_LEN, plcp, skb->len + FCS_LEN);
1614 }
1615
1616 SET_VAL(AR9170_MAC_BCN_HT1_PWR_CTRL, ht1, 7);
1617 SET_VAL(AR9170_MAC_BCN_HT1_TPC, ht1, power);
1618 SET_VAL(AR9170_MAC_BCN_HT1_CHAIN_MASK, ht1, chains);
1619 if (chains == AR9170_TX_PHY_TXCHAIN_2)
1620 ht1 |= AR9170_MAC_BCN_HT1_TX_ANT1;
1621 1648
1622 carl9170_async_regwrite_begin(ar); 1649 carl9170_async_regwrite_begin(ar);
1623 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT1, ht1); 1650 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT1, ht1);
1624 if (!(txinfo->control.rates[0].flags & IEEE80211_TX_RC_MCS)) 1651 if (ht_rate)
1625 carl9170_async_regwrite(AR9170_MAC_REG_BCN_PLCP, plcp);
1626 else
1627 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT2, plcp); 1652 carl9170_async_regwrite(AR9170_MAC_REG_BCN_HT2, plcp);
1653 else
1654 carl9170_async_regwrite(AR9170_MAC_REG_BCN_PLCP, plcp);
1628 1655
1629 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) { 1656 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
1630 /* 1657 /*
diff --git a/drivers/net/wireless/ath/carl9170/version.h b/drivers/net/wireless/ath/carl9170/version.h
index 2ec3e9191e4d..2282847d4bb8 100644
--- a/drivers/net/wireless/ath/carl9170/version.h
+++ b/drivers/net/wireless/ath/carl9170/version.h
@@ -1,7 +1,7 @@
1#ifndef __CARL9170_SHARED_VERSION_H 1#ifndef __CARL9170_SHARED_VERSION_H
2#define __CARL9170_SHARED_VERSION_H 2#define __CARL9170_SHARED_VERSION_H
3#define CARL9170FW_VERSION_YEAR 12 3#define CARL9170FW_VERSION_YEAR 12
4#define CARL9170FW_VERSION_MONTH 7 4#define CARL9170FW_VERSION_MONTH 12
5#define CARL9170FW_VERSION_DAY 7 5#define CARL9170FW_VERSION_DAY 15
6#define CARL9170FW_VERSION_GIT "1.9.6" 6#define CARL9170FW_VERSION_GIT "1.9.7"
7#endif /* __CARL9170_SHARED_VERSION_H */ 7#endif /* __CARL9170_SHARED_VERSION_H */
diff --git a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c
index d81698015bf7..ccc4c718f124 100644
--- a/drivers/net/wireless/ath/regd.c
+++ b/drivers/net/wireless/ath/regd.c
@@ -195,8 +195,6 @@ ath_reg_apply_beaconing_flags(struct wiphy *wiphy,
195 const struct ieee80211_reg_rule *reg_rule; 195 const struct ieee80211_reg_rule *reg_rule;
196 struct ieee80211_channel *ch; 196 struct ieee80211_channel *ch;
197 unsigned int i; 197 unsigned int i;
198 u32 bandwidth = 0;
199 int r;
200 198
201 for (band = 0; band < IEEE80211_NUM_BANDS; band++) { 199 for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
202 200
@@ -214,11 +212,8 @@ ath_reg_apply_beaconing_flags(struct wiphy *wiphy,
214 continue; 212 continue;
215 213
216 if (initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE) { 214 if (initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE) {
217 r = freq_reg_info(wiphy, 215 reg_rule = freq_reg_info(wiphy, ch->center_freq);
218 ch->center_freq, 216 if (IS_ERR(reg_rule))
219 bandwidth,
220 &reg_rule);
221 if (r)
222 continue; 217 continue;
223 /* 218 /*
224 * If 11d had a rule for this channel ensure 219 * If 11d had a rule for this channel ensure
@@ -254,8 +249,6 @@ ath_reg_apply_active_scan_flags(struct wiphy *wiphy,
254 struct ieee80211_supported_band *sband; 249 struct ieee80211_supported_band *sband;
255 struct ieee80211_channel *ch; 250 struct ieee80211_channel *ch;
256 const struct ieee80211_reg_rule *reg_rule; 251 const struct ieee80211_reg_rule *reg_rule;
257 u32 bandwidth = 0;
258 int r;
259 252
260 sband = wiphy->bands[IEEE80211_BAND_2GHZ]; 253 sband = wiphy->bands[IEEE80211_BAND_2GHZ];
261 if (!sband) 254 if (!sband)
@@ -283,16 +276,16 @@ ath_reg_apply_active_scan_flags(struct wiphy *wiphy,
283 */ 276 */
284 277
285 ch = &sband->channels[11]; /* CH 12 */ 278 ch = &sband->channels[11]; /* CH 12 */
286 r = freq_reg_info(wiphy, ch->center_freq, bandwidth, &reg_rule); 279 reg_rule = freq_reg_info(wiphy, ch->center_freq);
287 if (!r) { 280 if (!IS_ERR(reg_rule)) {
288 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN)) 281 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
289 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN) 282 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
290 ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN; 283 ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
291 } 284 }
292 285
293 ch = &sband->channels[12]; /* CH 13 */ 286 ch = &sband->channels[12]; /* CH 13 */
294 r = freq_reg_info(wiphy, ch->center_freq, bandwidth, &reg_rule); 287 reg_rule = freq_reg_info(wiphy, ch->center_freq);
295 if (!r) { 288 if (!IS_ERR(reg_rule)) {
296 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN)) 289 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
297 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN) 290 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
298 ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN; 291 ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
@@ -363,9 +356,9 @@ static u16 ath_regd_find_country_by_name(char *alpha2)
363 return -1; 356 return -1;
364} 357}
365 358
366int ath_reg_notifier_apply(struct wiphy *wiphy, 359void ath_reg_notifier_apply(struct wiphy *wiphy,
367 struct regulatory_request *request, 360 struct regulatory_request *request,
368 struct ath_regulatory *reg) 361 struct ath_regulatory *reg)
369{ 362{
370 struct ath_common *common = container_of(reg, struct ath_common, 363 struct ath_common *common = container_of(reg, struct ath_common,
371 regulatory); 364 regulatory);
@@ -380,7 +373,7 @@ int ath_reg_notifier_apply(struct wiphy *wiphy,
380 * any pending requests in the queue. 373 * any pending requests in the queue.
381 */ 374 */
382 if (!request) 375 if (!request)
383 return 0; 376 return;
384 377
385 switch (request->initiator) { 378 switch (request->initiator) {
386 case NL80211_REGDOM_SET_BY_CORE: 379 case NL80211_REGDOM_SET_BY_CORE:
@@ -416,8 +409,6 @@ int ath_reg_notifier_apply(struct wiphy *wiphy,
416 409
417 break; 410 break;
418 } 411 }
419
420 return 0;
421} 412}
422EXPORT_SYMBOL(ath_reg_notifier_apply); 413EXPORT_SYMBOL(ath_reg_notifier_apply);
423 414
@@ -507,8 +498,8 @@ ath_get_regpair(int regdmn)
507static int 498static int
508ath_regd_init_wiphy(struct ath_regulatory *reg, 499ath_regd_init_wiphy(struct ath_regulatory *reg,
509 struct wiphy *wiphy, 500 struct wiphy *wiphy,
510 int (*reg_notifier)(struct wiphy *wiphy, 501 void (*reg_notifier)(struct wiphy *wiphy,
511 struct regulatory_request *request)) 502 struct regulatory_request *request))
512{ 503{
513 const struct ieee80211_regdomain *regd; 504 const struct ieee80211_regdomain *regd;
514 505
@@ -628,8 +619,8 @@ static int __ath_regd_init(struct ath_regulatory *reg)
628int 619int
629ath_regd_init(struct ath_regulatory *reg, 620ath_regd_init(struct ath_regulatory *reg,
630 struct wiphy *wiphy, 621 struct wiphy *wiphy,
631 int (*reg_notifier)(struct wiphy *wiphy, 622 void (*reg_notifier)(struct wiphy *wiphy,
632 struct regulatory_request *request)) 623 struct regulatory_request *request))
633{ 624{
634 struct ath_common *common = container_of(reg, struct ath_common, 625 struct ath_common *common = container_of(reg, struct ath_common,
635 regulatory); 626 regulatory);
diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index 03a8268ccf21..37f53bd8fcb1 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -252,12 +252,12 @@ enum CountryCode {
252bool ath_is_world_regd(struct ath_regulatory *reg); 252bool ath_is_world_regd(struct ath_regulatory *reg);
253bool ath_is_49ghz_allowed(u16 redomain); 253bool ath_is_49ghz_allowed(u16 redomain);
254int ath_regd_init(struct ath_regulatory *reg, struct wiphy *wiphy, 254int ath_regd_init(struct ath_regulatory *reg, struct wiphy *wiphy,
255 int (*reg_notifier)(struct wiphy *wiphy, 255 void (*reg_notifier)(struct wiphy *wiphy,
256 struct regulatory_request *request)); 256 struct regulatory_request *request));
257u32 ath_regd_get_band_ctl(struct ath_regulatory *reg, 257u32 ath_regd_get_band_ctl(struct ath_regulatory *reg,
258 enum ieee80211_band band); 258 enum ieee80211_band band);
259int ath_reg_notifier_apply(struct wiphy *wiphy, 259void ath_reg_notifier_apply(struct wiphy *wiphy,
260 struct regulatory_request *request, 260 struct regulatory_request *request,
261 struct ath_regulatory *reg); 261 struct ath_regulatory *reg);
262 262
263#endif 263#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-14 14:40:25 -0500