diff options
Diffstat (limited to 'drivers/net/wireless/ath')
36 files changed, 687 insertions, 2509 deletions
diff --git a/drivers/net/wireless/ath/ath.h b/drivers/net/wireless/ath/ath.h index cee0191704f5..501050c0296f 100644 --- a/drivers/net/wireless/ath/ath.h +++ b/drivers/net/wireless/ath/ath.h | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <linux/skbuff.h> | 20 | #include <linux/skbuff.h> |
21 | #include <linux/if_ether.h> | 21 | #include <linux/if_ether.h> |
22 | #include <linux/spinlock.h> | ||
22 | #include <net/mac80211.h> | 23 | #include <net/mac80211.h> |
23 | 24 | ||
24 | /* | 25 | /* |
@@ -42,6 +43,13 @@ struct ath_ani { | |||
42 | struct timer_list timer; | 43 | struct timer_list timer; |
43 | }; | 44 | }; |
44 | 45 | ||
46 | struct ath_cycle_counters { | ||
47 | u32 cycles; | ||
48 | u32 rx_busy; | ||
49 | u32 rx_frame; | ||
50 | u32 tx_frame; | ||
51 | }; | ||
52 | |||
45 | enum ath_device_state { | 53 | enum ath_device_state { |
46 | ATH_HW_UNAVAILABLE, | 54 | ATH_HW_UNAVAILABLE, |
47 | ATH_HW_INITIALIZED, | 55 | ATH_HW_INITIALIZED, |
@@ -145,6 +153,12 @@ struct ath_common { | |||
145 | DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX); | 153 | DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX); |
146 | enum ath_crypt_caps crypt_caps; | 154 | enum ath_crypt_caps crypt_caps; |
147 | 155 | ||
156 | unsigned int clockrate; | ||
157 | |||
158 | spinlock_t cc_lock; | ||
159 | struct ath_cycle_counters cc_ani; | ||
160 | struct ath_cycle_counters cc_survey; | ||
161 | |||
148 | struct ath_regulatory regulatory; | 162 | struct ath_regulatory regulatory; |
149 | const struct ath_ops *ops; | 163 | const struct ath_ops *ops; |
150 | const struct ath_bus_ops *bus_ops; | 164 | const struct ath_bus_ops *bus_ops; |
@@ -161,5 +175,7 @@ int ath_key_config(struct ath_common *common, | |||
161 | struct ieee80211_sta *sta, | 175 | struct ieee80211_sta *sta, |
162 | struct ieee80211_key_conf *key); | 176 | struct ieee80211_key_conf *key); |
163 | bool ath_hw_keyreset(struct ath_common *common, u16 entry); | 177 | bool ath_hw_keyreset(struct ath_common *common, u16 entry); |
178 | void ath_hw_cycle_counters_update(struct ath_common *common); | ||
179 | int32_t ath_hw_get_listen_time(struct ath_common *common); | ||
164 | 180 | ||
165 | #endif /* ATH_H */ | 181 | #endif /* ATH_H */ |
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c index e4a5f046bba4..f1419198a479 100644 --- a/drivers/net/wireless/ath/ath5k/ani.c +++ b/drivers/net/wireless/ath/ath5k/ani.c | |||
@@ -355,41 +355,28 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) | |||
355 | 355 | ||
356 | 356 | ||
357 | /** | 357 | /** |
358 | * ath5k_hw_ani_get_listen_time() - Calculate time spent listening | 358 | * ath5k_hw_ani_get_listen_time() - Update counters and return listening time |
359 | * | 359 | * |
360 | * Return an approximation of the time spent "listening" in milliseconds (ms) | 360 | * Return an approximation of the time spent "listening" in milliseconds (ms) |
361 | * since the last call of this function by deducting the cycles spent | 361 | * since the last call of this function. |
362 | * transmitting and receiving from the total cycle count. | 362 | * Save a snapshot of the counter values for debugging/statistics. |
363 | * Save profile count values for debugging/statistics and because we might want | ||
364 | * to use them later. | ||
365 | * | ||
366 | * We assume no one else clears these registers! | ||
367 | */ | 363 | */ |
368 | static int | 364 | static int |
369 | ath5k_hw_ani_get_listen_time(struct ath5k_hw *ah, struct ath5k_ani_state *as) | 365 | ath5k_hw_ani_get_listen_time(struct ath5k_hw *ah, struct ath5k_ani_state *as) |
370 | { | 366 | { |
367 | struct ath_common *common = ath5k_hw_common(ah); | ||
371 | int listen; | 368 | int listen; |
372 | 369 | ||
373 | /* freeze */ | 370 | spin_lock_bh(&common->cc_lock); |
374 | ath5k_hw_reg_write(ah, AR5K_MIBC_FMC, AR5K_MIBC); | 371 | |
375 | /* read */ | 372 | ath_hw_cycle_counters_update(common); |
376 | as->pfc_cycles = ath5k_hw_reg_read(ah, AR5K_PROFCNT_CYCLE); | 373 | memcpy(&as->last_cc, &common->cc_ani, sizeof(as->last_cc)); |
377 | as->pfc_busy = ath5k_hw_reg_read(ah, AR5K_PROFCNT_RXCLR); | 374 | |
378 | as->pfc_tx = ath5k_hw_reg_read(ah, AR5K_PROFCNT_TX); | 375 | /* clears common->cc_ani */ |
379 | as->pfc_rx = ath5k_hw_reg_read(ah, AR5K_PROFCNT_RX); | 376 | listen = ath_hw_get_listen_time(common); |
380 | /* clear */ | 377 | |
381 | ath5k_hw_reg_write(ah, 0, AR5K_PROFCNT_TX); | 378 | spin_unlock_bh(&common->cc_lock); |
382 | ath5k_hw_reg_write(ah, 0, AR5K_PROFCNT_RX); | 379 | |
383 | ath5k_hw_reg_write(ah, 0, AR5K_PROFCNT_RXCLR); | ||
384 | ath5k_hw_reg_write(ah, 0, AR5K_PROFCNT_CYCLE); | ||
385 | /* un-freeze */ | ||
386 | ath5k_hw_reg_write(ah, 0, AR5K_MIBC); | ||
387 | |||
388 | /* TODO: where does 44000 come from? (11g clock rate?) */ | ||
389 | listen = (as->pfc_cycles - as->pfc_rx - as->pfc_tx) / 44000; | ||
390 | |||
391 | if (as->pfc_cycles == 0 || listen < 0) | ||
392 | return 0; | ||
393 | return listen; | 380 | return listen; |
394 | } | 381 | } |
395 | 382 | ||
diff --git a/drivers/net/wireless/ath/ath5k/ani.h b/drivers/net/wireless/ath/ath5k/ani.h index 55cf26d8522c..d0a664039c87 100644 --- a/drivers/net/wireless/ath/ath5k/ani.h +++ b/drivers/net/wireless/ath/ath5k/ani.h | |||
@@ -75,10 +75,7 @@ struct ath5k_ani_state { | |||
75 | unsigned int cck_errors; | 75 | unsigned int cck_errors; |
76 | 76 | ||
77 | /* debug/statistics only: numbers from last ANI calibration */ | 77 | /* debug/statistics only: numbers from last ANI calibration */ |
78 | unsigned int pfc_tx; | 78 | struct ath_cycle_counters last_cc; |
79 | unsigned int pfc_rx; | ||
80 | unsigned int pfc_busy; | ||
81 | unsigned int pfc_cycles; | ||
82 | unsigned int last_listen; | 79 | unsigned int last_listen; |
83 | unsigned int last_ofdm_errors; | 80 | unsigned int last_ofdm_errors; |
84 | unsigned int last_cck_errors; | 81 | unsigned int last_cck_errors; |
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index 0cba2e315d9a..4a367cdb3eb9 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h | |||
@@ -1201,7 +1201,7 @@ void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, bool high); | |||
1201 | /* Clock rate related functions */ | 1201 | /* Clock rate related functions */ |
1202 | unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec); | 1202 | unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec); |
1203 | unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock); | 1203 | unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock); |
1204 | unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah); | 1204 | void ath5k_hw_set_clockrate(struct ath5k_hw *ah); |
1205 | 1205 | ||
1206 | /* Queue Control Unit, DFS Control Unit Functions */ | 1206 | /* Queue Control Unit, DFS Control Unit Functions */ |
1207 | int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, | 1207 | int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, |
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index dad726585637..f1ae75d35d5d 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c | |||
@@ -62,6 +62,7 @@ | |||
62 | #include "reg.h" | 62 | #include "reg.h" |
63 | #include "debug.h" | 63 | #include "debug.h" |
64 | #include "ani.h" | 64 | #include "ani.h" |
65 | #include "../debug.h" | ||
65 | 66 | ||
66 | static int modparam_nohwcrypt; | 67 | static int modparam_nohwcrypt; |
67 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); | 68 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); |
@@ -517,12 +518,14 @@ struct ath_vif_iter_data { | |||
517 | bool need_set_hw_addr; | 518 | bool need_set_hw_addr; |
518 | bool found_active; | 519 | bool found_active; |
519 | bool any_assoc; | 520 | bool any_assoc; |
521 | enum nl80211_iftype opmode; | ||
520 | }; | 522 | }; |
521 | 523 | ||
522 | static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) | 524 | static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) |
523 | { | 525 | { |
524 | struct ath_vif_iter_data *iter_data = data; | 526 | struct ath_vif_iter_data *iter_data = data; |
525 | int i; | 527 | int i; |
528 | struct ath5k_vif *avf = (void *)vif->drv_priv; | ||
526 | 529 | ||
527 | if (iter_data->hw_macaddr) | 530 | if (iter_data->hw_macaddr) |
528 | for (i = 0; i < ETH_ALEN; i++) | 531 | for (i = 0; i < ETH_ALEN; i++) |
@@ -539,13 +542,32 @@ static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) | |||
539 | iter_data->need_set_hw_addr = false; | 542 | iter_data->need_set_hw_addr = false; |
540 | 543 | ||
541 | if (!iter_data->any_assoc) { | 544 | if (!iter_data->any_assoc) { |
542 | struct ath5k_vif *avf = (void *)vif->drv_priv; | ||
543 | if (avf->assoc) | 545 | if (avf->assoc) |
544 | iter_data->any_assoc = true; | 546 | iter_data->any_assoc = true; |
545 | } | 547 | } |
548 | |||
549 | /* Calculate combined mode - when APs are active, operate in AP mode. | ||
550 | * Otherwise use the mode of the new interface. This can currently | ||
551 | * only deal with combinations of APs and STAs. Only one ad-hoc | ||
552 | * interfaces is allowed above. | ||
553 | */ | ||
554 | if (avf->opmode == NL80211_IFTYPE_AP) | ||
555 | iter_data->opmode = NL80211_IFTYPE_AP; | ||
556 | else | ||
557 | if (iter_data->opmode == NL80211_IFTYPE_UNSPECIFIED) | ||
558 | iter_data->opmode = avf->opmode; | ||
546 | } | 559 | } |
547 | 560 | ||
548 | void ath5k_update_bssid_mask(struct ath5k_softc *sc, struct ieee80211_vif *vif) | 561 | static void ath_do_set_opmode(struct ath5k_softc *sc) |
562 | { | ||
563 | struct ath5k_hw *ah = sc->ah; | ||
564 | ath5k_hw_set_opmode(ah, sc->opmode); | ||
565 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", | ||
566 | sc->opmode, ath_opmode_to_string(sc->opmode)); | ||
567 | } | ||
568 | |||
569 | void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, | ||
570 | struct ieee80211_vif *vif) | ||
549 | { | 571 | { |
550 | struct ath_common *common = ath5k_hw_common(sc->ah); | 572 | struct ath_common *common = ath5k_hw_common(sc->ah); |
551 | struct ath_vif_iter_data iter_data; | 573 | struct ath_vif_iter_data iter_data; |
@@ -558,6 +580,7 @@ void ath5k_update_bssid_mask(struct ath5k_softc *sc, struct ieee80211_vif *vif) | |||
558 | memset(&iter_data.mask, 0xff, ETH_ALEN); | 580 | memset(&iter_data.mask, 0xff, ETH_ALEN); |
559 | iter_data.found_active = false; | 581 | iter_data.found_active = false; |
560 | iter_data.need_set_hw_addr = true; | 582 | iter_data.need_set_hw_addr = true; |
583 | iter_data.opmode = NL80211_IFTYPE_UNSPECIFIED; | ||
561 | 584 | ||
562 | if (vif) | 585 | if (vif) |
563 | ath_vif_iter(&iter_data, vif->addr, vif); | 586 | ath_vif_iter(&iter_data, vif->addr, vif); |
@@ -567,10 +590,18 @@ void ath5k_update_bssid_mask(struct ath5k_softc *sc, struct ieee80211_vif *vif) | |||
567 | &iter_data); | 590 | &iter_data); |
568 | memcpy(sc->bssidmask, iter_data.mask, ETH_ALEN); | 591 | memcpy(sc->bssidmask, iter_data.mask, ETH_ALEN); |
569 | 592 | ||
593 | sc->opmode = iter_data.opmode; | ||
594 | if (sc->opmode == NL80211_IFTYPE_UNSPECIFIED) | ||
595 | /* Nothing active, default to station mode */ | ||
596 | sc->opmode = NL80211_IFTYPE_STATION; | ||
597 | |||
598 | ath_do_set_opmode(sc); | ||
599 | |||
570 | if (iter_data.need_set_hw_addr && iter_data.found_active) | 600 | if (iter_data.need_set_hw_addr && iter_data.found_active) |
571 | ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); | 601 | ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); |
572 | 602 | ||
573 | ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); | 603 | if (ath5k_hw_hasbssidmask(sc->ah)) |
604 | ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); | ||
574 | } | 605 | } |
575 | 606 | ||
576 | static void | 607 | static void |
@@ -582,15 +613,9 @@ ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif) | |||
582 | /* configure rx filter */ | 613 | /* configure rx filter */ |
583 | rfilt = sc->filter_flags; | 614 | rfilt = sc->filter_flags; |
584 | ath5k_hw_set_rx_filter(ah, rfilt); | 615 | ath5k_hw_set_rx_filter(ah, rfilt); |
585 | |||
586 | if (ath5k_hw_hasbssidmask(ah)) | ||
587 | ath5k_update_bssid_mask(sc, vif); | ||
588 | |||
589 | /* configure operational mode */ | ||
590 | ath5k_hw_set_opmode(ah, sc->opmode); | ||
591 | |||
592 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d\n", sc->opmode); | ||
593 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); | 616 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); |
617 | |||
618 | ath5k_update_bssid_mask_and_opmode(sc, vif); | ||
594 | } | 619 | } |
595 | 620 | ||
596 | static inline int | 621 | static inline int |
@@ -2688,7 +2713,7 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw) | |||
2688 | SET_IEEE80211_PERM_ADDR(hw, mac); | 2713 | SET_IEEE80211_PERM_ADDR(hw, mac); |
2689 | memcpy(&sc->lladdr, mac, ETH_ALEN); | 2714 | memcpy(&sc->lladdr, mac, ETH_ALEN); |
2690 | /* All MAC address bits matter for ACKs */ | 2715 | /* All MAC address bits matter for ACKs */ |
2691 | ath5k_update_bssid_mask(sc, NULL); | 2716 | ath5k_update_bssid_mask_and_opmode(sc, NULL); |
2692 | 2717 | ||
2693 | regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; | 2718 | regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; |
2694 | ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier); | 2719 | ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier); |
@@ -2786,7 +2811,6 @@ static int ath5k_add_interface(struct ieee80211_hw *hw, | |||
2786 | { | 2811 | { |
2787 | struct ath5k_softc *sc = hw->priv; | 2812 | struct ath5k_softc *sc = hw->priv; |
2788 | int ret; | 2813 | int ret; |
2789 | struct ath5k_hw *ah = sc->ah; | ||
2790 | struct ath5k_vif *avf = (void *)vif->drv_priv; | 2814 | struct ath5k_vif *avf = (void *)vif->drv_priv; |
2791 | 2815 | ||
2792 | mutex_lock(&sc->lock); | 2816 | mutex_lock(&sc->lock); |
@@ -2850,18 +2874,6 @@ static int ath5k_add_interface(struct ieee80211_hw *hw, | |||
2850 | sc->num_adhoc_vifs++; | 2874 | sc->num_adhoc_vifs++; |
2851 | } | 2875 | } |
2852 | 2876 | ||
2853 | /* Set combined mode - when APs are configured, operate in AP mode. | ||
2854 | * Otherwise use the mode of the new interface. This can currently | ||
2855 | * only deal with combinations of APs and STAs. Only one ad-hoc | ||
2856 | * interfaces is allowed above. | ||
2857 | */ | ||
2858 | if (sc->num_ap_vifs) | ||
2859 | sc->opmode = NL80211_IFTYPE_AP; | ||
2860 | else | ||
2861 | sc->opmode = vif->type; | ||
2862 | |||
2863 | ath5k_hw_set_opmode(ah, sc->opmode); | ||
2864 | |||
2865 | /* Any MAC address is fine, all others are included through the | 2877 | /* Any MAC address is fine, all others are included through the |
2866 | * filter. | 2878 | * filter. |
2867 | */ | 2879 | */ |
@@ -2905,7 +2917,7 @@ ath5k_remove_interface(struct ieee80211_hw *hw, | |||
2905 | else if (avf->opmode == NL80211_IFTYPE_ADHOC) | 2917 | else if (avf->opmode == NL80211_IFTYPE_ADHOC) |
2906 | sc->num_adhoc_vifs--; | 2918 | sc->num_adhoc_vifs--; |
2907 | 2919 | ||
2908 | ath5k_update_bssid_mask(sc, NULL); | 2920 | ath5k_update_bssid_mask_and_opmode(sc, NULL); |
2909 | mutex_unlock(&sc->lock); | 2921 | mutex_unlock(&sc->lock); |
2910 | } | 2922 | } |
2911 | 2923 | ||
@@ -3529,8 +3541,6 @@ ath5k_pci_probe(struct pci_dev *pdev, | |||
3529 | sc->hw = hw; | 3541 | sc->hw = hw; |
3530 | sc->pdev = pdev; | 3542 | sc->pdev = pdev; |
3531 | 3543 | ||
3532 | ath5k_debug_init_device(sc); | ||
3533 | |||
3534 | /* | 3544 | /* |
3535 | * Mark the device as detached to avoid processing | 3545 | * Mark the device as detached to avoid processing |
3536 | * interrupts until setup is complete. | 3546 | * interrupts until setup is complete. |
@@ -3638,6 +3648,7 @@ ath5k_pci_probe(struct pci_dev *pdev, | |||
3638 | } | 3648 | } |
3639 | } | 3649 | } |
3640 | 3650 | ||
3651 | ath5k_debug_init_device(sc); | ||
3641 | 3652 | ||
3642 | /* ready to process interrupts */ | 3653 | /* ready to process interrupts */ |
3643 | __clear_bit(ATH_STAT_INVALID, sc->status); | 3654 | __clear_bit(ATH_STAT_INVALID, sc->status); |
@@ -3724,8 +3735,6 @@ init_ath5k_pci(void) | |||
3724 | { | 3735 | { |
3725 | int ret; | 3736 | int ret; |
3726 | 3737 | ||
3727 | ath5k_debug_init(); | ||
3728 | |||
3729 | ret = pci_register_driver(&ath5k_pci_driver); | 3738 | ret = pci_register_driver(&ath5k_pci_driver); |
3730 | if (ret) { | 3739 | if (ret) { |
3731 | printk(KERN_ERR "ath5k_pci: can't register pci driver\n"); | 3740 | printk(KERN_ERR "ath5k_pci: can't register pci driver\n"); |
@@ -3739,8 +3748,6 @@ static void __exit | |||
3739 | exit_ath5k_pci(void) | 3748 | exit_ath5k_pci(void) |
3740 | { | 3749 | { |
3741 | pci_unregister_driver(&ath5k_pci_driver); | 3750 | pci_unregister_driver(&ath5k_pci_driver); |
3742 | |||
3743 | ath5k_debug_finish(); | ||
3744 | } | 3751 | } |
3745 | 3752 | ||
3746 | module_init(init_ath5k_pci); | 3753 | module_init(init_ath5k_pci); |
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c index c2d549f871f9..42ea5b1bdb12 100644 --- a/drivers/net/wireless/ath/ath5k/debug.c +++ b/drivers/net/wireless/ath/ath5k/debug.c | |||
@@ -60,6 +60,7 @@ | |||
60 | 60 | ||
61 | #include "base.h" | 61 | #include "base.h" |
62 | #include "debug.h" | 62 | #include "debug.h" |
63 | #include "../debug.h" | ||
63 | 64 | ||
64 | static unsigned int ath5k_debug; | 65 | static unsigned int ath5k_debug; |
65 | module_param_named(debug, ath5k_debug, uint, 0); | 66 | module_param_named(debug, ath5k_debug, uint, 0); |
@@ -71,8 +72,6 @@ module_param_named(debug, ath5k_debug, uint, 0); | |||
71 | #include "reg.h" | 72 | #include "reg.h" |
72 | #include "ani.h" | 73 | #include "ani.h" |
73 | 74 | ||
74 | static struct dentry *ath5k_global_debugfs; | ||
75 | |||
76 | static int ath5k_debugfs_open(struct inode *inode, struct file *file) | 75 | static int ath5k_debugfs_open(struct inode *inode, struct file *file) |
77 | { | 76 | { |
78 | file->private_data = inode->i_private; | 77 | file->private_data = inode->i_private; |
@@ -520,9 +519,10 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf, | |||
520 | if (filt & AR5K_RX_FILTER_PHYERR_5211) | 519 | if (filt & AR5K_RX_FILTER_PHYERR_5211) |
521 | snprintf(buf+len, sizeof(buf)-len, " PHYERR-5211"); | 520 | snprintf(buf+len, sizeof(buf)-len, " PHYERR-5211"); |
522 | if (filt & AR5K_RX_FILTER_RADARERR_5211) | 521 | if (filt & AR5K_RX_FILTER_RADARERR_5211) |
523 | len += snprintf(buf+len, sizeof(buf)-len, " RADARERR-5211\n"); | 522 | len += snprintf(buf+len, sizeof(buf)-len, " RADARERR-5211"); |
524 | else | 523 | |
525 | len += snprintf(buf+len, sizeof(buf)-len, "\n"); | 524 | len += snprintf(buf+len, sizeof(buf)-len, "\nopmode: %s (%d)\n", |
525 | ath_opmode_to_string(sc->opmode), sc->opmode); | ||
526 | 526 | ||
527 | if (len > sizeof(buf)) | 527 | if (len > sizeof(buf)) |
528 | len = sizeof(buf); | 528 | len = sizeof(buf); |
@@ -715,20 +715,21 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf, | |||
715 | len += snprintf(buf+len, sizeof(buf)-len, | 715 | len += snprintf(buf+len, sizeof(buf)-len, |
716 | "beacon RSSI average:\t%d\n", | 716 | "beacon RSSI average:\t%d\n", |
717 | sc->ah->ah_beacon_rssi_avg.avg); | 717 | sc->ah->ah_beacon_rssi_avg.avg); |
718 | |||
719 | #define CC_PRINT(_struct, _field) \ | ||
720 | _struct._field, \ | ||
721 | _struct.cycles > 0 ? \ | ||
722 | _struct._field*100/_struct.cycles : 0 | ||
723 | |||
718 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt tx\t\t%u\t(%d%%)\n", | 724 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt tx\t\t%u\t(%d%%)\n", |
719 | as->pfc_tx, | 725 | CC_PRINT(as->last_cc, tx_frame)); |
720 | as->pfc_cycles > 0 ? | ||
721 | as->pfc_tx*100/as->pfc_cycles : 0); | ||
722 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt rx\t\t%u\t(%d%%)\n", | 726 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt rx\t\t%u\t(%d%%)\n", |
723 | as->pfc_rx, | 727 | CC_PRINT(as->last_cc, rx_frame)); |
724 | as->pfc_cycles > 0 ? | ||
725 | as->pfc_rx*100/as->pfc_cycles : 0); | ||
726 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt busy\t\t%u\t(%d%%)\n", | 728 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt busy\t\t%u\t(%d%%)\n", |
727 | as->pfc_busy, | 729 | CC_PRINT(as->last_cc, rx_busy)); |
728 | as->pfc_cycles > 0 ? | 730 | #undef CC_PRINT |
729 | as->pfc_busy*100/as->pfc_cycles : 0); | ||
730 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt cycles\t\t%u\n", | 731 | len += snprintf(buf+len, sizeof(buf)-len, "profcnt cycles\t\t%u\n", |
731 | as->pfc_cycles); | 732 | as->last_cc.cycles); |
732 | len += snprintf(buf+len, sizeof(buf)-len, | 733 | len += snprintf(buf+len, sizeof(buf)-len, |
733 | "listen time\t\t%d\tlast: %d\n", | 734 | "listen time\t\t%d\tlast: %d\n", |
734 | as->listen_time, as->last_listen); | 735 | as->listen_time, as->last_listen); |
@@ -879,21 +880,13 @@ static const struct file_operations fops_queue = { | |||
879 | }; | 880 | }; |
880 | 881 | ||
881 | 882 | ||
882 | /* init */ | ||
883 | |||
884 | void | ||
885 | ath5k_debug_init(void) | ||
886 | { | ||
887 | ath5k_global_debugfs = debugfs_create_dir("ath5k", NULL); | ||
888 | } | ||
889 | |||
890 | void | 883 | void |
891 | ath5k_debug_init_device(struct ath5k_softc *sc) | 884 | ath5k_debug_init_device(struct ath5k_softc *sc) |
892 | { | 885 | { |
893 | sc->debug.level = ath5k_debug; | 886 | sc->debug.level = ath5k_debug; |
894 | 887 | ||
895 | sc->debug.debugfs_phydir = debugfs_create_dir(wiphy_name(sc->hw->wiphy), | 888 | sc->debug.debugfs_phydir = debugfs_create_dir("ath5k", |
896 | ath5k_global_debugfs); | 889 | sc->hw->wiphy->debugfsdir); |
897 | 890 | ||
898 | sc->debug.debugfs_debug = debugfs_create_file("debug", | 891 | sc->debug.debugfs_debug = debugfs_create_file("debug", |
899 | S_IWUSR | S_IRUSR, | 892 | S_IWUSR | S_IRUSR, |
@@ -934,12 +927,6 @@ ath5k_debug_init_device(struct ath5k_softc *sc) | |||
934 | } | 927 | } |
935 | 928 | ||
936 | void | 929 | void |
937 | ath5k_debug_finish(void) | ||
938 | { | ||
939 | debugfs_remove(ath5k_global_debugfs); | ||
940 | } | ||
941 | |||
942 | void | ||
943 | ath5k_debug_finish_device(struct ath5k_softc *sc) | 930 | ath5k_debug_finish_device(struct ath5k_softc *sc) |
944 | { | 931 | { |
945 | debugfs_remove(sc->debug.debugfs_debug); | 932 | debugfs_remove(sc->debug.debugfs_debug); |
diff --git a/drivers/net/wireless/ath/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h index 4f078b134015..236edbd2507d 100644 --- a/drivers/net/wireless/ath/ath5k/debug.h +++ b/drivers/net/wireless/ath/ath5k/debug.h | |||
@@ -138,15 +138,9 @@ enum ath5k_debug_level { | |||
138 | } while (0) | 138 | } while (0) |
139 | 139 | ||
140 | void | 140 | void |
141 | ath5k_debug_init(void); | ||
142 | |||
143 | void | ||
144 | ath5k_debug_init_device(struct ath5k_softc *sc); | 141 | ath5k_debug_init_device(struct ath5k_softc *sc); |
145 | 142 | ||
146 | void | 143 | void |
147 | ath5k_debug_finish(void); | ||
148 | |||
149 | void | ||
150 | ath5k_debug_finish_device(struct ath5k_softc *sc); | 144 | ath5k_debug_finish_device(struct ath5k_softc *sc); |
151 | 145 | ||
152 | void | 146 | void |
@@ -174,15 +168,9 @@ ATH5K_DBG_UNLIMIT(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) | |||
174 | {} | 168 | {} |
175 | 169 | ||
176 | static inline void | 170 | static inline void |
177 | ath5k_debug_init(void) {} | ||
178 | |||
179 | static inline void | ||
180 | ath5k_debug_init_device(struct ath5k_softc *sc) {} | 171 | ath5k_debug_init_device(struct ath5k_softc *sc) {} |
181 | 172 | ||
182 | static inline void | 173 | static inline void |
183 | ath5k_debug_finish(void) {} | ||
184 | |||
185 | static inline void | ||
186 | ath5k_debug_finish_device(struct ath5k_softc *sc) {} | 174 | ath5k_debug_finish_device(struct ath5k_softc *sc) {} |
187 | 175 | ||
188 | static inline void | 176 | static inline void |
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c index 095d30b50ec7..074b4c644399 100644 --- a/drivers/net/wireless/ath/ath5k/pcu.c +++ b/drivers/net/wireless/ath/ath5k/pcu.c | |||
@@ -207,7 +207,8 @@ static int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) | |||
207 | */ | 207 | */ |
208 | unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec) | 208 | unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec) |
209 | { | 209 | { |
210 | return usec * ath5k_hw_get_clockrate(ah); | 210 | struct ath_common *common = ath5k_hw_common(ah); |
211 | return usec * common->clockrate; | ||
211 | } | 212 | } |
212 | 213 | ||
213 | /** | 214 | /** |
@@ -216,17 +217,19 @@ unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec) | |||
216 | */ | 217 | */ |
217 | unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) | 218 | unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) |
218 | { | 219 | { |
219 | return clock / ath5k_hw_get_clockrate(ah); | 220 | struct ath_common *common = ath5k_hw_common(ah); |
221 | return clock / common->clockrate; | ||
220 | } | 222 | } |
221 | 223 | ||
222 | /** | 224 | /** |
223 | * ath5k_hw_get_clockrate - Get the clock rate for current mode | 225 | * ath5k_hw_set_clockrate - Set common->clockrate for the current channel |
224 | * | 226 | * |
225 | * @ah: The &struct ath5k_hw | 227 | * @ah: The &struct ath5k_hw |
226 | */ | 228 | */ |
227 | unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah) | 229 | void ath5k_hw_set_clockrate(struct ath5k_hw *ah) |
228 | { | 230 | { |
229 | struct ieee80211_channel *channel = ah->ah_current_channel; | 231 | struct ieee80211_channel *channel = ah->ah_current_channel; |
232 | struct ath_common *common = ath5k_hw_common(ah); | ||
230 | int clock; | 233 | int clock; |
231 | 234 | ||
232 | if (channel->hw_value & CHANNEL_5GHZ) | 235 | if (channel->hw_value & CHANNEL_5GHZ) |
@@ -240,7 +243,7 @@ unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah) | |||
240 | if (channel->hw_value & CHANNEL_TURBO) | 243 | if (channel->hw_value & CHANNEL_TURBO) |
241 | clock *= 2; | 244 | clock *= 2; |
242 | 245 | ||
243 | return clock; | 246 | common->clockrate = clock; |
244 | } | 247 | } |
245 | 248 | ||
246 | /** | 249 | /** |
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index 61da913e7c8f..219367884e64 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c | |||
@@ -1093,6 +1093,7 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | |||
1093 | 1093 | ||
1094 | ah->ah_current_channel = channel; | 1094 | ah->ah_current_channel = channel; |
1095 | ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false; | 1095 | ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false; |
1096 | ath5k_hw_set_clockrate(ah); | ||
1096 | 1097 | ||
1097 | return 0; | 1098 | return 0; |
1098 | } | 1099 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c index f2a907b4acb8..63ccb39cdcd4 100644 --- a/drivers/net/wireless/ath/ath9k/ani.c +++ b/drivers/net/wireless/ath/ath9k/ani.c | |||
@@ -465,40 +465,6 @@ static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah) | |||
465 | ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel - 1); | 465 | ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel - 1); |
466 | } | 466 | } |
467 | 467 | ||
468 | static u8 ath9k_hw_chan_2_clockrate_mhz(struct ath_hw *ah) | ||
469 | { | ||
470 | struct ath9k_channel *chan = ah->curchan; | ||
471 | struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; | ||
472 | u8 clockrate; /* in MHz */ | ||
473 | |||
474 | if (!ah->curchan) /* should really check for CCK instead */ | ||
475 | clockrate = ATH9K_CLOCK_RATE_CCK; | ||
476 | else if (conf->channel->band == IEEE80211_BAND_2GHZ) | ||
477 | clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM; | ||
478 | else if (IS_CHAN_A_FAST_CLOCK(ah, chan)) | ||
479 | clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM; | ||
480 | else | ||
481 | clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM; | ||
482 | |||
483 | if (conf_is_ht40(conf)) | ||
484 | return clockrate * 2; | ||
485 | |||
486 | return clockrate; | ||
487 | } | ||
488 | |||
489 | static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah) | ||
490 | { | ||
491 | int32_t listen_time; | ||
492 | int32_t clock_rate; | ||
493 | |||
494 | ath9k_hw_update_cycle_counters(ah); | ||
495 | clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000; | ||
496 | listen_time = ah->listen_time / clock_rate; | ||
497 | ah->listen_time = 0; | ||
498 | |||
499 | return listen_time; | ||
500 | } | ||
501 | |||
502 | static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning) | 468 | static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning) |
503 | { | 469 | { |
504 | struct ar5416AniState *aniState; | 470 | struct ar5416AniState *aniState; |
@@ -667,7 +633,7 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) | |||
667 | REGWRITE_BUFFER_FLUSH(ah); | 633 | REGWRITE_BUFFER_FLUSH(ah); |
668 | } | 634 | } |
669 | 635 | ||
670 | static void ath9k_hw_ani_read_counters(struct ath_hw *ah) | 636 | static bool ath9k_hw_ani_read_counters(struct ath_hw *ah) |
671 | { | 637 | { |
672 | struct ath_common *common = ath9k_hw_common(ah); | 638 | struct ath_common *common = ath9k_hw_common(ah); |
673 | struct ar5416AniState *aniState = &ah->curchan->ani; | 639 | struct ar5416AniState *aniState = &ah->curchan->ani; |
@@ -677,11 +643,13 @@ static void ath9k_hw_ani_read_counters(struct ath_hw *ah) | |||
677 | u32 phyCnt1, phyCnt2; | 643 | u32 phyCnt1, phyCnt2; |
678 | int32_t listenTime; | 644 | int32_t listenTime; |
679 | 645 | ||
680 | listenTime = ath9k_hw_ani_get_listen_time(ah); | 646 | ath_hw_cycle_counters_update(common); |
681 | if (listenTime < 0) { | 647 | listenTime = ath_hw_get_listen_time(common); |
648 | |||
649 | if (listenTime <= 0) { | ||
682 | ah->stats.ast_ani_lneg++; | 650 | ah->stats.ast_ani_lneg++; |
683 | ath9k_ani_restart(ah); | 651 | ath9k_ani_restart(ah); |
684 | return; | 652 | return false; |
685 | } | 653 | } |
686 | 654 | ||
687 | if (!use_new_ani(ah)) { | 655 | if (!use_new_ani(ah)) { |
@@ -696,7 +664,7 @@ static void ath9k_hw_ani_read_counters(struct ath_hw *ah) | |||
696 | phyCnt1 = REG_READ(ah, AR_PHY_ERR_1); | 664 | phyCnt1 = REG_READ(ah, AR_PHY_ERR_1); |
697 | phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); | 665 | phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); |
698 | 666 | ||
699 | if (use_new_ani(ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) { | 667 | if (!use_new_ani(ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) { |
700 | if (phyCnt1 < ofdm_base) { | 668 | if (phyCnt1 < ofdm_base) { |
701 | ath_print(common, ATH_DBG_ANI, | 669 | ath_print(common, ATH_DBG_ANI, |
702 | "phyCnt1 0x%x, resetting " | 670 | "phyCnt1 0x%x, resetting " |
@@ -715,7 +683,7 @@ static void ath9k_hw_ani_read_counters(struct ath_hw *ah) | |||
715 | REG_WRITE(ah, AR_PHY_ERR_MASK_2, | 683 | REG_WRITE(ah, AR_PHY_ERR_MASK_2, |
716 | AR_PHY_ERR_CCK_TIMING); | 684 | AR_PHY_ERR_CCK_TIMING); |
717 | } | 685 | } |
718 | return; | 686 | return false; |
719 | } | 687 | } |
720 | 688 | ||
721 | ofdmPhyErrCnt = phyCnt1 - ofdm_base; | 689 | ofdmPhyErrCnt = phyCnt1 - ofdm_base; |
@@ -727,7 +695,7 @@ static void ath9k_hw_ani_read_counters(struct ath_hw *ah) | |||
727 | ah->stats.ast_ani_cckerrs += | 695 | ah->stats.ast_ani_cckerrs += |
728 | cckPhyErrCnt - aniState->cckPhyErrCount; | 696 | cckPhyErrCnt - aniState->cckPhyErrCount; |
729 | aniState->cckPhyErrCount = cckPhyErrCnt; | 697 | aniState->cckPhyErrCount = cckPhyErrCnt; |
730 | 698 | return true; | |
731 | } | 699 | } |
732 | 700 | ||
733 | void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) | 701 | void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) |
@@ -743,7 +711,8 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) | |||
743 | if (WARN_ON(!aniState)) | 711 | if (WARN_ON(!aniState)) |
744 | return; | 712 | return; |
745 | 713 | ||
746 | ath9k_hw_ani_read_counters(ah); | 714 | if (!ath9k_hw_ani_read_counters(ah)) |
715 | return; | ||
747 | 716 | ||
748 | ofdmPhyErrRate = aniState->ofdmPhyErrCount * 1000 / | 717 | ofdmPhyErrRate = aniState->ofdmPhyErrCount * 1000 / |
749 | aniState->listenTime; | 718 | aniState->listenTime; |
@@ -818,54 +787,6 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah) | |||
818 | } | 787 | } |
819 | EXPORT_SYMBOL(ath9k_hw_disable_mib_counters); | 788 | EXPORT_SYMBOL(ath9k_hw_disable_mib_counters); |
820 | 789 | ||
821 | void ath9k_hw_update_cycle_counters(struct ath_hw *ah) | ||
822 | { | ||
823 | struct ath_cycle_counters cc; | ||
824 | bool clear; | ||
825 | |||
826 | memcpy(&cc, &ah->cc, sizeof(cc)); | ||
827 | |||
828 | /* freeze counters */ | ||
829 | REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); | ||
830 | |||
831 | ah->cc.cycles = REG_READ(ah, AR_CCCNT); | ||
832 | if (ah->cc.cycles < cc.cycles) { | ||
833 | clear = true; | ||
834 | goto skip; | ||
835 | } | ||
836 | |||
837 | ah->cc.rx_clear = REG_READ(ah, AR_RCCNT); | ||
838 | ah->cc.rx_frame = REG_READ(ah, AR_RFCNT); | ||
839 | ah->cc.tx_frame = REG_READ(ah, AR_TFCNT); | ||
840 | |||
841 | /* prevent wraparound */ | ||
842 | if (ah->cc.cycles & BIT(31)) | ||
843 | clear = true; | ||
844 | |||
845 | #define CC_DELTA(_field, _reg) ah->cc_delta._field += ah->cc._field - cc._field | ||
846 | CC_DELTA(cycles, AR_CCCNT); | ||
847 | CC_DELTA(rx_frame, AR_RFCNT); | ||
848 | CC_DELTA(rx_clear, AR_RCCNT); | ||
849 | CC_DELTA(tx_frame, AR_TFCNT); | ||
850 | #undef CC_DELTA | ||
851 | |||
852 | ah->listen_time += (ah->cc.cycles - cc.cycles) - | ||
853 | ((ah->cc.rx_frame - cc.rx_frame) + | ||
854 | (ah->cc.tx_frame - cc.tx_frame)); | ||
855 | |||
856 | skip: | ||
857 | if (clear) { | ||
858 | REG_WRITE(ah, AR_CCCNT, 0); | ||
859 | REG_WRITE(ah, AR_RFCNT, 0); | ||
860 | REG_WRITE(ah, AR_RCCNT, 0); | ||
861 | REG_WRITE(ah, AR_TFCNT, 0); | ||
862 | memset(&ah->cc, 0, sizeof(ah->cc)); | ||
863 | } | ||
864 | |||
865 | /* unfreeze counters */ | ||
866 | REG_WRITE(ah, AR_MIBC, 0); | ||
867 | } | ||
868 | |||
869 | /* | 790 | /* |
870 | * Process a MIB interrupt. We may potentially be invoked because | 791 | * Process a MIB interrupt. We may potentially be invoked because |
871 | * any of the MIB counters overflow/trigger so don't assume we're | 792 | * any of the MIB counters overflow/trigger so don't assume we're |
diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h index 98cfd8154c71..0cd6783de883 100644 --- a/drivers/net/wireless/ath/ath9k/ani.h +++ b/drivers/net/wireless/ath/ath9k/ani.h | |||
@@ -93,13 +93,6 @@ struct ath9k_mib_stats { | |||
93 | u32 beacons; | 93 | u32 beacons; |
94 | }; | 94 | }; |
95 | 95 | ||
96 | struct ath_cycle_counters { | ||
97 | u32 cycles; | ||
98 | u32 rx_frame; | ||
99 | u32 rx_clear; | ||
100 | u32 tx_frame; | ||
101 | }; | ||
102 | |||
103 | /* INI default values for ANI registers */ | 96 | /* INI default values for ANI registers */ |
104 | struct ath9k_ani_default { | 97 | struct ath9k_ani_default { |
105 | u16 m1ThreshLow; | 98 | u16 m1ThreshLow; |
@@ -164,7 +157,6 @@ struct ar5416Stats { | |||
164 | 157 | ||
165 | void ath9k_enable_mib_counters(struct ath_hw *ah); | 158 | void ath9k_enable_mib_counters(struct ath_hw *ah); |
166 | void ath9k_hw_disable_mib_counters(struct ath_hw *ah); | 159 | void ath9k_hw_disable_mib_counters(struct ath_hw *ah); |
167 | void ath9k_hw_update_cycle_counters(struct ath_hw *ah); | ||
168 | void ath9k_hw_ani_setup(struct ath_hw *ah); | 160 | void ath9k_hw_ani_setup(struct ath_hw *ah); |
169 | void ath9k_hw_ani_init(struct ath_hw *ah); | 161 | void ath9k_hw_ani_init(struct ath_hw *ah); |
170 | int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, | 162 | int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p0_initvals.h deleted file mode 100644 index d3375fc4ce8b..000000000000 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p0_initvals.h +++ /dev/null | |||
@@ -1,1784 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2010 Atheros Communications Inc. | ||
3 | * | ||
4 | * Permission to use, copy, modify, and/or distribute this software for any | ||
5 | * purpose with or without fee is hereby granted, provided that the above | ||
6 | * copyright notice and this permission notice appear in all copies. | ||
7 | * | ||
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | ||
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | ||
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||
15 | */ | ||
16 | |||
17 | #ifndef INITVALS_9003_2P0_H | ||
18 | #define INITVALS_9003_2P0_H | ||
19 | |||
20 | /* AR9003 2.0 */ | ||
21 | |||
22 | static const u32 ar9300_2p0_radio_postamble[][5] = { | ||
23 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
24 | {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, | ||
25 | {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, | ||
26 | {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, | ||
27 | {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
28 | {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
29 | {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
30 | {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
31 | {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
32 | {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
33 | }; | ||
34 | |||
35 | static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = { | ||
36 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
37 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
38 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
39 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
40 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
41 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
42 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
43 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
44 | {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402}, | ||
45 | {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404}, | ||
46 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
47 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
48 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
49 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
50 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
51 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
52 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
53 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
54 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
55 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
56 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
57 | {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83}, | ||
58 | {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84}, | ||
59 | {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3}, | ||
60 | {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5}, | ||
61 | {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9}, | ||
62 | {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb}, | ||
63 | {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
64 | {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
65 | {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
66 | {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
67 | {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
68 | {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
69 | {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
70 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
71 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
72 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
73 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
74 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
75 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
76 | {0x0000a598, 0x21820220, 0x21820220, 0x16800402, 0x16800402}, | ||
77 | {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404}, | ||
78 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
79 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
80 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
81 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
82 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
83 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
84 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
85 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
86 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
87 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
88 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
89 | {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x47801a83, 0x47801a83}, | ||
90 | {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4a801c84, 0x4a801c84}, | ||
91 | {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4e801ce3, 0x4e801ce3}, | ||
92 | {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x52801ce5, 0x52801ce5}, | ||
93 | {0x0000a5dc, 0x7086308c, 0x7086308c, 0x56801ce9, 0x56801ce9}, | ||
94 | {0x0000a5e0, 0x738a308a, 0x738a308a, 0x5a801ceb, 0x5a801ceb}, | ||
95 | {0x0000a5e4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
96 | {0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
97 | {0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
98 | {0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
99 | {0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
100 | {0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
101 | {0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
102 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
103 | {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
104 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
105 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
106 | {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
107 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
108 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
109 | {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
110 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
111 | }; | ||
112 | |||
113 | static const u32 ar9300Modes_fast_clock_2p0[][3] = { | ||
114 | /* Addr 5G_HT20 5G_HT40 */ | ||
115 | {0x00001030, 0x00000268, 0x000004d0}, | ||
116 | {0x00001070, 0x0000018c, 0x00000318}, | ||
117 | {0x000010b0, 0x00000fd0, 0x00001fa0}, | ||
118 | {0x00008014, 0x044c044c, 0x08980898}, | ||
119 | {0x0000801c, 0x148ec02b, 0x148ec057}, | ||
120 | {0x00008318, 0x000044c0, 0x00008980}, | ||
121 | {0x00009e00, 0x03721821, 0x03721821}, | ||
122 | {0x0000a230, 0x0000000b, 0x00000016}, | ||
123 | {0x0000a254, 0x00000898, 0x00001130}, | ||
124 | }; | ||
125 | |||
126 | static const u32 ar9300_2p0_radio_core[][2] = { | ||
127 | /* Addr allmodes */ | ||
128 | {0x00016000, 0x36db6db6}, | ||
129 | {0x00016004, 0x6db6db40}, | ||
130 | {0x00016008, 0x73f00000}, | ||
131 | {0x0001600c, 0x00000000}, | ||
132 | {0x00016040, 0x7f80fff8}, | ||
133 | {0x0001604c, 0x76d005b5}, | ||
134 | {0x00016050, 0x556cf031}, | ||
135 | {0x00016054, 0x13449440}, | ||
136 | {0x00016058, 0x0c51c92c}, | ||
137 | {0x0001605c, 0x3db7fffc}, | ||
138 | {0x00016060, 0xfffffffc}, | ||
139 | {0x00016064, 0x000f0278}, | ||
140 | {0x0001606c, 0x6db60000}, | ||
141 | {0x00016080, 0x00000000}, | ||
142 | {0x00016084, 0x0e48048c}, | ||
143 | {0x00016088, 0x54214514}, | ||
144 | {0x0001608c, 0x119f481e}, | ||
145 | {0x00016090, 0x24926490}, | ||
146 | {0x00016098, 0xd2888888}, | ||
147 | {0x000160a0, 0x0a108ffe}, | ||
148 | {0x000160a4, 0x812fc370}, | ||
149 | {0x000160a8, 0x423c8000}, | ||
150 | {0x000160b4, 0x92480080}, | ||
151 | {0x000160c0, 0x00adb6d0}, | ||
152 | {0x000160c4, 0x6db6db60}, | ||
153 | {0x000160c8, 0x6db6db6c}, | ||
154 | {0x000160cc, 0x01e6c000}, | ||
155 | {0x00016100, 0x3fffbe01}, | ||
156 | {0x00016104, 0xfff80000}, | ||
157 | {0x00016108, 0x00080010}, | ||
158 | {0x00016144, 0x02084080}, | ||
159 | {0x00016148, 0x00000000}, | ||
160 | {0x00016280, 0x058a0001}, | ||
161 | {0x00016284, 0x3d840208}, | ||
162 | {0x00016288, 0x05a20408}, | ||
163 | {0x0001628c, 0x00038c07}, | ||
164 | {0x00016290, 0x40000004}, | ||
165 | {0x00016294, 0x458aa14f}, | ||
166 | {0x00016380, 0x00000000}, | ||
167 | {0x00016384, 0x00000000}, | ||
168 | {0x00016388, 0x00800700}, | ||
169 | {0x0001638c, 0x00800700}, | ||
170 | {0x00016390, 0x00800700}, | ||
171 | {0x00016394, 0x00000000}, | ||
172 | {0x00016398, 0x00000000}, | ||
173 | {0x0001639c, 0x00000000}, | ||
174 | {0x000163a0, 0x00000001}, | ||
175 | {0x000163a4, 0x00000001}, | ||
176 | {0x000163a8, 0x00000000}, | ||
177 | {0x000163ac, 0x00000000}, | ||
178 | {0x000163b0, 0x00000000}, | ||
179 | {0x000163b4, 0x00000000}, | ||
180 | {0x000163b8, 0x00000000}, | ||
181 | {0x000163bc, 0x00000000}, | ||
182 | {0x000163c0, 0x000000a0}, | ||
183 | {0x000163c4, 0x000c0000}, | ||
184 | {0x000163c8, 0x14021402}, | ||
185 | {0x000163cc, 0x00001402}, | ||
186 | {0x000163d0, 0x00000000}, | ||
187 | {0x000163d4, 0x00000000}, | ||
188 | {0x00016400, 0x36db6db6}, | ||
189 | {0x00016404, 0x6db6db40}, | ||
190 | {0x00016408, 0x73f00000}, | ||
191 | {0x0001640c, 0x00000000}, | ||
192 | {0x00016440, 0x7f80fff8}, | ||
193 | {0x0001644c, 0x76d005b5}, | ||
194 | {0x00016450, 0x556cf031}, | ||
195 | {0x00016454, 0x13449440}, | ||
196 | {0x00016458, 0x0c51c92c}, | ||
197 | {0x0001645c, 0x3db7fffc}, | ||
198 | {0x00016460, 0xfffffffc}, | ||
199 | {0x00016464, 0x000f0278}, | ||
200 | {0x0001646c, 0x6db60000}, | ||
201 | {0x00016500, 0x3fffbe01}, | ||
202 | {0x00016504, 0xfff80000}, | ||
203 | {0x00016508, 0x00080010}, | ||
204 | {0x00016544, 0x02084080}, | ||
205 | {0x00016548, 0x00000000}, | ||
206 | {0x00016780, 0x00000000}, | ||
207 | {0x00016784, 0x00000000}, | ||
208 | {0x00016788, 0x00800700}, | ||
209 | {0x0001678c, 0x00800700}, | ||
210 | {0x00016790, 0x00800700}, | ||
211 | {0x00016794, 0x00000000}, | ||
212 | {0x00016798, 0x00000000}, | ||
213 | {0x0001679c, 0x00000000}, | ||
214 | {0x000167a0, 0x00000001}, | ||
215 | {0x000167a4, 0x00000001}, | ||
216 | {0x000167a8, 0x00000000}, | ||
217 | {0x000167ac, 0x00000000}, | ||
218 | {0x000167b0, 0x00000000}, | ||
219 | {0x000167b4, 0x00000000}, | ||
220 | {0x000167b8, 0x00000000}, | ||
221 | {0x000167bc, 0x00000000}, | ||
222 | {0x000167c0, 0x000000a0}, | ||
223 | {0x000167c4, 0x000c0000}, | ||
224 | {0x000167c8, 0x14021402}, | ||
225 | {0x000167cc, 0x00001402}, | ||
226 | {0x000167d0, 0x00000000}, | ||
227 | {0x000167d4, 0x00000000}, | ||
228 | {0x00016800, 0x36db6db6}, | ||
229 | {0x00016804, 0x6db6db40}, | ||
230 | {0x00016808, 0x73f00000}, | ||
231 | {0x0001680c, 0x00000000}, | ||
232 | {0x00016840, 0x7f80fff8}, | ||
233 | {0x0001684c, 0x76d005b5}, | ||
234 | {0x00016850, 0x556cf031}, | ||
235 | {0x00016854, 0x13449440}, | ||
236 | {0x00016858, 0x0c51c92c}, | ||
237 | {0x0001685c, 0x3db7fffc}, | ||
238 | {0x00016860, 0xfffffffc}, | ||
239 | {0x00016864, 0x000f0278}, | ||
240 | {0x0001686c, 0x6db60000}, | ||
241 | {0x00016900, 0x3fffbe01}, | ||
242 | {0x00016904, 0xfff80000}, | ||
243 | {0x00016908, 0x00080010}, | ||
244 | {0x00016944, 0x02084080}, | ||
245 | {0x00016948, 0x00000000}, | ||
246 | {0x00016b80, 0x00000000}, | ||
247 | {0x00016b84, 0x00000000}, | ||
248 | {0x00016b88, 0x00800700}, | ||
249 | {0x00016b8c, 0x00800700}, | ||
250 | {0x00016b90, 0x00800700}, | ||
251 | {0x00016b94, 0x00000000}, | ||
252 | {0x00016b98, 0x00000000}, | ||
253 | {0x00016b9c, 0x00000000}, | ||
254 | {0x00016ba0, 0x00000001}, | ||
255 | {0x00016ba4, 0x00000001}, | ||
256 | {0x00016ba8, 0x00000000}, | ||
257 | {0x00016bac, 0x00000000}, | ||
258 | {0x00016bb0, 0x00000000}, | ||
259 | {0x00016bb4, 0x00000000}, | ||
260 | {0x00016bb8, 0x00000000}, | ||
261 | {0x00016bbc, 0x00000000}, | ||
262 | {0x00016bc0, 0x000000a0}, | ||
263 | {0x00016bc4, 0x000c0000}, | ||
264 | {0x00016bc8, 0x14021402}, | ||
265 | {0x00016bcc, 0x00001402}, | ||
266 | {0x00016bd0, 0x00000000}, | ||
267 | {0x00016bd4, 0x00000000}, | ||
268 | }; | ||
269 | |||
270 | static const u32 ar9300Common_rx_gain_table_merlin_2p0[][2] = { | ||
271 | /* Addr allmodes */ | ||
272 | {0x0000a000, 0x02000101}, | ||
273 | {0x0000a004, 0x02000102}, | ||
274 | {0x0000a008, 0x02000103}, | ||
275 | {0x0000a00c, 0x02000104}, | ||
276 | {0x0000a010, 0x02000200}, | ||
277 | {0x0000a014, 0x02000201}, | ||
278 | {0x0000a018, 0x02000202}, | ||
279 | {0x0000a01c, 0x02000203}, | ||
280 | {0x0000a020, 0x02000204}, | ||
281 | {0x0000a024, 0x02000205}, | ||
282 | {0x0000a028, 0x02000208}, | ||
283 | {0x0000a02c, 0x02000302}, | ||
284 | {0x0000a030, 0x02000303}, | ||
285 | {0x0000a034, 0x02000304}, | ||
286 | {0x0000a038, 0x02000400}, | ||
287 | {0x0000a03c, 0x02010300}, | ||
288 | {0x0000a040, 0x02010301}, | ||
289 | {0x0000a044, 0x02010302}, | ||
290 | {0x0000a048, 0x02000500}, | ||
291 | {0x0000a04c, 0x02010400}, | ||
292 | {0x0000a050, 0x02020300}, | ||
293 | {0x0000a054, 0x02020301}, | ||
294 | {0x0000a058, 0x02020302}, | ||
295 | {0x0000a05c, 0x02020303}, | ||
296 | {0x0000a060, 0x02020400}, | ||
297 | {0x0000a064, 0x02030300}, | ||
298 | {0x0000a068, 0x02030301}, | ||
299 | {0x0000a06c, 0x02030302}, | ||
300 | {0x0000a070, 0x02030303}, | ||
301 | {0x0000a074, 0x02030400}, | ||
302 | {0x0000a078, 0x02040300}, | ||
303 | {0x0000a07c, 0x02040301}, | ||
304 | {0x0000a080, 0x02040302}, | ||
305 | {0x0000a084, 0x02040303}, | ||
306 | {0x0000a088, 0x02030500}, | ||
307 | {0x0000a08c, 0x02040400}, | ||
308 | {0x0000a090, 0x02050203}, | ||
309 | {0x0000a094, 0x02050204}, | ||
310 | {0x0000a098, 0x02050205}, | ||
311 | {0x0000a09c, 0x02040500}, | ||
312 | {0x0000a0a0, 0x02050301}, | ||
313 | {0x0000a0a4, 0x02050302}, | ||
314 | {0x0000a0a8, 0x02050303}, | ||
315 | {0x0000a0ac, 0x02050400}, | ||
316 | {0x0000a0b0, 0x02050401}, | ||
317 | {0x0000a0b4, 0x02050402}, | ||
318 | {0x0000a0b8, 0x02050403}, | ||
319 | {0x0000a0bc, 0x02050500}, | ||
320 | {0x0000a0c0, 0x02050501}, | ||
321 | {0x0000a0c4, 0x02050502}, | ||
322 | {0x0000a0c8, 0x02050503}, | ||
323 | {0x0000a0cc, 0x02050504}, | ||
324 | {0x0000a0d0, 0x02050600}, | ||
325 | {0x0000a0d4, 0x02050601}, | ||
326 | {0x0000a0d8, 0x02050602}, | ||
327 | {0x0000a0dc, 0x02050603}, | ||
328 | {0x0000a0e0, 0x02050604}, | ||
329 | {0x0000a0e4, 0x02050700}, | ||
330 | {0x0000a0e8, 0x02050701}, | ||
331 | {0x0000a0ec, 0x02050702}, | ||
332 | {0x0000a0f0, 0x02050703}, | ||
333 | {0x0000a0f4, 0x02050704}, | ||
334 | {0x0000a0f8, 0x02050705}, | ||
335 | {0x0000a0fc, 0x02050708}, | ||
336 | {0x0000a100, 0x02050709}, | ||
337 | {0x0000a104, 0x0205070a}, | ||
338 | {0x0000a108, 0x0205070b}, | ||
339 | {0x0000a10c, 0x0205070c}, | ||
340 | {0x0000a110, 0x0205070d}, | ||
341 | {0x0000a114, 0x02050710}, | ||
342 | {0x0000a118, 0x02050711}, | ||
343 | {0x0000a11c, 0x02050712}, | ||
344 | {0x0000a120, 0x02050713}, | ||
345 | {0x0000a124, 0x02050714}, | ||
346 | {0x0000a128, 0x02050715}, | ||
347 | {0x0000a12c, 0x02050730}, | ||
348 | {0x0000a130, 0x02050731}, | ||
349 | {0x0000a134, 0x02050732}, | ||
350 | {0x0000a138, 0x02050733}, | ||
351 | {0x0000a13c, 0x02050734}, | ||
352 | {0x0000a140, 0x02050735}, | ||
353 | {0x0000a144, 0x02050750}, | ||
354 | {0x0000a148, 0x02050751}, | ||
355 | {0x0000a14c, 0x02050752}, | ||
356 | {0x0000a150, 0x02050753}, | ||
357 | {0x0000a154, 0x02050754}, | ||
358 | {0x0000a158, 0x02050755}, | ||
359 | {0x0000a15c, 0x02050770}, | ||
360 | {0x0000a160, 0x02050771}, | ||
361 | {0x0000a164, 0x02050772}, | ||
362 | {0x0000a168, 0x02050773}, | ||
363 | {0x0000a16c, 0x02050774}, | ||
364 | {0x0000a170, 0x02050775}, | ||
365 | {0x0000a174, 0x00000776}, | ||
366 | {0x0000a178, 0x00000776}, | ||
367 | {0x0000a17c, 0x00000776}, | ||
368 | {0x0000a180, 0x00000776}, | ||
369 | {0x0000a184, 0x00000776}, | ||
370 | {0x0000a188, 0x00000776}, | ||
371 | {0x0000a18c, 0x00000776}, | ||
372 | {0x0000a190, 0x00000776}, | ||
373 | {0x0000a194, 0x00000776}, | ||
374 | {0x0000a198, 0x00000776}, | ||
375 | {0x0000a19c, 0x00000776}, | ||
376 | {0x0000a1a0, 0x00000776}, | ||
377 | {0x0000a1a4, 0x00000776}, | ||
378 | {0x0000a1a8, 0x00000776}, | ||
379 | {0x0000a1ac, 0x00000776}, | ||
380 | {0x0000a1b0, 0x00000776}, | ||
381 | {0x0000a1b4, 0x00000776}, | ||
382 | {0x0000a1b8, 0x00000776}, | ||
383 | {0x0000a1bc, 0x00000776}, | ||
384 | {0x0000a1c0, 0x00000776}, | ||
385 | {0x0000a1c4, 0x00000776}, | ||
386 | {0x0000a1c8, 0x00000776}, | ||
387 | {0x0000a1cc, 0x00000776}, | ||
388 | {0x0000a1d0, 0x00000776}, | ||
389 | {0x0000a1d4, 0x00000776}, | ||
390 | {0x0000a1d8, 0x00000776}, | ||
391 | {0x0000a1dc, 0x00000776}, | ||
392 | {0x0000a1e0, 0x00000776}, | ||
393 | {0x0000a1e4, 0x00000776}, | ||
394 | {0x0000a1e8, 0x00000776}, | ||
395 | {0x0000a1ec, 0x00000776}, | ||
396 | {0x0000a1f0, 0x00000776}, | ||
397 | {0x0000a1f4, 0x00000776}, | ||
398 | {0x0000a1f8, 0x00000776}, | ||
399 | {0x0000a1fc, 0x00000776}, | ||
400 | {0x0000b000, 0x02000101}, | ||
401 | {0x0000b004, 0x02000102}, | ||
402 | {0x0000b008, 0x02000103}, | ||
403 | {0x0000b00c, 0x02000104}, | ||
404 | {0x0000b010, 0x02000200}, | ||
405 | {0x0000b014, 0x02000201}, | ||
406 | {0x0000b018, 0x02000202}, | ||
407 | {0x0000b01c, 0x02000203}, | ||
408 | {0x0000b020, 0x02000204}, | ||
409 | {0x0000b024, 0x02000205}, | ||
410 | {0x0000b028, 0x02000208}, | ||
411 | {0x0000b02c, 0x02000302}, | ||
412 | {0x0000b030, 0x02000303}, | ||
413 | {0x0000b034, 0x02000304}, | ||
414 | {0x0000b038, 0x02000400}, | ||
415 | {0x0000b03c, 0x02010300}, | ||
416 | {0x0000b040, 0x02010301}, | ||
417 | {0x0000b044, 0x02010302}, | ||
418 | {0x0000b048, 0x02000500}, | ||
419 | {0x0000b04c, 0x02010400}, | ||
420 | {0x0000b050, 0x02020300}, | ||
421 | {0x0000b054, 0x02020301}, | ||
422 | {0x0000b058, 0x02020302}, | ||
423 | {0x0000b05c, 0x02020303}, | ||
424 | {0x0000b060, 0x02020400}, | ||
425 | {0x0000b064, 0x02030300}, | ||
426 | {0x0000b068, 0x02030301}, | ||
427 | {0x0000b06c, 0x02030302}, | ||
428 | {0x0000b070, 0x02030303}, | ||
429 | {0x0000b074, 0x02030400}, | ||
430 | {0x0000b078, 0x02040300}, | ||
431 | {0x0000b07c, 0x02040301}, | ||
432 | {0x0000b080, 0x02040302}, | ||
433 | {0x0000b084, 0x02040303}, | ||
434 | {0x0000b088, 0x02030500}, | ||
435 | {0x0000b08c, 0x02040400}, | ||
436 | {0x0000b090, 0x02050203}, | ||
437 | {0x0000b094, 0x02050204}, | ||
438 | {0x0000b098, 0x02050205}, | ||
439 | {0x0000b09c, 0x02040500}, | ||
440 | {0x0000b0a0, 0x02050301}, | ||
441 | {0x0000b0a4, 0x02050302}, | ||
442 | {0x0000b0a8, 0x02050303}, | ||
443 | {0x0000b0ac, 0x02050400}, | ||
444 | {0x0000b0b0, 0x02050401}, | ||
445 | {0x0000b0b4, 0x02050402}, | ||
446 | {0x0000b0b8, 0x02050403}, | ||
447 | {0x0000b0bc, 0x02050500}, | ||
448 | {0x0000b0c0, 0x02050501}, | ||
449 | {0x0000b0c4, 0x02050502}, | ||
450 | {0x0000b0c8, 0x02050503}, | ||
451 | {0x0000b0cc, 0x02050504}, | ||
452 | {0x0000b0d0, 0x02050600}, | ||
453 | {0x0000b0d4, 0x02050601}, | ||
454 | {0x0000b0d8, 0x02050602}, | ||
455 | {0x0000b0dc, 0x02050603}, | ||
456 | {0x0000b0e0, 0x02050604}, | ||
457 | {0x0000b0e4, 0x02050700}, | ||
458 | {0x0000b0e8, 0x02050701}, | ||
459 | {0x0000b0ec, 0x02050702}, | ||
460 | {0x0000b0f0, 0x02050703}, | ||
461 | {0x0000b0f4, 0x02050704}, | ||
462 | {0x0000b0f8, 0x02050705}, | ||
463 | {0x0000b0fc, 0x02050708}, | ||
464 | {0x0000b100, 0x02050709}, | ||
465 | {0x0000b104, 0x0205070a}, | ||
466 | {0x0000b108, 0x0205070b}, | ||
467 | {0x0000b10c, 0x0205070c}, | ||
468 | {0x0000b110, 0x0205070d}, | ||
469 | {0x0000b114, 0x02050710}, | ||
470 | {0x0000b118, 0x02050711}, | ||
471 | {0x0000b11c, 0x02050712}, | ||
472 | {0x0000b120, 0x02050713}, | ||
473 | {0x0000b124, 0x02050714}, | ||
474 | {0x0000b128, 0x02050715}, | ||
475 | {0x0000b12c, 0x02050730}, | ||
476 | {0x0000b130, 0x02050731}, | ||
477 | {0x0000b134, 0x02050732}, | ||
478 | {0x0000b138, 0x02050733}, | ||
479 | {0x0000b13c, 0x02050734}, | ||
480 | {0x0000b140, 0x02050735}, | ||
481 | {0x0000b144, 0x02050750}, | ||
482 | {0x0000b148, 0x02050751}, | ||
483 | {0x0000b14c, 0x02050752}, | ||
484 | {0x0000b150, 0x02050753}, | ||
485 | {0x0000b154, 0x02050754}, | ||
486 | {0x0000b158, 0x02050755}, | ||
487 | {0x0000b15c, 0x02050770}, | ||
488 | {0x0000b160, 0x02050771}, | ||
489 | {0x0000b164, 0x02050772}, | ||
490 | {0x0000b168, 0x02050773}, | ||
491 | {0x0000b16c, 0x02050774}, | ||
492 | {0x0000b170, 0x02050775}, | ||
493 | {0x0000b174, 0x00000776}, | ||
494 | {0x0000b178, 0x00000776}, | ||
495 | {0x0000b17c, 0x00000776}, | ||
496 | {0x0000b180, 0x00000776}, | ||
497 | {0x0000b184, 0x00000776}, | ||
498 | {0x0000b188, 0x00000776}, | ||
499 | {0x0000b18c, 0x00000776}, | ||
500 | {0x0000b190, 0x00000776}, | ||
501 | {0x0000b194, 0x00000776}, | ||
502 | {0x0000b198, 0x00000776}, | ||
503 | {0x0000b19c, 0x00000776}, | ||
504 | {0x0000b1a0, 0x00000776}, | ||
505 | {0x0000b1a4, 0x00000776}, | ||
506 | {0x0000b1a8, 0x00000776}, | ||
507 | {0x0000b1ac, 0x00000776}, | ||
508 | {0x0000b1b0, 0x00000776}, | ||
509 | {0x0000b1b4, 0x00000776}, | ||
510 | {0x0000b1b8, 0x00000776}, | ||
511 | {0x0000b1bc, 0x00000776}, | ||
512 | {0x0000b1c0, 0x00000776}, | ||
513 | {0x0000b1c4, 0x00000776}, | ||
514 | {0x0000b1c8, 0x00000776}, | ||
515 | {0x0000b1cc, 0x00000776}, | ||
516 | {0x0000b1d0, 0x00000776}, | ||
517 | {0x0000b1d4, 0x00000776}, | ||
518 | {0x0000b1d8, 0x00000776}, | ||
519 | {0x0000b1dc, 0x00000776}, | ||
520 | {0x0000b1e0, 0x00000776}, | ||
521 | {0x0000b1e4, 0x00000776}, | ||
522 | {0x0000b1e8, 0x00000776}, | ||
523 | {0x0000b1ec, 0x00000776}, | ||
524 | {0x0000b1f0, 0x00000776}, | ||
525 | {0x0000b1f4, 0x00000776}, | ||
526 | {0x0000b1f8, 0x00000776}, | ||
527 | {0x0000b1fc, 0x00000776}, | ||
528 | }; | ||
529 | |||
530 | static const u32 ar9300_2p0_mac_postamble[][5] = { | ||
531 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
532 | {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, | ||
533 | {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, | ||
534 | {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, | ||
535 | {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, | ||
536 | {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, | ||
537 | {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, | ||
538 | {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, | ||
539 | {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, | ||
540 | }; | ||
541 | |||
542 | static const u32 ar9300_2p0_soc_postamble[][5] = { | ||
543 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
544 | {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, | ||
545 | }; | ||
546 | |||
547 | static const u32 ar9200_merlin_2p0_radio_core[][2] = { | ||
548 | /* Addr allmodes */ | ||
549 | {0x00007800, 0x00040000}, | ||
550 | {0x00007804, 0xdb005012}, | ||
551 | {0x00007808, 0x04924914}, | ||
552 | {0x0000780c, 0x21084210}, | ||
553 | {0x00007810, 0x6d801300}, | ||
554 | {0x00007814, 0x0019beff}, | ||
555 | {0x00007818, 0x07e41000}, | ||
556 | {0x0000781c, 0x00392000}, | ||
557 | {0x00007820, 0x92592480}, | ||
558 | {0x00007824, 0x00040000}, | ||
559 | {0x00007828, 0xdb005012}, | ||
560 | {0x0000782c, 0x04924914}, | ||
561 | {0x00007830, 0x21084210}, | ||
562 | {0x00007834, 0x6d801300}, | ||
563 | {0x00007838, 0x0019beff}, | ||
564 | {0x0000783c, 0x07e40000}, | ||
565 | {0x00007840, 0x00392000}, | ||
566 | {0x00007844, 0x92592480}, | ||
567 | {0x00007848, 0x00100000}, | ||
568 | {0x0000784c, 0x773f0567}, | ||
569 | {0x00007850, 0x54214514}, | ||
570 | {0x00007854, 0x12035828}, | ||
571 | {0x00007858, 0x92592692}, | ||
572 | {0x0000785c, 0x00000000}, | ||
573 | {0x00007860, 0x56400000}, | ||
574 | {0x00007864, 0x0a8e370e}, | ||
575 | {0x00007868, 0xc0102850}, | ||
576 | {0x0000786c, 0x812d4000}, | ||
577 | {0x00007870, 0x807ec400}, | ||
578 | {0x00007874, 0x001b6db0}, | ||
579 | {0x00007878, 0x00376b63}, | ||
580 | {0x0000787c, 0x06db6db6}, | ||
581 | {0x00007880, 0x006d8000}, | ||
582 | {0x00007884, 0xffeffffe}, | ||
583 | {0x00007888, 0xffeffffe}, | ||
584 | {0x0000788c, 0x00010000}, | ||
585 | {0x00007890, 0x02060aeb}, | ||
586 | {0x00007894, 0x5a108000}, | ||
587 | }; | ||
588 | |||
589 | static const u32 ar9300_2p0_baseband_postamble[][5] = { | ||
590 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
591 | {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, | ||
592 | {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, | ||
593 | {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, | ||
594 | {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, | ||
595 | {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, | ||
596 | {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, | ||
597 | {0x00009c00, 0x00000044, 0x000000c4, 0x000000c4, 0x00000044}, | ||
598 | {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0}, | ||
599 | {0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020}, | ||
600 | {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, | ||
601 | {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, | ||
602 | {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, | ||
603 | {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
604 | {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, | ||
605 | {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, | ||
606 | {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, | ||
607 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, | ||
608 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, | ||
609 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, | ||
610 | {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, | ||
611 | {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, | ||
612 | {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, | ||
613 | {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018}, | ||
614 | {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, | ||
615 | {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, | ||
616 | {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, | ||
617 | {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, | ||
618 | {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, | ||
619 | {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, | ||
620 | {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, | ||
621 | {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
622 | {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, | ||
623 | {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, | ||
624 | {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, | ||
625 | {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, | ||
626 | {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a}, | ||
627 | {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
628 | {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
629 | {0x0000ae04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
630 | {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
631 | {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
632 | {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | ||
633 | {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
634 | {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
635 | {0x0000be04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
636 | {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
637 | {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
638 | {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | ||
639 | {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
640 | }; | ||
641 | |||
642 | static const u32 ar9300_2p0_baseband_core[][2] = { | ||
643 | /* Addr allmodes */ | ||
644 | {0x00009800, 0xafe68e30}, | ||
645 | {0x00009804, 0xfd14e000}, | ||
646 | {0x00009808, 0x9c0a9f6b}, | ||
647 | {0x0000980c, 0x04900000}, | ||
648 | {0x00009814, 0x9280c00a}, | ||
649 | {0x00009818, 0x00000000}, | ||
650 | {0x0000981c, 0x00020028}, | ||
651 | {0x00009834, 0x5f3ca3de}, | ||
652 | {0x00009838, 0x0108ecff}, | ||
653 | {0x0000983c, 0x14750600}, | ||
654 | {0x00009880, 0x201fff00}, | ||
655 | {0x00009884, 0x00001042}, | ||
656 | {0x000098a4, 0x00200400}, | ||
657 | {0x000098b0, 0x52440bbe}, | ||
658 | {0x000098d0, 0x004b6a8e}, | ||
659 | {0x000098d4, 0x00000820}, | ||
660 | {0x000098dc, 0x00000000}, | ||
661 | {0x000098f0, 0x00000000}, | ||
662 | {0x000098f4, 0x00000000}, | ||
663 | {0x00009c04, 0xff55ff55}, | ||
664 | {0x00009c08, 0x0320ff55}, | ||
665 | {0x00009c0c, 0x00000000}, | ||
666 | {0x00009c10, 0x00000000}, | ||
667 | {0x00009c14, 0x00046384}, | ||
668 | {0x00009c18, 0x05b6b440}, | ||
669 | {0x00009c1c, 0x00b6b440}, | ||
670 | {0x00009d00, 0xc080a333}, | ||
671 | {0x00009d04, 0x40206c10}, | ||
672 | {0x00009d08, 0x009c4060}, | ||
673 | {0x00009d0c, 0x9883800a}, | ||
674 | {0x00009d10, 0x01834061}, | ||
675 | {0x00009d14, 0x00c0040b}, | ||
676 | {0x00009d18, 0x00000000}, | ||
677 | {0x00009e08, 0x0038230c}, | ||
678 | {0x00009e24, 0x990bb515}, | ||
679 | {0x00009e28, 0x0c6f0000}, | ||
680 | {0x00009e30, 0x06336f77}, | ||
681 | {0x00009e34, 0x6af6532f}, | ||
682 | {0x00009e38, 0x0cc80c00}, | ||
683 | {0x00009e3c, 0xcf946222}, | ||
684 | {0x00009e40, 0x0d261820}, | ||
685 | {0x00009e4c, 0x00001004}, | ||
686 | {0x00009e50, 0x00ff03f1}, | ||
687 | {0x00009e54, 0x00000000}, | ||
688 | {0x00009fc0, 0x803e4788}, | ||
689 | {0x00009fc4, 0x0001efb5}, | ||
690 | {0x00009fcc, 0x40000014}, | ||
691 | {0x00009fd0, 0x01193b93}, | ||
692 | {0x0000a20c, 0x00000000}, | ||
693 | {0x0000a220, 0x00000000}, | ||
694 | {0x0000a224, 0x00000000}, | ||
695 | {0x0000a228, 0x10002310}, | ||
696 | {0x0000a22c, 0x01036a1e}, | ||
697 | {0x0000a234, 0x10000fff}, | ||
698 | {0x0000a23c, 0x00000000}, | ||
699 | {0x0000a244, 0x0c000000}, | ||
700 | {0x0000a2a0, 0x00000001}, | ||
701 | {0x0000a2c0, 0x00000001}, | ||
702 | {0x0000a2c8, 0x00000000}, | ||
703 | {0x0000a2cc, 0x18c43433}, | ||
704 | {0x0000a2d4, 0x00000000}, | ||
705 | {0x0000a2dc, 0x00000000}, | ||
706 | {0x0000a2e0, 0x00000000}, | ||
707 | {0x0000a2e4, 0x00000000}, | ||
708 | {0x0000a2e8, 0x00000000}, | ||
709 | {0x0000a2ec, 0x00000000}, | ||
710 | {0x0000a2f0, 0x00000000}, | ||
711 | {0x0000a2f4, 0x00000000}, | ||
712 | {0x0000a2f8, 0x00000000}, | ||
713 | {0x0000a344, 0x00000000}, | ||
714 | {0x0000a34c, 0x00000000}, | ||
715 | {0x0000a350, 0x0000a000}, | ||
716 | {0x0000a364, 0x00000000}, | ||
717 | {0x0000a370, 0x00000000}, | ||
718 | {0x0000a390, 0x00000001}, | ||
719 | {0x0000a394, 0x00000444}, | ||
720 | {0x0000a398, 0x001f0e0f}, | ||
721 | {0x0000a39c, 0x0075393f}, | ||
722 | {0x0000a3a0, 0xb79f6427}, | ||
723 | {0x0000a3a4, 0x00000000}, | ||
724 | {0x0000a3a8, 0xaaaaaaaa}, | ||
725 | {0x0000a3ac, 0x3c466478}, | ||
726 | {0x0000a3c0, 0x20202020}, | ||
727 | {0x0000a3c4, 0x22222220}, | ||
728 | {0x0000a3c8, 0x20200020}, | ||
729 | {0x0000a3cc, 0x20202020}, | ||
730 | {0x0000a3d0, 0x20202020}, | ||
731 | {0x0000a3d4, 0x20202020}, | ||
732 | {0x0000a3d8, 0x20202020}, | ||
733 | {0x0000a3dc, 0x20202020}, | ||
734 | {0x0000a3e0, 0x20202020}, | ||
735 | {0x0000a3e4, 0x20202020}, | ||
736 | {0x0000a3e8, 0x20202020}, | ||
737 | {0x0000a3ec, 0x20202020}, | ||
738 | {0x0000a3f0, 0x00000000}, | ||
739 | {0x0000a3f4, 0x00000246}, | ||
740 | {0x0000a3f8, 0x0cdbd380}, | ||
741 | {0x0000a3fc, 0x000f0f01}, | ||
742 | {0x0000a400, 0x8fa91f01}, | ||
743 | {0x0000a404, 0x00000000}, | ||
744 | {0x0000a408, 0x0e79e5c6}, | ||
745 | {0x0000a40c, 0x00820820}, | ||
746 | {0x0000a414, 0x1ce739ce}, | ||
747 | {0x0000a418, 0x2d001dce}, | ||
748 | {0x0000a41c, 0x1ce739ce}, | ||
749 | {0x0000a420, 0x000001ce}, | ||
750 | {0x0000a424, 0x1ce739ce}, | ||
751 | {0x0000a428, 0x000001ce}, | ||
752 | {0x0000a42c, 0x1ce739ce}, | ||
753 | {0x0000a430, 0x1ce739ce}, | ||
754 | {0x0000a434, 0x00000000}, | ||
755 | {0x0000a438, 0x00001801}, | ||
756 | {0x0000a43c, 0x00000000}, | ||
757 | {0x0000a440, 0x00000000}, | ||
758 | {0x0000a444, 0x00000000}, | ||
759 | {0x0000a448, 0x04000080}, | ||
760 | {0x0000a44c, 0x00000001}, | ||
761 | {0x0000a450, 0x00010000}, | ||
762 | {0x0000a458, 0x00000000}, | ||
763 | {0x0000a600, 0x00000000}, | ||
764 | {0x0000a604, 0x00000000}, | ||
765 | {0x0000a608, 0x00000000}, | ||
766 | {0x0000a60c, 0x00000000}, | ||
767 | {0x0000a610, 0x00000000}, | ||
768 | {0x0000a614, 0x00000000}, | ||
769 | {0x0000a618, 0x00000000}, | ||
770 | {0x0000a61c, 0x00000000}, | ||
771 | {0x0000a620, 0x00000000}, | ||
772 | {0x0000a624, 0x00000000}, | ||
773 | {0x0000a628, 0x00000000}, | ||
774 | {0x0000a62c, 0x00000000}, | ||
775 | {0x0000a630, 0x00000000}, | ||
776 | {0x0000a634, 0x00000000}, | ||
777 | {0x0000a638, 0x00000000}, | ||
778 | {0x0000a63c, 0x00000000}, | ||
779 | {0x0000a640, 0x00000000}, | ||
780 | {0x0000a644, 0x3fad9d74}, | ||
781 | {0x0000a648, 0x0048060a}, | ||
782 | {0x0000a64c, 0x00000637}, | ||
783 | {0x0000a670, 0x03020100}, | ||
784 | {0x0000a674, 0x09080504}, | ||
785 | {0x0000a678, 0x0d0c0b0a}, | ||
786 | {0x0000a67c, 0x13121110}, | ||
787 | {0x0000a680, 0x31301514}, | ||
788 | {0x0000a684, 0x35343332}, | ||
789 | {0x0000a688, 0x00000036}, | ||
790 | {0x0000a690, 0x00000838}, | ||
791 | {0x0000a7c0, 0x00000000}, | ||
792 | {0x0000a7c4, 0xfffffffc}, | ||
793 | {0x0000a7c8, 0x00000000}, | ||
794 | {0x0000a7cc, 0x00000000}, | ||
795 | {0x0000a7d0, 0x00000000}, | ||
796 | {0x0000a7d4, 0x00000004}, | ||
797 | {0x0000a7dc, 0x00000001}, | ||
798 | {0x0000a8d0, 0x004b6a8e}, | ||
799 | {0x0000a8d4, 0x00000820}, | ||
800 | {0x0000a8dc, 0x00000000}, | ||
801 | {0x0000a8f0, 0x00000000}, | ||
802 | {0x0000a8f4, 0x00000000}, | ||
803 | {0x0000b2d0, 0x00000080}, | ||
804 | {0x0000b2d4, 0x00000000}, | ||
805 | {0x0000b2dc, 0x00000000}, | ||
806 | {0x0000b2e0, 0x00000000}, | ||
807 | {0x0000b2e4, 0x00000000}, | ||
808 | {0x0000b2e8, 0x00000000}, | ||
809 | {0x0000b2ec, 0x00000000}, | ||
810 | {0x0000b2f0, 0x00000000}, | ||
811 | {0x0000b2f4, 0x00000000}, | ||
812 | {0x0000b2f8, 0x00000000}, | ||
813 | {0x0000b408, 0x0e79e5c0}, | ||
814 | {0x0000b40c, 0x00820820}, | ||
815 | {0x0000b420, 0x00000000}, | ||
816 | {0x0000b8d0, 0x004b6a8e}, | ||
817 | {0x0000b8d4, 0x00000820}, | ||
818 | {0x0000b8dc, 0x00000000}, | ||
819 | {0x0000b8f0, 0x00000000}, | ||
820 | {0x0000b8f4, 0x00000000}, | ||
821 | {0x0000c2d0, 0x00000080}, | ||
822 | {0x0000c2d4, 0x00000000}, | ||
823 | {0x0000c2dc, 0x00000000}, | ||
824 | {0x0000c2e0, 0x00000000}, | ||
825 | {0x0000c2e4, 0x00000000}, | ||
826 | {0x0000c2e8, 0x00000000}, | ||
827 | {0x0000c2ec, 0x00000000}, | ||
828 | {0x0000c2f0, 0x00000000}, | ||
829 | {0x0000c2f4, 0x00000000}, | ||
830 | {0x0000c2f8, 0x00000000}, | ||
831 | {0x0000c408, 0x0e79e5c0}, | ||
832 | {0x0000c40c, 0x00820820}, | ||
833 | {0x0000c420, 0x00000000}, | ||
834 | }; | ||
835 | |||
836 | static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = { | ||
837 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
838 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, | ||
839 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | ||
840 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, | ||
841 | {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004}, | ||
842 | {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200}, | ||
843 | {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202}, | ||
844 | {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400}, | ||
845 | {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402}, | ||
846 | {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404}, | ||
847 | {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603}, | ||
848 | {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02}, | ||
849 | {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04}, | ||
850 | {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20}, | ||
851 | {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20}, | ||
852 | {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22}, | ||
853 | {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24}, | ||
854 | {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640}, | ||
855 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, | ||
856 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, | ||
857 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, | ||
858 | {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, | ||
859 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, | ||
860 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, | ||
861 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, | ||
862 | {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9}, | ||
863 | {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb}, | ||
864 | {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
865 | {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
866 | {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
867 | {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
868 | {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
869 | {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
870 | {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
871 | {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, | ||
872 | {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002}, | ||
873 | {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004}, | ||
874 | {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200}, | ||
875 | {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202}, | ||
876 | {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400}, | ||
877 | {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402}, | ||
878 | {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404}, | ||
879 | {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603}, | ||
880 | {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02}, | ||
881 | {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04}, | ||
882 | {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20}, | ||
883 | {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20}, | ||
884 | {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22}, | ||
885 | {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24}, | ||
886 | {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640}, | ||
887 | {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660}, | ||
888 | {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861}, | ||
889 | {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81}, | ||
890 | {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83}, | ||
891 | {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84}, | ||
892 | {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3}, | ||
893 | {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5}, | ||
894 | {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9}, | ||
895 | {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb}, | ||
896 | {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
897 | {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
898 | {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
899 | {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
900 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
901 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
902 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
903 | {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | ||
904 | {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | ||
905 | {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | ||
906 | {0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | ||
907 | {0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | ||
908 | {0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | ||
909 | {0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | ||
910 | {0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | ||
911 | {0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | ||
912 | }; | ||
913 | |||
914 | static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p0[][5] = { | ||
915 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
916 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, | ||
917 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | ||
918 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, | ||
919 | {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004}, | ||
920 | {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200}, | ||
921 | {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202}, | ||
922 | {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400}, | ||
923 | {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402}, | ||
924 | {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404}, | ||
925 | {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603}, | ||
926 | {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02}, | ||
927 | {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04}, | ||
928 | {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20}, | ||
929 | {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20}, | ||
930 | {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22}, | ||
931 | {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24}, | ||
932 | {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640}, | ||
933 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, | ||
934 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, | ||
935 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, | ||
936 | {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, | ||
937 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, | ||
938 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, | ||
939 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, | ||
940 | {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9}, | ||
941 | {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb}, | ||
942 | {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
943 | {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
944 | {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
945 | {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
946 | {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
947 | {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
948 | {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, | ||
949 | {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, | ||
950 | {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002}, | ||
951 | {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004}, | ||
952 | {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200}, | ||
953 | {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202}, | ||
954 | {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400}, | ||
955 | {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402}, | ||
956 | {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404}, | ||
957 | {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603}, | ||
958 | {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02}, | ||
959 | {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04}, | ||
960 | {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20}, | ||
961 | {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20}, | ||
962 | {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22}, | ||
963 | {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24}, | ||
964 | {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640}, | ||
965 | {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660}, | ||
966 | {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861}, | ||
967 | {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81}, | ||
968 | {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83}, | ||
969 | {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84}, | ||
970 | {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3}, | ||
971 | {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5}, | ||
972 | {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9}, | ||
973 | {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb}, | ||
974 | {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
975 | {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
976 | {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
977 | {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
978 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
979 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
980 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | ||
981 | {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
982 | {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
983 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
984 | {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
985 | {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
986 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
987 | {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
988 | {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
989 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
990 | }; | ||
991 | |||
992 | static const u32 ar9300Common_rx_gain_table_2p0[][2] = { | ||
993 | /* Addr allmodes */ | ||
994 | {0x0000a000, 0x00010000}, | ||
995 | {0x0000a004, 0x00030002}, | ||
996 | {0x0000a008, 0x00050004}, | ||
997 | {0x0000a00c, 0x00810080}, | ||
998 | {0x0000a010, 0x00830082}, | ||
999 | {0x0000a014, 0x01810180}, | ||
1000 | {0x0000a018, 0x01830182}, | ||
1001 | {0x0000a01c, 0x01850184}, | ||
1002 | {0x0000a020, 0x01890188}, | ||
1003 | {0x0000a024, 0x018b018a}, | ||
1004 | {0x0000a028, 0x018d018c}, | ||
1005 | {0x0000a02c, 0x01910190}, | ||
1006 | {0x0000a030, 0x01930192}, | ||
1007 | {0x0000a034, 0x01950194}, | ||
1008 | {0x0000a038, 0x038a0196}, | ||
1009 | {0x0000a03c, 0x038c038b}, | ||
1010 | {0x0000a040, 0x0390038d}, | ||
1011 | {0x0000a044, 0x03920391}, | ||
1012 | {0x0000a048, 0x03940393}, | ||
1013 | {0x0000a04c, 0x03960395}, | ||
1014 | {0x0000a050, 0x00000000}, | ||
1015 | {0x0000a054, 0x00000000}, | ||
1016 | {0x0000a058, 0x00000000}, | ||
1017 | {0x0000a05c, 0x00000000}, | ||
1018 | {0x0000a060, 0x00000000}, | ||
1019 | {0x0000a064, 0x00000000}, | ||
1020 | {0x0000a068, 0x00000000}, | ||
1021 | {0x0000a06c, 0x00000000}, | ||
1022 | {0x0000a070, 0x00000000}, | ||
1023 | {0x0000a074, 0x00000000}, | ||
1024 | {0x0000a078, 0x00000000}, | ||
1025 | {0x0000a07c, 0x00000000}, | ||
1026 | {0x0000a080, 0x22222229}, | ||
1027 | {0x0000a084, 0x1d1d1d1d}, | ||
1028 | {0x0000a088, 0x1d1d1d1d}, | ||
1029 | {0x0000a08c, 0x1d1d1d1d}, | ||
1030 | {0x0000a090, 0x171d1d1d}, | ||
1031 | {0x0000a094, 0x11111717}, | ||
1032 | {0x0000a098, 0x00030311}, | ||
1033 | {0x0000a09c, 0x00000000}, | ||
1034 | {0x0000a0a0, 0x00000000}, | ||
1035 | {0x0000a0a4, 0x00000000}, | ||
1036 | {0x0000a0a8, 0x00000000}, | ||
1037 | {0x0000a0ac, 0x00000000}, | ||
1038 | {0x0000a0b0, 0x00000000}, | ||
1039 | {0x0000a0b4, 0x00000000}, | ||
1040 | {0x0000a0b8, 0x00000000}, | ||
1041 | {0x0000a0bc, 0x00000000}, | ||
1042 | {0x0000a0c0, 0x001f0000}, | ||
1043 | {0x0000a0c4, 0x01000101}, | ||
1044 | {0x0000a0c8, 0x011e011f}, | ||
1045 | {0x0000a0cc, 0x011c011d}, | ||
1046 | {0x0000a0d0, 0x02030204}, | ||
1047 | {0x0000a0d4, 0x02010202}, | ||
1048 | {0x0000a0d8, 0x021f0200}, | ||
1049 | {0x0000a0dc, 0x0302021e}, | ||
1050 | {0x0000a0e0, 0x03000301}, | ||
1051 | {0x0000a0e4, 0x031e031f}, | ||
1052 | {0x0000a0e8, 0x0402031d}, | ||
1053 | {0x0000a0ec, 0x04000401}, | ||
1054 | {0x0000a0f0, 0x041e041f}, | ||
1055 | {0x0000a0f4, 0x0502041d}, | ||
1056 | {0x0000a0f8, 0x05000501}, | ||
1057 | {0x0000a0fc, 0x051e051f}, | ||
1058 | {0x0000a100, 0x06010602}, | ||
1059 | {0x0000a104, 0x061f0600}, | ||
1060 | {0x0000a108, 0x061d061e}, | ||
1061 | {0x0000a10c, 0x07020703}, | ||
1062 | {0x0000a110, 0x07000701}, | ||
1063 | {0x0000a114, 0x00000000}, | ||
1064 | {0x0000a118, 0x00000000}, | ||
1065 | {0x0000a11c, 0x00000000}, | ||
1066 | {0x0000a120, 0x00000000}, | ||
1067 | {0x0000a124, 0x00000000}, | ||
1068 | {0x0000a128, 0x00000000}, | ||
1069 | {0x0000a12c, 0x00000000}, | ||
1070 | {0x0000a130, 0x00000000}, | ||
1071 | {0x0000a134, 0x00000000}, | ||
1072 | {0x0000a138, 0x00000000}, | ||
1073 | {0x0000a13c, 0x00000000}, | ||
1074 | {0x0000a140, 0x001f0000}, | ||
1075 | {0x0000a144, 0x01000101}, | ||
1076 | {0x0000a148, 0x011e011f}, | ||
1077 | {0x0000a14c, 0x011c011d}, | ||
1078 | {0x0000a150, 0x02030204}, | ||
1079 | {0x0000a154, 0x02010202}, | ||
1080 | {0x0000a158, 0x021f0200}, | ||
1081 | {0x0000a15c, 0x0302021e}, | ||
1082 | {0x0000a160, 0x03000301}, | ||
1083 | {0x0000a164, 0x031e031f}, | ||
1084 | {0x0000a168, 0x0402031d}, | ||
1085 | {0x0000a16c, 0x04000401}, | ||
1086 | {0x0000a170, 0x041e041f}, | ||
1087 | {0x0000a174, 0x0502041d}, | ||
1088 | {0x0000a178, 0x05000501}, | ||
1089 | {0x0000a17c, 0x051e051f}, | ||
1090 | {0x0000a180, 0x06010602}, | ||
1091 | {0x0000a184, 0x061f0600}, | ||
1092 | {0x0000a188, 0x061d061e}, | ||
1093 | {0x0000a18c, 0x07020703}, | ||
1094 | {0x0000a190, 0x07000701}, | ||
1095 | {0x0000a194, 0x00000000}, | ||
1096 | {0x0000a198, 0x00000000}, | ||
1097 | {0x0000a19c, 0x00000000}, | ||
1098 | {0x0000a1a0, 0x00000000}, | ||
1099 | {0x0000a1a4, 0x00000000}, | ||
1100 | {0x0000a1a8, 0x00000000}, | ||
1101 | {0x0000a1ac, 0x00000000}, | ||
1102 | {0x0000a1b0, 0x00000000}, | ||
1103 | {0x0000a1b4, 0x00000000}, | ||
1104 | {0x0000a1b8, 0x00000000}, | ||
1105 | {0x0000a1bc, 0x00000000}, | ||
1106 | {0x0000a1c0, 0x00000000}, | ||
1107 | {0x0000a1c4, 0x00000000}, | ||
1108 | {0x0000a1c8, 0x00000000}, | ||
1109 | {0x0000a1cc, 0x00000000}, | ||
1110 | {0x0000a1d0, 0x00000000}, | ||
1111 | {0x0000a1d4, 0x00000000}, | ||
1112 | {0x0000a1d8, 0x00000000}, | ||
1113 | {0x0000a1dc, 0x00000000}, | ||
1114 | {0x0000a1e0, 0x00000000}, | ||
1115 | {0x0000a1e4, 0x00000000}, | ||
1116 | {0x0000a1e8, 0x00000000}, | ||
1117 | {0x0000a1ec, 0x00000000}, | ||
1118 | {0x0000a1f0, 0x00000396}, | ||
1119 | {0x0000a1f4, 0x00000396}, | ||
1120 | {0x0000a1f8, 0x00000396}, | ||
1121 | {0x0000a1fc, 0x00000196}, | ||
1122 | {0x0000b000, 0x00010000}, | ||
1123 | {0x0000b004, 0x00030002}, | ||
1124 | {0x0000b008, 0x00050004}, | ||
1125 | {0x0000b00c, 0x00810080}, | ||
1126 | {0x0000b010, 0x00830082}, | ||
1127 | {0x0000b014, 0x01810180}, | ||
1128 | {0x0000b018, 0x01830182}, | ||
1129 | {0x0000b01c, 0x01850184}, | ||
1130 | {0x0000b020, 0x02810280}, | ||
1131 | {0x0000b024, 0x02830282}, | ||
1132 | {0x0000b028, 0x02850284}, | ||
1133 | {0x0000b02c, 0x02890288}, | ||
1134 | {0x0000b030, 0x028b028a}, | ||
1135 | {0x0000b034, 0x0388028c}, | ||
1136 | {0x0000b038, 0x038a0389}, | ||
1137 | {0x0000b03c, 0x038c038b}, | ||
1138 | {0x0000b040, 0x0390038d}, | ||
1139 | {0x0000b044, 0x03920391}, | ||
1140 | {0x0000b048, 0x03940393}, | ||
1141 | {0x0000b04c, 0x03960395}, | ||
1142 | {0x0000b050, 0x00000000}, | ||
1143 | {0x0000b054, 0x00000000}, | ||
1144 | {0x0000b058, 0x00000000}, | ||
1145 | {0x0000b05c, 0x00000000}, | ||
1146 | {0x0000b060, 0x00000000}, | ||
1147 | {0x0000b064, 0x00000000}, | ||
1148 | {0x0000b068, 0x00000000}, | ||
1149 | {0x0000b06c, 0x00000000}, | ||
1150 | {0x0000b070, 0x00000000}, | ||
1151 | {0x0000b074, 0x00000000}, | ||
1152 | {0x0000b078, 0x00000000}, | ||
1153 | {0x0000b07c, 0x00000000}, | ||
1154 | {0x0000b080, 0x32323232}, | ||
1155 | {0x0000b084, 0x2f2f3232}, | ||
1156 | {0x0000b088, 0x23282a2d}, | ||
1157 | {0x0000b08c, 0x1c1e2123}, | ||
1158 | {0x0000b090, 0x14171919}, | ||
1159 | {0x0000b094, 0x0e0e1214}, | ||
1160 | {0x0000b098, 0x03050707}, | ||
1161 | {0x0000b09c, 0x00030303}, | ||
1162 | {0x0000b0a0, 0x00000000}, | ||
1163 | {0x0000b0a4, 0x00000000}, | ||
1164 | {0x0000b0a8, 0x00000000}, | ||
1165 | {0x0000b0ac, 0x00000000}, | ||
1166 | {0x0000b0b0, 0x00000000}, | ||
1167 | {0x0000b0b4, 0x00000000}, | ||
1168 | {0x0000b0b8, 0x00000000}, | ||
1169 | {0x0000b0bc, 0x00000000}, | ||
1170 | {0x0000b0c0, 0x003f0020}, | ||
1171 | {0x0000b0c4, 0x00400041}, | ||
1172 | {0x0000b0c8, 0x0140005f}, | ||
1173 | {0x0000b0cc, 0x0160015f}, | ||
1174 | {0x0000b0d0, 0x017e017f}, | ||
1175 | {0x0000b0d4, 0x02410242}, | ||
1176 | {0x0000b0d8, 0x025f0240}, | ||
1177 | {0x0000b0dc, 0x027f0260}, | ||
1178 | {0x0000b0e0, 0x0341027e}, | ||
1179 | {0x0000b0e4, 0x035f0340}, | ||
1180 | {0x0000b0e8, 0x037f0360}, | ||
1181 | {0x0000b0ec, 0x04400441}, | ||
1182 | {0x0000b0f0, 0x0460045f}, | ||
1183 | {0x0000b0f4, 0x0541047f}, | ||
1184 | {0x0000b0f8, 0x055f0540}, | ||
1185 | {0x0000b0fc, 0x057f0560}, | ||
1186 | {0x0000b100, 0x06400641}, | ||
1187 | {0x0000b104, 0x0660065f}, | ||
1188 | {0x0000b108, 0x067e067f}, | ||
1189 | {0x0000b10c, 0x07410742}, | ||
1190 | {0x0000b110, 0x075f0740}, | ||
1191 | {0x0000b114, 0x077f0760}, | ||
1192 | {0x0000b118, 0x07800781}, | ||
1193 | {0x0000b11c, 0x07a0079f}, | ||
1194 | {0x0000b120, 0x07c107bf}, | ||
1195 | {0x0000b124, 0x000007c0}, | ||
1196 | {0x0000b128, 0x00000000}, | ||
1197 | {0x0000b12c, 0x00000000}, | ||
1198 | {0x0000b130, 0x00000000}, | ||
1199 | {0x0000b134, 0x00000000}, | ||
1200 | {0x0000b138, 0x00000000}, | ||
1201 | {0x0000b13c, 0x00000000}, | ||
1202 | {0x0000b140, 0x003f0020}, | ||
1203 | {0x0000b144, 0x00400041}, | ||
1204 | {0x0000b148, 0x0140005f}, | ||
1205 | {0x0000b14c, 0x0160015f}, | ||
1206 | {0x0000b150, 0x017e017f}, | ||
1207 | {0x0000b154, 0x02410242}, | ||
1208 | {0x0000b158, 0x025f0240}, | ||
1209 | {0x0000b15c, 0x027f0260}, | ||
1210 | {0x0000b160, 0x0341027e}, | ||
1211 | {0x0000b164, 0x035f0340}, | ||
1212 | {0x0000b168, 0x037f0360}, | ||
1213 | {0x0000b16c, 0x04400441}, | ||
1214 | {0x0000b170, 0x0460045f}, | ||
1215 | {0x0000b174, 0x0541047f}, | ||
1216 | {0x0000b178, 0x055f0540}, | ||
1217 | {0x0000b17c, 0x057f0560}, | ||
1218 | {0x0000b180, 0x06400641}, | ||
1219 | {0x0000b184, 0x0660065f}, | ||
1220 | {0x0000b188, 0x067e067f}, | ||
1221 | {0x0000b18c, 0x07410742}, | ||
1222 | {0x0000b190, 0x075f0740}, | ||
1223 | {0x0000b194, 0x077f0760}, | ||
1224 | {0x0000b198, 0x07800781}, | ||
1225 | {0x0000b19c, 0x07a0079f}, | ||
1226 | {0x0000b1a0, 0x07c107bf}, | ||
1227 | {0x0000b1a4, 0x000007c0}, | ||
1228 | {0x0000b1a8, 0x00000000}, | ||
1229 | {0x0000b1ac, 0x00000000}, | ||
1230 | {0x0000b1b0, 0x00000000}, | ||
1231 | {0x0000b1b4, 0x00000000}, | ||
1232 | {0x0000b1b8, 0x00000000}, | ||
1233 | {0x0000b1bc, 0x00000000}, | ||
1234 | {0x0000b1c0, 0x00000000}, | ||
1235 | {0x0000b1c4, 0x00000000}, | ||
1236 | {0x0000b1c8, 0x00000000}, | ||
1237 | {0x0000b1cc, 0x00000000}, | ||
1238 | {0x0000b1d0, 0x00000000}, | ||
1239 | {0x0000b1d4, 0x00000000}, | ||
1240 | {0x0000b1d8, 0x00000000}, | ||
1241 | {0x0000b1dc, 0x00000000}, | ||
1242 | {0x0000b1e0, 0x00000000}, | ||
1243 | {0x0000b1e4, 0x00000000}, | ||
1244 | {0x0000b1e8, 0x00000000}, | ||
1245 | {0x0000b1ec, 0x00000000}, | ||
1246 | {0x0000b1f0, 0x00000396}, | ||
1247 | {0x0000b1f4, 0x00000396}, | ||
1248 | {0x0000b1f8, 0x00000396}, | ||
1249 | {0x0000b1fc, 0x00000196}, | ||
1250 | }; | ||
1251 | |||
1252 | static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p0[][5] = { | ||
1253 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
1254 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
1255 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1256 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
1257 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
1258 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
1259 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
1260 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
1261 | {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402}, | ||
1262 | {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404}, | ||
1263 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
1264 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
1265 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
1266 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
1267 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
1268 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
1269 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
1270 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
1271 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
1272 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
1273 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
1274 | {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83}, | ||
1275 | {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84}, | ||
1276 | {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3}, | ||
1277 | {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5}, | ||
1278 | {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9}, | ||
1279 | {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb}, | ||
1280 | {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1281 | {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1282 | {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1283 | {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1284 | {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1285 | {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1286 | {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec}, | ||
1287 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
1288 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
1289 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
1290 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
1291 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
1292 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
1293 | {0x0000a598, 0x21820220, 0x21820220, 0x16800402, 0x16800402}, | ||
1294 | {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404}, | ||
1295 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
1296 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
1297 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
1298 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
1299 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
1300 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
1301 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
1302 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
1303 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
1304 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
1305 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
1306 | {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x47801a83, 0x47801a83}, | ||
1307 | {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4a801c84, 0x4a801c84}, | ||
1308 | {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4e801ce3, 0x4e801ce3}, | ||
1309 | {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x52801ce5, 0x52801ce5}, | ||
1310 | {0x0000a5dc, 0x7086308c, 0x7086308c, 0x56801ce9, 0x56801ce9}, | ||
1311 | {0x0000a5e0, 0x738a308a, 0x738a308a, 0x5a801ceb, 0x5a801ceb}, | ||
1312 | {0x0000a5e4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1313 | {0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1314 | {0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1315 | {0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1316 | {0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1317 | {0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1318 | {0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec}, | ||
1319 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
1320 | {0x00016048, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, | ||
1321 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
1322 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
1323 | {0x00016448, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, | ||
1324 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
1325 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
1326 | {0x00016848, 0x64000001, 0x64000001, 0x64000001, 0x64000001}, | ||
1327 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
1328 | }; | ||
1329 | |||
1330 | static const u32 ar9300_2p0_mac_core[][2] = { | ||
1331 | /* Addr allmodes */ | ||
1332 | {0x00000008, 0x00000000}, | ||
1333 | {0x00000030, 0x00020085}, | ||
1334 | {0x00000034, 0x00000005}, | ||
1335 | {0x00000040, 0x00000000}, | ||
1336 | {0x00000044, 0x00000000}, | ||
1337 | {0x00000048, 0x00000008}, | ||
1338 | {0x0000004c, 0x00000010}, | ||
1339 | {0x00000050, 0x00000000}, | ||
1340 | {0x00001040, 0x002ffc0f}, | ||
1341 | {0x00001044, 0x002ffc0f}, | ||
1342 | {0x00001048, 0x002ffc0f}, | ||
1343 | {0x0000104c, 0x002ffc0f}, | ||
1344 | {0x00001050, 0x002ffc0f}, | ||
1345 | {0x00001054, 0x002ffc0f}, | ||
1346 | {0x00001058, 0x002ffc0f}, | ||
1347 | {0x0000105c, 0x002ffc0f}, | ||
1348 | {0x00001060, 0x002ffc0f}, | ||
1349 | {0x00001064, 0x002ffc0f}, | ||
1350 | {0x000010f0, 0x00000100}, | ||
1351 | {0x00001270, 0x00000000}, | ||
1352 | {0x000012b0, 0x00000000}, | ||
1353 | {0x000012f0, 0x00000000}, | ||
1354 | {0x0000143c, 0x00000000}, | ||
1355 | {0x0000147c, 0x00000000}, | ||
1356 | {0x00008000, 0x00000000}, | ||
1357 | {0x00008004, 0x00000000}, | ||
1358 | {0x00008008, 0x00000000}, | ||
1359 | {0x0000800c, 0x00000000}, | ||
1360 | {0x00008018, 0x00000000}, | ||
1361 | {0x00008020, 0x00000000}, | ||
1362 | {0x00008038, 0x00000000}, | ||
1363 | {0x0000803c, 0x00000000}, | ||
1364 | {0x00008040, 0x00000000}, | ||
1365 | {0x00008044, 0x00000000}, | ||
1366 | {0x00008048, 0x00000000}, | ||
1367 | {0x0000804c, 0xffffffff}, | ||
1368 | {0x00008054, 0x00000000}, | ||
1369 | {0x00008058, 0x00000000}, | ||
1370 | {0x0000805c, 0x000fc78f}, | ||
1371 | {0x00008060, 0x0000000f}, | ||
1372 | {0x00008064, 0x00000000}, | ||
1373 | {0x00008070, 0x00000310}, | ||
1374 | {0x00008074, 0x00000020}, | ||
1375 | {0x00008078, 0x00000000}, | ||
1376 | {0x0000809c, 0x0000000f}, | ||
1377 | {0x000080a0, 0x00000000}, | ||
1378 | {0x000080a4, 0x02ff0000}, | ||
1379 | {0x000080a8, 0x0e070605}, | ||
1380 | {0x000080ac, 0x0000000d}, | ||
1381 | {0x000080b0, 0x00000000}, | ||
1382 | {0x000080b4, 0x00000000}, | ||
1383 | {0x000080b8, 0x00000000}, | ||
1384 | {0x000080bc, 0x00000000}, | ||
1385 | {0x000080c0, 0x2a800000}, | ||
1386 | {0x000080c4, 0x06900168}, | ||
1387 | {0x000080c8, 0x13881c20}, | ||
1388 | {0x000080cc, 0x01f40000}, | ||
1389 | {0x000080d0, 0x00252500}, | ||
1390 | {0x000080d4, 0x00a00000}, | ||
1391 | {0x000080d8, 0x00400000}, | ||
1392 | {0x000080dc, 0x00000000}, | ||
1393 | {0x000080e0, 0xffffffff}, | ||
1394 | {0x000080e4, 0x0000ffff}, | ||
1395 | {0x000080e8, 0x3f3f3f3f}, | ||
1396 | {0x000080ec, 0x00000000}, | ||
1397 | {0x000080f0, 0x00000000}, | ||
1398 | {0x000080f4, 0x00000000}, | ||
1399 | {0x000080fc, 0x00020000}, | ||
1400 | {0x00008100, 0x00000000}, | ||
1401 | {0x00008108, 0x00000052}, | ||
1402 | {0x0000810c, 0x00000000}, | ||
1403 | {0x00008110, 0x00000000}, | ||
1404 | {0x00008114, 0x000007ff}, | ||
1405 | {0x00008118, 0x000000aa}, | ||
1406 | {0x0000811c, 0x00003210}, | ||
1407 | {0x00008124, 0x00000000}, | ||
1408 | {0x00008128, 0x00000000}, | ||
1409 | {0x0000812c, 0x00000000}, | ||
1410 | {0x00008130, 0x00000000}, | ||
1411 | {0x00008134, 0x00000000}, | ||
1412 | {0x00008138, 0x00000000}, | ||
1413 | {0x0000813c, 0x0000ffff}, | ||
1414 | {0x00008144, 0xffffffff}, | ||
1415 | {0x00008168, 0x00000000}, | ||
1416 | {0x0000816c, 0x00000000}, | ||
1417 | {0x00008170, 0x18486200}, | ||
1418 | {0x00008174, 0x33332210}, | ||
1419 | {0x00008178, 0x00000000}, | ||
1420 | {0x0000817c, 0x00020000}, | ||
1421 | {0x000081c0, 0x00000000}, | ||
1422 | {0x000081c4, 0x33332210}, | ||
1423 | {0x000081c8, 0x00000000}, | ||
1424 | {0x000081cc, 0x00000000}, | ||
1425 | {0x000081d4, 0x00000000}, | ||
1426 | {0x000081ec, 0x00000000}, | ||
1427 | {0x000081f0, 0x00000000}, | ||
1428 | {0x000081f4, 0x00000000}, | ||
1429 | {0x000081f8, 0x00000000}, | ||
1430 | {0x000081fc, 0x00000000}, | ||
1431 | {0x00008240, 0x00100000}, | ||
1432 | {0x00008244, 0x0010f424}, | ||
1433 | {0x00008248, 0x00000800}, | ||
1434 | {0x0000824c, 0x0001e848}, | ||
1435 | {0x00008250, 0x00000000}, | ||
1436 | {0x00008254, 0x00000000}, | ||
1437 | {0x00008258, 0x00000000}, | ||
1438 | {0x0000825c, 0x40000000}, | ||
1439 | {0x00008260, 0x00080922}, | ||
1440 | {0x00008264, 0x98a00010}, | ||
1441 | {0x00008268, 0xffffffff}, | ||
1442 | {0x0000826c, 0x0000ffff}, | ||
1443 | {0x00008270, 0x00000000}, | ||
1444 | {0x00008274, 0x40000000}, | ||
1445 | {0x00008278, 0x003e4180}, | ||
1446 | {0x0000827c, 0x00000004}, | ||
1447 | {0x00008284, 0x0000002c}, | ||
1448 | {0x00008288, 0x0000002c}, | ||
1449 | {0x0000828c, 0x000000ff}, | ||
1450 | {0x00008294, 0x00000000}, | ||
1451 | {0x00008298, 0x00000000}, | ||
1452 | {0x0000829c, 0x00000000}, | ||
1453 | {0x00008300, 0x00000140}, | ||
1454 | {0x00008314, 0x00000000}, | ||
1455 | {0x0000831c, 0x0000010d}, | ||
1456 | {0x00008328, 0x00000000}, | ||
1457 | {0x0000832c, 0x00000007}, | ||
1458 | {0x00008330, 0x00000302}, | ||
1459 | {0x00008334, 0x00000700}, | ||
1460 | {0x00008338, 0x00ff0000}, | ||
1461 | {0x0000833c, 0x02400000}, | ||
1462 | {0x00008340, 0x000107ff}, | ||
1463 | {0x00008344, 0xaa48105b}, | ||
1464 | {0x00008348, 0x008f0000}, | ||
1465 | {0x0000835c, 0x00000000}, | ||
1466 | {0x00008360, 0xffffffff}, | ||
1467 | {0x00008364, 0xffffffff}, | ||
1468 | {0x00008368, 0x00000000}, | ||
1469 | {0x00008370, 0x00000000}, | ||
1470 | {0x00008374, 0x000000ff}, | ||
1471 | {0x00008378, 0x00000000}, | ||
1472 | {0x0000837c, 0x00000000}, | ||
1473 | {0x00008380, 0xffffffff}, | ||
1474 | {0x00008384, 0xffffffff}, | ||
1475 | {0x00008390, 0xffffffff}, | ||
1476 | {0x00008394, 0xffffffff}, | ||
1477 | {0x00008398, 0x00000000}, | ||
1478 | {0x0000839c, 0x00000000}, | ||
1479 | {0x000083a0, 0x00000000}, | ||
1480 | {0x000083a4, 0x0000fa14}, | ||
1481 | {0x000083a8, 0x000f0c00}, | ||
1482 | {0x000083ac, 0x33332210}, | ||
1483 | {0x000083b0, 0x33332210}, | ||
1484 | {0x000083b4, 0x33332210}, | ||
1485 | {0x000083b8, 0x33332210}, | ||
1486 | {0x000083bc, 0x00000000}, | ||
1487 | {0x000083c0, 0x00000000}, | ||
1488 | {0x000083c4, 0x00000000}, | ||
1489 | {0x000083c8, 0x00000000}, | ||
1490 | {0x000083cc, 0x00000200}, | ||
1491 | {0x000083d0, 0x000301ff}, | ||
1492 | }; | ||
1493 | |||
1494 | static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { | ||
1495 | /* Addr allmodes */ | ||
1496 | {0x0000a000, 0x00010000}, | ||
1497 | {0x0000a004, 0x00030002}, | ||
1498 | {0x0000a008, 0x00050004}, | ||
1499 | {0x0000a00c, 0x00810080}, | ||
1500 | {0x0000a010, 0x00830082}, | ||
1501 | {0x0000a014, 0x01810180}, | ||
1502 | {0x0000a018, 0x01830182}, | ||
1503 | {0x0000a01c, 0x01850184}, | ||
1504 | {0x0000a020, 0x01890188}, | ||
1505 | {0x0000a024, 0x018b018a}, | ||
1506 | {0x0000a028, 0x018d018c}, | ||
1507 | {0x0000a02c, 0x03820190}, | ||
1508 | {0x0000a030, 0x03840383}, | ||
1509 | {0x0000a034, 0x03880385}, | ||
1510 | {0x0000a038, 0x038a0389}, | ||
1511 | {0x0000a03c, 0x038c038b}, | ||
1512 | {0x0000a040, 0x0390038d}, | ||
1513 | {0x0000a044, 0x03920391}, | ||
1514 | {0x0000a048, 0x03940393}, | ||
1515 | {0x0000a04c, 0x03960395}, | ||
1516 | {0x0000a050, 0x00000000}, | ||
1517 | {0x0000a054, 0x00000000}, | ||
1518 | {0x0000a058, 0x00000000}, | ||
1519 | {0x0000a05c, 0x00000000}, | ||
1520 | {0x0000a060, 0x00000000}, | ||
1521 | {0x0000a064, 0x00000000}, | ||
1522 | {0x0000a068, 0x00000000}, | ||
1523 | {0x0000a06c, 0x00000000}, | ||
1524 | {0x0000a070, 0x00000000}, | ||
1525 | {0x0000a074, 0x00000000}, | ||
1526 | {0x0000a078, 0x00000000}, | ||
1527 | {0x0000a07c, 0x00000000}, | ||
1528 | {0x0000a080, 0x29292929}, | ||
1529 | {0x0000a084, 0x29292929}, | ||
1530 | {0x0000a088, 0x29292929}, | ||
1531 | {0x0000a08c, 0x29292929}, | ||
1532 | {0x0000a090, 0x22292929}, | ||
1533 | {0x0000a094, 0x1d1d2222}, | ||
1534 | {0x0000a098, 0x0c111117}, | ||
1535 | {0x0000a09c, 0x00030303}, | ||
1536 | {0x0000a0a0, 0x00000000}, | ||
1537 | {0x0000a0a4, 0x00000000}, | ||
1538 | {0x0000a0a8, 0x00000000}, | ||
1539 | {0x0000a0ac, 0x00000000}, | ||
1540 | {0x0000a0b0, 0x00000000}, | ||
1541 | {0x0000a0b4, 0x00000000}, | ||
1542 | {0x0000a0b8, 0x00000000}, | ||
1543 | {0x0000a0bc, 0x00000000}, | ||
1544 | {0x0000a0c0, 0x001f0000}, | ||
1545 | {0x0000a0c4, 0x01000101}, | ||
1546 | {0x0000a0c8, 0x011e011f}, | ||
1547 | {0x0000a0cc, 0x011c011d}, | ||
1548 | {0x0000a0d0, 0x02030204}, | ||
1549 | {0x0000a0d4, 0x02010202}, | ||
1550 | {0x0000a0d8, 0x021f0200}, | ||
1551 | {0x0000a0dc, 0x0302021e}, | ||
1552 | {0x0000a0e0, 0x03000301}, | ||
1553 | {0x0000a0e4, 0x031e031f}, | ||
1554 | {0x0000a0e8, 0x0402031d}, | ||
1555 | {0x0000a0ec, 0x04000401}, | ||
1556 | {0x0000a0f0, 0x041e041f}, | ||
1557 | {0x0000a0f4, 0x0502041d}, | ||
1558 | {0x0000a0f8, 0x05000501}, | ||
1559 | {0x0000a0fc, 0x051e051f}, | ||
1560 | {0x0000a100, 0x06010602}, | ||
1561 | {0x0000a104, 0x061f0600}, | ||
1562 | {0x0000a108, 0x061d061e}, | ||
1563 | {0x0000a10c, 0x07020703}, | ||
1564 | {0x0000a110, 0x07000701}, | ||
1565 | {0x0000a114, 0x00000000}, | ||
1566 | {0x0000a118, 0x00000000}, | ||
1567 | {0x0000a11c, 0x00000000}, | ||
1568 | {0x0000a120, 0x00000000}, | ||
1569 | {0x0000a124, 0x00000000}, | ||
1570 | {0x0000a128, 0x00000000}, | ||
1571 | {0x0000a12c, 0x00000000}, | ||
1572 | {0x0000a130, 0x00000000}, | ||
1573 | {0x0000a134, 0x00000000}, | ||
1574 | {0x0000a138, 0x00000000}, | ||
1575 | {0x0000a13c, 0x00000000}, | ||
1576 | {0x0000a140, 0x001f0000}, | ||
1577 | {0x0000a144, 0x01000101}, | ||
1578 | {0x0000a148, 0x011e011f}, | ||
1579 | {0x0000a14c, 0x011c011d}, | ||
1580 | {0x0000a150, 0x02030204}, | ||
1581 | {0x0000a154, 0x02010202}, | ||
1582 | {0x0000a158, 0x021f0200}, | ||
1583 | {0x0000a15c, 0x0302021e}, | ||
1584 | {0x0000a160, 0x03000301}, | ||
1585 | {0x0000a164, 0x031e031f}, | ||
1586 | {0x0000a168, 0x0402031d}, | ||
1587 | {0x0000a16c, 0x04000401}, | ||
1588 | {0x0000a170, 0x041e041f}, | ||
1589 | {0x0000a174, 0x0502041d}, | ||
1590 | {0x0000a178, 0x05000501}, | ||
1591 | {0x0000a17c, 0x051e051f}, | ||
1592 | {0x0000a180, 0x06010602}, | ||
1593 | {0x0000a184, 0x061f0600}, | ||
1594 | {0x0000a188, 0x061d061e}, | ||
1595 | {0x0000a18c, 0x07020703}, | ||
1596 | {0x0000a190, 0x07000701}, | ||
1597 | {0x0000a194, 0x00000000}, | ||
1598 | {0x0000a198, 0x00000000}, | ||
1599 | {0x0000a19c, 0x00000000}, | ||
1600 | {0x0000a1a0, 0x00000000}, | ||
1601 | {0x0000a1a4, 0x00000000}, | ||
1602 | {0x0000a1a8, 0x00000000}, | ||
1603 | {0x0000a1ac, 0x00000000}, | ||
1604 | {0x0000a1b0, 0x00000000}, | ||
1605 | {0x0000a1b4, 0x00000000}, | ||
1606 | {0x0000a1b8, 0x00000000}, | ||
1607 | {0x0000a1bc, 0x00000000}, | ||
1608 | {0x0000a1c0, 0x00000000}, | ||
1609 | {0x0000a1c4, 0x00000000}, | ||
1610 | {0x0000a1c8, 0x00000000}, | ||
1611 | {0x0000a1cc, 0x00000000}, | ||
1612 | {0x0000a1d0, 0x00000000}, | ||
1613 | {0x0000a1d4, 0x00000000}, | ||
1614 | {0x0000a1d8, 0x00000000}, | ||
1615 | {0x0000a1dc, 0x00000000}, | ||
1616 | {0x0000a1e0, 0x00000000}, | ||
1617 | {0x0000a1e4, 0x00000000}, | ||
1618 | {0x0000a1e8, 0x00000000}, | ||
1619 | {0x0000a1ec, 0x00000000}, | ||
1620 | {0x0000a1f0, 0x00000396}, | ||
1621 | {0x0000a1f4, 0x00000396}, | ||
1622 | {0x0000a1f8, 0x00000396}, | ||
1623 | {0x0000a1fc, 0x00000196}, | ||
1624 | {0x0000b000, 0x00010000}, | ||
1625 | {0x0000b004, 0x00030002}, | ||
1626 | {0x0000b008, 0x00050004}, | ||
1627 | {0x0000b00c, 0x00810080}, | ||
1628 | {0x0000b010, 0x00830082}, | ||
1629 | {0x0000b014, 0x01810180}, | ||
1630 | {0x0000b018, 0x01830182}, | ||
1631 | {0x0000b01c, 0x01850184}, | ||
1632 | {0x0000b020, 0x02810280}, | ||
1633 | {0x0000b024, 0x02830282}, | ||
1634 | {0x0000b028, 0x02850284}, | ||
1635 | {0x0000b02c, 0x02890288}, | ||
1636 | {0x0000b030, 0x028b028a}, | ||
1637 | {0x0000b034, 0x0388028c}, | ||
1638 | {0x0000b038, 0x038a0389}, | ||
1639 | {0x0000b03c, 0x038c038b}, | ||
1640 | {0x0000b040, 0x0390038d}, | ||
1641 | {0x0000b044, 0x03920391}, | ||
1642 | {0x0000b048, 0x03940393}, | ||
1643 | {0x0000b04c, 0x03960395}, | ||
1644 | {0x0000b050, 0x00000000}, | ||
1645 | {0x0000b054, 0x00000000}, | ||
1646 | {0x0000b058, 0x00000000}, | ||
1647 | {0x0000b05c, 0x00000000}, | ||
1648 | {0x0000b060, 0x00000000}, | ||
1649 | {0x0000b064, 0x00000000}, | ||
1650 | {0x0000b068, 0x00000000}, | ||
1651 | {0x0000b06c, 0x00000000}, | ||
1652 | {0x0000b070, 0x00000000}, | ||
1653 | {0x0000b074, 0x00000000}, | ||
1654 | {0x0000b078, 0x00000000}, | ||
1655 | {0x0000b07c, 0x00000000}, | ||
1656 | {0x0000b080, 0x32323232}, | ||
1657 | {0x0000b084, 0x2f2f3232}, | ||
1658 | {0x0000b088, 0x23282a2d}, | ||
1659 | {0x0000b08c, 0x1c1e2123}, | ||
1660 | {0x0000b090, 0x14171919}, | ||
1661 | {0x0000b094, 0x0e0e1214}, | ||
1662 | {0x0000b098, 0x03050707}, | ||
1663 | {0x0000b09c, 0x00030303}, | ||
1664 | {0x0000b0a0, 0x00000000}, | ||
1665 | {0x0000b0a4, 0x00000000}, | ||
1666 | {0x0000b0a8, 0x00000000}, | ||
1667 | {0x0000b0ac, 0x00000000}, | ||
1668 | {0x0000b0b0, 0x00000000}, | ||
1669 | {0x0000b0b4, 0x00000000}, | ||
1670 | {0x0000b0b8, 0x00000000}, | ||
1671 | {0x0000b0bc, 0x00000000}, | ||
1672 | {0x0000b0c0, 0x003f0020}, | ||
1673 | {0x0000b0c4, 0x00400041}, | ||
1674 | {0x0000b0c8, 0x0140005f}, | ||
1675 | {0x0000b0cc, 0x0160015f}, | ||
1676 | {0x0000b0d0, 0x017e017f}, | ||
1677 | {0x0000b0d4, 0x02410242}, | ||
1678 | {0x0000b0d8, 0x025f0240}, | ||
1679 | {0x0000b0dc, 0x027f0260}, | ||
1680 | {0x0000b0e0, 0x0341027e}, | ||
1681 | {0x0000b0e4, 0x035f0340}, | ||
1682 | {0x0000b0e8, 0x037f0360}, | ||
1683 | {0x0000b0ec, 0x04400441}, | ||
1684 | {0x0000b0f0, 0x0460045f}, | ||
1685 | {0x0000b0f4, 0x0541047f}, | ||
1686 | {0x0000b0f8, 0x055f0540}, | ||
1687 | {0x0000b0fc, 0x057f0560}, | ||
1688 | {0x0000b100, 0x06400641}, | ||
1689 | {0x0000b104, 0x0660065f}, | ||
1690 | {0x0000b108, 0x067e067f}, | ||
1691 | {0x0000b10c, 0x07410742}, | ||
1692 | {0x0000b110, 0x075f0740}, | ||
1693 | {0x0000b114, 0x077f0760}, | ||
1694 | {0x0000b118, 0x07800781}, | ||
1695 | {0x0000b11c, 0x07a0079f}, | ||
1696 | {0x0000b120, 0x07c107bf}, | ||
1697 | {0x0000b124, 0x000007c0}, | ||
1698 | {0x0000b128, 0x00000000}, | ||
1699 | {0x0000b12c, 0x00000000}, | ||
1700 | {0x0000b130, 0x00000000}, | ||
1701 | {0x0000b134, 0x00000000}, | ||
1702 | {0x0000b138, 0x00000000}, | ||
1703 | {0x0000b13c, 0x00000000}, | ||
1704 | {0x0000b140, 0x003f0020}, | ||
1705 | {0x0000b144, 0x00400041}, | ||
1706 | {0x0000b148, 0x0140005f}, | ||
1707 | {0x0000b14c, 0x0160015f}, | ||
1708 | {0x0000b150, 0x017e017f}, | ||
1709 | {0x0000b154, 0x02410242}, | ||
1710 | {0x0000b158, 0x025f0240}, | ||
1711 | {0x0000b15c, 0x027f0260}, | ||
1712 | {0x0000b160, 0x0341027e}, | ||
1713 | {0x0000b164, 0x035f0340}, | ||
1714 | {0x0000b168, 0x037f0360}, | ||
1715 | {0x0000b16c, 0x04400441}, | ||
1716 | {0x0000b170, 0x0460045f}, | ||
1717 | {0x0000b174, 0x0541047f}, | ||
1718 | {0x0000b178, 0x055f0540}, | ||
1719 | {0x0000b17c, 0x057f0560}, | ||
1720 | {0x0000b180, 0x06400641}, | ||
1721 | {0x0000b184, 0x0660065f}, | ||
1722 | {0x0000b188, 0x067e067f}, | ||
1723 | {0x0000b18c, 0x07410742}, | ||
1724 | {0x0000b190, 0x075f0740}, | ||
1725 | {0x0000b194, 0x077f0760}, | ||
1726 | {0x0000b198, 0x07800781}, | ||
1727 | {0x0000b19c, 0x07a0079f}, | ||
1728 | {0x0000b1a0, 0x07c107bf}, | ||
1729 | {0x0000b1a4, 0x000007c0}, | ||
1730 | {0x0000b1a8, 0x00000000}, | ||
1731 | {0x0000b1ac, 0x00000000}, | ||
1732 | {0x0000b1b0, 0x00000000}, | ||
1733 | {0x0000b1b4, 0x00000000}, | ||
1734 | {0x0000b1b8, 0x00000000}, | ||
1735 | {0x0000b1bc, 0x00000000}, | ||
1736 | {0x0000b1c0, 0x00000000}, | ||
1737 | {0x0000b1c4, 0x00000000}, | ||
1738 | {0x0000b1c8, 0x00000000}, | ||
1739 | {0x0000b1cc, 0x00000000}, | ||
1740 | {0x0000b1d0, 0x00000000}, | ||
1741 | {0x0000b1d4, 0x00000000}, | ||
1742 | {0x0000b1d8, 0x00000000}, | ||
1743 | {0x0000b1dc, 0x00000000}, | ||
1744 | {0x0000b1e0, 0x00000000}, | ||
1745 | {0x0000b1e4, 0x00000000}, | ||
1746 | {0x0000b1e8, 0x00000000}, | ||
1747 | {0x0000b1ec, 0x00000000}, | ||
1748 | {0x0000b1f0, 0x00000396}, | ||
1749 | {0x0000b1f4, 0x00000396}, | ||
1750 | {0x0000b1f8, 0x00000396}, | ||
1751 | {0x0000b1fc, 0x00000196}, | ||
1752 | }; | ||
1753 | |||
1754 | static const u32 ar9300_2p0_soc_preamble[][2] = { | ||
1755 | /* Addr allmodes */ | ||
1756 | {0x000040a4, 0x00a0c1c9}, | ||
1757 | {0x00007008, 0x00000000}, | ||
1758 | {0x00007020, 0x00000000}, | ||
1759 | {0x00007034, 0x00000002}, | ||
1760 | {0x00007038, 0x000004c2}, | ||
1761 | }; | ||
1762 | |||
1763 | static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0[][2] = { | ||
1764 | /* Addr allmodes */ | ||
1765 | {0x00004040, 0x08212e5e}, | ||
1766 | {0x00004040, 0x0008003b}, | ||
1767 | {0x00004044, 0x00000000}, | ||
1768 | }; | ||
1769 | |||
1770 | static const u32 ar9300PciePhy_clkreq_enable_L1_2p0[][2] = { | ||
1771 | /* Addr allmodes */ | ||
1772 | {0x00004040, 0x08253e5e}, | ||
1773 | {0x00004040, 0x0008003b}, | ||
1774 | {0x00004044, 0x00000000}, | ||
1775 | }; | ||
1776 | |||
1777 | static const u32 ar9300PciePhy_clkreq_disable_L1_2p0[][2] = { | ||
1778 | /* Addr allmodes */ | ||
1779 | {0x00004040, 0x08213e5e}, | ||
1780 | {0x00004040, 0x0008003b}, | ||
1781 | {0x00004044, 0x00000000}, | ||
1782 | }; | ||
1783 | |||
1784 | #endif /* INITVALS_9003_2P0_H */ | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index 02c970819f79..c2a057156bfa 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | #include "hw.h" | 17 | #include "hw.h" |
18 | #include "ar9003_mac.h" | 18 | #include "ar9003_mac.h" |
19 | #include "ar9003_2p0_initvals.h" | ||
20 | #include "ar9003_2p2_initvals.h" | 19 | #include "ar9003_2p2_initvals.h" |
21 | 20 | ||
22 | /* General hardware code for the AR9003 hadware family */ | 21 | /* General hardware code for the AR9003 hadware family */ |
@@ -32,79 +31,12 @@ static bool ar9003_hw_macversion_supported(u32 macversion) | |||
32 | return false; | 31 | return false; |
33 | } | 32 | } |
34 | 33 | ||
35 | /* AR9003 2.0 */ | 34 | /* |
36 | static void ar9003_2p0_hw_init_mode_regs(struct ath_hw *ah) | 35 | * The AR9003 family uses a new INI format (pre, core, post |
37 | { | 36 | * arrays per subsystem). This provides support for the |
38 | /* mac */ | 37 | * AR9003 2.2 chipsets. |
39 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); | 38 | */ |
40 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], | 39 | static void ar9003_hw_init_mode_regs(struct ath_hw *ah) |
41 | ar9300_2p0_mac_core, | ||
42 | ARRAY_SIZE(ar9300_2p0_mac_core), 2); | ||
43 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], | ||
44 | ar9300_2p0_mac_postamble, | ||
45 | ARRAY_SIZE(ar9300_2p0_mac_postamble), 5); | ||
46 | |||
47 | /* bb */ | ||
48 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); | ||
49 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], | ||
50 | ar9300_2p0_baseband_core, | ||
51 | ARRAY_SIZE(ar9300_2p0_baseband_core), 2); | ||
52 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], | ||
53 | ar9300_2p0_baseband_postamble, | ||
54 | ARRAY_SIZE(ar9300_2p0_baseband_postamble), 5); | ||
55 | |||
56 | /* radio */ | ||
57 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); | ||
58 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], | ||
59 | ar9300_2p0_radio_core, | ||
60 | ARRAY_SIZE(ar9300_2p0_radio_core), 2); | ||
61 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], | ||
62 | ar9300_2p0_radio_postamble, | ||
63 | ARRAY_SIZE(ar9300_2p0_radio_postamble), 5); | ||
64 | |||
65 | /* soc */ | ||
66 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], | ||
67 | ar9300_2p0_soc_preamble, | ||
68 | ARRAY_SIZE(ar9300_2p0_soc_preamble), 2); | ||
69 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); | ||
70 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], | ||
71 | ar9300_2p0_soc_postamble, | ||
72 | ARRAY_SIZE(ar9300_2p0_soc_postamble), 5); | ||
73 | |||
74 | /* rx/tx gain */ | ||
75 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
76 | ar9300Common_rx_gain_table_2p0, | ||
77 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), 2); | ||
78 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
79 | ar9300Modes_lowest_ob_db_tx_gain_table_2p0, | ||
80 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0), | ||
81 | 5); | ||
82 | |||
83 | /* Load PCIE SERDES settings from INI */ | ||
84 | |||
85 | /* Awake Setting */ | ||
86 | |||
87 | INIT_INI_ARRAY(&ah->iniPcieSerdes, | ||
88 | ar9300PciePhy_pll_on_clkreq_disable_L1_2p0, | ||
89 | ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p0), | ||
90 | 2); | ||
91 | |||
92 | /* Sleep Setting */ | ||
93 | |||
94 | INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, | ||
95 | ar9300PciePhy_clkreq_enable_L1_2p0, | ||
96 | ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p0), | ||
97 | 2); | ||
98 | |||
99 | /* Fast clock modal settings */ | ||
100 | INIT_INI_ARRAY(&ah->iniModesAdditional, | ||
101 | ar9300Modes_fast_clock_2p0, | ||
102 | ARRAY_SIZE(ar9300Modes_fast_clock_2p0), | ||
103 | 3); | ||
104 | } | ||
105 | |||
106 | /* AR9003 2.2 */ | ||
107 | static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah) | ||
108 | { | 40 | { |
109 | /* mac */ | 41 | /* mac */ |
110 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); | 42 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); |
@@ -174,57 +106,27 @@ static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah) | |||
174 | 3); | 106 | 3); |
175 | } | 107 | } |
176 | 108 | ||
177 | /* | ||
178 | * The AR9003 family uses a new INI format (pre, core, post | ||
179 | * arrays per subsystem). | ||
180 | */ | ||
181 | static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | ||
182 | { | ||
183 | if (AR_SREV_9300_20(ah)) | ||
184 | ar9003_2p0_hw_init_mode_regs(ah); | ||
185 | else | ||
186 | ar9003_2p2_hw_init_mode_regs(ah); | ||
187 | } | ||
188 | |||
189 | static void ar9003_tx_gain_table_apply(struct ath_hw *ah) | 109 | static void ar9003_tx_gain_table_apply(struct ath_hw *ah) |
190 | { | 110 | { |
191 | switch (ar9003_hw_get_tx_gain_idx(ah)) { | 111 | switch (ar9003_hw_get_tx_gain_idx(ah)) { |
192 | case 0: | 112 | case 0: |
193 | default: | 113 | default: |
194 | if (AR_SREV_9300_20(ah)) | 114 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
195 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 115 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2, |
196 | ar9300Modes_lowest_ob_db_tx_gain_table_2p0, | 116 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2), |
197 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0), | 117 | 5); |
198 | 5); | ||
199 | else | ||
200 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
201 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2, | ||
202 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2), | ||
203 | 5); | ||
204 | break; | 118 | break; |
205 | case 1: | 119 | case 1: |
206 | if (AR_SREV_9300_20(ah)) | 120 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
207 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 121 | ar9300Modes_high_ob_db_tx_gain_table_2p2, |
208 | ar9300Modes_high_ob_db_tx_gain_table_2p0, | 122 | ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2), |
209 | ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0), | 123 | 5); |
210 | 5); | ||
211 | else | ||
212 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
213 | ar9300Modes_high_ob_db_tx_gain_table_2p2, | ||
214 | ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2), | ||
215 | 5); | ||
216 | break; | 124 | break; |
217 | case 2: | 125 | case 2: |
218 | if (AR_SREV_9300_20(ah)) | 126 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
219 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 127 | ar9300Modes_low_ob_db_tx_gain_table_2p2, |
220 | ar9300Modes_low_ob_db_tx_gain_table_2p0, | 128 | ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2), |
221 | ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0), | 129 | 5); |
222 | 5); | ||
223 | else | ||
224 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
225 | ar9300Modes_low_ob_db_tx_gain_table_2p2, | ||
226 | ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2), | ||
227 | 5); | ||
228 | break; | 130 | break; |
229 | } | 131 | } |
230 | } | 132 | } |
@@ -234,28 +136,16 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah) | |||
234 | switch (ar9003_hw_get_rx_gain_idx(ah)) { | 136 | switch (ar9003_hw_get_rx_gain_idx(ah)) { |
235 | case 0: | 137 | case 0: |
236 | default: | 138 | default: |
237 | if (AR_SREV_9300_20(ah)) | 139 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
238 | INIT_INI_ARRAY(&ah->iniModesRxGain, | 140 | ar9300Common_rx_gain_table_2p2, |
239 | ar9300Common_rx_gain_table_2p0, | 141 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), |
240 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), | 142 | 2); |
241 | 2); | ||
242 | else | ||
243 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
244 | ar9300Common_rx_gain_table_2p2, | ||
245 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), | ||
246 | 2); | ||
247 | break; | 143 | break; |
248 | case 1: | 144 | case 1: |
249 | if (AR_SREV_9300_20(ah)) | 145 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
250 | INIT_INI_ARRAY(&ah->iniModesRxGain, | 146 | ar9300Common_wo_xlna_rx_gain_table_2p2, |
251 | ar9300Common_wo_xlna_rx_gain_table_2p0, | 147 | ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2), |
252 | ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0), | 148 | 2); |
253 | 2); | ||
254 | else | ||
255 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
256 | ar9300Common_wo_xlna_rx_gain_table_2p2, | ||
257 | ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2), | ||
258 | 2); | ||
259 | break; | 149 | break; |
260 | } | 150 | } |
261 | } | 151 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index efb05599b84c..669b777729b3 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
@@ -1254,13 +1254,12 @@ void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) | |||
1254 | "** BB mode: BB_gen_controls=0x%08x **\n", | 1254 | "** BB mode: BB_gen_controls=0x%08x **\n", |
1255 | REG_READ(ah, AR_PHY_GEN_CTRL)); | 1255 | REG_READ(ah, AR_PHY_GEN_CTRL)); |
1256 | 1256 | ||
1257 | ath9k_hw_update_cycle_counters(ah); | 1257 | #define PCT(_field) (common->cc_survey._field * 100 / common->cc_survey.cycles) |
1258 | #define PCT(_field) (ah->cc_delta._field * 100 / ah->cc_delta.cycles) | 1258 | if (common->cc_survey.cycles) |
1259 | if (ah->cc_delta.cycles) | ||
1260 | ath_print(common, ATH_DBG_RESET, | 1259 | ath_print(common, ATH_DBG_RESET, |
1261 | "** BB busy times: rx_clear=%d%%, " | 1260 | "** BB busy times: rx_clear=%d%%, " |
1262 | "rx_frame=%d%%, tx_frame=%d%% **\n", | 1261 | "rx_frame=%d%%, tx_frame=%d%% **\n", |
1263 | PCT(rx_clear), PCT(rx_frame), PCT(tx_frame)); | 1262 | PCT(rx_busy), PCT(rx_frame), PCT(tx_frame)); |
1264 | 1263 | ||
1265 | ath_print(common, ATH_DBG_RESET, | 1264 | ath_print(common, ATH_DBG_RESET, |
1266 | "==== BB update: done ====\n\n"); | 1265 | "==== BB update: done ====\n\n"); |
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index de2b18ee7f77..973c919fdd27 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -239,12 +239,11 @@ struct ath_buf { | |||
239 | struct sk_buff *bf_mpdu; /* enclosing frame structure */ | 239 | struct sk_buff *bf_mpdu; /* enclosing frame structure */ |
240 | void *bf_desc; /* virtual addr of desc */ | 240 | void *bf_desc; /* virtual addr of desc */ |
241 | dma_addr_t bf_daddr; /* physical addr of desc */ | 241 | dma_addr_t bf_daddr; /* physical addr of desc */ |
242 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ | 242 | dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ |
243 | bool bf_stale; | 243 | bool bf_stale; |
244 | bool bf_tx_aborted; | 244 | bool bf_tx_aborted; |
245 | u16 bf_flags; | 245 | u16 bf_flags; |
246 | struct ath_buf_state bf_state; | 246 | struct ath_buf_state bf_state; |
247 | dma_addr_t bf_dmacontext; | ||
248 | struct ath_wiphy *aphy; | 247 | struct ath_wiphy *aphy; |
249 | }; | 248 | }; |
250 | 249 | ||
@@ -593,6 +592,8 @@ struct ath_softc { | |||
593 | struct delayed_work wiphy_work; | 592 | struct delayed_work wiphy_work; |
594 | unsigned long wiphy_scheduler_int; | 593 | unsigned long wiphy_scheduler_int; |
595 | int wiphy_scheduler_index; | 594 | int wiphy_scheduler_index; |
595 | struct survey_info *cur_survey; | ||
596 | struct survey_info survey[ATH9K_NUM_CHANNELS]; | ||
596 | 597 | ||
597 | struct tasklet_struct intr_tq; | 598 | struct tasklet_struct intr_tq; |
598 | struct tasklet_struct bcon_tasklet; | 599 | struct tasklet_struct bcon_tasklet; |
@@ -621,8 +622,6 @@ struct ath_softc { | |||
621 | struct ath_rx rx; | 622 | struct ath_rx rx; |
622 | struct ath_tx tx; | 623 | struct ath_tx tx; |
623 | struct ath_beacon beacon; | 624 | struct ath_beacon beacon; |
624 | const struct ath_rate_table *cur_rate_table; | ||
625 | enum wireless_mode cur_rate_mode; | ||
626 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; | 625 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; |
627 | 626 | ||
628 | struct ath_led radio_led; | 627 | struct ath_led radio_led; |
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c index 081192e78a46..4ed010d4ef96 100644 --- a/drivers/net/wireless/ath/ath9k/beacon.c +++ b/drivers/net/wireless/ath/ath9k/beacon.c | |||
@@ -136,9 +136,10 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, | |||
136 | bf = avp->av_bcbuf; | 136 | bf = avp->av_bcbuf; |
137 | skb = bf->bf_mpdu; | 137 | skb = bf->bf_mpdu; |
138 | if (skb) { | 138 | if (skb) { |
139 | dma_unmap_single(sc->dev, bf->bf_dmacontext, | 139 | dma_unmap_single(sc->dev, bf->bf_buf_addr, |
140 | skb->len, DMA_TO_DEVICE); | 140 | skb->len, DMA_TO_DEVICE); |
141 | dev_kfree_skb_any(skb); | 141 | dev_kfree_skb_any(skb); |
142 | bf->bf_buf_addr = 0; | ||
142 | } | 143 | } |
143 | 144 | ||
144 | /* Get a new beacon from mac80211 */ | 145 | /* Get a new beacon from mac80211 */ |
@@ -162,12 +163,12 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, | |||
162 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); | 163 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); |
163 | } | 164 | } |
164 | 165 | ||
165 | bf->bf_buf_addr = bf->bf_dmacontext = | 166 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
166 | dma_map_single(sc->dev, skb->data, | 167 | skb->len, DMA_TO_DEVICE); |
167 | skb->len, DMA_TO_DEVICE); | ||
168 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { | 168 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
169 | dev_kfree_skb_any(skb); | 169 | dev_kfree_skb_any(skb); |
170 | bf->bf_mpdu = NULL; | 170 | bf->bf_mpdu = NULL; |
171 | bf->bf_buf_addr = 0; | ||
171 | ath_print(common, ATH_DBG_FATAL, | 172 | ath_print(common, ATH_DBG_FATAL, |
172 | "dma_mapping_error on beaconing\n"); | 173 | "dma_mapping_error on beaconing\n"); |
173 | return NULL; | 174 | return NULL; |
@@ -252,10 +253,11 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) | |||
252 | bf = avp->av_bcbuf; | 253 | bf = avp->av_bcbuf; |
253 | if (bf->bf_mpdu != NULL) { | 254 | if (bf->bf_mpdu != NULL) { |
254 | skb = bf->bf_mpdu; | 255 | skb = bf->bf_mpdu; |
255 | dma_unmap_single(sc->dev, bf->bf_dmacontext, | 256 | dma_unmap_single(sc->dev, bf->bf_buf_addr, |
256 | skb->len, DMA_TO_DEVICE); | 257 | skb->len, DMA_TO_DEVICE); |
257 | dev_kfree_skb_any(skb); | 258 | dev_kfree_skb_any(skb); |
258 | bf->bf_mpdu = NULL; | 259 | bf->bf_mpdu = NULL; |
260 | bf->bf_buf_addr = 0; | ||
259 | } | 261 | } |
260 | 262 | ||
261 | /* NB: the beacon data buffer must be 32-bit aligned. */ | 263 | /* NB: the beacon data buffer must be 32-bit aligned. */ |
@@ -296,12 +298,12 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) | |||
296 | avp->tsf_adjust = cpu_to_le64(0); | 298 | avp->tsf_adjust = cpu_to_le64(0); |
297 | 299 | ||
298 | bf->bf_mpdu = skb; | 300 | bf->bf_mpdu = skb; |
299 | bf->bf_buf_addr = bf->bf_dmacontext = | 301 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
300 | dma_map_single(sc->dev, skb->data, | 302 | skb->len, DMA_TO_DEVICE); |
301 | skb->len, DMA_TO_DEVICE); | ||
302 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { | 303 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
303 | dev_kfree_skb_any(skb); | 304 | dev_kfree_skb_any(skb); |
304 | bf->bf_mpdu = NULL; | 305 | bf->bf_mpdu = NULL; |
306 | bf->bf_buf_addr = 0; | ||
305 | ath_print(common, ATH_DBG_FATAL, | 307 | ath_print(common, ATH_DBG_FATAL, |
306 | "dma_mapping_error on beacon alloc\n"); | 308 | "dma_mapping_error on beacon alloc\n"); |
307 | return -ENOMEM; | 309 | return -ENOMEM; |
@@ -324,10 +326,11 @@ void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp) | |||
324 | bf = avp->av_bcbuf; | 326 | bf = avp->av_bcbuf; |
325 | if (bf->bf_mpdu != NULL) { | 327 | if (bf->bf_mpdu != NULL) { |
326 | struct sk_buff *skb = bf->bf_mpdu; | 328 | struct sk_buff *skb = bf->bf_mpdu; |
327 | dma_unmap_single(sc->dev, bf->bf_dmacontext, | 329 | dma_unmap_single(sc->dev, bf->bf_buf_addr, |
328 | skb->len, DMA_TO_DEVICE); | 330 | skb->len, DMA_TO_DEVICE); |
329 | dev_kfree_skb_any(skb); | 331 | dev_kfree_skb_any(skb); |
330 | bf->bf_mpdu = NULL; | 332 | bf->bf_mpdu = NULL; |
333 | bf->bf_buf_addr = 0; | ||
331 | } | 334 | } |
332 | list_add_tail(&bf->list, &sc->beacon.bbuf); | 335 | list_add_tail(&bf->list, &sc->beacon.bbuf); |
333 | 336 | ||
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c index 74a4570dc87f..7f764e3d1c0a 100644 --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c | |||
@@ -378,95 +378,6 @@ static const struct file_operations fops_interrupt = { | |||
378 | .owner = THIS_MODULE | 378 | .owner = THIS_MODULE |
379 | }; | 379 | }; |
380 | 380 | ||
381 | void ath_debug_stat_rc(struct ath_softc *sc, int final_rate) | ||
382 | { | ||
383 | struct ath_rc_stats *stats; | ||
384 | |||
385 | stats = &sc->debug.stats.rcstats[final_rate]; | ||
386 | stats->success++; | ||
387 | } | ||
388 | |||
389 | void ath_debug_stat_retries(struct ath_softc *sc, int rix, | ||
390 | int xretries, int retries, u8 per) | ||
391 | { | ||
392 | struct ath_rc_stats *stats = &sc->debug.stats.rcstats[rix]; | ||
393 | |||
394 | stats->xretries += xretries; | ||
395 | stats->retries += retries; | ||
396 | stats->per = per; | ||
397 | } | ||
398 | |||
399 | static ssize_t read_file_rcstat(struct file *file, char __user *user_buf, | ||
400 | size_t count, loff_t *ppos) | ||
401 | { | ||
402 | struct ath_softc *sc = file->private_data; | ||
403 | char *buf; | ||
404 | unsigned int len = 0, max; | ||
405 | int i = 0; | ||
406 | ssize_t retval; | ||
407 | |||
408 | if (sc->cur_rate_table == NULL) | ||
409 | return 0; | ||
410 | |||
411 | max = 80 + sc->cur_rate_table->rate_cnt * 1024 + 1; | ||
412 | buf = kmalloc(max, GFP_KERNEL); | ||
413 | if (buf == NULL) | ||
414 | return -ENOMEM; | ||
415 | |||
416 | len += sprintf(buf, "%6s %6s %6s " | ||
417 | "%10s %10s %10s %10s\n", | ||
418 | "HT", "MCS", "Rate", | ||
419 | "Success", "Retries", "XRetries", "PER"); | ||
420 | |||
421 | for (i = 0; i < sc->cur_rate_table->rate_cnt; i++) { | ||
422 | u32 ratekbps = sc->cur_rate_table->info[i].ratekbps; | ||
423 | struct ath_rc_stats *stats = &sc->debug.stats.rcstats[i]; | ||
424 | char mcs[5]; | ||
425 | char htmode[5]; | ||
426 | int used_mcs = 0, used_htmode = 0; | ||
427 | |||
428 | if (WLAN_RC_PHY_HT(sc->cur_rate_table->info[i].phy)) { | ||
429 | used_mcs = snprintf(mcs, 5, "%d", | ||
430 | sc->cur_rate_table->info[i].ratecode); | ||
431 | |||
432 | if (WLAN_RC_PHY_40(sc->cur_rate_table->info[i].phy)) | ||
433 | used_htmode = snprintf(htmode, 5, "HT40"); | ||
434 | else if (WLAN_RC_PHY_20(sc->cur_rate_table->info[i].phy)) | ||
435 | used_htmode = snprintf(htmode, 5, "HT20"); | ||
436 | else | ||
437 | used_htmode = snprintf(htmode, 5, "????"); | ||
438 | } | ||
439 | |||
440 | mcs[used_mcs] = '\0'; | ||
441 | htmode[used_htmode] = '\0'; | ||
442 | |||
443 | len += snprintf(buf + len, max - len, | ||
444 | "%6s %6s %3u.%d: " | ||
445 | "%10u %10u %10u %10u\n", | ||
446 | htmode, | ||
447 | mcs, | ||
448 | ratekbps / 1000, | ||
449 | (ratekbps % 1000) / 100, | ||
450 | stats->success, | ||
451 | stats->retries, | ||
452 | stats->xretries, | ||
453 | stats->per); | ||
454 | } | ||
455 | |||
456 | if (len > max) | ||
457 | len = max; | ||
458 | |||
459 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | ||
460 | kfree(buf); | ||
461 | return retval; | ||
462 | } | ||
463 | |||
464 | static const struct file_operations fops_rcstat = { | ||
465 | .read = read_file_rcstat, | ||
466 | .open = ath9k_debugfs_open, | ||
467 | .owner = THIS_MODULE | ||
468 | }; | ||
469 | |||
470 | static const char * ath_wiphy_state_str(enum ath_wiphy_state state) | 381 | static const char * ath_wiphy_state_str(enum ath_wiphy_state state) |
471 | { | 382 | { |
472 | switch (state) { | 383 | switch (state) { |
@@ -977,10 +888,6 @@ int ath9k_init_debug(struct ath_hw *ah) | |||
977 | sc, &fops_interrupt)) | 888 | sc, &fops_interrupt)) |
978 | goto err; | 889 | goto err; |
979 | 890 | ||
980 | if (!debugfs_create_file("rcstat", S_IRUSR, sc->debug.debugfs_phy, | ||
981 | sc, &fops_rcstat)) | ||
982 | goto err; | ||
983 | |||
984 | if (!debugfs_create_file("wiphy", S_IRUSR | S_IWUSR, | 891 | if (!debugfs_create_file("wiphy", S_IRUSR | S_IWUSR, |
985 | sc->debug.debugfs_phy, sc, &fops_wiphy)) | 892 | sc->debug.debugfs_phy, sc, &fops_wiphy)) |
986 | goto err; | 893 | goto err; |
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h index 822b6f3f23c5..bb0823242ba0 100644 --- a/drivers/net/wireless/ath/ath9k/debug.h +++ b/drivers/net/wireless/ath/ath9k/debug.h | |||
@@ -80,13 +80,6 @@ struct ath_interrupt_stats { | |||
80 | u32 bb_watchdog; | 80 | u32 bb_watchdog; |
81 | }; | 81 | }; |
82 | 82 | ||
83 | struct ath_rc_stats { | ||
84 | u32 success; | ||
85 | u32 retries; | ||
86 | u32 xretries; | ||
87 | u8 per; | ||
88 | }; | ||
89 | |||
90 | /** | 83 | /** |
91 | * struct ath_tx_stats - Statistics about TX | 84 | * struct ath_tx_stats - Statistics about TX |
92 | * @tx_pkts_all: No. of total frames transmitted, including ones that | 85 | * @tx_pkts_all: No. of total frames transmitted, including ones that |
@@ -160,7 +153,6 @@ struct ath_rx_stats { | |||
160 | 153 | ||
161 | struct ath_stats { | 154 | struct ath_stats { |
162 | struct ath_interrupt_stats istats; | 155 | struct ath_interrupt_stats istats; |
163 | struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; | ||
164 | struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES]; | 156 | struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES]; |
165 | struct ath_rx_stats rxstats; | 157 | struct ath_rx_stats rxstats; |
166 | }; | 158 | }; |
@@ -177,12 +169,9 @@ void ath9k_exit_debug(struct ath_hw *ah); | |||
177 | int ath9k_debug_create_root(void); | 169 | int ath9k_debug_create_root(void); |
178 | void ath9k_debug_remove_root(void); | 170 | void ath9k_debug_remove_root(void); |
179 | void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); | 171 | void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); |
180 | void ath_debug_stat_rc(struct ath_softc *sc, int final_rate); | ||
181 | void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq, | 172 | void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq, |
182 | struct ath_buf *bf, struct ath_tx_status *ts); | 173 | struct ath_buf *bf, struct ath_tx_status *ts); |
183 | void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs); | 174 | void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs); |
184 | void ath_debug_stat_retries(struct ath_softc *sc, int rix, | ||
185 | int xretries, int retries, u8 per); | ||
186 | 175 | ||
187 | #else | 176 | #else |
188 | 177 | ||
@@ -209,11 +198,6 @@ static inline void ath_debug_stat_interrupt(struct ath_softc *sc, | |||
209 | { | 198 | { |
210 | } | 199 | } |
211 | 200 | ||
212 | static inline void ath_debug_stat_rc(struct ath_softc *sc, | ||
213 | int final_rate) | ||
214 | { | ||
215 | } | ||
216 | |||
217 | static inline void ath_debug_stat_tx(struct ath_softc *sc, | 201 | static inline void ath_debug_stat_tx(struct ath_softc *sc, |
218 | struct ath_txq *txq, | 202 | struct ath_txq *txq, |
219 | struct ath_buf *bf, | 203 | struct ath_buf *bf, |
@@ -226,11 +210,6 @@ static inline void ath_debug_stat_rx(struct ath_softc *sc, | |||
226 | { | 210 | { |
227 | } | 211 | } |
228 | 212 | ||
229 | static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix, | ||
230 | int xretries, int retries, u8 per) | ||
231 | { | ||
232 | } | ||
233 | |||
234 | #endif /* CONFIG_ATH9K_DEBUGFS */ | 213 | #endif /* CONFIG_ATH9K_DEBUGFS */ |
235 | 214 | ||
236 | #endif /* DEBUG_H */ | 215 | #endif /* DEBUG_H */ |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c index bbb54bc28a44..3d7b97f1b3ae 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c | |||
@@ -566,7 +566,7 @@ static void ath9k_init_crypto(struct ath9k_htc_priv *priv) | |||
566 | 566 | ||
567 | static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) | 567 | static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) |
568 | { | 568 | { |
569 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) { | 569 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { |
570 | priv->sbands[IEEE80211_BAND_2GHZ].channels = | 570 | priv->sbands[IEEE80211_BAND_2GHZ].channels = |
571 | ath9k_2ghz_channels; | 571 | ath9k_2ghz_channels; |
572 | priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; | 572 | priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ; |
@@ -577,7 +577,7 @@ static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) | |||
577 | ARRAY_SIZE(ath9k_legacy_rates); | 577 | ARRAY_SIZE(ath9k_legacy_rates); |
578 | } | 578 | } |
579 | 579 | ||
580 | if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) { | 580 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { |
581 | priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels; | 581 | priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels; |
582 | priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; | 582 | priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; |
583 | priv->sbands[IEEE80211_BAND_5GHZ].n_channels = | 583 | priv->sbands[IEEE80211_BAND_5GHZ].n_channels = |
@@ -740,18 +740,18 @@ static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, | |||
740 | hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + | 740 | hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) + |
741 | sizeof(struct htc_frame_hdr) + 4; | 741 | sizeof(struct htc_frame_hdr) + 4; |
742 | 742 | ||
743 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) | 743 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
744 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 744 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
745 | &priv->sbands[IEEE80211_BAND_2GHZ]; | 745 | &priv->sbands[IEEE80211_BAND_2GHZ]; |
746 | if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) | 746 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
747 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | 747 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
748 | &priv->sbands[IEEE80211_BAND_5GHZ]; | 748 | &priv->sbands[IEEE80211_BAND_5GHZ]; |
749 | 749 | ||
750 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { | 750 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { |
751 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) | 751 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
752 | setup_ht_cap(priv, | 752 | setup_ht_cap(priv, |
753 | &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); | 753 | &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); |
754 | if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) | 754 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
755 | setup_ht_cap(priv, | 755 | setup_ht_cap(priv, |
756 | &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap); | 756 | &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap); |
757 | } | 757 | } |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c index f12591f5d02a..55c80866dfc6 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c | |||
@@ -1454,6 +1454,7 @@ out: | |||
1454 | FIF_PSPOLL | \ | 1454 | FIF_PSPOLL | \ |
1455 | FIF_OTHER_BSS | \ | 1455 | FIF_OTHER_BSS | \ |
1456 | FIF_BCN_PRBRESP_PROMISC | \ | 1456 | FIF_BCN_PRBRESP_PROMISC | \ |
1457 | FIF_PROBE_REQ | \ | ||
1457 | FIF_FCSFAIL) | 1458 | FIF_FCSFAIL) |
1458 | 1459 | ||
1459 | static void ath9k_htc_configure_filter(struct ieee80211_hw *hw, | 1460 | static void ath9k_htc_configure_filter(struct ieee80211_hw *hw, |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c index c99600aff76d..3d19b5bc937f 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c | |||
@@ -369,8 +369,7 @@ u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv) | |||
369 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST | 369 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST |
370 | | ATH9K_RX_FILTER_MCAST; | 370 | | ATH9K_RX_FILTER_MCAST; |
371 | 371 | ||
372 | /* If not a STA, enable processing of Probe Requests */ | 372 | if (priv->rxfilter & FIF_PROBE_REQ) |
373 | if (ah->opmode != NL80211_IFTYPE_STATION) | ||
374 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; | 373 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; |
375 | 374 | ||
376 | /* | 375 | /* |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 05e9935ef160..cc13ee117823 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -88,29 +88,32 @@ static void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah) | |||
88 | /* Helper Functions */ | 88 | /* Helper Functions */ |
89 | /********************/ | 89 | /********************/ |
90 | 90 | ||
91 | static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs) | 91 | static void ath9k_hw_set_clockrate(struct ath_hw *ah) |
92 | { | 92 | { |
93 | struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; | 93 | struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; |
94 | struct ath_common *common = ath9k_hw_common(ah); | ||
95 | unsigned int clockrate; | ||
94 | 96 | ||
95 | if (!ah->curchan) /* should really check for CCK instead */ | 97 | if (!ah->curchan) /* should really check for CCK instead */ |
96 | return usecs *ATH9K_CLOCK_RATE_CCK; | 98 | clockrate = ATH9K_CLOCK_RATE_CCK; |
97 | if (conf->channel->band == IEEE80211_BAND_2GHZ) | 99 | else if (conf->channel->band == IEEE80211_BAND_2GHZ) |
98 | return usecs *ATH9K_CLOCK_RATE_2GHZ_OFDM; | 100 | clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM; |
99 | 101 | else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK) | |
100 | if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK) | 102 | clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM; |
101 | return usecs * ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM; | ||
102 | else | 103 | else |
103 | return usecs * ATH9K_CLOCK_RATE_5GHZ_OFDM; | 104 | clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM; |
105 | |||
106 | if (conf_is_ht40(conf)) | ||
107 | clockrate *= 2; | ||
108 | |||
109 | common->clockrate = clockrate; | ||
104 | } | 110 | } |
105 | 111 | ||
106 | static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) | 112 | static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) |
107 | { | 113 | { |
108 | struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; | 114 | struct ath_common *common = ath9k_hw_common(ah); |
109 | 115 | ||
110 | if (conf_is_ht40(conf)) | 116 | return usecs * common->clockrate; |
111 | return ath9k_hw_mac_clks(ah, usecs) * 2; | ||
112 | else | ||
113 | return ath9k_hw_mac_clks(ah, usecs); | ||
114 | } | 117 | } |
115 | 118 | ||
116 | bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) | 119 | bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) |
@@ -1156,6 +1159,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1156 | "Failed to set channel\n"); | 1159 | "Failed to set channel\n"); |
1157 | return false; | 1160 | return false; |
1158 | } | 1161 | } |
1162 | ath9k_hw_set_clockrate(ah); | ||
1159 | 1163 | ||
1160 | ah->eep_ops->set_txpower(ah, chan, | 1164 | ah->eep_ops->set_txpower(ah, chan, |
1161 | ath9k_regd_get_ctl(regulatory, chan), | 1165 | ath9k_regd_get_ctl(regulatory, chan), |
@@ -1368,6 +1372,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1368 | if (r) | 1372 | if (r) |
1369 | return r; | 1373 | return r; |
1370 | 1374 | ||
1375 | ath9k_hw_set_clockrate(ah); | ||
1376 | |||
1371 | ENABLE_REGWRITE_BUFFER(ah); | 1377 | ENABLE_REGWRITE_BUFFER(ah); |
1372 | 1378 | ||
1373 | for (i = 0; i < AR_NUM_DCU; i++) | 1379 | for (i = 0; i < AR_NUM_DCU; i++) |
@@ -1794,37 +1800,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1794 | return -EINVAL; | 1800 | return -EINVAL; |
1795 | } | 1801 | } |
1796 | 1802 | ||
1797 | bitmap_zero(pCap->wireless_modes, ATH9K_MODE_MAX); | 1803 | if (eeval & AR5416_OPFLAGS_11A) |
1798 | 1804 | pCap->hw_caps |= ATH9K_HW_CAP_5GHZ; | |
1799 | if (eeval & AR5416_OPFLAGS_11A) { | ||
1800 | set_bit(ATH9K_MODE_11A, pCap->wireless_modes); | ||
1801 | if (ah->config.ht_enable) { | ||
1802 | if (!(eeval & AR5416_OPFLAGS_N_5G_HT20)) | ||
1803 | set_bit(ATH9K_MODE_11NA_HT20, | ||
1804 | pCap->wireless_modes); | ||
1805 | if (!(eeval & AR5416_OPFLAGS_N_5G_HT40)) { | ||
1806 | set_bit(ATH9K_MODE_11NA_HT40PLUS, | ||
1807 | pCap->wireless_modes); | ||
1808 | set_bit(ATH9K_MODE_11NA_HT40MINUS, | ||
1809 | pCap->wireless_modes); | ||
1810 | } | ||
1811 | } | ||
1812 | } | ||
1813 | 1805 | ||
1814 | if (eeval & AR5416_OPFLAGS_11G) { | 1806 | if (eeval & AR5416_OPFLAGS_11G) |
1815 | set_bit(ATH9K_MODE_11G, pCap->wireless_modes); | 1807 | pCap->hw_caps |= ATH9K_HW_CAP_2GHZ; |
1816 | if (ah->config.ht_enable) { | ||
1817 | if (!(eeval & AR5416_OPFLAGS_N_2G_HT20)) | ||
1818 | set_bit(ATH9K_MODE_11NG_HT20, | ||
1819 | pCap->wireless_modes); | ||
1820 | if (!(eeval & AR5416_OPFLAGS_N_2G_HT40)) { | ||
1821 | set_bit(ATH9K_MODE_11NG_HT40PLUS, | ||
1822 | pCap->wireless_modes); | ||
1823 | set_bit(ATH9K_MODE_11NG_HT40MINUS, | ||
1824 | pCap->wireless_modes); | ||
1825 | } | ||
1826 | } | ||
1827 | } | ||
1828 | 1808 | ||
1829 | pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK); | 1809 | pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK); |
1830 | /* | 1810 | /* |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 87627dd63463..d032939768b0 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -61,6 +61,8 @@ | |||
61 | 61 | ||
62 | #define ATH9K_RSSI_BAD -128 | 62 | #define ATH9K_RSSI_BAD -128 |
63 | 63 | ||
64 | #define ATH9K_NUM_CHANNELS 38 | ||
65 | |||
64 | /* Register read/write primitives */ | 66 | /* Register read/write primitives */ |
65 | #define REG_WRITE(_ah, _reg, _val) \ | 67 | #define REG_WRITE(_ah, _reg, _val) \ |
66 | ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg)) | 68 | ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg)) |
@@ -162,18 +164,6 @@ enum ath_ini_subsys { | |||
162 | ATH_INI_NUM_SPLIT, | 164 | ATH_INI_NUM_SPLIT, |
163 | }; | 165 | }; |
164 | 166 | ||
165 | enum wireless_mode { | ||
166 | ATH9K_MODE_11A = 0, | ||
167 | ATH9K_MODE_11G, | ||
168 | ATH9K_MODE_11NA_HT20, | ||
169 | ATH9K_MODE_11NG_HT20, | ||
170 | ATH9K_MODE_11NA_HT40PLUS, | ||
171 | ATH9K_MODE_11NA_HT40MINUS, | ||
172 | ATH9K_MODE_11NG_HT40PLUS, | ||
173 | ATH9K_MODE_11NG_HT40MINUS, | ||
174 | ATH9K_MODE_MAX, | ||
175 | }; | ||
176 | |||
177 | enum ath9k_hw_caps { | 167 | enum ath9k_hw_caps { |
178 | ATH9K_HW_CAP_HT = BIT(0), | 168 | ATH9K_HW_CAP_HT = BIT(0), |
179 | ATH9K_HW_CAP_RFSILENT = BIT(1), | 169 | ATH9K_HW_CAP_RFSILENT = BIT(1), |
@@ -188,11 +178,12 @@ enum ath9k_hw_caps { | |||
188 | ATH9K_HW_CAP_SGI_20 = BIT(10), | 178 | ATH9K_HW_CAP_SGI_20 = BIT(10), |
189 | ATH9K_HW_CAP_PAPRD = BIT(11), | 179 | ATH9K_HW_CAP_PAPRD = BIT(11), |
190 | ATH9K_HW_CAP_ANT_DIV_COMB = BIT(12), | 180 | ATH9K_HW_CAP_ANT_DIV_COMB = BIT(12), |
181 | ATH9K_HW_CAP_2GHZ = BIT(13), | ||
182 | ATH9K_HW_CAP_5GHZ = BIT(14), | ||
191 | }; | 183 | }; |
192 | 184 | ||
193 | struct ath9k_hw_capabilities { | 185 | struct ath9k_hw_capabilities { |
194 | u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */ | 186 | u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */ |
195 | DECLARE_BITMAP(wireless_modes, ATH9K_MODE_MAX); /* ATH9K_MODE_* */ | ||
196 | u16 total_queues; | 187 | u16 total_queues; |
197 | u16 keycache_size; | 188 | u16 keycache_size; |
198 | u16 low_5ghz_chan, high_5ghz_chan; | 189 | u16 low_5ghz_chan, high_5ghz_chan; |
@@ -618,7 +609,7 @@ struct ath_hw { | |||
618 | struct ath9k_hw_version hw_version; | 609 | struct ath9k_hw_version hw_version; |
619 | struct ath9k_ops_config config; | 610 | struct ath9k_ops_config config; |
620 | struct ath9k_hw_capabilities caps; | 611 | struct ath9k_hw_capabilities caps; |
621 | struct ath9k_channel channels[38]; | 612 | struct ath9k_channel channels[ATH9K_NUM_CHANNELS]; |
622 | struct ath9k_channel *curchan; | 613 | struct ath9k_channel *curchan; |
623 | 614 | ||
624 | union { | 615 | union { |
@@ -740,8 +731,6 @@ struct ath_hw { | |||
740 | int coarse_low[5]; | 731 | int coarse_low[5]; |
741 | int firpwr[5]; | 732 | int firpwr[5]; |
742 | enum ath9k_ani_cmd ani_function; | 733 | enum ath9k_ani_cmd ani_function; |
743 | struct ath_cycle_counters cc, cc_delta; | ||
744 | int32_t listen_time; | ||
745 | 734 | ||
746 | /* Bluetooth coexistance */ | 735 | /* Bluetooth coexistance */ |
747 | struct ath_btcoex_hw btcoex_hw; | 736 | struct ath_btcoex_hw btcoex_hw; |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index d76003c06fe4..bc6c4df9712c 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
@@ -481,7 +481,11 @@ static int ath9k_init_channels_rates(struct ath_softc *sc) | |||
481 | { | 481 | { |
482 | void *channels; | 482 | void *channels; |
483 | 483 | ||
484 | if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) { | 484 | BUILD_BUG_ON(ARRAY_SIZE(ath9k_2ghz_chantable) + |
485 | ARRAY_SIZE(ath9k_5ghz_chantable) != | ||
486 | ATH9K_NUM_CHANNELS); | ||
487 | |||
488 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { | ||
485 | channels = kmemdup(ath9k_2ghz_chantable, | 489 | channels = kmemdup(ath9k_2ghz_chantable, |
486 | sizeof(ath9k_2ghz_chantable), GFP_KERNEL); | 490 | sizeof(ath9k_2ghz_chantable), GFP_KERNEL); |
487 | if (!channels) | 491 | if (!channels) |
@@ -496,7 +500,7 @@ static int ath9k_init_channels_rates(struct ath_softc *sc) | |||
496 | ARRAY_SIZE(ath9k_legacy_rates); | 500 | ARRAY_SIZE(ath9k_legacy_rates); |
497 | } | 501 | } |
498 | 502 | ||
499 | if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) { | 503 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { |
500 | channels = kmemdup(ath9k_5ghz_chantable, | 504 | channels = kmemdup(ath9k_5ghz_chantable, |
501 | sizeof(ath9k_5ghz_chantable), GFP_KERNEL); | 505 | sizeof(ath9k_5ghz_chantable), GFP_KERNEL); |
502 | if (!channels) { | 506 | if (!channels) { |
@@ -677,17 +681,17 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
677 | hw->rate_control_algorithm = "ath9k_rate_control"; | 681 | hw->rate_control_algorithm = "ath9k_rate_control"; |
678 | #endif | 682 | #endif |
679 | 683 | ||
680 | if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) | 684 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
681 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 685 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
682 | &sc->sbands[IEEE80211_BAND_2GHZ]; | 686 | &sc->sbands[IEEE80211_BAND_2GHZ]; |
683 | if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) | 687 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
684 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | 688 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
685 | &sc->sbands[IEEE80211_BAND_5GHZ]; | 689 | &sc->sbands[IEEE80211_BAND_5GHZ]; |
686 | 690 | ||
687 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { | 691 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { |
688 | if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) | 692 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) |
689 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap); | 693 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap); |
690 | if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) | 694 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) |
691 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap); | 695 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap); |
692 | } | 696 | } |
693 | 697 | ||
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 74c2dc8a8b8a..3ff0e476c2b3 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -18,36 +18,6 @@ | |||
18 | #include "ath9k.h" | 18 | #include "ath9k.h" |
19 | #include "btcoex.h" | 19 | #include "btcoex.h" |
20 | 20 | ||
21 | static void ath_cache_conf_rate(struct ath_softc *sc, | ||
22 | struct ieee80211_conf *conf) | ||
23 | { | ||
24 | switch (conf->channel->band) { | ||
25 | case IEEE80211_BAND_2GHZ: | ||
26 | if (conf_is_ht20(conf)) | ||
27 | sc->cur_rate_mode = ATH9K_MODE_11NG_HT20; | ||
28 | else if (conf_is_ht40_minus(conf)) | ||
29 | sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS; | ||
30 | else if (conf_is_ht40_plus(conf)) | ||
31 | sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS; | ||
32 | else | ||
33 | sc->cur_rate_mode = ATH9K_MODE_11G; | ||
34 | break; | ||
35 | case IEEE80211_BAND_5GHZ: | ||
36 | if (conf_is_ht20(conf)) | ||
37 | sc->cur_rate_mode = ATH9K_MODE_11NA_HT20; | ||
38 | else if (conf_is_ht40_minus(conf)) | ||
39 | sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS; | ||
40 | else if (conf_is_ht40_plus(conf)) | ||
41 | sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS; | ||
42 | else | ||
43 | sc->cur_rate_mode = ATH9K_MODE_11A; | ||
44 | break; | ||
45 | default: | ||
46 | BUG_ON(1); | ||
47 | break; | ||
48 | } | ||
49 | } | ||
50 | |||
51 | static void ath_update_txpow(struct ath_softc *sc) | 21 | static void ath_update_txpow(struct ath_softc *sc) |
52 | { | 22 | { |
53 | struct ath_hw *ah = sc->sc_ah; | 23 | struct ath_hw *ah = sc->sc_ah; |
@@ -121,6 +91,7 @@ bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode) | |||
121 | 91 | ||
122 | void ath9k_ps_wakeup(struct ath_softc *sc) | 92 | void ath9k_ps_wakeup(struct ath_softc *sc) |
123 | { | 93 | { |
94 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | ||
124 | unsigned long flags; | 95 | unsigned long flags; |
125 | 96 | ||
126 | spin_lock_irqsave(&sc->sc_pm_lock, flags); | 97 | spin_lock_irqsave(&sc->sc_pm_lock, flags); |
@@ -129,18 +100,33 @@ void ath9k_ps_wakeup(struct ath_softc *sc) | |||
129 | 100 | ||
130 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); | 101 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); |
131 | 102 | ||
103 | /* | ||
104 | * While the hardware is asleep, the cycle counters contain no | ||
105 | * useful data. Better clear them now so that they don't mess up | ||
106 | * survey data results. | ||
107 | */ | ||
108 | spin_lock(&common->cc_lock); | ||
109 | ath_hw_cycle_counters_update(common); | ||
110 | memset(&common->cc_survey, 0, sizeof(common->cc_survey)); | ||
111 | spin_unlock(&common->cc_lock); | ||
112 | |||
132 | unlock: | 113 | unlock: |
133 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); | 114 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); |
134 | } | 115 | } |
135 | 116 | ||
136 | void ath9k_ps_restore(struct ath_softc *sc) | 117 | void ath9k_ps_restore(struct ath_softc *sc) |
137 | { | 118 | { |
119 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | ||
138 | unsigned long flags; | 120 | unsigned long flags; |
139 | 121 | ||
140 | spin_lock_irqsave(&sc->sc_pm_lock, flags); | 122 | spin_lock_irqsave(&sc->sc_pm_lock, flags); |
141 | if (--sc->ps_usecount != 0) | 123 | if (--sc->ps_usecount != 0) |
142 | goto unlock; | 124 | goto unlock; |
143 | 125 | ||
126 | spin_lock(&common->cc_lock); | ||
127 | ath_hw_cycle_counters_update(common); | ||
128 | spin_unlock(&common->cc_lock); | ||
129 | |||
144 | if (sc->ps_idle) | 130 | if (sc->ps_idle) |
145 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); | 131 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); |
146 | else if (sc->ps_enabled && | 132 | else if (sc->ps_enabled && |
@@ -175,6 +161,45 @@ static void ath_start_ani(struct ath_common *common) | |||
175 | msecs_to_jiffies((u32)ah->config.ani_poll_interval)); | 161 | msecs_to_jiffies((u32)ah->config.ani_poll_interval)); |
176 | } | 162 | } |
177 | 163 | ||
164 | static void ath_update_survey_nf(struct ath_softc *sc, int channel) | ||
165 | { | ||
166 | struct ath_hw *ah = sc->sc_ah; | ||
167 | struct ath9k_channel *chan = &ah->channels[channel]; | ||
168 | struct survey_info *survey = &sc->survey[channel]; | ||
169 | |||
170 | if (chan->noisefloor) { | ||
171 | survey->filled |= SURVEY_INFO_NOISE_DBM; | ||
172 | survey->noise = chan->noisefloor; | ||
173 | } | ||
174 | } | ||
175 | |||
176 | static void ath_update_survey_stats(struct ath_softc *sc) | ||
177 | { | ||
178 | struct ath_hw *ah = sc->sc_ah; | ||
179 | struct ath_common *common = ath9k_hw_common(ah); | ||
180 | int pos = ah->curchan - &ah->channels[0]; | ||
181 | struct survey_info *survey = &sc->survey[pos]; | ||
182 | struct ath_cycle_counters *cc = &common->cc_survey; | ||
183 | unsigned int div = common->clockrate * 1000; | ||
184 | |||
185 | if (ah->power_mode == ATH9K_PM_AWAKE) | ||
186 | ath_hw_cycle_counters_update(common); | ||
187 | |||
188 | if (cc->cycles > 0) { | ||
189 | survey->filled |= SURVEY_INFO_CHANNEL_TIME | | ||
190 | SURVEY_INFO_CHANNEL_TIME_BUSY | | ||
191 | SURVEY_INFO_CHANNEL_TIME_RX | | ||
192 | SURVEY_INFO_CHANNEL_TIME_TX; | ||
193 | survey->channel_time += cc->cycles / div; | ||
194 | survey->channel_time_busy += cc->rx_busy / div; | ||
195 | survey->channel_time_rx += cc->rx_frame / div; | ||
196 | survey->channel_time_tx += cc->tx_frame / div; | ||
197 | } | ||
198 | memset(cc, 0, sizeof(*cc)); | ||
199 | |||
200 | ath_update_survey_nf(sc, pos); | ||
201 | } | ||
202 | |||
178 | /* | 203 | /* |
179 | * Set/change channels. If the channel is really being changed, it's done | 204 | * Set/change channels. If the channel is really being changed, it's done |
180 | * by reseting the chip. To accomplish this we must first cleanup any pending | 205 | * by reseting the chip. To accomplish this we must first cleanup any pending |
@@ -251,7 +276,6 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
251 | goto ps_restore; | 276 | goto ps_restore; |
252 | } | 277 | } |
253 | 278 | ||
254 | ath_cache_conf_rate(sc, &hw->conf); | ||
255 | ath_update_txpow(sc); | 279 | ath_update_txpow(sc); |
256 | ath9k_hw_set_interrupts(ah, ah->imask); | 280 | ath9k_hw_set_interrupts(ah, ah->imask); |
257 | 281 | ||
@@ -399,6 +423,7 @@ void ath_ani_calibrate(unsigned long data) | |||
399 | bool aniflag = false; | 423 | bool aniflag = false; |
400 | unsigned int timestamp = jiffies_to_msecs(jiffies); | 424 | unsigned int timestamp = jiffies_to_msecs(jiffies); |
401 | u32 cal_interval, short_cal_interval, long_cal_interval; | 425 | u32 cal_interval, short_cal_interval, long_cal_interval; |
426 | unsigned long flags; | ||
402 | 427 | ||
403 | if (ah->caldata && ah->caldata->nfcal_interference) | 428 | if (ah->caldata && ah->caldata->nfcal_interference) |
404 | long_cal_interval = ATH_LONG_CALINTERVAL_INT; | 429 | long_cal_interval = ATH_LONG_CALINTERVAL_INT; |
@@ -449,8 +474,12 @@ void ath_ani_calibrate(unsigned long data) | |||
449 | /* Skip all processing if there's nothing to do. */ | 474 | /* Skip all processing if there's nothing to do. */ |
450 | if (longcal || shortcal || aniflag) { | 475 | if (longcal || shortcal || aniflag) { |
451 | /* Call ANI routine if necessary */ | 476 | /* Call ANI routine if necessary */ |
452 | if (aniflag) | 477 | if (aniflag) { |
478 | spin_lock_irqsave(&common->cc_lock, flags); | ||
453 | ath9k_hw_ani_monitor(ah, ah->curchan); | 479 | ath9k_hw_ani_monitor(ah, ah->curchan); |
480 | ath_update_survey_stats(sc); | ||
481 | spin_unlock_irqrestore(&common->cc_lock, flags); | ||
482 | } | ||
454 | 483 | ||
455 | /* Perform calibration if necessary */ | 484 | /* Perform calibration if necessary */ |
456 | if (longcal || shortcal) { | 485 | if (longcal || shortcal) { |
@@ -635,6 +664,7 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
635 | 664 | ||
636 | struct ath_softc *sc = dev; | 665 | struct ath_softc *sc = dev; |
637 | struct ath_hw *ah = sc->sc_ah; | 666 | struct ath_hw *ah = sc->sc_ah; |
667 | struct ath_common *common = ath9k_hw_common(ah); | ||
638 | enum ath9k_int status; | 668 | enum ath9k_int status; |
639 | bool sched = false; | 669 | bool sched = false; |
640 | 670 | ||
@@ -684,7 +714,12 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
684 | 714 | ||
685 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && | 715 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && |
686 | (status & ATH9K_INT_BB_WATCHDOG)) { | 716 | (status & ATH9K_INT_BB_WATCHDOG)) { |
717 | |||
718 | spin_lock(&common->cc_lock); | ||
719 | ath_hw_cycle_counters_update(common); | ||
687 | ar9003_hw_bb_watchdog_dbg_info(ah); | 720 | ar9003_hw_bb_watchdog_dbg_info(ah); |
721 | spin_unlock(&common->cc_lock); | ||
722 | |||
688 | goto chip_reset; | 723 | goto chip_reset; |
689 | } | 724 | } |
690 | 725 | ||
@@ -713,7 +748,9 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
713 | * it will clear whatever condition caused | 748 | * it will clear whatever condition caused |
714 | * the interrupt. | 749 | * the interrupt. |
715 | */ | 750 | */ |
751 | spin_lock(&common->cc_lock); | ||
716 | ath9k_hw_proc_mib_event(ah); | 752 | ath9k_hw_proc_mib_event(ah); |
753 | spin_unlock(&common->cc_lock); | ||
717 | ath9k_hw_set_interrupts(ah, ah->imask); | 754 | ath9k_hw_set_interrupts(ah, ah->imask); |
718 | } | 755 | } |
719 | 756 | ||
@@ -945,8 +982,6 @@ int ath_reset(struct ath_softc *sc, bool retry_tx) | |||
945 | * that changes the channel so update any state that | 982 | * that changes the channel so update any state that |
946 | * might change as a result. | 983 | * might change as a result. |
947 | */ | 984 | */ |
948 | ath_cache_conf_rate(sc, &hw->conf); | ||
949 | |||
950 | ath_update_txpow(sc); | 985 | ath_update_txpow(sc); |
951 | 986 | ||
952 | if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL))) | 987 | if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL))) |
@@ -1153,8 +1188,6 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1153 | if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) | 1188 | if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) |
1154 | ah->imask |= ATH9K_INT_CST; | 1189 | ah->imask |= ATH9K_INT_CST; |
1155 | 1190 | ||
1156 | ath_cache_conf_rate(sc, &hw->conf); | ||
1157 | |||
1158 | sc->sc_flags &= ~SC_OP_INVALID; | 1191 | sc->sc_flags &= ~SC_OP_INVALID; |
1159 | 1192 | ||
1160 | /* Disable BMISS interrupt when we're not associated */ | 1193 | /* Disable BMISS interrupt when we're not associated */ |
@@ -1522,7 +1555,8 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
1522 | { | 1555 | { |
1523 | struct ath_wiphy *aphy = hw->priv; | 1556 | struct ath_wiphy *aphy = hw->priv; |
1524 | struct ath_softc *sc = aphy->sc; | 1557 | struct ath_softc *sc = aphy->sc; |
1525 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 1558 | struct ath_hw *ah = sc->sc_ah; |
1559 | struct ath_common *common = ath9k_hw_common(ah); | ||
1526 | struct ieee80211_conf *conf = &hw->conf; | 1560 | struct ieee80211_conf *conf = &hw->conf; |
1527 | bool disable_radio; | 1561 | bool disable_radio; |
1528 | 1562 | ||
@@ -1588,6 +1622,11 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
1588 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { | 1622 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
1589 | struct ieee80211_channel *curchan = hw->conf.channel; | 1623 | struct ieee80211_channel *curchan = hw->conf.channel; |
1590 | int pos = curchan->hw_value; | 1624 | int pos = curchan->hw_value; |
1625 | int old_pos = -1; | ||
1626 | unsigned long flags; | ||
1627 | |||
1628 | if (ah->curchan) | ||
1629 | old_pos = ah->curchan - &ah->channels[0]; | ||
1591 | 1630 | ||
1592 | aphy->chan_idx = pos; | 1631 | aphy->chan_idx = pos; |
1593 | aphy->chan_is_ht = conf_is_ht(conf); | 1632 | aphy->chan_is_ht = conf_is_ht(conf); |
@@ -1615,12 +1654,45 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
1615 | 1654 | ||
1616 | ath_update_chainmask(sc, conf_is_ht(conf)); | 1655 | ath_update_chainmask(sc, conf_is_ht(conf)); |
1617 | 1656 | ||
1657 | /* update survey stats for the old channel before switching */ | ||
1658 | spin_lock_irqsave(&common->cc_lock, flags); | ||
1659 | ath_update_survey_stats(sc); | ||
1660 | spin_unlock_irqrestore(&common->cc_lock, flags); | ||
1661 | |||
1662 | /* | ||
1663 | * If the operating channel changes, change the survey in-use flags | ||
1664 | * along with it. | ||
1665 | * Reset the survey data for the new channel, unless we're switching | ||
1666 | * back to the operating channel from an off-channel operation. | ||
1667 | */ | ||
1668 | if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && | ||
1669 | sc->cur_survey != &sc->survey[pos]) { | ||
1670 | |||
1671 | if (sc->cur_survey) | ||
1672 | sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE; | ||
1673 | |||
1674 | sc->cur_survey = &sc->survey[pos]; | ||
1675 | |||
1676 | memset(sc->cur_survey, 0, sizeof(struct survey_info)); | ||
1677 | sc->cur_survey->filled |= SURVEY_INFO_IN_USE; | ||
1678 | } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) { | ||
1679 | memset(&sc->survey[pos], 0, sizeof(struct survey_info)); | ||
1680 | } | ||
1681 | |||
1618 | if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { | 1682 | if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { |
1619 | ath_print(common, ATH_DBG_FATAL, | 1683 | ath_print(common, ATH_DBG_FATAL, |
1620 | "Unable to set channel\n"); | 1684 | "Unable to set channel\n"); |
1621 | mutex_unlock(&sc->mutex); | 1685 | mutex_unlock(&sc->mutex); |
1622 | return -EINVAL; | 1686 | return -EINVAL; |
1623 | } | 1687 | } |
1688 | |||
1689 | /* | ||
1690 | * The most recent snapshot of channel->noisefloor for the old | ||
1691 | * channel is only available after the hardware reset. Copy it to | ||
1692 | * the survey stats now. | ||
1693 | */ | ||
1694 | if (old_pos >= 0) | ||
1695 | ath_update_survey_nf(sc, old_pos); | ||
1624 | } | 1696 | } |
1625 | 1697 | ||
1626 | skip_chan_change: | 1698 | skip_chan_change: |
@@ -1651,6 +1723,7 @@ skip_chan_change: | |||
1651 | FIF_PSPOLL | \ | 1723 | FIF_PSPOLL | \ |
1652 | FIF_OTHER_BSS | \ | 1724 | FIF_OTHER_BSS | \ |
1653 | FIF_BCN_PRBRESP_PROMISC | \ | 1725 | FIF_BCN_PRBRESP_PROMISC | \ |
1726 | FIF_PROBE_REQ | \ | ||
1654 | FIF_FCSFAIL) | 1727 | FIF_FCSFAIL) |
1655 | 1728 | ||
1656 | /* FIXME: sc->sc_full_reset ? */ | 1729 | /* FIXME: sc->sc_full_reset ? */ |
@@ -1990,9 +2063,15 @@ static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, | |||
1990 | { | 2063 | { |
1991 | struct ath_wiphy *aphy = hw->priv; | 2064 | struct ath_wiphy *aphy = hw->priv; |
1992 | struct ath_softc *sc = aphy->sc; | 2065 | struct ath_softc *sc = aphy->sc; |
1993 | struct ath_hw *ah = sc->sc_ah; | 2066 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
1994 | struct ieee80211_supported_band *sband; | 2067 | struct ieee80211_supported_band *sband; |
1995 | struct ath9k_channel *chan; | 2068 | struct ieee80211_channel *chan; |
2069 | unsigned long flags; | ||
2070 | int pos; | ||
2071 | |||
2072 | spin_lock_irqsave(&common->cc_lock, flags); | ||
2073 | if (idx == 0) | ||
2074 | ath_update_survey_stats(sc); | ||
1996 | 2075 | ||
1997 | sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; | 2076 | sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ]; |
1998 | if (sband && idx >= sband->n_channels) { | 2077 | if (sband && idx >= sband->n_channels) { |
@@ -2003,21 +2082,17 @@ static int ath9k_get_survey(struct ieee80211_hw *hw, int idx, | |||
2003 | if (!sband) | 2082 | if (!sband) |
2004 | sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; | 2083 | sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ]; |
2005 | 2084 | ||
2006 | if (!sband || idx >= sband->n_channels) | 2085 | if (!sband || idx >= sband->n_channels) { |
2007 | return -ENOENT; | 2086 | spin_unlock_irqrestore(&common->cc_lock, flags); |
2008 | 2087 | return -ENOENT; | |
2009 | survey->channel = &sband->channels[idx]; | ||
2010 | chan = &ah->channels[survey->channel->hw_value]; | ||
2011 | survey->filled = 0; | ||
2012 | |||
2013 | if (chan == ah->curchan) | ||
2014 | survey->filled |= SURVEY_INFO_IN_USE; | ||
2015 | |||
2016 | if (chan->noisefloor) { | ||
2017 | survey->filled |= SURVEY_INFO_NOISE_DBM; | ||
2018 | survey->noise = chan->noisefloor; | ||
2019 | } | 2088 | } |
2020 | 2089 | ||
2090 | chan = &sband->channels[idx]; | ||
2091 | pos = chan->hw_value; | ||
2092 | memcpy(survey, &sc->survey[pos], sizeof(*survey)); | ||
2093 | survey->channel = chan; | ||
2094 | spin_unlock_irqrestore(&common->cc_lock, flags); | ||
2095 | |||
2021 | return 0; | 2096 | return 0; |
2022 | } | 2097 | } |
2023 | 2098 | ||
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index ce1cd6d85847..0cee90cf8dc9 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -302,7 +302,7 @@ static const struct ath_rate_table ar5416_11ng_ratetable = { | |||
302 | [64] = { RC_INVALID, WLAN_RC_PHY_HT_40_TS, 243000, | 302 | [64] = { RC_INVALID, WLAN_RC_PHY_HT_40_TS, 243000, |
303 | 205100, 20, 20, 8, 64, 65, 65 }, /* 243 Mb */ | 303 | 205100, 20, 20, 8, 64, 65, 65 }, /* 243 Mb */ |
304 | [65] = { RC_INVALID, WLAN_RC_PHY_HT_40_TS_HGI, 270000, | 304 | [65] = { RC_INVALID, WLAN_RC_PHY_HT_40_TS_HGI, 270000, |
305 | 224700, 20, 20, 8, 64, 65, 65 }, /* 170 Mb */ | 305 | 224700, 20, 20, 8, 64, 65, 65 }, /* 270 Mb */ |
306 | [66] = { RC_HT_T_40, WLAN_RC_PHY_HT_40_TS, 324000, | 306 | [66] = { RC_HT_T_40, WLAN_RC_PHY_HT_40_TS, 324000, |
307 | 263100, 21, 21, 8, 66, 67, 67 }, /* 324 Mb */ | 307 | 263100, 21, 21, 8, 66, 67, 67 }, /* 324 Mb */ |
308 | [67] = { RC_HT_T_40, WLAN_RC_PHY_HT_40_TS_HGI, 360000, | 308 | [67] = { RC_HT_T_40, WLAN_RC_PHY_HT_40_TS_HGI, 360000, |
@@ -378,17 +378,6 @@ static const struct ath_rate_table ar5416_11g_ratetable = { | |||
378 | 0, /* Phy rates allowed initially */ | 378 | 0, /* Phy rates allowed initially */ |
379 | }; | 379 | }; |
380 | 380 | ||
381 | static const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX] = { | ||
382 | [ATH9K_MODE_11A] = &ar5416_11a_ratetable, | ||
383 | [ATH9K_MODE_11G] = &ar5416_11g_ratetable, | ||
384 | [ATH9K_MODE_11NA_HT20] = &ar5416_11na_ratetable, | ||
385 | [ATH9K_MODE_11NG_HT20] = &ar5416_11ng_ratetable, | ||
386 | [ATH9K_MODE_11NA_HT40PLUS] = &ar5416_11na_ratetable, | ||
387 | [ATH9K_MODE_11NA_HT40MINUS] = &ar5416_11na_ratetable, | ||
388 | [ATH9K_MODE_11NG_HT40PLUS] = &ar5416_11ng_ratetable, | ||
389 | [ATH9K_MODE_11NG_HT40MINUS] = &ar5416_11ng_ratetable, | ||
390 | }; | ||
391 | |||
392 | static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table, | 381 | static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table, |
393 | struct ieee80211_tx_rate *rate); | 382 | struct ieee80211_tx_rate *rate); |
394 | 383 | ||
@@ -791,7 +780,7 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta, | |||
791 | */ | 780 | */ |
792 | try_per_rate = 4; | 781 | try_per_rate = 4; |
793 | 782 | ||
794 | rate_table = sc->cur_rate_table; | 783 | rate_table = ath_rc_priv->rate_table; |
795 | rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); | 784 | rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); |
796 | 785 | ||
797 | /* | 786 | /* |
@@ -1026,6 +1015,16 @@ static bool ath_rc_update_per(struct ath_softc *sc, | |||
1026 | return state_change; | 1015 | return state_change; |
1027 | } | 1016 | } |
1028 | 1017 | ||
1018 | static void ath_debug_stat_retries(struct ath_rate_priv *rc, int rix, | ||
1019 | int xretries, int retries, u8 per) | ||
1020 | { | ||
1021 | struct ath_rc_stats *stats = &rc->rcstats[rix]; | ||
1022 | |||
1023 | stats->xretries += xretries; | ||
1024 | stats->retries += retries; | ||
1025 | stats->per = per; | ||
1026 | } | ||
1027 | |||
1029 | /* Update PER, RSSI and whatever else that the code thinks it is doing. | 1028 | /* Update PER, RSSI and whatever else that the code thinks it is doing. |
1030 | If you can make sense of all this, you really need to go out more. */ | 1029 | If you can make sense of all this, you really need to go out more. */ |
1031 | 1030 | ||
@@ -1038,7 +1037,7 @@ static void ath_rc_update_ht(struct ath_softc *sc, | |||
1038 | int rate; | 1037 | int rate; |
1039 | u8 last_per; | 1038 | u8 last_per; |
1040 | bool state_change = false; | 1039 | bool state_change = false; |
1041 | const struct ath_rate_table *rate_table = sc->cur_rate_table; | 1040 | const struct ath_rate_table *rate_table = ath_rc_priv->rate_table; |
1042 | int size = ath_rc_priv->rate_table_size; | 1041 | int size = ath_rc_priv->rate_table_size; |
1043 | 1042 | ||
1044 | if ((tx_rate < 0) || (tx_rate > rate_table->rate_cnt)) | 1043 | if ((tx_rate < 0) || (tx_rate > rate_table->rate_cnt)) |
@@ -1098,7 +1097,7 @@ static void ath_rc_update_ht(struct ath_softc *sc, | |||
1098 | ath_rc_priv->per_down_time = now_msec; | 1097 | ath_rc_priv->per_down_time = now_msec; |
1099 | } | 1098 | } |
1100 | 1099 | ||
1101 | ath_debug_stat_retries(sc, tx_rate, xretries, retries, | 1100 | ath_debug_stat_retries(ath_rc_priv, tx_rate, xretries, retries, |
1102 | ath_rc_priv->per[tx_rate]); | 1101 | ath_rc_priv->per[tx_rate]); |
1103 | 1102 | ||
1104 | } | 1103 | } |
@@ -1140,7 +1139,7 @@ static void ath_rc_tx_status(struct ath_softc *sc, | |||
1140 | u8 flags; | 1139 | u8 flags; |
1141 | u32 i = 0, rix; | 1140 | u32 i = 0, rix; |
1142 | 1141 | ||
1143 | rate_table = sc->cur_rate_table; | 1142 | rate_table = ath_rc_priv->rate_table; |
1144 | 1143 | ||
1145 | /* | 1144 | /* |
1146 | * If the first rate is not the final index, there | 1145 | * If the first rate is not the final index, there |
@@ -1190,39 +1189,23 @@ static void ath_rc_tx_status(struct ath_softc *sc, | |||
1190 | static const | 1189 | static const |
1191 | struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc, | 1190 | struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc, |
1192 | enum ieee80211_band band, | 1191 | enum ieee80211_band band, |
1193 | bool is_ht, | 1192 | bool is_ht) |
1194 | bool is_cw_40) | ||
1195 | { | 1193 | { |
1196 | int mode = 0; | ||
1197 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 1194 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
1198 | 1195 | ||
1199 | switch(band) { | 1196 | switch(band) { |
1200 | case IEEE80211_BAND_2GHZ: | 1197 | case IEEE80211_BAND_2GHZ: |
1201 | mode = ATH9K_MODE_11G; | ||
1202 | if (is_ht) | 1198 | if (is_ht) |
1203 | mode = ATH9K_MODE_11NG_HT20; | 1199 | return &ar5416_11ng_ratetable; |
1204 | if (is_cw_40) | 1200 | return &ar5416_11g_ratetable; |
1205 | mode = ATH9K_MODE_11NG_HT40PLUS; | ||
1206 | break; | ||
1207 | case IEEE80211_BAND_5GHZ: | 1201 | case IEEE80211_BAND_5GHZ: |
1208 | mode = ATH9K_MODE_11A; | ||
1209 | if (is_ht) | 1202 | if (is_ht) |
1210 | mode = ATH9K_MODE_11NA_HT20; | 1203 | return &ar5416_11na_ratetable; |
1211 | if (is_cw_40) | 1204 | return &ar5416_11a_ratetable; |
1212 | mode = ATH9K_MODE_11NA_HT40PLUS; | ||
1213 | break; | ||
1214 | default: | 1205 | default: |
1215 | ath_print(common, ATH_DBG_CONFIG, "Invalid band\n"); | 1206 | ath_print(common, ATH_DBG_CONFIG, "Invalid band\n"); |
1216 | return NULL; | 1207 | return NULL; |
1217 | } | 1208 | } |
1218 | |||
1219 | BUG_ON(mode >= ATH9K_MODE_MAX); | ||
1220 | |||
1221 | ath_print(common, ATH_DBG_CONFIG, | ||
1222 | "Choosing rate table for mode: %d\n", mode); | ||
1223 | |||
1224 | sc->cur_rate_mode = mode; | ||
1225 | return hw_rate_table[mode]; | ||
1226 | } | 1209 | } |
1227 | 1210 | ||
1228 | static void ath_rc_init(struct ath_softc *sc, | 1211 | static void ath_rc_init(struct ath_softc *sc, |
@@ -1293,7 +1276,7 @@ static void ath_rc_init(struct ath_softc *sc, | |||
1293 | ath_rc_priv->max_valid_rate = k; | 1276 | ath_rc_priv->max_valid_rate = k; |
1294 | ath_rc_sort_validrates(rate_table, ath_rc_priv); | 1277 | ath_rc_sort_validrates(rate_table, ath_rc_priv); |
1295 | ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; | 1278 | ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; |
1296 | sc->cur_rate_table = rate_table; | 1279 | ath_rc_priv->rate_table = rate_table; |
1297 | 1280 | ||
1298 | ath_print(common, ATH_DBG_CONFIG, | 1281 | ath_print(common, ATH_DBG_CONFIG, |
1299 | "RC Initialized with capabilities: 0x%x\n", | 1282 | "RC Initialized with capabilities: 0x%x\n", |
@@ -1340,6 +1323,15 @@ static bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, | |||
1340 | /* mac80211 Rate Control callbacks */ | 1323 | /* mac80211 Rate Control callbacks */ |
1341 | /***********************************/ | 1324 | /***********************************/ |
1342 | 1325 | ||
1326 | static void ath_debug_stat_rc(struct ath_rate_priv *rc, int final_rate) | ||
1327 | { | ||
1328 | struct ath_rc_stats *stats; | ||
1329 | |||
1330 | stats = &rc->rcstats[final_rate]; | ||
1331 | stats->success++; | ||
1332 | } | ||
1333 | |||
1334 | |||
1343 | static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband, | 1335 | static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband, |
1344 | struct ieee80211_sta *sta, void *priv_sta, | 1336 | struct ieee80211_sta *sta, void *priv_sta, |
1345 | struct sk_buff *skb) | 1337 | struct sk_buff *skb) |
@@ -1375,6 +1367,12 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband, | |||
1375 | if (tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) | 1367 | if (tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) |
1376 | return; | 1368 | return; |
1377 | 1369 | ||
1370 | if (!(tx_info->flags & IEEE80211_TX_STAT_AMPDU)) { | ||
1371 | tx_info->status.ampdu_ack_len = | ||
1372 | (tx_info->flags & IEEE80211_TX_STAT_ACK ? 1 : 0); | ||
1373 | tx_info->status.ampdu_len = 1; | ||
1374 | } | ||
1375 | |||
1378 | /* | 1376 | /* |
1379 | * If an underrun error is seen assume it as an excessive retry only | 1377 | * If an underrun error is seen assume it as an excessive retry only |
1380 | * if max frame trigger level has been reached (2 KB for singel stream, | 1378 | * if max frame trigger level has been reached (2 KB for singel stream, |
@@ -1413,8 +1411,9 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband, | |||
1413 | } | 1411 | } |
1414 | } | 1412 | } |
1415 | 1413 | ||
1416 | ath_debug_stat_rc(sc, ath_rc_get_rateindex(sc->cur_rate_table, | 1414 | ath_debug_stat_rc(ath_rc_priv, |
1417 | &tx_info->status.rates[final_ts_idx])); | 1415 | ath_rc_get_rateindex(ath_rc_priv->rate_table, |
1416 | &tx_info->status.rates[final_ts_idx])); | ||
1418 | } | 1417 | } |
1419 | 1418 | ||
1420 | static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, | 1419 | static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, |
@@ -1454,14 +1453,8 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, | |||
1454 | 1453 | ||
1455 | /* Choose rate table first */ | 1454 | /* Choose rate table first */ |
1456 | 1455 | ||
1457 | if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) || | 1456 | rate_table = ath_choose_rate_table(sc, sband->band, |
1458 | (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT) || | 1457 | sta->ht_cap.ht_supported); |
1459 | (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)) { | ||
1460 | rate_table = ath_choose_rate_table(sc, sband->band, | ||
1461 | sta->ht_cap.ht_supported, is_cw40); | ||
1462 | } else { | ||
1463 | rate_table = hw_rate_table[sc->cur_rate_mode]; | ||
1464 | } | ||
1465 | 1458 | ||
1466 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi); | 1459 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi); |
1467 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); | 1460 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); |
@@ -1501,8 +1494,7 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, | |||
1501 | 1494 | ||
1502 | if ((local_cw40 != oper_cw40) || (local_sgi != oper_sgi)) { | 1495 | if ((local_cw40 != oper_cw40) || (local_sgi != oper_sgi)) { |
1503 | rate_table = ath_choose_rate_table(sc, sband->band, | 1496 | rate_table = ath_choose_rate_table(sc, sband->band, |
1504 | sta->ht_cap.ht_supported, | 1497 | sta->ht_cap.ht_supported); |
1505 | oper_cw40); | ||
1506 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, | 1498 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, |
1507 | oper_cw40, oper_sgi); | 1499 | oper_cw40, oper_sgi); |
1508 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); | 1500 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); |
@@ -1510,11 +1502,98 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, | |||
1510 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, | 1502 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, |
1511 | "Operating HT Bandwidth changed to: %d\n", | 1503 | "Operating HT Bandwidth changed to: %d\n", |
1512 | sc->hw->conf.channel_type); | 1504 | sc->hw->conf.channel_type); |
1513 | sc->cur_rate_table = hw_rate_table[sc->cur_rate_mode]; | ||
1514 | } | 1505 | } |
1515 | } | 1506 | } |
1516 | } | 1507 | } |
1517 | 1508 | ||
1509 | #ifdef CONFIG_ATH9K_DEBUGFS | ||
1510 | |||
1511 | static int ath9k_debugfs_open(struct inode *inode, struct file *file) | ||
1512 | { | ||
1513 | file->private_data = inode->i_private; | ||
1514 | return 0; | ||
1515 | } | ||
1516 | |||
1517 | static ssize_t read_file_rcstat(struct file *file, char __user *user_buf, | ||
1518 | size_t count, loff_t *ppos) | ||
1519 | { | ||
1520 | struct ath_rate_priv *rc = file->private_data; | ||
1521 | char *buf; | ||
1522 | unsigned int len = 0, max; | ||
1523 | int i = 0; | ||
1524 | ssize_t retval; | ||
1525 | |||
1526 | if (rc->rate_table == NULL) | ||
1527 | return 0; | ||
1528 | |||
1529 | max = 80 + rc->rate_table->rate_cnt * 1024 + 1; | ||
1530 | buf = kmalloc(max, GFP_KERNEL); | ||
1531 | if (buf == NULL) | ||
1532 | return -ENOMEM; | ||
1533 | |||
1534 | len += sprintf(buf, "%6s %6s %6s " | ||
1535 | "%10s %10s %10s %10s\n", | ||
1536 | "HT", "MCS", "Rate", | ||
1537 | "Success", "Retries", "XRetries", "PER"); | ||
1538 | |||
1539 | for (i = 0; i < rc->rate_table->rate_cnt; i++) { | ||
1540 | u32 ratekbps = rc->rate_table->info[i].ratekbps; | ||
1541 | struct ath_rc_stats *stats = &rc->rcstats[i]; | ||
1542 | char mcs[5]; | ||
1543 | char htmode[5]; | ||
1544 | int used_mcs = 0, used_htmode = 0; | ||
1545 | |||
1546 | if (WLAN_RC_PHY_HT(rc->rate_table->info[i].phy)) { | ||
1547 | used_mcs = snprintf(mcs, 5, "%d", | ||
1548 | rc->rate_table->info[i].ratecode); | ||
1549 | |||
1550 | if (WLAN_RC_PHY_40(rc->rate_table->info[i].phy)) | ||
1551 | used_htmode = snprintf(htmode, 5, "HT40"); | ||
1552 | else if (WLAN_RC_PHY_20(rc->rate_table->info[i].phy)) | ||
1553 | used_htmode = snprintf(htmode, 5, "HT20"); | ||
1554 | else | ||
1555 | used_htmode = snprintf(htmode, 5, "????"); | ||
1556 | } | ||
1557 | |||
1558 | mcs[used_mcs] = '\0'; | ||
1559 | htmode[used_htmode] = '\0'; | ||
1560 | |||
1561 | len += snprintf(buf + len, max - len, | ||
1562 | "%6s %6s %3u.%d: " | ||
1563 | "%10u %10u %10u %10u\n", | ||
1564 | htmode, | ||
1565 | mcs, | ||
1566 | ratekbps / 1000, | ||
1567 | (ratekbps % 1000) / 100, | ||
1568 | stats->success, | ||
1569 | stats->retries, | ||
1570 | stats->xretries, | ||
1571 | stats->per); | ||
1572 | } | ||
1573 | |||
1574 | if (len > max) | ||
1575 | len = max; | ||
1576 | |||
1577 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | ||
1578 | kfree(buf); | ||
1579 | return retval; | ||
1580 | } | ||
1581 | |||
1582 | static const struct file_operations fops_rcstat = { | ||
1583 | .read = read_file_rcstat, | ||
1584 | .open = ath9k_debugfs_open, | ||
1585 | .owner = THIS_MODULE | ||
1586 | }; | ||
1587 | |||
1588 | static void ath_rate_add_sta_debugfs(void *priv, void *priv_sta, | ||
1589 | struct dentry *dir) | ||
1590 | { | ||
1591 | struct ath_rate_priv *rc = priv_sta; | ||
1592 | debugfs_create_file("rc_stats", S_IRUGO, dir, rc, &fops_rcstat); | ||
1593 | } | ||
1594 | |||
1595 | #endif /* CONFIG_ATH9K_DEBUGFS */ | ||
1596 | |||
1518 | static void *ath_rate_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | 1597 | static void *ath_rate_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) |
1519 | { | 1598 | { |
1520 | struct ath_wiphy *aphy = hw->priv; | 1599 | struct ath_wiphy *aphy = hw->priv; |
@@ -1561,6 +1640,9 @@ static struct rate_control_ops ath_rate_ops = { | |||
1561 | .free = ath_rate_free, | 1640 | .free = ath_rate_free, |
1562 | .alloc_sta = ath_rate_alloc_sta, | 1641 | .alloc_sta = ath_rate_alloc_sta, |
1563 | .free_sta = ath_rate_free_sta, | 1642 | .free_sta = ath_rate_free_sta, |
1643 | #ifdef CONFIG_ATH9K_DEBUGFS | ||
1644 | .add_sta_debugfs = ath_rate_add_sta_debugfs, | ||
1645 | #endif | ||
1564 | }; | 1646 | }; |
1565 | 1647 | ||
1566 | int ath_rate_control_register(void) | 1648 | int ath_rate_control_register(void) |
diff --git a/drivers/net/wireless/ath/ath9k/rc.h b/drivers/net/wireless/ath/ath9k/rc.h index 268072fd3c1c..2f46a2266ba1 100644 --- a/drivers/net/wireless/ath/ath9k/rc.h +++ b/drivers/net/wireless/ath/ath9k/rc.h | |||
@@ -135,20 +135,21 @@ enum { | |||
135 | 135 | ||
136 | /** | 136 | /** |
137 | * struct ath_rate_table - Rate Control table | 137 | * struct ath_rate_table - Rate Control table |
138 | * @valid: valid for use in rate control | 138 | * @rate_cnt: total number of rates for the given wireless mode |
139 | * @valid_single_stream: valid for use in rate control for | 139 | * @mcs_start: MCS rate index offset |
140 | * single stream operation | 140 | * @rate_flags: Rate Control flags |
141 | * @phy: CCK/OFDM | 141 | * @phy: CCK/OFDM/HT20/HT40 |
142 | * @ratekbps: rate in Kbits per second | 142 | * @ratekbps: rate in Kbits per second |
143 | * @user_ratekbps: user rate in Kbits per second | 143 | * @user_ratekbps: user rate in Kbits per second |
144 | * @ratecode: rate that goes into HW descriptors | 144 | * @ratecode: rate that goes into HW descriptors |
145 | * @short_preamble: Mask for enabling short preamble in ratecode for CCK | ||
146 | * @dot11rate: value that goes into supported | 145 | * @dot11rate: value that goes into supported |
147 | * rates info element of MLME | 146 | * rates info element of MLME |
148 | * @ctrl_rate: Index of next lower basic rate, used for duration computation | 147 | * @ctrl_rate: Index of next lower basic rate, used for duration computation |
149 | * @max_4ms_framelen: maximum frame length(bytes) for tx duration | 148 | * @cw40index: Index of rates having 40MHz channel width |
149 | * @sgi_index: Index of rates having Short Guard Interval | ||
150 | * @ht_index: high throughput rates having 40MHz channel width and | ||
151 | * Short Guard Interval | ||
150 | * @probe_interval: interval for rate control to probe for other rates | 152 | * @probe_interval: interval for rate control to probe for other rates |
151 | * @rssi_reduce_interval: interval for rate control to reduce rssi | ||
152 | * @initial_ratemax: initial ratemax value | 153 | * @initial_ratemax: initial ratemax value |
153 | */ | 154 | */ |
154 | struct ath_rate_table { | 155 | struct ath_rate_table { |
@@ -175,6 +176,13 @@ struct ath_rateset { | |||
175 | u8 rs_rates[ATH_RATE_MAX]; | 176 | u8 rs_rates[ATH_RATE_MAX]; |
176 | }; | 177 | }; |
177 | 178 | ||
179 | struct ath_rc_stats { | ||
180 | u32 success; | ||
181 | u32 retries; | ||
182 | u32 xretries; | ||
183 | u8 per; | ||
184 | }; | ||
185 | |||
178 | /** | 186 | /** |
179 | * struct ath_rate_priv - Rate Control priv data | 187 | * struct ath_rate_priv - Rate Control priv data |
180 | * @state: RC state | 188 | * @state: RC state |
@@ -211,6 +219,10 @@ struct ath_rate_priv { | |||
211 | struct ath_rateset neg_rates; | 219 | struct ath_rateset neg_rates; |
212 | struct ath_rateset neg_ht_rates; | 220 | struct ath_rateset neg_ht_rates; |
213 | struct ath_rate_softc *asc; | 221 | struct ath_rate_softc *asc; |
222 | const struct ath_rate_table *rate_table; | ||
223 | |||
224 | struct dentry *debugfs_rcstats; | ||
225 | struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; | ||
214 | }; | 226 | }; |
215 | 227 | ||
216 | #define ATH_TX_INFO_FRAME_TYPE_INTERNAL (1 << 0) | 228 | #define ATH_TX_INFO_FRAME_TYPE_INTERNAL (1 << 0) |
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c index 9c166f3804ab..fe73fc50082a 100644 --- a/drivers/net/wireless/ath/ath9k/recv.c +++ b/drivers/net/wireless/ath/ath9k/recv.c | |||
@@ -268,6 +268,7 @@ static int ath_rx_edma_init(struct ath_softc *sc, int nbufs) | |||
268 | bf->bf_buf_addr))) { | 268 | bf->bf_buf_addr))) { |
269 | dev_kfree_skb_any(skb); | 269 | dev_kfree_skb_any(skb); |
270 | bf->bf_mpdu = NULL; | 270 | bf->bf_mpdu = NULL; |
271 | bf->bf_buf_addr = 0; | ||
271 | ath_print(common, ATH_DBG_FATAL, | 272 | ath_print(common, ATH_DBG_FATAL, |
272 | "dma_mapping_error() on RX init\n"); | 273 | "dma_mapping_error() on RX init\n"); |
273 | error = -ENOMEM; | 274 | error = -ENOMEM; |
@@ -358,12 +359,12 @@ int ath_rx_init(struct ath_softc *sc, int nbufs) | |||
358 | bf->bf_buf_addr))) { | 359 | bf->bf_buf_addr))) { |
359 | dev_kfree_skb_any(skb); | 360 | dev_kfree_skb_any(skb); |
360 | bf->bf_mpdu = NULL; | 361 | bf->bf_mpdu = NULL; |
362 | bf->bf_buf_addr = 0; | ||
361 | ath_print(common, ATH_DBG_FATAL, | 363 | ath_print(common, ATH_DBG_FATAL, |
362 | "dma_mapping_error() on RX init\n"); | 364 | "dma_mapping_error() on RX init\n"); |
363 | error = -ENOMEM; | 365 | error = -ENOMEM; |
364 | goto err; | 366 | goto err; |
365 | } | 367 | } |
366 | bf->bf_dmacontext = bf->bf_buf_addr; | ||
367 | } | 368 | } |
368 | sc->rx.rxlink = NULL; | 369 | sc->rx.rxlink = NULL; |
369 | } | 370 | } |
@@ -393,6 +394,8 @@ void ath_rx_cleanup(struct ath_softc *sc) | |||
393 | common->rx_bufsize, | 394 | common->rx_bufsize, |
394 | DMA_FROM_DEVICE); | 395 | DMA_FROM_DEVICE); |
395 | dev_kfree_skb(skb); | 396 | dev_kfree_skb(skb); |
397 | bf->bf_buf_addr = 0; | ||
398 | bf->bf_mpdu = NULL; | ||
396 | } | 399 | } |
397 | } | 400 | } |
398 | 401 | ||
@@ -430,8 +433,7 @@ u32 ath_calcrxfilter(struct ath_softc *sc) | |||
430 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST | 433 | | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST |
431 | | ATH9K_RX_FILTER_MCAST; | 434 | | ATH9K_RX_FILTER_MCAST; |
432 | 435 | ||
433 | /* If not a STA, enable processing of Probe Requests */ | 436 | if (sc->rx.rxfilter & FIF_PROBE_REQ) |
434 | if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) | ||
435 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; | 437 | rfilt |= ATH9K_RX_FILTER_PROBEREQ; |
436 | 438 | ||
437 | /* | 439 | /* |
@@ -1735,12 +1737,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) | |||
1735 | bf->bf_buf_addr))) { | 1737 | bf->bf_buf_addr))) { |
1736 | dev_kfree_skb_any(requeue_skb); | 1738 | dev_kfree_skb_any(requeue_skb); |
1737 | bf->bf_mpdu = NULL; | 1739 | bf->bf_mpdu = NULL; |
1740 | bf->bf_buf_addr = 0; | ||
1738 | ath_print(common, ATH_DBG_FATAL, | 1741 | ath_print(common, ATH_DBG_FATAL, |
1739 | "dma_mapping_error() on RX\n"); | 1742 | "dma_mapping_error() on RX\n"); |
1740 | ath_rx_send_to_mac80211(hw, sc, skb, rxs); | 1743 | ath_rx_send_to_mac80211(hw, sc, skb, rxs); |
1741 | break; | 1744 | break; |
1742 | } | 1745 | } |
1743 | bf->bf_dmacontext = bf->bf_buf_addr; | ||
1744 | 1746 | ||
1745 | /* | 1747 | /* |
1746 | * change the default rx antenna if rx diversity chooses the | 1748 | * change the default rx antenna if rx diversity chooses the |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 6d01e501b9b4..42976b0a01c1 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -107,12 +107,6 @@ | |||
107 | #define AR_RXCFG_DMASZ_256B 6 | 107 | #define AR_RXCFG_DMASZ_256B 6 |
108 | #define AR_RXCFG_DMASZ_512B 7 | 108 | #define AR_RXCFG_DMASZ_512B 7 |
109 | 109 | ||
110 | #define AR_MIBC 0x0040 | ||
111 | #define AR_MIBC_COW 0x00000001 | ||
112 | #define AR_MIBC_FMC 0x00000002 | ||
113 | #define AR_MIBC_CMC 0x00000004 | ||
114 | #define AR_MIBC_MCS 0x00000008 | ||
115 | |||
116 | #define AR_TOPS 0x0044 | 110 | #define AR_TOPS 0x0044 |
117 | #define AR_TOPS_MASK 0x0000FFFF | 111 | #define AR_TOPS_MASK 0x0000FFFF |
118 | 112 | ||
@@ -859,9 +853,6 @@ | |||
859 | 853 | ||
860 | #define AR_SREV_9300(_ah) \ | 854 | #define AR_SREV_9300(_ah) \ |
861 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300)) | 855 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300)) |
862 | #define AR_SREV_9300_20(_ah) \ | ||
863 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300) && \ | ||
864 | ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_20)) | ||
865 | #define AR_SREV_9300_20_OR_LATER(_ah) \ | 856 | #define AR_SREV_9300_20_OR_LATER(_ah) \ |
866 | (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9300) || \ | 857 | (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9300) || \ |
867 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300) && \ | 858 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300) && \ |
@@ -1524,11 +1515,6 @@ enum { | |||
1524 | #define AR_TPC_CHIRP 0x003f0000 | 1515 | #define AR_TPC_CHIRP 0x003f0000 |
1525 | #define AR_TPC_CHIRP_S 0x16 | 1516 | #define AR_TPC_CHIRP_S 0x16 |
1526 | 1517 | ||
1527 | #define AR_TFCNT 0x80ec | ||
1528 | #define AR_RFCNT 0x80f0 | ||
1529 | #define AR_RCCNT 0x80f4 | ||
1530 | #define AR_CCCNT 0x80f8 | ||
1531 | |||
1532 | #define AR_QUIET1 0x80fc | 1518 | #define AR_QUIET1 0x80fc |
1533 | #define AR_QUIET1_NEXT_QUIET_S 0 | 1519 | #define AR_QUIET1_NEXT_QUIET_S 0 |
1534 | #define AR_QUIET1_NEXT_QUIET_M 0x0000ffff | 1520 | #define AR_QUIET1_NEXT_QUIET_M 0x0000ffff |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index aa447770eb2b..d077186da870 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -294,7 +294,6 @@ static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf) | |||
294 | tbf->bf_buf_addr = bf->bf_buf_addr; | 294 | tbf->bf_buf_addr = bf->bf_buf_addr; |
295 | memcpy(tbf->bf_desc, bf->bf_desc, sc->sc_ah->caps.tx_desc_len); | 295 | memcpy(tbf->bf_desc, bf->bf_desc, sc->sc_ah->caps.tx_desc_len); |
296 | tbf->bf_state = bf->bf_state; | 296 | tbf->bf_state = bf->bf_state; |
297 | tbf->bf_dmacontext = bf->bf_dmacontext; | ||
298 | 297 | ||
299 | return tbf; | 298 | return tbf; |
300 | } | 299 | } |
@@ -317,6 +316,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
317 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; | 316 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; |
318 | bool rc_update = true; | 317 | bool rc_update = true; |
319 | struct ieee80211_tx_rate rates[4]; | 318 | struct ieee80211_tx_rate rates[4]; |
319 | int nframes; | ||
320 | 320 | ||
321 | skb = bf->bf_mpdu; | 321 | skb = bf->bf_mpdu; |
322 | hdr = (struct ieee80211_hdr *)skb->data; | 322 | hdr = (struct ieee80211_hdr *)skb->data; |
@@ -325,6 +325,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
325 | hw = bf->aphy->hw; | 325 | hw = bf->aphy->hw; |
326 | 326 | ||
327 | memcpy(rates, tx_info->control.rates, sizeof(rates)); | 327 | memcpy(rates, tx_info->control.rates, sizeof(rates)); |
328 | nframes = bf->bf_nframes; | ||
328 | 329 | ||
329 | rcu_read_lock(); | 330 | rcu_read_lock(); |
330 | 331 | ||
@@ -341,7 +342,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
341 | !bf->bf_stale || bf_next != NULL) | 342 | !bf->bf_stale || bf_next != NULL) |
342 | list_move_tail(&bf->list, &bf_head); | 343 | list_move_tail(&bf->list, &bf_head); |
343 | 344 | ||
344 | ath_tx_rc_status(bf, ts, 0, 0, false); | 345 | ath_tx_rc_status(bf, ts, 1, 0, false); |
345 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, | 346 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, |
346 | 0, 0); | 347 | 0, 0); |
347 | 348 | ||
@@ -446,6 +447,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
446 | 447 | ||
447 | if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) { | 448 | if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) { |
448 | memcpy(tx_info->control.rates, rates, sizeof(rates)); | 449 | memcpy(tx_info->control.rates, rates, sizeof(rates)); |
450 | bf->bf_nframes = nframes; | ||
449 | ath_tx_rc_status(bf, ts, nbad, txok, true); | 451 | ath_tx_rc_status(bf, ts, nbad, txok, true); |
450 | rc_update = false; | 452 | rc_update = false; |
451 | } else { | 453 | } else { |
@@ -1637,17 +1639,16 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf, | |||
1637 | 1639 | ||
1638 | bf->bf_mpdu = skb; | 1640 | bf->bf_mpdu = skb; |
1639 | 1641 | ||
1640 | bf->bf_dmacontext = dma_map_single(sc->dev, skb->data, | 1642 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
1641 | skb->len, DMA_TO_DEVICE); | 1643 | skb->len, DMA_TO_DEVICE); |
1642 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_dmacontext))) { | 1644 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
1643 | bf->bf_mpdu = NULL; | 1645 | bf->bf_mpdu = NULL; |
1646 | bf->bf_buf_addr = 0; | ||
1644 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, | 1647 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, |
1645 | "dma_mapping_error() on TX\n"); | 1648 | "dma_mapping_error() on TX\n"); |
1646 | return -ENOMEM; | 1649 | return -ENOMEM; |
1647 | } | 1650 | } |
1648 | 1651 | ||
1649 | bf->bf_buf_addr = bf->bf_dmacontext; | ||
1650 | |||
1651 | bf->bf_tx_aborted = false; | 1652 | bf->bf_tx_aborted = false; |
1652 | 1653 | ||
1653 | return 0; | 1654 | return 0; |
@@ -1911,7 +1912,8 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | |||
1911 | tx_flags |= ATH_TX_XRETRY; | 1912 | tx_flags |= ATH_TX_XRETRY; |
1912 | } | 1913 | } |
1913 | 1914 | ||
1914 | dma_unmap_single(sc->dev, bf->bf_dmacontext, skb->len, DMA_TO_DEVICE); | 1915 | dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE); |
1916 | bf->bf_buf_addr = 0; | ||
1915 | 1917 | ||
1916 | if (bf->bf_state.bfs_paprd) { | 1918 | if (bf->bf_state.bfs_paprd) { |
1917 | if (time_after(jiffies, | 1919 | if (time_after(jiffies, |
@@ -1921,9 +1923,13 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | |||
1921 | else | 1923 | else |
1922 | complete(&sc->paprd_complete); | 1924 | complete(&sc->paprd_complete); |
1923 | } else { | 1925 | } else { |
1924 | ath_tx_complete(sc, skb, bf->aphy, tx_flags); | ||
1925 | ath_debug_stat_tx(sc, txq, bf, ts); | 1926 | ath_debug_stat_tx(sc, txq, bf, ts); |
1927 | ath_tx_complete(sc, skb, bf->aphy, tx_flags); | ||
1926 | } | 1928 | } |
1929 | /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't | ||
1930 | * accidentally reference it later. | ||
1931 | */ | ||
1932 | bf->bf_mpdu = NULL; | ||
1927 | 1933 | ||
1928 | /* | 1934 | /* |
1929 | * Return the list of ath_buf of this mpdu to free queue | 1935 | * Return the list of ath_buf of this mpdu to free queue |
@@ -1979,9 +1985,15 @@ static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, | |||
1979 | 1985 | ||
1980 | if (ts->ts_status & ATH9K_TXERR_FILT) | 1986 | if (ts->ts_status & ATH9K_TXERR_FILT) |
1981 | tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; | 1987 | tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; |
1982 | if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) | 1988 | if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) { |
1983 | tx_info->flags |= IEEE80211_TX_STAT_AMPDU; | 1989 | tx_info->flags |= IEEE80211_TX_STAT_AMPDU; |
1984 | 1990 | ||
1991 | BUG_ON(nbad > bf->bf_nframes); | ||
1992 | |||
1993 | tx_info->status.ampdu_len = bf->bf_nframes; | ||
1994 | tx_info->status.ampdu_ack_len = bf->bf_nframes - nbad; | ||
1995 | } | ||
1996 | |||
1985 | if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && | 1997 | if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && |
1986 | (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { | 1998 | (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { |
1987 | if (ieee80211_is_data(hdr->frame_control)) { | 1999 | if (ieee80211_is_data(hdr->frame_control)) { |
@@ -1991,8 +2003,6 @@ static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, | |||
1991 | if ((ts->ts_status & ATH9K_TXERR_XRETRY) || | 2003 | if ((ts->ts_status & ATH9K_TXERR_XRETRY) || |
1992 | (ts->ts_status & ATH9K_TXERR_FIFO)) | 2004 | (ts->ts_status & ATH9K_TXERR_FIFO)) |
1993 | tx_info->pad[0] |= ATH_TX_INFO_XRETRY; | 2005 | tx_info->pad[0] |= ATH_TX_INFO_XRETRY; |
1994 | tx_info->status.ampdu_len = bf->bf_nframes; | ||
1995 | tx_info->status.ampdu_ack_len = bf->bf_nframes - nbad; | ||
1996 | } | 2006 | } |
1997 | } | 2007 | } |
1998 | 2008 | ||
@@ -2102,7 +2112,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
2102 | */ | 2112 | */ |
2103 | if (ts.ts_status & ATH9K_TXERR_XRETRY) | 2113 | if (ts.ts_status & ATH9K_TXERR_XRETRY) |
2104 | bf->bf_state.bf_type |= BUF_XRETRY; | 2114 | bf->bf_state.bf_type |= BUF_XRETRY; |
2105 | ath_tx_rc_status(bf, &ts, 0, txok, true); | 2115 | ath_tx_rc_status(bf, &ts, txok ? 0 : 1, txok, true); |
2106 | } | 2116 | } |
2107 | 2117 | ||
2108 | if (bf_isampdu(bf)) | 2118 | if (bf_isampdu(bf)) |
@@ -2220,7 +2230,7 @@ void ath_tx_edma_tasklet(struct ath_softc *sc) | |||
2220 | if (!bf_isampdu(bf)) { | 2230 | if (!bf_isampdu(bf)) { |
2221 | if (txs.ts_status & ATH9K_TXERR_XRETRY) | 2231 | if (txs.ts_status & ATH9K_TXERR_XRETRY) |
2222 | bf->bf_state.bf_type |= BUF_XRETRY; | 2232 | bf->bf_state.bf_type |= BUF_XRETRY; |
2223 | ath_tx_rc_status(bf, &txs, 0, txok, true); | 2233 | ath_tx_rc_status(bf, &txs, txok ? 0 : 1, txok, true); |
2224 | } | 2234 | } |
2225 | 2235 | ||
2226 | if (bf_isampdu(bf)) | 2236 | if (bf_isampdu(bf)) |
diff --git a/drivers/net/wireless/ath/carl9170/rx.c b/drivers/net/wireless/ath/carl9170/rx.c index 671dbc429547..939a0e96ed1f 100644 --- a/drivers/net/wireless/ath/carl9170/rx.c +++ b/drivers/net/wireless/ath/carl9170/rx.c | |||
@@ -576,6 +576,41 @@ static void carl9170_ps_beacon(struct ar9170 *ar, void *data, unsigned int len) | |||
576 | } | 576 | } |
577 | } | 577 | } |
578 | 578 | ||
579 | static bool carl9170_ampdu_check(struct ar9170 *ar, u8 *buf, u8 ms) | ||
580 | { | ||
581 | __le16 fc; | ||
582 | |||
583 | if ((ms & AR9170_RX_STATUS_MPDU) == AR9170_RX_STATUS_MPDU_SINGLE) { | ||
584 | /* | ||
585 | * This frame is not part of an aMPDU. | ||
586 | * Therefore it is not subjected to any | ||
587 | * of the following content restrictions. | ||
588 | */ | ||
589 | return true; | ||
590 | } | ||
591 | |||
592 | /* | ||
593 | * "802.11n - 7.4a.3 A-MPDU contents" describes in which contexts | ||
594 | * certain frame types can be part of an aMPDU. | ||
595 | * | ||
596 | * In order to keep the processing cost down, I opted for a | ||
597 | * stateless filter solely based on the frame control field. | ||
598 | */ | ||
599 | |||
600 | fc = ((struct ieee80211_hdr *)buf)->frame_control; | ||
601 | if (ieee80211_is_data_qos(fc) && ieee80211_is_data_present(fc)) | ||
602 | return true; | ||
603 | |||
604 | if (ieee80211_is_ack(fc) || ieee80211_is_back(fc) || | ||
605 | ieee80211_is_back_req(fc)) | ||
606 | return true; | ||
607 | |||
608 | if (ieee80211_is_action(fc)) | ||
609 | return true; | ||
610 | |||
611 | return false; | ||
612 | } | ||
613 | |||
579 | /* | 614 | /* |
580 | * If the frame alignment is right (or the kernel has | 615 | * If the frame alignment is right (or the kernel has |
581 | * CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS), and there | 616 | * CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS), and there |
@@ -594,24 +629,19 @@ static void carl9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len) | |||
594 | struct ieee80211_rx_status status; | 629 | struct ieee80211_rx_status status; |
595 | struct sk_buff *skb; | 630 | struct sk_buff *skb; |
596 | int mpdu_len; | 631 | int mpdu_len; |
632 | u8 mac_status; | ||
597 | 633 | ||
598 | if (!IS_STARTED(ar)) | 634 | if (!IS_STARTED(ar)) |
599 | return; | 635 | return; |
600 | 636 | ||
601 | if (unlikely(len < sizeof(*mac))) { | 637 | if (unlikely(len < sizeof(*mac))) |
602 | ar->rx_dropped++; | 638 | goto drop; |
603 | return; | ||
604 | } | ||
605 | 639 | ||
606 | mpdu_len = len - sizeof(*mac); | 640 | mpdu_len = len - sizeof(*mac); |
607 | 641 | ||
608 | mac = (void *)(buf + mpdu_len); | 642 | mac = (void *)(buf + mpdu_len); |
609 | if (unlikely(mac->error & AR9170_RX_ERROR_FATAL)) { | 643 | mac_status = mac->status; |
610 | ar->rx_dropped++; | 644 | switch (mac_status & AR9170_RX_STATUS_MPDU) { |
611 | return; | ||
612 | } | ||
613 | |||
614 | switch (mac->status & AR9170_RX_STATUS_MPDU) { | ||
615 | case AR9170_RX_STATUS_MPDU_FIRST: | 645 | case AR9170_RX_STATUS_MPDU_FIRST: |
616 | /* Aggregated MPDUs start with an PLCP header */ | 646 | /* Aggregated MPDUs start with an PLCP header */ |
617 | if (likely(mpdu_len >= sizeof(struct ar9170_rx_head))) { | 647 | if (likely(mpdu_len >= sizeof(struct ar9170_rx_head))) { |
@@ -638,8 +668,7 @@ static void carl9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len) | |||
638 | "is clipped.\n"); | 668 | "is clipped.\n"); |
639 | } | 669 | } |
640 | 670 | ||
641 | ar->rx_dropped++; | 671 | goto drop; |
642 | return; | ||
643 | } | 672 | } |
644 | break; | 673 | break; |
645 | 674 | ||
@@ -659,8 +688,7 @@ static void carl9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len) | |||
659 | "is clipped.\n"); | 688 | "is clipped.\n"); |
660 | } | 689 | } |
661 | 690 | ||
662 | ar->rx_dropped++; | 691 | goto drop; |
663 | return; | ||
664 | } | 692 | } |
665 | 693 | ||
666 | case AR9170_RX_STATUS_MPDU_MIDDLE: | 694 | case AR9170_RX_STATUS_MPDU_MIDDLE: |
@@ -672,8 +700,7 @@ static void carl9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len) | |||
672 | wiphy_err(ar->hw->wiphy, "rx stream does not start " | 700 | wiphy_err(ar->hw->wiphy, "rx stream does not start " |
673 | "with a first_mpdu frame tag.\n"); | 701 | "with a first_mpdu frame tag.\n"); |
674 | 702 | ||
675 | ar->rx_dropped++; | 703 | goto drop; |
676 | return; | ||
677 | } | 704 | } |
678 | 705 | ||
679 | head = &ar->rx_plcp; | 706 | head = &ar->rx_plcp; |
@@ -696,16 +723,15 @@ static void carl9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len) | |||
696 | } | 723 | } |
697 | 724 | ||
698 | /* FC + DU + RA + FCS */ | 725 | /* FC + DU + RA + FCS */ |
699 | if (unlikely(mpdu_len < (2 + 2 + 6 + FCS_LEN))) { | 726 | if (unlikely(mpdu_len < (2 + 2 + ETH_ALEN + FCS_LEN))) |
700 | ar->rx_dropped++; | 727 | goto drop; |
701 | return; | ||
702 | } | ||
703 | 728 | ||
704 | memset(&status, 0, sizeof(status)); | 729 | memset(&status, 0, sizeof(status)); |
705 | if (unlikely(carl9170_rx_mac_status(ar, head, mac, &status))) { | 730 | if (unlikely(carl9170_rx_mac_status(ar, head, mac, &status))) |
706 | ar->rx_dropped++; | 731 | goto drop; |
707 | return; | 732 | |
708 | } | 733 | if (!carl9170_ampdu_check(ar, buf, mac_status)) |
734 | goto drop; | ||
709 | 735 | ||
710 | if (phy) | 736 | if (phy) |
711 | carl9170_rx_phy_status(ar, phy, &status); | 737 | carl9170_rx_phy_status(ar, phy, &status); |
@@ -713,12 +739,15 @@ static void carl9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len) | |||
713 | carl9170_ps_beacon(ar, buf, mpdu_len); | 739 | carl9170_ps_beacon(ar, buf, mpdu_len); |
714 | 740 | ||
715 | skb = carl9170_rx_copy_data(buf, mpdu_len); | 741 | skb = carl9170_rx_copy_data(buf, mpdu_len); |
716 | if (likely(skb)) { | 742 | if (!skb) |
717 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); | 743 | goto drop; |
718 | ieee80211_rx(ar->hw, skb); | 744 | |
719 | } else { | 745 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
720 | ar->rx_dropped++; | 746 | ieee80211_rx(ar->hw, skb); |
721 | } | 747 | return; |
748 | |||
749 | drop: | ||
750 | ar->rx_dropped++; | ||
722 | } | 751 | } |
723 | 752 | ||
724 | static void carl9170_rx_untie_cmds(struct ar9170 *ar, const u8 *respbuf, | 753 | static void carl9170_rx_untie_cmds(struct ar9170 *ar, const u8 *respbuf, |
diff --git a/drivers/net/wireless/ath/carl9170/wlan.h b/drivers/net/wireless/ath/carl9170/wlan.h index 48ead2268f50..24d63b583b6b 100644 --- a/drivers/net/wireless/ath/carl9170/wlan.h +++ b/drivers/net/wireless/ath/carl9170/wlan.h | |||
@@ -74,6 +74,9 @@ | |||
74 | #define AR9170_RX_STATUS_MPDU_MIDDLE 0x30 | 74 | #define AR9170_RX_STATUS_MPDU_MIDDLE 0x30 |
75 | #define AR9170_RX_STATUS_MPDU_LAST 0x10 | 75 | #define AR9170_RX_STATUS_MPDU_LAST 0x10 |
76 | 76 | ||
77 | #define AR9170_RX_STATUS_CONT_AGGR 0x40 | ||
78 | #define AR9170_RX_STATUS_TOTAL_ERROR 0x80 | ||
79 | |||
77 | #define AR9170_RX_ERROR_RXTO 0x01 | 80 | #define AR9170_RX_ERROR_RXTO 0x01 |
78 | #define AR9170_RX_ERROR_OVERRUN 0x02 | 81 | #define AR9170_RX_ERROR_OVERRUN 0x02 |
79 | #define AR9170_RX_ERROR_DECRYPT 0x04 | 82 | #define AR9170_RX_ERROR_DECRYPT 0x04 |
@@ -81,7 +84,6 @@ | |||
81 | #define AR9170_RX_ERROR_WRONG_RA 0x10 | 84 | #define AR9170_RX_ERROR_WRONG_RA 0x10 |
82 | #define AR9170_RX_ERROR_PLCP 0x20 | 85 | #define AR9170_RX_ERROR_PLCP 0x20 |
83 | #define AR9170_RX_ERROR_MMIC 0x40 | 86 | #define AR9170_RX_ERROR_MMIC 0x40 |
84 | #define AR9170_RX_ERROR_FATAL 0x80 | ||
85 | 87 | ||
86 | /* these are either-or */ | 88 | /* these are either-or */ |
87 | #define AR9170_TX_MAC_PROT_RTS 0x0001 | 89 | #define AR9170_TX_MAC_PROT_RTS 0x0001 |
@@ -329,13 +331,15 @@ struct _carl9170_tx_superframe { | |||
329 | 331 | ||
330 | #define CARL9170_TX_SUPERDESC_LEN 24 | 332 | #define CARL9170_TX_SUPERDESC_LEN 24 |
331 | #define AR9170_TX_HWDESC_LEN 8 | 333 | #define AR9170_TX_HWDESC_LEN 8 |
332 | #define AR9170_TX_SUPERFRAME_LEN (CARL9170_TX_HWDESC_LEN + \ | 334 | #define CARL9170_TX_SUPERFRAME_LEN (CARL9170_TX_SUPERDESC_LEN + \ |
333 | AR9170_TX_SUPERDESC_LEN) | 335 | AR9170_TX_HWDESC_LEN) |
334 | 336 | ||
335 | struct ar9170_rx_head { | 337 | struct ar9170_rx_head { |
336 | u8 plcp[12]; | 338 | u8 plcp[12]; |
337 | } __packed; | 339 | } __packed; |
338 | 340 | ||
341 | #define AR9170_RX_HEAD_LEN 12 | ||
342 | |||
339 | struct ar9170_rx_phystatus { | 343 | struct ar9170_rx_phystatus { |
340 | union { | 344 | union { |
341 | struct { | 345 | struct { |
@@ -350,12 +354,16 @@ struct ar9170_rx_phystatus { | |||
350 | u8 phy_err; | 354 | u8 phy_err; |
351 | } __packed; | 355 | } __packed; |
352 | 356 | ||
357 | #define AR9170_RX_PHYSTATUS_LEN 20 | ||
358 | |||
353 | struct ar9170_rx_macstatus { | 359 | struct ar9170_rx_macstatus { |
354 | u8 SAidx, DAidx; | 360 | u8 SAidx, DAidx; |
355 | u8 error; | 361 | u8 error; |
356 | u8 status; | 362 | u8 status; |
357 | } __packed; | 363 | } __packed; |
358 | 364 | ||
365 | #define AR9170_RX_MACSTATUS_LEN 4 | ||
366 | |||
359 | struct ar9170_rx_frame_single { | 367 | struct ar9170_rx_frame_single { |
360 | struct ar9170_rx_head phy_head; | 368 | struct ar9170_rx_head phy_head; |
361 | struct ieee80211_hdr i3e; | 369 | struct ieee80211_hdr i3e; |
diff --git a/drivers/net/wireless/ath/debug.c b/drivers/net/wireless/ath/debug.c index 53e77bd131b9..dacfb234f491 100644 --- a/drivers/net/wireless/ath/debug.c +++ b/drivers/net/wireless/ath/debug.c | |||
@@ -30,3 +30,32 @@ void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...) | |||
30 | va_end(args); | 30 | va_end(args); |
31 | } | 31 | } |
32 | EXPORT_SYMBOL(ath_print); | 32 | EXPORT_SYMBOL(ath_print); |
33 | |||
34 | const char *ath_opmode_to_string(enum nl80211_iftype opmode) | ||
35 | { | ||
36 | switch (opmode) { | ||
37 | case NL80211_IFTYPE_UNSPECIFIED: | ||
38 | return "UNSPEC"; | ||
39 | case NL80211_IFTYPE_ADHOC: | ||
40 | return "ADHOC"; | ||
41 | case NL80211_IFTYPE_STATION: | ||
42 | return "STATION"; | ||
43 | case NL80211_IFTYPE_AP: | ||
44 | return "AP"; | ||
45 | case NL80211_IFTYPE_AP_VLAN: | ||
46 | return "AP-VLAN"; | ||
47 | case NL80211_IFTYPE_WDS: | ||
48 | return "WDS"; | ||
49 | case NL80211_IFTYPE_MONITOR: | ||
50 | return "MONITOR"; | ||
51 | case NL80211_IFTYPE_MESH_POINT: | ||
52 | return "MESH"; | ||
53 | case NL80211_IFTYPE_P2P_CLIENT: | ||
54 | return "P2P-CLIENT"; | ||
55 | case NL80211_IFTYPE_P2P_GO: | ||
56 | return "P2P-GO"; | ||
57 | default: | ||
58 | return "UNKNOWN"; | ||
59 | } | ||
60 | } | ||
61 | EXPORT_SYMBOL(ath_opmode_to_string); | ||
diff --git a/drivers/net/wireless/ath/debug.h b/drivers/net/wireless/ath/debug.h index fd3a020682dc..64e4af2c2887 100644 --- a/drivers/net/wireless/ath/debug.h +++ b/drivers/net/wireless/ath/debug.h | |||
@@ -77,4 +77,14 @@ ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...) | |||
77 | } | 77 | } |
78 | #endif /* CONFIG_ATH_DEBUG */ | 78 | #endif /* CONFIG_ATH_DEBUG */ |
79 | 79 | ||
80 | /** Returns string describing opmode, or NULL if unknown mode. */ | ||
81 | #ifdef CONFIG_ATH_DEBUG | ||
82 | const char *ath_opmode_to_string(enum nl80211_iftype opmode); | ||
83 | #else | ||
84 | static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode) | ||
85 | { | ||
86 | return "UNKNOWN"; | ||
87 | } | ||
88 | #endif | ||
89 | |||
80 | #endif /* ATH_DEBUG_H */ | 90 | #endif /* ATH_DEBUG_H */ |
diff --git a/drivers/net/wireless/ath/hw.c b/drivers/net/wireless/ath/hw.c index a8f81ea09f14..183c28281385 100644 --- a/drivers/net/wireless/ath/hw.c +++ b/drivers/net/wireless/ath/hw.c | |||
@@ -124,3 +124,62 @@ void ath_hw_setbssidmask(struct ath_common *common) | |||
124 | REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU); | 124 | REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU); |
125 | } | 125 | } |
126 | EXPORT_SYMBOL(ath_hw_setbssidmask); | 126 | EXPORT_SYMBOL(ath_hw_setbssidmask); |
127 | |||
128 | |||
129 | /** | ||
130 | * ath_hw_cycle_counters_update - common function to update cycle counters | ||
131 | * | ||
132 | * @common: the ath_common struct for the device. | ||
133 | * | ||
134 | * This function is used to update all cycle counters in one place. | ||
135 | * It has to be called while holding common->cc_lock! | ||
136 | */ | ||
137 | void ath_hw_cycle_counters_update(struct ath_common *common) | ||
138 | { | ||
139 | u32 cycles, busy, rx, tx; | ||
140 | void *ah = common->ah; | ||
141 | |||
142 | /* freeze */ | ||
143 | REG_WRITE(ah, AR_MIBC_FMC, AR_MIBC); | ||
144 | |||
145 | /* read */ | ||
146 | cycles = REG_READ(ah, AR_CCCNT); | ||
147 | busy = REG_READ(ah, AR_RCCNT); | ||
148 | rx = REG_READ(ah, AR_RFCNT); | ||
149 | tx = REG_READ(ah, AR_TFCNT); | ||
150 | |||
151 | /* clear */ | ||
152 | REG_WRITE(ah, 0, AR_CCCNT); | ||
153 | REG_WRITE(ah, 0, AR_RFCNT); | ||
154 | REG_WRITE(ah, 0, AR_RCCNT); | ||
155 | REG_WRITE(ah, 0, AR_TFCNT); | ||
156 | |||
157 | /* unfreeze */ | ||
158 | REG_WRITE(ah, 0, AR_MIBC); | ||
159 | |||
160 | /* update all cycle counters here */ | ||
161 | common->cc_ani.cycles += cycles; | ||
162 | common->cc_ani.rx_busy += busy; | ||
163 | common->cc_ani.rx_frame += rx; | ||
164 | common->cc_ani.tx_frame += tx; | ||
165 | |||
166 | common->cc_survey.cycles += cycles; | ||
167 | common->cc_survey.rx_busy += busy; | ||
168 | common->cc_survey.rx_frame += rx; | ||
169 | common->cc_survey.tx_frame += tx; | ||
170 | } | ||
171 | EXPORT_SYMBOL(ath_hw_cycle_counters_update); | ||
172 | |||
173 | int32_t ath_hw_get_listen_time(struct ath_common *common) | ||
174 | { | ||
175 | struct ath_cycle_counters *cc = &common->cc_ani; | ||
176 | int32_t listen_time; | ||
177 | |||
178 | listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) / | ||
179 | (common->clockrate * 1000); | ||
180 | |||
181 | memset(cc, 0, sizeof(*cc)); | ||
182 | |||
183 | return listen_time; | ||
184 | } | ||
185 | EXPORT_SYMBOL(ath_hw_get_listen_time); | ||
diff --git a/drivers/net/wireless/ath/reg.h b/drivers/net/wireless/ath/reg.h index e798ef476581..298e53f3fa48 100644 --- a/drivers/net/wireless/ath/reg.h +++ b/drivers/net/wireless/ath/reg.h | |||
@@ -17,6 +17,12 @@ | |||
17 | #ifndef ATH_REGISTERS_H | 17 | #ifndef ATH_REGISTERS_H |
18 | #define ATH_REGISTERS_H | 18 | #define ATH_REGISTERS_H |
19 | 19 | ||
20 | #define AR_MIBC 0x0040 | ||
21 | #define AR_MIBC_COW 0x00000001 | ||
22 | #define AR_MIBC_FMC 0x00000002 | ||
23 | #define AR_MIBC_CMC 0x00000004 | ||
24 | #define AR_MIBC_MCS 0x00000008 | ||
25 | |||
20 | /* | 26 | /* |
21 | * BSSID mask registers. See ath_hw_set_bssid_mask() | 27 | * BSSID mask registers. See ath_hw_set_bssid_mask() |
22 | * for detailed documentation about these registers. | 28 | * for detailed documentation about these registers. |
@@ -24,6 +30,11 @@ | |||
24 | #define AR_BSSMSKL 0x80e0 | 30 | #define AR_BSSMSKL 0x80e0 |
25 | #define AR_BSSMSKU 0x80e4 | 31 | #define AR_BSSMSKU 0x80e4 |
26 | 32 | ||
33 | #define AR_TFCNT 0x80ec | ||
34 | #define AR_RFCNT 0x80f0 | ||
35 | #define AR_RCCNT 0x80f4 | ||
36 | #define AR_CCCNT 0x80f8 | ||
37 | |||
27 | #define AR_KEYTABLE_0 0x8800 | 38 | #define AR_KEYTABLE_0 0x8800 |
28 | #define AR_KEYTABLE(_n) (AR_KEYTABLE_0 + ((_n)*32)) | 39 | #define AR_KEYTABLE(_n) (AR_KEYTABLE_0 + ((_n)*32)) |
29 | #define AR_KEY_CACHE_SIZE 128 | 40 | #define AR_KEY_CACHE_SIZE 128 |