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path: root/drivers/net/wireless/ath9k/regd.c
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Diffstat (limited to 'drivers/net/wireless/ath9k/regd.c')
-rw-r--r--drivers/net/wireless/ath9k/regd.c85
1 files changed, 36 insertions, 49 deletions
diff --git a/drivers/net/wireless/ath9k/regd.c b/drivers/net/wireless/ath9k/regd.c
index 62e28887ccd3..64043e99facf 100644
--- a/drivers/net/wireless/ath9k/regd.c
+++ b/drivers/net/wireless/ath9k/regd.c
@@ -42,7 +42,7 @@ ath9k_regd_sort(void *a, u32 n, u32 size, ath_hal_cmp_t *cmp)
42 u8 *u = t - size; 42 u8 *u = t - size;
43 if (cmp(u, t) <= 0) 43 if (cmp(u, t) <= 0)
44 break; 44 break;
45 swap(u, t, size); 45 swap_array(u, t, size);
46 } 46 }
47} 47}
48 48
@@ -78,8 +78,7 @@ static bool ath9k_regd_is_eeprom_valid(struct ath_hal *ah)
78 return true; 78 return true;
79 } 79 }
80 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 80 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
81 "%s: invalid regulatory domain/country code 0x%x\n", 81 "invalid regulatory domain/country code 0x%x\n", rd);
82 __func__, rd);
83 return false; 82 return false;
84} 83}
85 84
@@ -107,13 +106,12 @@ static bool ath9k_regd_is_ccode_valid(struct ath_hal *ah,
107 return true; 106 return true;
108 107
109 rd = ath9k_regd_get_eepromRD(ah); 108 rd = ath9k_regd_get_eepromRD(ah);
110 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: EEPROM regdomain 0x%x\n", 109 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "EEPROM regdomain 0x%x\n", rd);
111 __func__, rd);
112 110
113 if (rd & COUNTRY_ERD_FLAG) { 111 if (rd & COUNTRY_ERD_FLAG) {
114 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 112 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
115 "%s: EEPROM setting is country code %u\n", 113 "EEPROM setting is country code %u\n",
116 __func__, rd & ~COUNTRY_ERD_FLAG); 114 rd & ~COUNTRY_ERD_FLAG);
117 return cc == (rd & ~COUNTRY_ERD_FLAG); 115 return cc == (rd & ~COUNTRY_ERD_FLAG);
118 } 116 }
119 117
@@ -290,8 +288,7 @@ ath9k_regd_get_wmode_regdomain(struct ath_hal *ah, int regDmn,
290 } 288 }
291 if (!found) { 289 if (!found) {
292 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 290 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
293 "%s: Failed to find reg domain pair %u\n", 291 "Failed to find reg domain pair %u\n", regDmn);
294 __func__, regDmn);
295 return false; 292 return false;
296 } 293 }
297 if (!(channelFlag & CHANNEL_2GHZ)) { 294 if (!(channelFlag & CHANNEL_2GHZ)) {
@@ -307,8 +304,7 @@ ath9k_regd_get_wmode_regdomain(struct ath_hal *ah, int regDmn,
307 found = ath9k_regd_is_valid_reg_domain(regDmn, rd); 304 found = ath9k_regd_is_valid_reg_domain(regDmn, rd);
308 if (!found) { 305 if (!found) {
309 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 306 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
310 "%s: Failed to find unitary reg domain %u\n", 307 "Failed to find unitary reg domain %u\n", regDmn);
311 __func__, regDmn);
312 return false; 308 return false;
313 } else { 309 } else {
314 rd->pscan &= regPair->pscanMask; 310 rd->pscan &= regPair->pscanMask;
@@ -430,30 +426,27 @@ ath9k_regd_add_channel(struct ath_hal *ah,
430 426
431 if (!(c_lo <= c && c <= c_hi)) { 427 if (!(c_lo <= c && c <= c_hi)) {
432 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 428 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
433 "%s: c %u out of range [%u..%u]\n", 429 "c %u out of range [%u..%u]\n",
434 __func__, c, c_lo, c_hi); 430 c, c_lo, c_hi);
435 return false; 431 return false;
436 } 432 }
437 if ((fband->channelBW == CHANNEL_HALF_BW) && 433 if ((fband->channelBW == CHANNEL_HALF_BW) &&
438 !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_HALFRATE)) { 434 !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_HALFRATE)) {
439 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 435 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
440 "%s: Skipping %u half rate channel\n", 436 "Skipping %u half rate channel\n", c);
441 __func__, c);
442 return false; 437 return false;
443 } 438 }
444 439
445 if ((fband->channelBW == CHANNEL_QUARTER_BW) && 440 if ((fband->channelBW == CHANNEL_QUARTER_BW) &&
446 !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_QUARTERRATE)) { 441 !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_QUARTERRATE)) {
447 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 442 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
448 "%s: Skipping %u quarter rate channel\n", 443 "Skipping %u quarter rate channel\n", c);
449 __func__, c);
450 return false; 444 return false;
451 } 445 }
452 446
453 if (((c + fband->channelSep) / 2) > (maxChan + HALF_MAXCHANBW)) { 447 if (((c + fband->channelSep) / 2) > (maxChan + HALF_MAXCHANBW)) {
454 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 448 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
455 "%s: c %u > maxChan %u\n", 449 "c %u > maxChan %u\n", c, maxChan);
456 __func__, c, maxChan);
457 return false; 450 return false;
458 } 451 }
459 452
@@ -463,7 +456,7 @@ ath9k_regd_add_channel(struct ath_hal *ah,
463 return false; 456 return false;
464 } 457 }
465 458
466 if ((rd->flags & NO_HOSTAP) && (ah->ah_opmode == ATH9K_M_HOSTAP)) { 459 if ((rd->flags & NO_HOSTAP) && (ah->ah_opmode == NL80211_IFTYPE_AP)) {
467 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 460 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
468 "Skipping HOSTAP channel\n"); 461 "Skipping HOSTAP channel\n");
469 return false; 462 return false;
@@ -606,8 +599,7 @@ static bool ath9k_regd_japan_check(struct ath_hal *ah,
606 } 599 }
607 600
608 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 601 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
609 "%s: Skipping %d freq band\n", 602 "Skipping %d freq band\n", j_bandcheck[i].freqbandbit);
610 __func__, j_bandcheck[i].freqbandbit);
611 603
612 return skipband; 604 return skipband;
613} 605}
@@ -632,20 +624,19 @@ ath9k_regd_init_channels(struct ath_hal *ah,
632 unsigned long *modes_avail; 624 unsigned long *modes_avail;
633 DECLARE_BITMAP(modes_allowed, ATH9K_MODE_MAX); 625 DECLARE_BITMAP(modes_allowed, ATH9K_MODE_MAX);
634 626
635 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: cc %u %s %s\n", 627 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "cc %u %s %s\n", cc,
636 __func__, cc,
637 enableOutdoor ? "Enable outdoor" : "", 628 enableOutdoor ? "Enable outdoor" : "",
638 enableExtendedChannels ? "Enable ecm" : ""); 629 enableExtendedChannels ? "Enable ecm" : "");
639 630
640 if (!ath9k_regd_is_ccode_valid(ah, cc)) { 631 if (!ath9k_regd_is_ccode_valid(ah, cc)) {
641 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 632 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
642 "%s: invalid country code %d\n", __func__, cc); 633 "Invalid country code %d\n", cc);
643 return false; 634 return false;
644 } 635 }
645 636
646 if (!ath9k_regd_is_eeprom_valid(ah)) { 637 if (!ath9k_regd_is_eeprom_valid(ah)) {
647 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 638 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
648 "%s: invalid EEPROM contents\n", __func__); 639 "Invalid EEPROM contents\n");
649 return false; 640 return false;
650 } 641 }
651 642
@@ -693,9 +684,9 @@ ath9k_regd_init_channels(struct ath_hal *ah,
693 ~CHANNEL_2GHZ, 684 ~CHANNEL_2GHZ,
694 &rd5GHz)) { 685 &rd5GHz)) {
695 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 686 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
696 "%s: couldn't find unitary " 687 "Couldn't find unitary "
697 "5GHz reg domain for country %u\n", 688 "5GHz reg domain for country %u\n",
698 __func__, ah->ah_countryCode); 689 ah->ah_countryCode);
699 return false; 690 return false;
700 } 691 }
701 if (!ath9k_regd_get_wmode_regdomain(ah, 692 if (!ath9k_regd_get_wmode_regdomain(ah,
@@ -703,9 +694,9 @@ ath9k_regd_init_channels(struct ath_hal *ah,
703 CHANNEL_2GHZ, 694 CHANNEL_2GHZ,
704 &rd2GHz)) { 695 &rd2GHz)) {
705 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 696 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
706 "%s: couldn't find unitary 2GHz " 697 "Couldn't find unitary 2GHz "
707 "reg domain for country %u\n", 698 "reg domain for country %u\n",
708 __func__, ah->ah_countryCode); 699 ah->ah_countryCode);
709 return false; 700 return false;
710 } 701 }
711 702
@@ -717,9 +708,9 @@ ath9k_regd_init_channels(struct ath_hal *ah,
717 ~CHANNEL_2GHZ, 708 ~CHANNEL_2GHZ,
718 &rd5GHz)) { 709 &rd5GHz)) {
719 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 710 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
720 "%s: couldn't find unitary 5GHz " 711 "Couldn't find unitary 5GHz "
721 "reg domain for country %u\n", 712 "reg domain for country %u\n",
722 __func__, ah->ah_countryCode); 713 ah->ah_countryCode);
723 return false; 714 return false;
724 } 715 }
725 } 716 }
@@ -749,15 +740,14 @@ ath9k_regd_init_channels(struct ath_hal *ah,
749 740
750 if (!test_bit(cm->mode, modes_avail)) { 741 if (!test_bit(cm->mode, modes_avail)) {
751 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 742 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
752 "%s: !avail mode %d flags 0x%x\n", 743 "!avail mode %d flags 0x%x\n",
753 __func__, cm->mode, cm->flags); 744 cm->mode, cm->flags);
754 continue; 745 continue;
755 } 746 }
756 if (!ath9k_get_channel_edges(ah, cm->flags, &c_lo, &c_hi)) { 747 if (!ath9k_get_channel_edges(ah, cm->flags, &c_lo, &c_hi)) {
757 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 748 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
758 "%s: channels 0x%x not supported " 749 "channels 0x%x not supported "
759 "by hardware\n", 750 "by hardware\n", cm->flags);
760 __func__, cm->flags);
761 continue; 751 continue;
762 } 752 }
763 753
@@ -788,8 +778,7 @@ ath9k_regd_init_channels(struct ath_hal *ah,
788 break; 778 break;
789 default: 779 default:
790 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 780 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
791 "%s: Unknown HAL mode 0x%x\n", __func__, 781 "Unknown HAL mode 0x%x\n", cm->mode);
792 cm->mode);
793 continue; 782 continue;
794 } 783 }
795 784
@@ -841,9 +830,8 @@ ath9k_regd_init_channels(struct ath_hal *ah,
841 if (next >= maxchans) { 830 if (next >= maxchans) {
842 DPRINTF(ah->ah_sc, 831 DPRINTF(ah->ah_sc,
843 ATH_DBG_REGULATORY, 832 ATH_DBG_REGULATORY,
844 "%s: too many channels " 833 "too many channels "
845 "for channel table\n", 834 "for channel table\n");
846 __func__);
847 goto done; 835 goto done;
848 } 836 }
849 if (ath9k_regd_add_channel(ah, 837 if (ath9k_regd_add_channel(ah,
@@ -869,9 +857,8 @@ done:
869 857
870 if (next > ARRAY_SIZE(ah->ah_channels)) { 858 if (next > ARRAY_SIZE(ah->ah_channels)) {
871 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 859 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
872 "%s: too many channels %u; truncating to %u\n", 860 "too many channels %u; truncating to %u\n",
873 __func__, next, 861 next, (int) ARRAY_SIZE(ah->ah_channels));
874 (int) ARRAY_SIZE(ah->ah_channels));
875 next = ARRAY_SIZE(ah->ah_channels); 862 next = ARRAY_SIZE(ah->ah_channels);
876 } 863 }
877#ifdef ATH_NF_PER_CHAN 864#ifdef ATH_NF_PER_CHAN
@@ -919,7 +906,7 @@ ath9k_regd_check_channel(struct ath_hal *ah,
919 int n, lim; 906 int n, lim;
920 907
921 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 908 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
922 "%s: channel %u/0x%x (0x%x) requested\n", __func__, 909 "channel %u/0x%x (0x%x) requested\n",
923 c->channel, c->channelFlags, flags); 910 c->channel, c->channelFlags, flags);
924 911
925 cc = ah->ah_curchan; 912 cc = ah->ah_curchan;
@@ -950,15 +937,15 @@ ath9k_regd_check_channel(struct ath_hal *ah,
950 d = flags - (cc->channelFlags & CHAN_FLAGS); 937 d = flags - (cc->channelFlags & CHAN_FLAGS);
951 } 938 }
952 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 939 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
953 "%s: channel %u/0x%x d %d\n", __func__, 940 "channel %u/0x%x d %d\n",
954 cc->channel, cc->channelFlags, d); 941 cc->channel, cc->channelFlags, d);
955 if (d > 0) { 942 if (d > 0) {
956 base = cc + 1; 943 base = cc + 1;
957 lim--; 944 lim--;
958 } 945 }
959 } 946 }
960 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: no match for %u/0x%x\n", 947 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "no match for %u/0x%x\n",
961 __func__, c->channel, c->channelFlags); 948 c->channel, c->channelFlags);
962 return NULL; 949 return NULL;
963} 950}
964 951
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 03:22:39 -0500