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-rw-r--r--drivers/net/wireless/ath9k/main.c1470
1 files changed, 1470 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c
new file mode 100644
index 000000000000..2888778040e4
--- /dev/null
+++ b/drivers/net/wireless/ath9k/main.c
@@ -0,0 +1,1470 @@
1/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25#define IEEE80211_ACTION_CAT_HT 7
26#define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28static char *dev_info = "ath9k";
29
30MODULE_AUTHOR("Atheros Communications");
31MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33MODULE_LICENSE("Dual BSD/GPL");
34
35static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42};
43
44static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46{
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55}
56
57static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59{
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92}
93
94
95static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99{
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135}
136
137static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140{
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
209 sc->sc_keytype = hk.kv_type;
210 return 0;
211}
212
213static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214{
215#define ATH_MAX_NUM_KEYS 4
216 int freeslot;
217
218 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
219 ath_key_reset(sc, key->keyidx, freeslot);
220#undef ATH_MAX_NUM_KEYS
221}
222
223static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
224{
225/* Until mac80211 includes these fields */
226
227#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
228#define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
229#define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
230
231 ht_info->ht_supported = 1;
232 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
233 |(u16)IEEE80211_HT_CAP_MIMO_PS
234 |(u16)IEEE80211_HT_CAP_SGI_40
235 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
236
237 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
238 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
239 /* setup supported mcs set */
240 memset(ht_info->supp_mcs_set, 0, 16);
241 ht_info->supp_mcs_set[0] = 0xff;
242 ht_info->supp_mcs_set[1] = 0xff;
243 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
244}
245
246static int ath_rate2idx(struct ath_softc *sc, int rate)
247{
248 int i = 0, cur_band, n_rates;
249 struct ieee80211_hw *hw = sc->hw;
250
251 cur_band = hw->conf.channel->band;
252 n_rates = sc->sbands[cur_band].n_bitrates;
253
254 for (i = 0; i < n_rates; i++) {
255 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
256 break;
257 }
258
259 /*
260 * NB:mac80211 validates rx rate index against the supported legacy rate
261 * index only (should be done against ht rates also), return the highest
262 * legacy rate index for rx rate which does not match any one of the
263 * supported basic and extended rates to make mac80211 happy.
264 * The following hack will be cleaned up once the issue with
265 * the rx rate index validation in mac80211 is fixed.
266 */
267 if (i == n_rates)
268 return n_rates - 1;
269 return i;
270}
271
272static void ath9k_rx_prepare(struct ath_softc *sc,
273 struct sk_buff *skb,
274 struct ath_recv_status *status,
275 struct ieee80211_rx_status *rx_status)
276{
277 struct ieee80211_hw *hw = sc->hw;
278 struct ieee80211_channel *curchan = hw->conf.channel;
279
280 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
281
282 rx_status->mactime = status->tsf;
283 rx_status->band = curchan->band;
284 rx_status->freq = curchan->center_freq;
285 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
286 rx_status->signal = rx_status->noise + status->rssi;
287 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
288 rx_status->antenna = status->antenna;
289 rx_status->qual = status->rssi * 100 / 64;
290
291 if (status->flags & ATH_RX_MIC_ERROR)
292 rx_status->flag |= RX_FLAG_MMIC_ERROR;
293 if (status->flags & ATH_RX_FCS_ERROR)
294 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
295
296 rx_status->flag |= RX_FLAG_TSFT;
297}
298
299static u8 parse_mpdudensity(u8 mpdudensity)
300{
301 /*
302 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
303 * 0 for no restriction
304 * 1 for 1/4 us
305 * 2 for 1/2 us
306 * 3 for 1 us
307 * 4 for 2 us
308 * 5 for 4 us
309 * 6 for 8 us
310 * 7 for 16 us
311 */
312 switch (mpdudensity) {
313 case 0:
314 return 0;
315 case 1:
316 case 2:
317 case 3:
318 /* Our lower layer calculations limit our precision to
319 1 microsecond */
320 return 1;
321 case 4:
322 return 2;
323 case 5:
324 return 4;
325 case 6:
326 return 8;
327 case 7:
328 return 16;
329 default:
330 return 0;
331 }
332}
333
334static int ath9k_start(struct ieee80211_hw *hw)
335{
336 struct ath_softc *sc = hw->priv;
337 struct ieee80211_channel *curchan = hw->conf.channel;
338 int error = 0, pos;
339
340 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
341 "initial channel: %d MHz\n", __func__, curchan->center_freq);
342
343 /* setup initial channel */
344
345 pos = ath_get_channel(sc, curchan);
346 if (pos == -1) {
347 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
348 return -EINVAL;
349 }
350
351 sc->sc_ah->ah_channels[pos].chanmode =
352 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
353
354 /* open ath_dev */
355 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
356 if (error) {
357 DPRINTF(sc, ATH_DBG_FATAL,
358 "%s: Unable to complete ath_open\n", __func__);
359 return error;
360 }
361
362 ieee80211_wake_queues(hw);
363 return 0;
364}
365
366static int ath9k_tx(struct ieee80211_hw *hw,
367 struct sk_buff *skb)
368{
369 struct ath_softc *sc = hw->priv;
370 int hdrlen, padsize;
371
372 /* Add the padding after the header if this is not already done */
373 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
374 if (hdrlen & 3) {
375 padsize = hdrlen % 4;
376 if (skb_headroom(skb) < padsize)
377 return -1;
378 skb_push(skb, padsize);
379 memmove(skb->data, skb->data + padsize, hdrlen);
380 }
381
382 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
383 __func__,
384 skb);
385
386 if (ath_tx_start(sc, skb) != 0) {
387 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
388 dev_kfree_skb_any(skb);
389 /* FIXME: Check for proper return value from ATH_DEV */
390 return 0;
391 }
392
393 return 0;
394}
395
396static void ath9k_stop(struct ieee80211_hw *hw)
397{
398 struct ath_softc *sc = hw->priv;
399 int error;
400
401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
402
403 error = ath_suspend(sc);
404 if (error)
405 DPRINTF(sc, ATH_DBG_CONFIG,
406 "%s: Device is no longer present\n", __func__);
407
408 ieee80211_stop_queues(hw);
409}
410
411static int ath9k_add_interface(struct ieee80211_hw *hw,
412 struct ieee80211_if_init_conf *conf)
413{
414 struct ath_softc *sc = hw->priv;
415 int error, ic_opmode = 0;
416
417 /* Support only vap for now */
418
419 if (sc->sc_nvaps)
420 return -ENOBUFS;
421
422 switch (conf->type) {
423 case IEEE80211_IF_TYPE_STA:
424 ic_opmode = ATH9K_M_STA;
425 break;
426 case IEEE80211_IF_TYPE_IBSS:
427 ic_opmode = ATH9K_M_IBSS;
428 break;
429 default:
430 DPRINTF(sc, ATH_DBG_FATAL,
431 "%s: Only STA and IBSS are supported currently\n",
432 __func__);
433 return -EOPNOTSUPP;
434 }
435
436 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
437 __func__,
438 ic_opmode);
439
440 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
441 if (error) {
442 DPRINTF(sc, ATH_DBG_FATAL,
443 "%s: Unable to attach vap, error: %d\n",
444 __func__, error);
445 return error;
446 }
447
448 return 0;
449}
450
451static void ath9k_remove_interface(struct ieee80211_hw *hw,
452 struct ieee80211_if_init_conf *conf)
453{
454 struct ath_softc *sc = hw->priv;
455 struct ath_vap *avp;
456 int error;
457
458 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
459
460 avp = sc->sc_vaps[0];
461 if (avp == NULL) {
462 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
463 __func__);
464 return;
465 }
466
467#ifdef CONFIG_SLOW_ANT_DIV
468 ath_slow_ant_div_stop(&sc->sc_antdiv);
469#endif
470
471 /* Update ratectrl */
472 ath_rate_newstate(sc, avp);
473
474 /* Reclaim beacon resources */
475 if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
476 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
477 ath_beacon_return(sc, avp);
478 }
479
480 /* Set interrupt mask */
481 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
482 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
483 sc->sc_beacons = 0;
484
485 error = ath_vap_detach(sc, 0);
486 if (error)
487 DPRINTF(sc, ATH_DBG_FATAL,
488 "%s: Unable to detach vap, error: %d\n",
489 __func__, error);
490}
491
492static int ath9k_config(struct ieee80211_hw *hw,
493 struct ieee80211_conf *conf)
494{
495 struct ath_softc *sc = hw->priv;
496 struct ieee80211_channel *curchan = hw->conf.channel;
497 int pos;
498
499 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
500 __func__,
501 curchan->center_freq);
502
503 pos = ath_get_channel(sc, curchan);
504 if (pos == -1) {
505 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
506 return -EINVAL;
507 }
508
509 sc->sc_ah->ah_channels[pos].chanmode =
510 (curchan->band == IEEE80211_BAND_2GHZ) ?
511 CHANNEL_G : CHANNEL_A;
512
513 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
514 sc->sc_ah->ah_channels[pos].chanmode =
515 ath_get_extchanmode(sc, curchan);
516
517 sc->sc_config.txpowlimit = 2 * conf->power_level;
518
519 /* set h/w channel */
520 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
521 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
522 __func__);
523
524 return 0;
525}
526
527static int ath9k_config_interface(struct ieee80211_hw *hw,
528 struct ieee80211_vif *vif,
529 struct ieee80211_if_conf *conf)
530{
531 struct ath_softc *sc = hw->priv;
532 struct ath_vap *avp;
533 u32 rfilt = 0;
534 int error, i;
535 DECLARE_MAC_BUF(mac);
536
537 avp = sc->sc_vaps[0];
538 if (avp == NULL) {
539 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
540 __func__);
541 return -EINVAL;
542 }
543
544 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
545 !is_zero_ether_addr(conf->bssid)) {
546 switch (vif->type) {
547 case IEEE80211_IF_TYPE_STA:
548 case IEEE80211_IF_TYPE_IBSS:
549 /* Update ratectrl about the new state */
550 ath_rate_newstate(sc, avp);
551
552 /* Set rx filter */
553 rfilt = ath_calcrxfilter(sc);
554 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
555
556 /* Set BSSID */
557 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
558 sc->sc_curaid = 0;
559 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
560 sc->sc_curaid);
561
562 /* Set aggregation protection mode parameters */
563 sc->sc_config.ath_aggr_prot = 0;
564
565 /*
566 * Reset our TSF so that its value is lower than the
567 * beacon that we are trying to catch.
568 * Only then hw will update its TSF register with the
569 * new beacon. Reset the TSF before setting the BSSID
570 * to avoid allowing in any frames that would update
571 * our TSF only to have us clear it
572 * immediately thereafter.
573 */
574 ath9k_hw_reset_tsf(sc->sc_ah);
575
576 /* Disable BMISS interrupt when we're not associated */
577 ath9k_hw_set_interrupts(sc->sc_ah,
578 sc->sc_imask &
579 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
580 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
581
582 DPRINTF(sc, ATH_DBG_CONFIG,
583 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
584 __func__, rfilt,
585 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
586
587 /* need to reconfigure the beacon */
588 sc->sc_beacons = 0;
589
590 break;
591 default:
592 break;
593 }
594 }
595
596 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
597 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
598 /*
599 * Allocate and setup the beacon frame.
600 *
601 * Stop any previous beacon DMA. This may be
602 * necessary, for example, when an ibss merge
603 * causes reconfiguration; we may be called
604 * with beacon transmission active.
605 */
606 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
607
608 error = ath_beacon_alloc(sc, 0);
609 if (error != 0)
610 return error;
611
612 ath_beacon_sync(sc, 0);
613 }
614
615 /* Check for WLAN_CAPABILITY_PRIVACY ? */
616 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
617 for (i = 0; i < IEEE80211_WEP_NKID; i++)
618 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
619 ath9k_hw_keysetmac(sc->sc_ah,
620 (u16)i,
621 sc->sc_curbssid);
622 }
623
624 /* Only legacy IBSS for now */
625 if (vif->type == IEEE80211_IF_TYPE_IBSS)
626 ath_update_chainmask(sc, 0);
627
628 return 0;
629}
630
631#define SUPPORTED_FILTERS \
632 (FIF_PROMISC_IN_BSS | \
633 FIF_ALLMULTI | \
634 FIF_CONTROL | \
635 FIF_OTHER_BSS | \
636 FIF_BCN_PRBRESP_PROMISC | \
637 FIF_FCSFAIL)
638
639/* Accept unicast, bcast and mcast frames */
640
641static void ath9k_configure_filter(struct ieee80211_hw *hw,
642 unsigned int changed_flags,
643 unsigned int *total_flags,
644 int mc_count,
645 struct dev_mc_list *mclist)
646{
647 struct ath_softc *sc = hw->priv;
648
649 changed_flags &= SUPPORTED_FILTERS;
650 *total_flags &= SUPPORTED_FILTERS;
651
652 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
653 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
654 ath_scan_start(sc);
655 else
656 ath_scan_end(sc);
657 }
658}
659
660static void ath9k_sta_notify(struct ieee80211_hw *hw,
661 struct ieee80211_vif *vif,
662 enum sta_notify_cmd cmd,
663 const u8 *addr)
664{
665 struct ath_softc *sc = hw->priv;
666 struct ath_node *an;
667 unsigned long flags;
668 DECLARE_MAC_BUF(mac);
669
670 spin_lock_irqsave(&sc->node_lock, flags);
671 an = ath_node_find(sc, (u8 *) addr);
672 spin_unlock_irqrestore(&sc->node_lock, flags);
673
674 switch (cmd) {
675 case STA_NOTIFY_ADD:
676 spin_lock_irqsave(&sc->node_lock, flags);
677 if (!an) {
678 ath_node_attach(sc, (u8 *)addr, 0);
679 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
680 __func__,
681 print_mac(mac, addr));
682 } else {
683 ath_node_get(sc, (u8 *)addr);
684 }
685 spin_unlock_irqrestore(&sc->node_lock, flags);
686 break;
687 case STA_NOTIFY_REMOVE:
688 if (!an)
689 DPRINTF(sc, ATH_DBG_FATAL,
690 "%s: Removal of a non-existent node\n",
691 __func__);
692 else {
693 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
694 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
695 __func__,
696 print_mac(mac, addr));
697 }
698 break;
699 default:
700 break;
701 }
702}
703
704static int ath9k_conf_tx(struct ieee80211_hw *hw,
705 u16 queue,
706 const struct ieee80211_tx_queue_params *params)
707{
708 struct ath_softc *sc = hw->priv;
709 struct ath9k_tx_queue_info qi;
710 int ret = 0, qnum;
711
712 if (queue >= WME_NUM_AC)
713 return 0;
714
715 qi.tqi_aifs = params->aifs;
716 qi.tqi_cwmin = params->cw_min;
717 qi.tqi_cwmax = params->cw_max;
718 qi.tqi_burstTime = params->txop;
719 qnum = ath_get_hal_qnum(queue, sc);
720
721 DPRINTF(sc, ATH_DBG_CONFIG,
722 "%s: Configure tx [queue/halq] [%d/%d], "
723 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
724 __func__,
725 queue,
726 qnum,
727 params->aifs,
728 params->cw_min,
729 params->cw_max,
730 params->txop);
731
732 ret = ath_txq_update(sc, qnum, &qi);
733 if (ret)
734 DPRINTF(sc, ATH_DBG_FATAL,
735 "%s: TXQ Update failed\n", __func__);
736
737 return ret;
738}
739
740static int ath9k_set_key(struct ieee80211_hw *hw,
741 enum set_key_cmd cmd,
742 const u8 *local_addr,
743 const u8 *addr,
744 struct ieee80211_key_conf *key)
745{
746 struct ath_softc *sc = hw->priv;
747 int ret = 0;
748
749 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
750
751 switch (cmd) {
752 case SET_KEY:
753 ret = ath_key_config(sc, addr, key);
754 if (!ret) {
755 set_bit(key->keyidx, sc->sc_keymap);
756 key->hw_key_idx = key->keyidx;
757 /* push IV and Michael MIC generation to stack */
758 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
759 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
760 }
761 break;
762 case DISABLE_KEY:
763 ath_key_delete(sc, key);
764 clear_bit(key->keyidx, sc->sc_keymap);
765 sc->sc_keytype = ATH9K_CIPHER_CLR;
766 break;
767 default:
768 ret = -EINVAL;
769 }
770
771 return ret;
772}
773
774static void ath9k_ht_conf(struct ath_softc *sc,
775 struct ieee80211_bss_conf *bss_conf)
776{
777#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
778 struct ath_ht_info *ht_info = &sc->sc_ht_info;
779
780 if (bss_conf->assoc_ht) {
781 ht_info->ext_chan_offset =
782 bss_conf->ht_bss_conf->bss_cap &
783 IEEE80211_HT_IE_CHA_SEC_OFFSET;
784
785 if (!(bss_conf->ht_conf->cap &
786 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
787 (bss_conf->ht_bss_conf->bss_cap &
788 IEEE80211_HT_IE_CHA_WIDTH))
789 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
790 else
791 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
792
793 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
794 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
795 bss_conf->ht_conf->ampdu_factor);
796 ht_info->mpdudensity =
797 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
798
799 }
800
801#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
802}
803
804static void ath9k_bss_assoc_info(struct ath_softc *sc,
805 struct ieee80211_bss_conf *bss_conf)
806{
807 struct ieee80211_hw *hw = sc->hw;
808 struct ieee80211_channel *curchan = hw->conf.channel;
809 struct ath_vap *avp;
810 int pos;
811 DECLARE_MAC_BUF(mac);
812
813 if (bss_conf->assoc) {
814 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
815 __func__,
816 bss_conf->aid);
817
818 avp = sc->sc_vaps[0];
819 if (avp == NULL) {
820 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
821 __func__);
822 return;
823 }
824
825 /* New association, store aid */
826 if (avp->av_opmode == ATH9K_M_STA) {
827 sc->sc_curaid = bss_conf->aid;
828 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
829 sc->sc_curaid);
830 }
831
832 /* Configure the beacon */
833 ath_beacon_config(sc, 0);
834 sc->sc_beacons = 1;
835
836 /* Reset rssi stats */
837 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
838 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
839 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
840 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
841
842 /* Update chainmask */
843 ath_update_chainmask(sc, bss_conf->assoc_ht);
844
845 DPRINTF(sc, ATH_DBG_CONFIG,
846 "%s: bssid %s aid 0x%x\n",
847 __func__,
848 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
849
850 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
851 __func__,
852 curchan->center_freq);
853
854 pos = ath_get_channel(sc, curchan);
855 if (pos == -1) {
856 DPRINTF(sc, ATH_DBG_FATAL,
857 "%s: Invalid channel\n", __func__);
858 return;
859 }
860
861 if (hw->conf.ht_conf.ht_supported)
862 sc->sc_ah->ah_channels[pos].chanmode =
863 ath_get_extchanmode(sc, curchan);
864 else
865 sc->sc_ah->ah_channels[pos].chanmode =
866 (curchan->band == IEEE80211_BAND_2GHZ) ?
867 CHANNEL_G : CHANNEL_A;
868
869 /* set h/w channel */
870 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
871 DPRINTF(sc, ATH_DBG_FATAL,
872 "%s: Unable to set channel\n",
873 __func__);
874
875 ath_rate_newstate(sc, avp);
876 /* Update ratectrl about the new state */
877 ath_rc_node_update(hw, avp->rc_node);
878 } else {
879 DPRINTF(sc, ATH_DBG_CONFIG,
880 "%s: Bss Info DISSOC\n", __func__);
881 sc->sc_curaid = 0;
882 }
883}
884
885static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
886 struct ieee80211_vif *vif,
887 struct ieee80211_bss_conf *bss_conf,
888 u32 changed)
889{
890 struct ath_softc *sc = hw->priv;
891
892 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
893 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
894 __func__,
895 bss_conf->use_short_preamble);
896 if (bss_conf->use_short_preamble)
897 sc->sc_flags |= ATH_PREAMBLE_SHORT;
898 else
899 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
900 }
901
902 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
903 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
904 __func__,
905 bss_conf->use_cts_prot);
906 if (bss_conf->use_cts_prot &&
907 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
908 sc->sc_flags |= ATH_PROTECT_ENABLE;
909 else
910 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
911 }
912
913 if (changed & BSS_CHANGED_HT) {
914 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
915 __func__,
916 bss_conf->assoc_ht);
917 ath9k_ht_conf(sc, bss_conf);
918 }
919
920 if (changed & BSS_CHANGED_ASSOC) {
921 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
922 __func__,
923 bss_conf->assoc);
924 ath9k_bss_assoc_info(sc, bss_conf);
925 }
926}
927
928static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
929{
930 u64 tsf;
931 struct ath_softc *sc = hw->priv;
932 struct ath_hal *ah = sc->sc_ah;
933
934 tsf = ath9k_hw_gettsf64(ah);
935
936 return tsf;
937}
938
939static void ath9k_reset_tsf(struct ieee80211_hw *hw)
940{
941 struct ath_softc *sc = hw->priv;
942 struct ath_hal *ah = sc->sc_ah;
943
944 ath9k_hw_reset_tsf(ah);
945}
946
947static int ath9k_ampdu_action(struct ieee80211_hw *hw,
948 enum ieee80211_ampdu_mlme_action action,
949 const u8 *addr,
950 u16 tid,
951 u16 *ssn)
952{
953 struct ath_softc *sc = hw->priv;
954 int ret = 0;
955
956 switch (action) {
957 case IEEE80211_AMPDU_RX_START:
958 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
959 if (ret < 0)
960 DPRINTF(sc, ATH_DBG_FATAL,
961 "%s: Unable to start RX aggregation\n",
962 __func__);
963 break;
964 case IEEE80211_AMPDU_RX_STOP:
965 ret = ath_rx_aggr_stop(sc, addr, tid);
966 if (ret < 0)
967 DPRINTF(sc, ATH_DBG_FATAL,
968 "%s: Unable to stop RX aggregation\n",
969 __func__);
970 break;
971 case IEEE80211_AMPDU_TX_START:
972 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
973 if (ret < 0)
974 DPRINTF(sc, ATH_DBG_FATAL,
975 "%s: Unable to start TX aggregation\n",
976 __func__);
977 else
978 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
979 break;
980 case IEEE80211_AMPDU_TX_STOP:
981 ret = ath_tx_aggr_stop(sc, addr, tid);
982 if (ret < 0)
983 DPRINTF(sc, ATH_DBG_FATAL,
984 "%s: Unable to stop TX aggregation\n",
985 __func__);
986
987 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
988 break;
989 default:
990 DPRINTF(sc, ATH_DBG_FATAL,
991 "%s: Unknown AMPDU action\n", __func__);
992 }
993
994 return ret;
995}
996
997static struct ieee80211_ops ath9k_ops = {
998 .tx = ath9k_tx,
999 .start = ath9k_start,
1000 .stop = ath9k_stop,
1001 .add_interface = ath9k_add_interface,
1002 .remove_interface = ath9k_remove_interface,
1003 .config = ath9k_config,
1004 .config_interface = ath9k_config_interface,
1005 .configure_filter = ath9k_configure_filter,
1006 .get_stats = NULL,
1007 .sta_notify = ath9k_sta_notify,
1008 .conf_tx = ath9k_conf_tx,
1009 .get_tx_stats = NULL,
1010 .bss_info_changed = ath9k_bss_info_changed,
1011 .set_tim = NULL,
1012 .set_key = ath9k_set_key,
1013 .hw_scan = NULL,
1014 .get_tkip_seq = NULL,
1015 .set_rts_threshold = NULL,
1016 .set_frag_threshold = NULL,
1017 .set_retry_limit = NULL,
1018 .get_tsf = ath9k_get_tsf,
1019 .reset_tsf = ath9k_reset_tsf,
1020 .tx_last_beacon = NULL,
1021 .ampdu_action = ath9k_ampdu_action
1022};
1023
1024void ath_get_beaconconfig(struct ath_softc *sc,
1025 int if_id,
1026 struct ath_beacon_config *conf)
1027{
1028 struct ieee80211_hw *hw = sc->hw;
1029
1030 /* fill in beacon config data */
1031
1032 conf->beacon_interval = hw->conf.beacon_int;
1033 conf->listen_interval = 100;
1034 conf->dtim_count = 1;
1035 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1036}
1037
1038int ath_update_beacon(struct ath_softc *sc,
1039 int if_id,
1040 struct ath_beacon_offset *bo,
1041 struct sk_buff *skb,
1042 int mcast)
1043{
1044 return 0;
1045}
1046
1047void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1048 struct ath_xmit_status *tx_status, struct ath_node *an)
1049{
1050 struct ieee80211_hw *hw = sc->hw;
1051 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1052
1053 DPRINTF(sc, ATH_DBG_XMIT,
1054 "%s: TX complete: skb: %p\n", __func__, skb);
1055
1056 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1057 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1058 /* free driver's private data area of tx_info */
1059 if (tx_info->driver_data[0] != NULL)
1060 kfree(tx_info->driver_data[0]);
1061 tx_info->driver_data[0] = NULL;
1062 }
1063
1064 if (tx_status->flags & ATH_TX_BAR) {
1065 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1066 tx_status->flags &= ~ATH_TX_BAR;
1067 }
1068 if (tx_status->flags)
1069 tx_info->status.excessive_retries = 1;
1070
1071 tx_info->status.retry_count = tx_status->retries;
1072
1073 ieee80211_tx_status(hw, skb);
1074 if (an)
1075 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1076}
1077
1078int ath__rx_indicate(struct ath_softc *sc,
1079 struct sk_buff *skb,
1080 struct ath_recv_status *status,
1081 u16 keyix)
1082{
1083 struct ieee80211_hw *hw = sc->hw;
1084 struct ath_node *an = NULL;
1085 struct ieee80211_rx_status rx_status;
1086 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1087 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1088 int padsize;
1089 enum ATH_RX_TYPE st;
1090
1091 /* see if any padding is done by the hw and remove it */
1092 if (hdrlen & 3) {
1093 padsize = hdrlen % 4;
1094 memmove(skb->data + padsize, skb->data, hdrlen);
1095 skb_pull(skb, padsize);
1096 }
1097
1098 /* remove FCS before passing up to protocol stack */
1099 skb_trim(skb, (skb->len - FCS_LEN));
1100
1101 /* Prepare rx status */
1102 ath9k_rx_prepare(sc, skb, status, &rx_status);
1103
1104 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1105 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1106 rx_status.flag |= RX_FLAG_DECRYPTED;
1107 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1108 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1109 && skb->len >= hdrlen + 4) {
1110 keyix = skb->data[hdrlen + 3] >> 6;
1111
1112 if (test_bit(keyix, sc->sc_keymap))
1113 rx_status.flag |= RX_FLAG_DECRYPTED;
1114 }
1115
1116 spin_lock_bh(&sc->node_lock);
1117 an = ath_node_find(sc, hdr->addr2);
1118 spin_unlock_bh(&sc->node_lock);
1119
1120 if (an) {
1121 ath_rx_input(sc, an,
1122 hw->conf.ht_conf.ht_supported,
1123 skb, status, &st);
1124 }
1125 if (!an || (st != ATH_RX_CONSUMED))
1126 __ieee80211_rx(hw, skb, &rx_status);
1127
1128 return 0;
1129}
1130
1131int ath_rx_subframe(struct ath_node *an,
1132 struct sk_buff *skb,
1133 struct ath_recv_status *status)
1134{
1135 struct ath_softc *sc = an->an_sc;
1136 struct ieee80211_hw *hw = sc->hw;
1137 struct ieee80211_rx_status rx_status;
1138
1139 /* Prepare rx status */
1140 ath9k_rx_prepare(sc, skb, status, &rx_status);
1141 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1142 rx_status.flag |= RX_FLAG_DECRYPTED;
1143
1144 __ieee80211_rx(hw, skb, &rx_status);
1145
1146 return 0;
1147}
1148
1149enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1150{
1151 return sc->sc_ht_info.tx_chan_width;
1152}
1153
1154static int ath_detach(struct ath_softc *sc)
1155{
1156 struct ieee80211_hw *hw = sc->hw;
1157
1158 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1159
1160 /* Unregister hw */
1161
1162 ieee80211_unregister_hw(hw);
1163
1164 /* unregister Rate control */
1165 ath_rate_control_unregister();
1166
1167 /* tx/rx cleanup */
1168
1169 ath_rx_cleanup(sc);
1170 ath_tx_cleanup(sc);
1171
1172 /* Deinit */
1173
1174 ath_deinit(sc);
1175
1176 return 0;
1177}
1178
1179static int ath_attach(u16 devid,
1180 struct ath_softc *sc)
1181{
1182 struct ieee80211_hw *hw = sc->hw;
1183 int error = 0;
1184
1185 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1186
1187 error = ath_init(devid, sc);
1188 if (error != 0)
1189 return error;
1190
1191 /* Init nodes */
1192
1193 INIT_LIST_HEAD(&sc->node_list);
1194 spin_lock_init(&sc->node_lock);
1195
1196 /* get mac address from hardware and set in mac80211 */
1197
1198 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1199
1200 /* setup channels and rates */
1201
1202 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1203 sc->channels[IEEE80211_BAND_2GHZ];
1204 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1205 sc->rates[IEEE80211_BAND_2GHZ];
1206 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1207
1208 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1209 /* Setup HT capabilities for 2.4Ghz*/
1210 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1211
1212 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1213 &sc->sbands[IEEE80211_BAND_2GHZ];
1214
1215 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
1216 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1217 sc->channels[IEEE80211_BAND_5GHZ];
1218 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1219 sc->rates[IEEE80211_BAND_5GHZ];
1220 sc->sbands[IEEE80211_BAND_5GHZ].band =
1221 IEEE80211_BAND_5GHZ;
1222
1223 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1224 /* Setup HT capabilities for 5Ghz*/
1225 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1226
1227 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1228 &sc->sbands[IEEE80211_BAND_5GHZ];
1229 }
1230
1231 /* FIXME: Have to figure out proper hw init values later */
1232
1233 hw->queues = 4;
1234 hw->ampdu_queues = 1;
1235
1236 /* Register rate control */
1237 hw->rate_control_algorithm = "ath9k_rate_control";
1238 error = ath_rate_control_register();
1239 if (error != 0) {
1240 DPRINTF(sc, ATH_DBG_FATAL,
1241 "%s: Unable to register rate control "
1242 "algorithm:%d\n", __func__, error);
1243 ath_rate_control_unregister();
1244 goto bad;
1245 }
1246
1247 error = ieee80211_register_hw(hw);
1248 if (error != 0) {
1249 ath_rate_control_unregister();
1250 goto bad;
1251 }
1252
1253 /* initialize tx/rx engine */
1254
1255 error = ath_tx_init(sc, ATH_TXBUF);
1256 if (error != 0)
1257 goto bad1;
1258
1259 error = ath_rx_init(sc, ATH_RXBUF);
1260 if (error != 0)
1261 goto bad1;
1262
1263 return 0;
1264bad1:
1265 ath_detach(sc);
1266bad:
1267 return error;
1268}
1269
1270static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1271{
1272 void __iomem *mem;
1273 struct ath_softc *sc;
1274 struct ieee80211_hw *hw;
1275 const char *athname;
1276 u8 csz;
1277 u32 val;
1278 int ret = 0;
1279
1280 if (pci_enable_device(pdev))
1281 return -EIO;
1282
1283 /* XXX 32-bit addressing only */
1284 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1285 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1286 ret = -ENODEV;
1287 goto bad;
1288 }
1289
1290 /*
1291 * Cache line size is used to size and align various
1292 * structures used to communicate with the hardware.
1293 */
1294 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1295 if (csz == 0) {
1296 /*
1297 * Linux 2.4.18 (at least) writes the cache line size
1298 * register as a 16-bit wide register which is wrong.
1299 * We must have this setup properly for rx buffer
1300 * DMA to work so force a reasonable value here if it
1301 * comes up zero.
1302 */
1303 csz = L1_CACHE_BYTES / sizeof(u32);
1304 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1305 }
1306 /*
1307 * The default setting of latency timer yields poor results,
1308 * set it to the value used by other systems. It may be worth
1309 * tweaking this setting more.
1310 */
1311 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1312
1313 pci_set_master(pdev);
1314
1315 /*
1316 * Disable the RETRY_TIMEOUT register (0x41) to keep
1317 * PCI Tx retries from interfering with C3 CPU state.
1318 */
1319 pci_read_config_dword(pdev, 0x40, &val);
1320 if ((val & 0x0000ff00) != 0)
1321 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1322
1323 ret = pci_request_region(pdev, 0, "ath9k");
1324 if (ret) {
1325 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1326 ret = -ENODEV;
1327 goto bad;
1328 }
1329
1330 mem = pci_iomap(pdev, 0, 0);
1331 if (!mem) {
1332 printk(KERN_ERR "PCI memory map error\n") ;
1333 ret = -EIO;
1334 goto bad1;
1335 }
1336
1337 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1338 if (hw == NULL) {
1339 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1340 goto bad2;
1341 }
1342
1343 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1344 IEEE80211_HW_NOISE_DBM;
1345
1346 SET_IEEE80211_DEV(hw, &pdev->dev);
1347 pci_set_drvdata(pdev, hw);
1348
1349 sc = hw->priv;
1350 sc->hw = hw;
1351 sc->pdev = pdev;
1352 sc->mem = mem;
1353
1354 if (ath_attach(id->device, sc) != 0) {
1355 ret = -ENODEV;
1356 goto bad3;
1357 }
1358
1359 /* setup interrupt service routine */
1360
1361 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1362 printk(KERN_ERR "%s: request_irq failed\n",
1363 wiphy_name(hw->wiphy));
1364 ret = -EIO;
1365 goto bad4;
1366 }
1367
1368 athname = ath9k_hw_probe(id->vendor, id->device);
1369
1370 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1371 wiphy_name(hw->wiphy),
1372 athname ? athname : "Atheros ???",
1373 (unsigned long)mem, pdev->irq);
1374
1375 return 0;
1376bad4:
1377 ath_detach(sc);
1378bad3:
1379 ieee80211_free_hw(hw);
1380bad2:
1381 pci_iounmap(pdev, mem);
1382bad1:
1383 pci_release_region(pdev, 0);
1384bad:
1385 pci_disable_device(pdev);
1386 return ret;
1387}
1388
1389static void ath_pci_remove(struct pci_dev *pdev)
1390{
1391 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1392 struct ath_softc *sc = hw->priv;
1393
1394 if (pdev->irq)
1395 free_irq(pdev->irq, sc);
1396 ath_detach(sc);
1397 pci_iounmap(pdev, sc->mem);
1398 pci_release_region(pdev, 0);
1399 pci_disable_device(pdev);
1400 ieee80211_free_hw(hw);
1401}
1402
1403#ifdef CONFIG_PM
1404
1405static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1406{
1407 pci_save_state(pdev);
1408 pci_disable_device(pdev);
1409 pci_set_power_state(pdev, 3);
1410
1411 return 0;
1412}
1413
1414static int ath_pci_resume(struct pci_dev *pdev)
1415{
1416 u32 val;
1417 int err;
1418
1419 err = pci_enable_device(pdev);
1420 if (err)
1421 return err;
1422 pci_restore_state(pdev);
1423 /*
1424 * Suspend/Resume resets the PCI configuration space, so we have to
1425 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1426 * PCI Tx retries from interfering with C3 CPU state
1427 */
1428 pci_read_config_dword(pdev, 0x40, &val);
1429 if ((val & 0x0000ff00) != 0)
1430 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1431
1432 return 0;
1433}
1434
1435#endif /* CONFIG_PM */
1436
1437MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1438
1439static struct pci_driver ath_pci_driver = {
1440 .name = "ath9k",
1441 .id_table = ath_pci_id_table,
1442 .probe = ath_pci_probe,
1443 .remove = ath_pci_remove,
1444#ifdef CONFIG_PM
1445 .suspend = ath_pci_suspend,
1446 .resume = ath_pci_resume,
1447#endif /* CONFIG_PM */
1448};
1449
1450static int __init init_ath_pci(void)
1451{
1452 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1453
1454 if (pci_register_driver(&ath_pci_driver) < 0) {
1455 printk(KERN_ERR
1456 "ath_pci: No devices found, driver not installed.\n");
1457 pci_unregister_driver(&ath_pci_driver);
1458 return -ENODEV;
1459 }
1460
1461 return 0;
1462}
1463module_init(init_ath_pci);
1464
1465static void __exit exit_ath_pci(void)
1466{
1467 pci_unregister_driver(&ath_pci_driver);
1468 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1469}
1470module_exit(exit_ath_pci);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 17:19:12 -0500