1 files changed, 0 insertions, 72 deletions

diff --git a/drivers/net/wireless/ath9k/mac.c b/drivers/net/wireless/ath9k/mac.c
index 8d2b139818ee..a4e98986dbcd 100644
--- a/drivers/net/wireless/ath9k/mac.c
+++ b/drivers/net/wireless/ath9k/mac.c
@@ -40,78 +40,6 @@ static void ath9k_hw_set_txq_interrupts(struct ath_hal *ah,
                       AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask);
 }
 
-void ath9k_hw_dmaRegDump(struct ath_hal *ah)
-{
-        u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
-        int qcuOffset = 0, dcuOffset = 0;
-        u32 *qcuBase = &val[0], *dcuBase = &val[4];
-        int i;
-
-        REG_WRITE(ah, AR_MACMISC,
-                  ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
-                   (AR_MACMISC_MISC_OBS_BUS_1 <<
-                    AR_MACMISC_MISC_OBS_BUS_MSB_S)));
-
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "Raw DMA Debug values:\n");
-
-        for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
-                if (i % 4 == 0)
-                        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n");
-
-                val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32)));
-                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "%d: %08x ", i, val[i]);
-        }
-
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n\n");
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
-
-        for (i = 0; i < ATH9K_NUM_QUEUES;
-             i++, qcuOffset += 4, dcuOffset += 5) {
-                if (i == 8) {
-                        qcuOffset = 0;
-                        qcuBase++;
-                }
-
-                if (i == 6) {
-                        dcuOffset = 0;
-                        dcuBase++;
-                }
-
-                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                        "%2d          %2x      %1x     %2x           %2x\n",
-                        i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
-                        (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3),
-                        val[2] & (0x7 << (i * 3)) >> (i * 3),
-                        (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
-        }
-
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n");
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "qcu_stitch state:   %2x    qcu_fetch state:        %2x\n",
-                (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "qcu_complete state: %2x    dcu_complete state:     %2x\n",
-                (val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "dcu_arb state:      %2x    dcu_fp state:           %2x\n",
-                (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "chan_idle_dur:     %3d    chan_idle_dur_valid:     %1d\n",
-                (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "txfifo_valid_0:      %1d    txfifo_valid_1:          %1d\n",
-                (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "txfifo_dcu_num_0:   %2d    txfifo_dcu_num_1:       %2d\n",
-                (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
-
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "pcu observe 0x%x \n",
-                REG_READ(ah, AR_OBS_BUS_1));
-        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                "AR_CR 0x%x \n", REG_READ(ah, AR_CR));
-}
-
 u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q)
 {
         return REG_READ(ah, AR_QTXDP(q));