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Diffstat (limited to 'drivers/net/wireless/ath9k/debug.c')
-rw-r--r--drivers/net/wireless/ath9k/debug.c160
1 files changed, 160 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath9k/debug.c b/drivers/net/wireless/ath9k/debug.c
new file mode 100644
index 000000000000..da52812c3a94
--- /dev/null
+++ b/drivers/net/wireless/ath9k/debug.c
@@ -0,0 +1,160 @@
1/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "core.h"
18#include "reg.h"
19#include "hw.h"
20
21static unsigned int ath9k_debug = DBG_DEFAULT;
22module_param_named(debug, ath9k_debug, uint, 0);
23
24void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...)
25{
26 if (!sc)
27 return;
28
29 if (sc->sc_debug.debug_mask & dbg_mask) {
30 va_list args;
31
32 va_start(args, fmt);
33 printk(KERN_DEBUG "ath9k: ");
34 vprintk(fmt, args);
35 va_end(args);
36 }
37}
38
39static int ath9k_debugfs_open(struct inode *inode, struct file *file)
40{
41 file->private_data = inode->i_private;
42 return 0;
43}
44
45static ssize_t read_file_dma(struct file *file, char __user *user_buf,
46 size_t count, loff_t *ppos)
47{
48 struct ath_softc *sc = file->private_data;
49 struct ath_hal *ah = sc->sc_ah;
50 char buf[1024];
51 unsigned int len = 0;
52 u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
53 int i, qcuOffset = 0, dcuOffset = 0;
54 u32 *qcuBase = &val[0], *dcuBase = &val[4];
55
56 REG_WRITE(ah, AR_MACMISC,
57 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
58 (AR_MACMISC_MISC_OBS_BUS_1 <<
59 AR_MACMISC_MISC_OBS_BUS_MSB_S)));
60
61 len += snprintf(buf + len, sizeof(buf) - len,
62 "Raw DMA Debug values:\n");
63
64 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
65 if (i % 4 == 0)
66 len += snprintf(buf + len, sizeof(buf) - len, "\n");
67
68 val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32)));
69 len += snprintf(buf + len, sizeof(buf) - len, "%d: %08x ",
70 i, val[i]);
71 }
72
73 len += snprintf(buf + len, sizeof(buf) - len, "\n\n");
74 len += snprintf(buf + len, sizeof(buf) - len,
75 "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
76
77 for (i = 0; i < ATH9K_NUM_QUEUES; i++, qcuOffset += 4, dcuOffset += 5) {
78 if (i == 8) {
79 qcuOffset = 0;
80 qcuBase++;
81 }
82
83 if (i == 6) {
84 dcuOffset = 0;
85 dcuBase++;
86 }
87
88 len += snprintf(buf + len, sizeof(buf) - len,
89 "%2d %2x %1x %2x %2x\n",
90 i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
91 (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3),
92 val[2] & (0x7 << (i * 3)) >> (i * 3),
93 (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
94 }
95
96 len += snprintf(buf + len, sizeof(buf) - len, "\n");
97
98 len += snprintf(buf + len, sizeof(buf) - len,
99 "qcu_stitch state: %2x qcu_fetch state: %2x\n",
100 (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
101 len += snprintf(buf + len, sizeof(buf) - len,
102 "qcu_complete state: %2x dcu_complete state: %2x\n",
103 (val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
104 len += snprintf(buf + len, sizeof(buf) - len,
105 "dcu_arb state: %2x dcu_fp state: %2x\n",
106 (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
107 len += snprintf(buf + len, sizeof(buf) - len,
108 "chan_idle_dur: %3d chan_idle_dur_valid: %1d\n",
109 (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
110 len += snprintf(buf + len, sizeof(buf) - len,
111 "txfifo_valid_0: %1d txfifo_valid_1: %1d\n",
112 (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
113 len += snprintf(buf + len, sizeof(buf) - len,
114 "txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n",
115 (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
116
117 len += snprintf(buf + len, sizeof(buf) - len, "pcu observe: 0x%x \n",
118 REG_READ(ah, AR_OBS_BUS_1));
119 len += snprintf(buf + len, sizeof(buf) - len,
120 "AR_CR: 0x%x \n", REG_READ(ah, AR_CR));
121
122 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
123}
124
125static const struct file_operations fops_dma = {
126 .read = read_file_dma,
127 .open = ath9k_debugfs_open,
128 .owner = THIS_MODULE
129};
130
131int ath9k_init_debug(struct ath_softc *sc)
132{
133 sc->sc_debug.debug_mask = ath9k_debug;
134
135 sc->sc_debug.debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
136 if (!sc->sc_debug.debugfs_root)
137 goto err;
138
139 sc->sc_debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
140 sc->sc_debug.debugfs_root);
141 if (!sc->sc_debug.debugfs_phy)
142 goto err;
143
144 sc->sc_debug.debugfs_dma = debugfs_create_file("dma", S_IRUGO,
145 sc->sc_debug.debugfs_phy, sc, &fops_dma);
146 if (!sc->sc_debug.debugfs_dma)
147 goto err;
148
149 return 0;
150err:
151 ath9k_exit_debug(sc);
152 return -ENOMEM;
153}
154
155void ath9k_exit_debug(struct ath_softc *sc)
156{
157 debugfs_remove(sc->sc_debug.debugfs_dma);
158 debugfs_remove(sc->sc_debug.debugfs_phy);
159 debugfs_remove(sc->sc_debug.debugfs_root);
160}
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