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-rw-r--r--drivers/net/wireless/ath9k/beacon.c977
1 files changed, 977 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c
new file mode 100644
index 000000000000..00993f828c5c
--- /dev/null
+++ b/drivers/net/wireless/ath9k/beacon.c
@@ -0,0 +1,977 @@
1/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* Implementation of beacon processing. */
18
19#include <asm/unaligned.h>
20#include "core.h"
21
22/*
23 * Configure parameters for the beacon queue
24 *
25 * This function will modify certain transmit queue properties depending on
26 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
27 * settings and channel width min/max
28*/
29
30static int ath_beaconq_config(struct ath_softc *sc)
31{
32 struct ath_hal *ah = sc->sc_ah;
33 struct ath9k_txq_info qi;
34
35 ath9k_hw_gettxqueueprops(ah, sc->sc_bhalq, &qi);
36 if (sc->sc_opmode == ATH9K_M_HOSTAP) {
37 /* Always burst out beacon and CAB traffic. */
38 qi.tqi_aifs = 1;
39 qi.tqi_cwmin = 0;
40 qi.tqi_cwmax = 0;
41 } else {
42 /* Adhoc mode; important thing is to use 2x cwmin. */
43 qi.tqi_aifs = sc->sc_beacon_qi.tqi_aifs;
44 qi.tqi_cwmin = 2*sc->sc_beacon_qi.tqi_cwmin;
45 qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax;
46 }
47
48 if (!ath9k_hw_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
49 DPRINTF(sc, ATH_DBG_FATAL,
50 "%s: unable to update h/w beacon queue parameters\n",
51 __func__);
52 return 0;
53 } else {
54 ath9k_hw_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
55 return 1;
56 }
57}
58
59/*
60 * Setup the beacon frame for transmit.
61 *
62 * Associates the beacon frame buffer with a transmit descriptor. Will set
63 * up all required antenna switch parameters, rate codes, and channel flags.
64 * Beacons are always sent out at the lowest rate, and are not retried.
65*/
66
67static void ath_beacon_setup(struct ath_softc *sc,
68 struct ath_vap *avp, struct ath_buf *bf)
69{
70 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
71 struct ath_hal *ah = sc->sc_ah;
72 struct ath_desc *ds;
73 int flags, antenna;
74 const struct ath9k_rate_table *rt;
75 u8 rix, rate;
76 int ctsrate = 0;
77 int ctsduration = 0;
78 struct ath9k_11n_rate_series series[4];
79
80 DPRINTF(sc, ATH_DBG_BEACON, "%s: m %p len %u\n",
81 __func__, skb, skb->len);
82
83 /* setup descriptors */
84 ds = bf->bf_desc;
85
86 flags = ATH9K_TXDESC_NOACK;
87
88 if (sc->sc_opmode == ATH9K_M_IBSS && ah->ah_caps.halVEOLSupport) {
89 ds->ds_link = bf->bf_daddr; /* self-linked */
90 flags |= ATH9K_TXDESC_VEOL;
91 /* Let hardware handle antenna switching. */
92 antenna = 0;
93 } else {
94 ds->ds_link = 0;
95 /*
96 * Switch antenna every beacon.
97 * Should only switch every beacon period, not for every
98 * SWBA's
99 * XXX assumes two antenna
100 */
101 antenna = ((sc->ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1);
102 }
103
104 ds->ds_data = bf->bf_buf_addr;
105
106 /*
107 * Calculate rate code.
108 * XXX everything at min xmit rate
109 */
110 rix = sc->sc_minrateix;
111 rt = sc->sc_currates;
112 rate = rt->info[rix].rateCode;
113 if (sc->sc_flags & ATH_PREAMBLE_SHORT)
114 rate |= rt->info[rix].shortPreamble;
115
116 ath9k_hw_set11n_txdesc(ah, ds
117 , skb->len + FCS_LEN /* frame length */
118 , ATH9K_PKT_TYPE_BEACON /* Atheros packet type */
119 , avp->av_btxctl.txpower /* txpower XXX */
120 , ATH9K_TXKEYIX_INVALID /* no encryption */
121 , ATH9K_KEY_TYPE_CLEAR /* no encryption */
122 , flags /* no ack, veol for beacons */
123 );
124
125 /* NB: beacon's BufLen must be a multiple of 4 bytes */
126 ath9k_hw_filltxdesc(ah, ds
127 , roundup(skb->len, 4) /* buffer length */
128 , true /* first segment */
129 , true /* last segment */
130 , ds /* first descriptor */
131 );
132
133 memzero(series, sizeof(struct ath9k_11n_rate_series) * 4);
134 series[0].Tries = 1;
135 series[0].Rate = rate;
136 series[0].ChSel = sc->sc_tx_chainmask;
137 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
138 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
139 ctsrate, ctsduration, series, 4, 0);
140}
141
142/* Move everything from the vap's mcast queue to the hardware cab queue.
143 * Caller must hold mcasq lock and cabq lock
144 * XXX MORE_DATA bit?
145 */
146static void empty_mcastq_into_cabq(struct ath_hal *ah,
147 struct ath_txq *mcastq, struct ath_txq *cabq)
148{
149 struct ath_buf *bfmcast;
150
151 BUG_ON(list_empty(&mcastq->axq_q));
152
153 bfmcast = list_first_entry(&mcastq->axq_q, struct ath_buf, list);
154
155 /* link the descriptors */
156 if (!cabq->axq_link)
157 ath9k_hw_puttxbuf(ah, cabq->axq_qnum, bfmcast->bf_daddr);
158 else
159 *cabq->axq_link = bfmcast->bf_daddr;
160
161 /* append the private vap mcast list to the cabq */
162
163 cabq->axq_depth += mcastq->axq_depth;
164 cabq->axq_totalqueued += mcastq->axq_totalqueued;
165 cabq->axq_linkbuf = mcastq->axq_linkbuf;
166 cabq->axq_link = mcastq->axq_link;
167 list_splice_tail_init(&mcastq->axq_q, &cabq->axq_q);
168 mcastq->axq_depth = 0;
169 mcastq->axq_totalqueued = 0;
170 mcastq->axq_linkbuf = NULL;
171 mcastq->axq_link = NULL;
172}
173
174/* This is only run at DTIM. We move everything from the vap's mcast queue
175 * to the hardware cab queue. Caller must hold the mcastq lock. */
176static void trigger_mcastq(struct ath_hal *ah,
177 struct ath_txq *mcastq, struct ath_txq *cabq)
178{
179 spin_lock_bh(&cabq->axq_lock);
180
181 if (!list_empty(&mcastq->axq_q))
182 empty_mcastq_into_cabq(ah, mcastq, cabq);
183
184 /* cabq is gated by beacon so it is safe to start here */
185 if (!list_empty(&cabq->axq_q))
186 ath9k_hw_txstart(ah, cabq->axq_qnum);
187
188 spin_unlock_bh(&cabq->axq_lock);
189}
190
191/*
192 * Generate beacon frame and queue cab data for a vap.
193 *
194 * Updates the contents of the beacon frame. It is assumed that the buffer for
195 * the beacon frame has been allocated in the ATH object, and simply needs to
196 * be filled for this cycle. Also, any CAB (crap after beacon?) traffic will
197 * be added to the beacon frame at this point.
198*/
199static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
200{
201 struct ath_hal *ah = sc->sc_ah;
202 struct ath_buf *bf;
203 struct ath_vap *avp;
204 struct sk_buff *skb;
205 int cabq_depth;
206 int mcastq_depth;
207 int is_beacon_dtim = 0;
208 unsigned int curlen;
209 struct ath_txq *cabq;
210 struct ath_txq *mcastq;
211 avp = sc->sc_vaps[if_id];
212
213 mcastq = &avp->av_mcastq;
214 cabq = sc->sc_cabq;
215
216 ASSERT(avp);
217
218 if (avp->av_bcbuf == NULL) {
219 DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",
220 __func__, avp, avp->av_bcbuf);
221 return NULL;
222 }
223 bf = avp->av_bcbuf;
224 skb = (struct sk_buff *) bf->bf_mpdu;
225
226 /*
227 * Update dynamic beacon contents. If this returns
228 * non-zero then we need to remap the memory because
229 * the beacon frame changed size (probably because
230 * of the TIM bitmap).
231 */
232 curlen = skb->len;
233
234 /* XXX: spin_lock_bh should not be used here, but sparse bitches
235 * otherwise. We should fix sparse :) */
236 spin_lock_bh(&mcastq->axq_lock);
237 mcastq_depth = avp->av_mcastq.axq_depth;
238
239 if (ath_update_beacon(sc, if_id, &avp->av_boff, skb, mcastq_depth) ==
240 1) {
241 ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
242 get_dma_mem_context(bf, bf_dmacontext));
243 bf->bf_buf_addr = ath_skb_map_single(sc, skb, PCI_DMA_TODEVICE,
244 get_dma_mem_context(bf, bf_dmacontext));
245 } else {
246 pci_dma_sync_single_for_cpu(sc->pdev,
247 bf->bf_buf_addr,
248 skb_tailroom(skb),
249 PCI_DMA_TODEVICE);
250 }
251
252 /*
253 * if the CABQ traffic from previous DTIM is pending and the current
254 * beacon is also a DTIM.
255 * 1) if there is only one vap let the cab traffic continue.
256 * 2) if there are more than one vap and we are using staggered
257 * beacons, then drain the cabq by dropping all the frames in
258 * the cabq so that the current vaps cab traffic can be scheduled.
259 */
260 spin_lock_bh(&cabq->axq_lock);
261 cabq_depth = cabq->axq_depth;
262 spin_unlock_bh(&cabq->axq_lock);
263
264 is_beacon_dtim = avp->av_boff.bo_tim[4] & 1;
265
266 if (mcastq_depth && is_beacon_dtim && cabq_depth) {
267 /*
268 * Unlock the cabq lock as ath_tx_draintxq acquires
269 * the lock again which is a common function and that
270 * acquires txq lock inside.
271 */
272 if (sc->sc_nvaps > 1) {
273 ath_tx_draintxq(sc, cabq, false);
274 DPRINTF(sc, ATH_DBG_BEACON,
275 "%s: flush previous cabq traffic\n", __func__);
276 }
277 }
278
279 /* Construct tx descriptor. */
280 ath_beacon_setup(sc, avp, bf);
281
282 /*
283 * Enable the CAB queue before the beacon queue to
284 * insure cab frames are triggered by this beacon.
285 */
286 if (is_beacon_dtim)
287 trigger_mcastq(ah, mcastq, cabq);
288
289 spin_unlock_bh(&mcastq->axq_lock);
290 return bf;
291}
292
293/*
294 * Startup beacon transmission for adhoc mode when they are sent entirely
295 * by the hardware using the self-linked descriptor + veol trick.
296*/
297
298static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
299{
300 struct ath_hal *ah = sc->sc_ah;
301 struct ath_buf *bf;
302 struct ath_vap *avp;
303 struct sk_buff *skb;
304
305 avp = sc->sc_vaps[if_id];
306 ASSERT(avp);
307
308 if (avp->av_bcbuf == NULL) {
309 DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",
310 __func__, avp, avp != NULL ? avp->av_bcbuf : NULL);
311 return;
312 }
313 bf = avp->av_bcbuf;
314 skb = (struct sk_buff *) bf->bf_mpdu;
315
316 /* Construct tx descriptor. */
317 ath_beacon_setup(sc, avp, bf);
318
319 /* NB: caller is known to have already stopped tx dma */
320 ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
321 ath9k_hw_txstart(ah, sc->sc_bhalq);
322 DPRINTF(sc, ATH_DBG_BEACON, "%s: TXDP%u = %llx (%p)\n", __func__,
323 sc->sc_bhalq, ito64(bf->bf_daddr), bf->bf_desc);
324}
325
326/*
327 * Setup a h/w transmit queue for beacons.
328 *
329 * This function allocates an information structure (struct ath9k_txq_info)
330 * on the stack, sets some specific parameters (zero out channel width
331 * min/max, and enable aifs). The info structure does not need to be
332 * persistant.
333*/
334
335int ath_beaconq_setup(struct ath_hal *ah)
336{
337 struct ath9k_txq_info qi;
338
339 memzero(&qi, sizeof(qi));
340 qi.tqi_aifs = 1;
341 qi.tqi_cwmin = 0;
342 qi.tqi_cwmax = 0;
343 /* NB: don't enable any interrupts */
344 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
345}
346
347
348/*
349 * Allocate and setup an initial beacon frame.
350 *
351 * Allocate a beacon state variable for a specific VAP instance created on
352 * the ATH interface. This routine also calculates the beacon "slot" for
353 * staggared beacons in the mBSSID case.
354*/
355
356int ath_beacon_alloc(struct ath_softc *sc, int if_id)
357{
358 struct ath_vap *avp;
359 struct ieee80211_hdr *wh;
360 struct ath_buf *bf;
361 struct sk_buff *skb;
362
363 avp = sc->sc_vaps[if_id];
364 ASSERT(avp);
365
366 /* Allocate a beacon descriptor if we haven't done so. */
367 if (!avp->av_bcbuf) {
368 /*
369 * Allocate beacon state for hostap/ibss. We know
370 * a buffer is available.
371 */
372
373 avp->av_bcbuf = list_first_entry(&sc->sc_bbuf,
374 struct ath_buf, list);
375 list_del(&avp->av_bcbuf->list);
376
377 if (sc->sc_opmode == ATH9K_M_HOSTAP ||
378 !sc->sc_ah->ah_caps.halVEOLSupport) {
379 int slot;
380 /*
381 * Assign the vap to a beacon xmit slot. As
382 * above, this cannot fail to find one.
383 */
384 avp->av_bslot = 0;
385 for (slot = 0; slot < ATH_BCBUF; slot++)
386 if (sc->sc_bslot[slot] == ATH_IF_ID_ANY) {
387 /*
388 * XXX hack, space out slots to better
389 * deal with misses
390 */
391 if (slot+1 < ATH_BCBUF &&
392 sc->sc_bslot[slot+1] ==
393 ATH_IF_ID_ANY) {
394 avp->av_bslot = slot+1;
395 break;
396 }
397 avp->av_bslot = slot;
398 /* NB: keep looking for a double slot */
399 }
400 BUG_ON(sc->sc_bslot[avp->av_bslot] != ATH_IF_ID_ANY);
401 sc->sc_bslot[avp->av_bslot] = if_id;
402 sc->sc_nbcnvaps++;
403 }
404 }
405
406 /* release the previous beacon frame , if it already exists. */
407 bf = avp->av_bcbuf;
408 if (bf->bf_mpdu != NULL) {
409 skb = (struct sk_buff *)bf->bf_mpdu;
410 ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
411 get_dma_mem_context(bf, bf_dmacontext));
412 dev_kfree_skb_any(skb);
413 bf->bf_mpdu = NULL;
414 }
415
416 /*
417 * NB: the beacon data buffer must be 32-bit aligned;
418 * we assume the wbuf routines will return us something
419 * with this alignment (perhaps should assert).
420 * FIXME: Fill avp->av_boff.bo_tim,avp->av_btxctl.txpower and
421 * avp->av_btxctl.shortPreamble
422 */
423 skb = ieee80211_beacon_get(sc->hw, avp->av_if_data);
424 if (skb == NULL) {
425 DPRINTF(sc, ATH_DBG_BEACON, "%s: cannot get skb\n",
426 __func__);
427 return -ENOMEM;
428 }
429
430 /*
431 * Calculate a TSF adjustment factor required for
432 * staggered beacons. Note that we assume the format
433 * of the beacon frame leaves the tstamp field immediately
434 * following the header.
435 */
436 if (avp->av_bslot > 0) {
437 u64 tsfadjust;
438 __le64 val;
439 int intval;
440
441 /* FIXME: Use default value for now: Sujith */
442
443 intval = ATH_DEFAULT_BINTVAL;
444
445 /*
446 * The beacon interval is in TU's; the TSF in usecs.
447 * We figure out how many TU's to add to align the
448 * timestamp then convert to TSF units and handle
449 * byte swapping before writing it in the frame.
450 * The hardware will then add this each time a beacon
451 * frame is sent. Note that we align vap's 1..N
452 * and leave vap 0 untouched. This means vap 0
453 * has a timestamp in one beacon interval while the
454 * others get a timestamp aligned to the next interval.
455 */
456 tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
457 val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
458
459 DPRINTF(sc, ATH_DBG_BEACON,
460 "%s: %s beacons, bslot %d intval %u tsfadjust %llu\n",
461 __func__, "stagger",
462 avp->av_bslot, intval, (unsigned long long)tsfadjust);
463
464 wh = (struct ieee80211_hdr *)skb->data;
465 memcpy(&wh[1], &val, sizeof(val));
466 }
467
468 bf->bf_buf_addr = ath_skb_map_single(sc, skb, PCI_DMA_TODEVICE,
469 get_dma_mem_context(bf, bf_dmacontext));
470 bf->bf_mpdu = skb;
471
472 return 0;
473}
474
475/*
476 * Reclaim beacon resources and return buffer to the pool.
477 *
478 * Checks the VAP to put the beacon frame buffer back to the ATH object
479 * queue, and de-allocates any wbuf frames that were sent as CAB traffic.
480*/
481
482void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
483{
484 if (avp->av_bcbuf != NULL) {
485 struct ath_buf *bf;
486
487 if (avp->av_bslot != -1) {
488 sc->sc_bslot[avp->av_bslot] = ATH_IF_ID_ANY;
489 sc->sc_nbcnvaps--;
490 }
491
492 bf = avp->av_bcbuf;
493 if (bf->bf_mpdu != NULL) {
494 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
495 ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
496 get_dma_mem_context(bf, bf_dmacontext));
497 dev_kfree_skb_any(skb);
498 bf->bf_mpdu = NULL;
499 }
500 list_add_tail(&bf->list, &sc->sc_bbuf);
501
502 avp->av_bcbuf = NULL;
503 }
504}
505
506/*
507 * Reclaim beacon resources and return buffer to the pool.
508 *
509 * This function will free any wbuf frames that are still attached to the
510 * beacon buffers in the ATH object. Note that this does not de-allocate
511 * any wbuf objects that are in the transmit queue and have not yet returned
512 * to the ATH object.
513*/
514
515void ath_beacon_free(struct ath_softc *sc)
516{
517 struct ath_buf *bf;
518
519 list_for_each_entry(bf, &sc->sc_bbuf, list) {
520 if (bf->bf_mpdu != NULL) {
521 struct sk_buff *skb = (struct sk_buff *) bf->bf_mpdu;
522 ath_skb_unmap_single(sc, skb, PCI_DMA_TODEVICE,
523 get_dma_mem_context(bf, bf_dmacontext));
524 dev_kfree_skb_any(skb);
525 bf->bf_mpdu = NULL;
526 }
527 }
528}
529
530/*
531 * Tasklet for Sending Beacons
532 *
533 * Transmit one or more beacon frames at SWBA. Dynamic updates to the frame
534 * contents are done as needed and the slot time is also adjusted based on
535 * current state.
536 *
537 * This tasklet is not scheduled, it's called in ISR context.
538*/
539
540void ath9k_beacon_tasklet(unsigned long data)
541{
542#define TSF_TO_TU(_h,_l) \
543 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
544
545 struct ath_softc *sc = (struct ath_softc *)data;
546 struct ath_hal *ah = sc->sc_ah;
547 struct ath_buf *bf = NULL;
548 int slot, if_id;
549 u32 bfaddr;
550 u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
551 u32 show_cycles = 0;
552 u32 bc = 0; /* beacon count */
553 u64 tsf;
554 u32 tsftu;
555 u16 intval;
556
557 if (sc->sc_noreset) {
558 show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
559 &rx_clear,
560 &rx_frame,
561 &tx_frame);
562 }
563
564 /*
565 * Check if the previous beacon has gone out. If
566 * not don't try to post another, skip this period
567 * and wait for the next. Missed beacons indicate
568 * a problem and should not occur. If we miss too
569 * many consecutive beacons reset the device.
570 */
571 if (ath9k_hw_numtxpending(ah, sc->sc_bhalq) != 0) {
572 sc->sc_bmisscount++;
573 /* XXX: doth needs the chanchange IE countdown decremented.
574 * We should consider adding a mac80211 call to indicate
575 * a beacon miss so appropriate action could be taken
576 * (in that layer).
577 */
578 if (sc->sc_bmisscount < BSTUCK_THRESH) {
579 if (sc->sc_noreset) {
580 DPRINTF(sc, ATH_DBG_BEACON,
581 "%s: missed %u consecutive beacons\n",
582 __func__, sc->sc_bmisscount);
583 if (show_cycles) {
584 /*
585 * Display cycle counter stats
586 * from HW to aide in debug of
587 * stickiness.
588 */
589 DPRINTF(sc,
590 ATH_DBG_BEACON,
591 "%s: busy times: rx_clear=%d, "
592 "rx_frame=%d, tx_frame=%d\n",
593 __func__, rx_clear, rx_frame,
594 tx_frame);
595 } else {
596 DPRINTF(sc,
597 ATH_DBG_BEACON,
598 "%s: unable to obtain "
599 "busy times\n", __func__);
600 }
601 } else {
602 DPRINTF(sc, ATH_DBG_BEACON,
603 "%s: missed %u consecutive beacons\n",
604 __func__, sc->sc_bmisscount);
605 }
606 } else if (sc->sc_bmisscount >= BSTUCK_THRESH) {
607 if (sc->sc_noreset) {
608 if (sc->sc_bmisscount == BSTUCK_THRESH) {
609 DPRINTF(sc,
610 ATH_DBG_BEACON,
611 "%s: beacon is officially "
612 "stuck\n", __func__);
613 ath9k_hw_dmaRegDump(ah);
614 }
615 } else {
616 DPRINTF(sc, ATH_DBG_BEACON,
617 "%s: beacon is officially stuck\n",
618 __func__);
619 ath_bstuck_process(sc);
620 }
621 }
622
623 return;
624 }
625 if (sc->sc_bmisscount != 0) {
626 if (sc->sc_noreset) {
627 DPRINTF(sc,
628 ATH_DBG_BEACON,
629 "%s: resume beacon xmit after %u misses\n",
630 __func__, sc->sc_bmisscount);
631 } else {
632 DPRINTF(sc, ATH_DBG_BEACON,
633 "%s: resume beacon xmit after %u misses\n",
634 __func__, sc->sc_bmisscount);
635 }
636 sc->sc_bmisscount = 0;
637 }
638
639 /*
640 * Generate beacon frames. we are sending frames
641 * staggered so calculate the slot for this frame based
642 * on the tsf to safeguard against missing an swba.
643 */
644
645 /* FIXME: Use default value for now - Sujith */
646 intval = ATH_DEFAULT_BINTVAL;
647
648 tsf = ath9k_hw_gettsf64(ah);
649 tsftu = TSF_TO_TU(tsf>>32, tsf);
650 slot = ((tsftu % intval) * ATH_BCBUF) / intval;
651 if_id = sc->sc_bslot[(slot + 1) % ATH_BCBUF];
652 DPRINTF(sc, ATH_DBG_BEACON,
653 "%s: slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
654 __func__, slot, (unsigned long long) tsf, tsftu,
655 intval, if_id);
656 bfaddr = 0;
657 if (if_id != ATH_IF_ID_ANY) {
658 bf = ath_beacon_generate(sc, if_id);
659 if (bf != NULL) {
660 bfaddr = bf->bf_daddr;
661 bc = 1;
662 }
663 }
664 /*
665 * Handle slot time change when a non-ERP station joins/leaves
666 * an 11g network. The 802.11 layer notifies us via callback,
667 * we mark updateslot, then wait one beacon before effecting
668 * the change. This gives associated stations at least one
669 * beacon interval to note the state change.
670 *
671 * NB: The slot time change state machine is clocked according
672 * to whether we are bursting or staggering beacons. We
673 * recognize the request to update and record the current
674 * slot then don't transition until that slot is reached
675 * again. If we miss a beacon for that slot then we'll be
676 * slow to transition but we'll be sure at least one beacon
677 * interval has passed. When bursting slot is always left
678 * set to ATH_BCBUF so this check is a noop.
679 */
680 /* XXX locking */
681 if (sc->sc_updateslot == UPDATE) {
682 sc->sc_updateslot = COMMIT; /* commit next beacon */
683 sc->sc_slotupdate = slot;
684 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
685 ath_setslottime(sc); /* commit change to hardware */
686
687 if (bfaddr != 0) {
688 /*
689 * Stop any current dma and put the new frame(s) on the queue.
690 * This should never fail since we check above that no frames
691 * are still pending on the queue.
692 */
693 if (!ath9k_hw_stoptxdma(ah, sc->sc_bhalq)) {
694 DPRINTF(sc, ATH_DBG_FATAL,
695 "%s: beacon queue %u did not stop?\n",
696 __func__, sc->sc_bhalq);
697 /* NB: the HAL still stops DMA, so proceed */
698 }
699
700 /* NB: cabq traffic should already be queued and primed */
701 ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bfaddr);
702 ath9k_hw_txstart(ah, sc->sc_bhalq);
703
704 sc->ast_be_xmit += bc; /* XXX per-vap? */
705 }
706#undef TSF_TO_TU
707}
708
709/*
710 * Tasklet for Beacon Stuck processing
711 *
712 * Processing for Beacon Stuck.
713 * Basically calls the ath_internal_reset function to reset the chip.
714*/
715
716void ath_bstuck_process(struct ath_softc *sc)
717{
718 DPRINTF(sc, ATH_DBG_BEACON,
719 "%s: stuck beacon; resetting (bmiss count %u)\n",
720 __func__, sc->sc_bmisscount);
721 ath_internal_reset(sc);
722}
723
724/*
725 * Configure the beacon and sleep timers.
726 *
727 * When operating as an AP this resets the TSF and sets
728 * up the hardware to notify us when we need to issue beacons.
729 *
730 * When operating in station mode this sets up the beacon
731 * timers according to the timestamp of the last received
732 * beacon and the current TSF, configures PCF and DTIM
733 * handling, programs the sleep registers so the hardware
734 * will wakeup in time to receive beacons, and configures
735 * the beacon miss handling so we'll receive a BMISS
736 * interrupt when we stop seeing beacons from the AP
737 * we've associated with.
738 */
739
740void ath_beacon_config(struct ath_softc *sc, int if_id)
741{
742#define TSF_TO_TU(_h,_l) \
743 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
744 struct ath_hal *ah = sc->sc_ah;
745 u32 nexttbtt, intval;
746 struct ath_beacon_config conf;
747 enum ath9k_opmode av_opmode;
748
749 if (if_id != ATH_IF_ID_ANY)
750 av_opmode = sc->sc_vaps[if_id]->av_opmode;
751 else
752 av_opmode = sc->sc_opmode;
753
754 memzero(&conf, sizeof(struct ath_beacon_config));
755
756 /* FIXME: Use default values for now - Sujith */
757 /* Query beacon configuration first */
758 /*
759 * Protocol stack doesn't support dynamic beacon configuration,
760 * use default configurations.
761 */
762 conf.beacon_interval = ATH_DEFAULT_BINTVAL;
763 conf.listen_interval = 1;
764 conf.dtim_period = conf.beacon_interval;
765 conf.dtim_count = 1;
766 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
767
768 /* extract tstamp from last beacon and convert to TU */
769 nexttbtt = TSF_TO_TU(get_unaligned_le32(conf.u.last_tstamp + 4),
770 get_unaligned_le32(conf.u.last_tstamp));
771 /* XXX conditionalize multi-bss support? */
772 if (sc->sc_opmode == ATH9K_M_HOSTAP) {
773 /*
774 * For multi-bss ap support beacons are either staggered
775 * evenly over N slots or burst together. For the former
776 * arrange for the SWBA to be delivered for each slot.
777 * Slots that are not occupied will generate nothing.
778 */
779 /* NB: the beacon interval is kept internally in TU's */
780 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
781 intval /= ATH_BCBUF; /* for staggered beacons */
782 } else {
783 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
784 }
785
786 if (nexttbtt == 0) /* e.g. for ap mode */
787 nexttbtt = intval;
788 else if (intval) /* NB: can be 0 for monitor mode */
789 nexttbtt = roundup(nexttbtt, intval);
790 DPRINTF(sc, ATH_DBG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
791 __func__, nexttbtt, intval, conf.beacon_interval);
792 /* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */
793 if (sc->sc_opmode == ATH9K_M_STA) {
794 struct ath9k_beacon_state bs;
795 u64 tsf;
796 u32 tsftu;
797 int dtimperiod, dtimcount, sleepduration;
798 int cfpperiod, cfpcount;
799
800 /*
801 * Setup dtim and cfp parameters according to
802 * last beacon we received (which may be none).
803 */
804 dtimperiod = conf.dtim_period;
805 if (dtimperiod <= 0) /* NB: 0 if not known */
806 dtimperiod = 1;
807 dtimcount = conf.dtim_count;
808 if (dtimcount >= dtimperiod) /* NB: sanity check */
809 dtimcount = 0; /* XXX? */
810 cfpperiod = 1; /* NB: no PCF support yet */
811 cfpcount = 0;
812
813 sleepduration = conf.listen_interval * intval;
814 if (sleepduration <= 0)
815 sleepduration = intval;
816
817#define FUDGE 2
818 /*
819 * Pull nexttbtt forward to reflect the current
820 * TSF and calculate dtim+cfp state for the result.
821 */
822 tsf = ath9k_hw_gettsf64(ah);
823 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
824 do {
825 nexttbtt += intval;
826 if (--dtimcount < 0) {
827 dtimcount = dtimperiod - 1;
828 if (--cfpcount < 0)
829 cfpcount = cfpperiod - 1;
830 }
831 } while (nexttbtt < tsftu);
832#undef FUDGE
833 memzero(&bs, sizeof(bs));
834 bs.bs_intval = intval;
835 bs.bs_nexttbtt = nexttbtt;
836 bs.bs_dtimperiod = dtimperiod*intval;
837 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
838 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
839 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
840 bs.bs_cfpmaxduration = 0;
841 /*
842 * Calculate the number of consecutive beacons to miss
843 * before taking a BMISS interrupt. The configuration
844 * is specified in TU so we only need calculate based
845 * on the beacon interval. Note that we clamp the
846 * result to at most 15 beacons.
847 */
848 if (sleepduration > intval) {
849 bs.bs_bmissthreshold =
850 conf.listen_interval *
851 ATH_DEFAULT_BMISS_LIMIT / 2;
852 } else {
853 bs.bs_bmissthreshold =
854 DIV_ROUND_UP(conf.bmiss_timeout, intval);
855 if (bs.bs_bmissthreshold > 15)
856 bs.bs_bmissthreshold = 15;
857 else if (bs.bs_bmissthreshold <= 0)
858 bs.bs_bmissthreshold = 1;
859 }
860
861 /*
862 * Calculate sleep duration. The configuration is
863 * given in ms. We insure a multiple of the beacon
864 * period is used. Also, if the sleep duration is
865 * greater than the DTIM period then it makes senses
866 * to make it a multiple of that.
867 *
868 * XXX fixed at 100ms
869 */
870
871 bs.bs_sleepduration =
872 roundup(IEEE80211_MS_TO_TU(100), sleepduration);
873 if (bs.bs_sleepduration > bs.bs_dtimperiod)
874 bs.bs_sleepduration = bs.bs_dtimperiod;
875
876 DPRINTF(sc, ATH_DBG_BEACON,
877 "%s: tsf %llu "
878 "tsf:tu %u "
879 "intval %u "
880 "nexttbtt %u "
881 "dtim %u "
882 "nextdtim %u "
883 "bmiss %u "
884 "sleep %u "
885 "cfp:period %u "
886 "maxdur %u "
887 "next %u "
888 "timoffset %u\n"
889 , __func__
890 , (unsigned long long)tsf, tsftu
891 , bs.bs_intval
892 , bs.bs_nexttbtt
893 , bs.bs_dtimperiod
894 , bs.bs_nextdtim
895 , bs.bs_bmissthreshold
896 , bs.bs_sleepduration
897 , bs.bs_cfpperiod
898 , bs.bs_cfpmaxduration
899 , bs.bs_cfpnext
900 , bs.bs_timoffset
901 );
902
903 ath9k_hw_set_interrupts(ah, 0);
904 ath9k_hw_set_sta_beacon_timers(ah, &bs);
905 sc->sc_imask |= ATH9K_INT_BMISS;
906 ath9k_hw_set_interrupts(ah, sc->sc_imask);
907 } else {
908 u64 tsf;
909 u32 tsftu;
910 ath9k_hw_set_interrupts(ah, 0);
911 if (nexttbtt == intval)
912 intval |= ATH9K_BEACON_RESET_TSF;
913 if (sc->sc_opmode == ATH9K_M_IBSS) {
914 /*
915 * Pull nexttbtt forward to reflect the current
916 * TSF .
917 */
918#define FUDGE 2
919 if (!(intval & ATH9K_BEACON_RESET_TSF)) {
920 tsf = ath9k_hw_gettsf64(ah);
921 tsftu = TSF_TO_TU((u32)(tsf>>32),
922 (u32)tsf) + FUDGE;
923 do {
924 nexttbtt += intval;
925 } while (nexttbtt < tsftu);
926 }
927#undef FUDGE
928 DPRINTF(sc, ATH_DBG_BEACON,
929 "%s: IBSS nexttbtt %u intval %u (%u)\n",
930 __func__, nexttbtt,
931 intval & ~ATH9K_BEACON_RESET_TSF,
932 conf.beacon_interval);
933
934 /*
935 * In IBSS mode enable the beacon timers but only
936 * enable SWBA interrupts if we need to manually
937 * prepare beacon frames. Otherwise we use a
938 * self-linked tx descriptor and let the hardware
939 * deal with things.
940 */
941 intval |= ATH9K_BEACON_ENA;
942 if (!ah->ah_caps.halVEOLSupport)
943 sc->sc_imask |= ATH9K_INT_SWBA;
944 ath_beaconq_config(sc);
945 } else if (sc->sc_opmode == ATH9K_M_HOSTAP) {
946 /*
947 * In AP mode we enable the beacon timers and
948 * SWBA interrupts to prepare beacon frames.
949 */
950 intval |= ATH9K_BEACON_ENA;
951 sc->sc_imask |= ATH9K_INT_SWBA; /* beacon prepare */
952 ath_beaconq_config(sc);
953 }
954 ath9k_hw_beaconinit(ah, nexttbtt, intval);
955 sc->sc_bmisscount = 0;
956 ath9k_hw_set_interrupts(ah, sc->sc_imask);
957 /*
958 * When using a self-linked beacon descriptor in
959 * ibss mode load it once here.
960 */
961 if (sc->sc_opmode == ATH9K_M_IBSS && ah->ah_caps.halVEOLSupport)
962 ath_beacon_start_adhoc(sc, 0);
963 }
964#undef TSF_TO_TU
965}
966
967/* Function to collect beacon rssi data and resync beacon if necessary */
968
969void ath_beacon_sync(struct ath_softc *sc, int if_id)
970{
971 /*
972 * Resync beacon timers using the tsf of the
973 * beacon frame we just received.
974 */
975 ath_beacon_config(sc, if_id);
976 sc->sc_beacons = 1;
977}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-31 22:33:42 -0400