diff options
Diffstat (limited to 'drivers/net/wireless/ath5k/reset.c')
| -rw-r--r-- | drivers/net/wireless/ath5k/reset.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath5k/reset.c b/drivers/net/wireless/ath5k/reset.c index 7a17d31b2fd9..5f72c111c2e8 100644 --- a/drivers/net/wireless/ath5k/reset.c +++ b/drivers/net/wireless/ath5k/reset.c | |||
| @@ -26,7 +26,7 @@ | |||
| 26 | \*****************************/ | 26 | \*****************************/ |
| 27 | 27 | ||
| 28 | #include <linux/pci.h> /* To determine if a card is pci-e */ | 28 | #include <linux/pci.h> /* To determine if a card is pci-e */ |
| 29 | #include <linux/bitops.h> /* For get_bitmask_order */ | 29 | #include <linux/log2.h> |
| 30 | #include "ath5k.h" | 30 | #include "ath5k.h" |
| 31 | #include "reg.h" | 31 | #include "reg.h" |
| 32 | #include "base.h" | 32 | #include "base.h" |
| @@ -69,10 +69,10 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah, | |||
| 69 | 69 | ||
| 70 | /* Get exponent | 70 | /* Get exponent |
| 71 | * ALGO: coef_exp = 14 - highest set bit position */ | 71 | * ALGO: coef_exp = 14 - highest set bit position */ |
| 72 | coef_exp = get_bitmask_order(coef_scaled); | 72 | coef_exp = ilog2(coef_scaled); |
| 73 | 73 | ||
| 74 | /* Doesn't make sense if it's zero*/ | 74 | /* Doesn't make sense if it's zero*/ |
| 75 | if (!coef_exp) | 75 | if (!coef_scaled || !coef_exp) |
| 76 | return -EINVAL; | 76 | return -EINVAL; |
| 77 | 77 | ||
| 78 | /* Note: we've shifted coef_scaled by 24 */ | 78 | /* Note: we've shifted coef_scaled by 24 */ |
| @@ -359,7 +359,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) | |||
| 359 | mode |= AR5K_PHY_MODE_FREQ_5GHZ; | 359 | mode |= AR5K_PHY_MODE_FREQ_5GHZ; |
| 360 | 360 | ||
| 361 | if (ah->ah_radio == AR5K_RF5413) | 361 | if (ah->ah_radio == AR5K_RF5413) |
| 362 | clock |= AR5K_PHY_PLL_40MHZ_5413; | 362 | clock = AR5K_PHY_PLL_40MHZ_5413; |
| 363 | else | 363 | else |
| 364 | clock |= AR5K_PHY_PLL_40MHZ; | 364 | clock |= AR5K_PHY_PLL_40MHZ; |
| 365 | 365 | ||
