diff options
Diffstat (limited to 'drivers/net/wireless/ath5k/phy.c')
-rw-r--r-- | drivers/net/wireless/ath5k/phy.c | 66 |
1 files changed, 33 insertions, 33 deletions
diff --git a/drivers/net/wireless/ath5k/phy.c b/drivers/net/wireless/ath5k/phy.c index b95941797141..8b576b314cf5 100644 --- a/drivers/net/wireless/ath5k/phy.c +++ b/drivers/net/wireless/ath5k/phy.c | |||
@@ -1018,7 +1018,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah, | |||
1018 | int obdb = -1, bank = -1; | 1018 | int obdb = -1, bank = -1; |
1019 | u32 ee_mode; | 1019 | u32 ee_mode; |
1020 | 1020 | ||
1021 | AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX); | 1021 | AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX); |
1022 | 1022 | ||
1023 | rf = ah->ah_rf_banks; | 1023 | rf = ah->ah_rf_banks; |
1024 | 1024 | ||
@@ -1038,8 +1038,8 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah, | |||
1038 | } | 1038 | } |
1039 | 1039 | ||
1040 | /* Modify bank 0 */ | 1040 | /* Modify bank 0 */ |
1041 | if (channel->val & CHANNEL_2GHZ) { | 1041 | if (channel->hw_value & CHANNEL_2GHZ) { |
1042 | if (channel->val & CHANNEL_CCK) | 1042 | if (channel->hw_value & CHANNEL_CCK) |
1043 | ee_mode = AR5K_EEPROM_MODE_11B; | 1043 | ee_mode = AR5K_EEPROM_MODE_11B; |
1044 | else | 1044 | else |
1045 | ee_mode = AR5K_EEPROM_MODE_11G; | 1045 | ee_mode = AR5K_EEPROM_MODE_11G; |
@@ -1058,10 +1058,10 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah, | |||
1058 | } else { | 1058 | } else { |
1059 | /* For 11a, Turbo and XR */ | 1059 | /* For 11a, Turbo and XR */ |
1060 | ee_mode = AR5K_EEPROM_MODE_11A; | 1060 | ee_mode = AR5K_EEPROM_MODE_11A; |
1061 | obdb = channel->freq >= 5725 ? 3 : | 1061 | obdb = channel->center_freq >= 5725 ? 3 : |
1062 | (channel->freq >= 5500 ? 2 : | 1062 | (channel->center_freq >= 5500 ? 2 : |
1063 | (channel->freq >= 5260 ? 1 : | 1063 | (channel->center_freq >= 5260 ? 1 : |
1064 | (channel->freq > 4000 ? 0 : -1))); | 1064 | (channel->center_freq > 4000 ? 0 : -1))); |
1065 | 1065 | ||
1066 | if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6], | 1066 | if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6], |
1067 | ee->ee_pwd_84, 1, 51, 3, true)) | 1067 | ee->ee_pwd_84, 1, 51, 3, true)) |
@@ -1119,12 +1119,12 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah, | |||
1119 | int obdb = -1, bank = -1; | 1119 | int obdb = -1, bank = -1; |
1120 | u32 ee_mode; | 1120 | u32 ee_mode; |
1121 | 1121 | ||
1122 | AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX); | 1122 | AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX); |
1123 | 1123 | ||
1124 | rf = ah->ah_rf_banks; | 1124 | rf = ah->ah_rf_banks; |
1125 | 1125 | ||
1126 | if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_2112A | 1126 | if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_2112A |
1127 | && !test_bit(MODE_IEEE80211A, ah->ah_capabilities.cap_mode)){ | 1127 | && !test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)){ |
1128 | rf_ini = rfregs_2112a; | 1128 | rf_ini = rfregs_2112a; |
1129 | rf_size = ARRAY_SIZE(rfregs_5112a); | 1129 | rf_size = ARRAY_SIZE(rfregs_5112a); |
1130 | if (mode < 2) { | 1130 | if (mode < 2) { |
@@ -1156,8 +1156,8 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah, | |||
1156 | } | 1156 | } |
1157 | 1157 | ||
1158 | /* Modify bank 6 */ | 1158 | /* Modify bank 6 */ |
1159 | if (channel->val & CHANNEL_2GHZ) { | 1159 | if (channel->hw_value & CHANNEL_2GHZ) { |
1160 | if (channel->val & CHANNEL_OFDM) | 1160 | if (channel->hw_value & CHANNEL_OFDM) |
1161 | ee_mode = AR5K_EEPROM_MODE_11G; | 1161 | ee_mode = AR5K_EEPROM_MODE_11G; |
1162 | else | 1162 | else |
1163 | ee_mode = AR5K_EEPROM_MODE_11B; | 1163 | ee_mode = AR5K_EEPROM_MODE_11B; |
@@ -1173,10 +1173,10 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah, | |||
1173 | } else { | 1173 | } else { |
1174 | /* For 11a, Turbo and XR */ | 1174 | /* For 11a, Turbo and XR */ |
1175 | ee_mode = AR5K_EEPROM_MODE_11A; | 1175 | ee_mode = AR5K_EEPROM_MODE_11A; |
1176 | obdb = channel->freq >= 5725 ? 3 : | 1176 | obdb = channel->center_freq >= 5725 ? 3 : |
1177 | (channel->freq >= 5500 ? 2 : | 1177 | (channel->center_freq >= 5500 ? 2 : |
1178 | (channel->freq >= 5260 ? 1 : | 1178 | (channel->center_freq >= 5260 ? 1 : |
1179 | (channel->freq > 4000 ? 0 : -1))); | 1179 | (channel->center_freq > 4000 ? 0 : -1))); |
1180 | 1180 | ||
1181 | if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6], | 1181 | if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6], |
1182 | ee->ee_ob[ee_mode][obdb], 3, 279, 0, true)) | 1182 | ee->ee_ob[ee_mode][obdb], 3, 279, 0, true)) |
@@ -1219,7 +1219,7 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah, | |||
1219 | unsigned int rf_size, i; | 1219 | unsigned int rf_size, i; |
1220 | int bank = -1; | 1220 | int bank = -1; |
1221 | 1221 | ||
1222 | AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX); | 1222 | AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX); |
1223 | 1223 | ||
1224 | rf = ah->ah_rf_banks; | 1224 | rf = ah->ah_rf_banks; |
1225 | 1225 | ||
@@ -1445,7 +1445,7 @@ static u32 ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel) | |||
1445 | * newer chipsets like the AR5212A who have a completely | 1445 | * newer chipsets like the AR5212A who have a completely |
1446 | * different RF/PHY part. | 1446 | * different RF/PHY part. |
1447 | */ | 1447 | */ |
1448 | athchan = (ath5k_hw_bitswap((channel->chan - 24) / 2, 5) << 1) | | 1448 | athchan = (ath5k_hw_bitswap((ieee80211_frequency_to_channel(channel->center_freq) - 24) / 2, 5) << 1) | |
1449 | (1 << 6) | 0x1; | 1449 | (1 << 6) | 0x1; |
1450 | 1450 | ||
1451 | return athchan; | 1451 | return athchan; |
@@ -1506,7 +1506,7 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah, | |||
1506 | struct ieee80211_channel *channel) | 1506 | struct ieee80211_channel *channel) |
1507 | { | 1507 | { |
1508 | struct ath5k_athchan_2ghz ath5k_channel_2ghz; | 1508 | struct ath5k_athchan_2ghz ath5k_channel_2ghz; |
1509 | unsigned int ath5k_channel = channel->chan; | 1509 | unsigned int ath5k_channel = ieee80211_frequency_to_channel(channel->center_freq); |
1510 | u32 data0, data1, clock; | 1510 | u32 data0, data1, clock; |
1511 | int ret; | 1511 | int ret; |
1512 | 1512 | ||
@@ -1515,9 +1515,9 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah, | |||
1515 | */ | 1515 | */ |
1516 | data0 = data1 = 0; | 1516 | data0 = data1 = 0; |
1517 | 1517 | ||
1518 | if (channel->val & CHANNEL_2GHZ) { | 1518 | if (channel->hw_value & CHANNEL_2GHZ) { |
1519 | /* Map 2GHz channel to 5GHz Atheros channel ID */ | 1519 | /* Map 2GHz channel to 5GHz Atheros channel ID */ |
1520 | ret = ath5k_hw_rf5111_chan2athchan(channel->chan, | 1520 | ret = ath5k_hw_rf5111_chan2athchan(ieee80211_frequency_to_channel(channel->center_freq), |
1521 | &ath5k_channel_2ghz); | 1521 | &ath5k_channel_2ghz); |
1522 | if (ret) | 1522 | if (ret) |
1523 | return ret; | 1523 | return ret; |
@@ -1555,7 +1555,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah, | |||
1555 | u16 c; | 1555 | u16 c; |
1556 | 1556 | ||
1557 | data = data0 = data1 = data2 = 0; | 1557 | data = data0 = data1 = data2 = 0; |
1558 | c = channel->freq; | 1558 | c = channel->center_freq; |
1559 | 1559 | ||
1560 | /* | 1560 | /* |
1561 | * Set the channel on the RF5112 or newer | 1561 | * Set the channel on the RF5112 or newer |
@@ -1604,13 +1604,13 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | |||
1604 | * Check bounds supported by the PHY | 1604 | * Check bounds supported by the PHY |
1605 | * (don't care about regulation restrictions at this point) | 1605 | * (don't care about regulation restrictions at this point) |
1606 | */ | 1606 | */ |
1607 | if ((channel->freq < ah->ah_capabilities.cap_range.range_2ghz_min || | 1607 | if ((channel->center_freq < ah->ah_capabilities.cap_range.range_2ghz_min || |
1608 | channel->freq > ah->ah_capabilities.cap_range.range_2ghz_max) && | 1608 | channel->center_freq > ah->ah_capabilities.cap_range.range_2ghz_max) && |
1609 | (channel->freq < ah->ah_capabilities.cap_range.range_5ghz_min || | 1609 | (channel->center_freq < ah->ah_capabilities.cap_range.range_5ghz_min || |
1610 | channel->freq > ah->ah_capabilities.cap_range.range_5ghz_max)) { | 1610 | channel->center_freq > ah->ah_capabilities.cap_range.range_5ghz_max)) { |
1611 | ATH5K_ERR(ah->ah_sc, | 1611 | ATH5K_ERR(ah->ah_sc, |
1612 | "channel out of supported range (%u MHz)\n", | 1612 | "channel out of supported range (%u MHz)\n", |
1613 | channel->freq); | 1613 | channel->center_freq); |
1614 | return -EINVAL; | 1614 | return -EINVAL; |
1615 | } | 1615 | } |
1616 | 1616 | ||
@@ -1632,9 +1632,9 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | |||
1632 | if (ret) | 1632 | if (ret) |
1633 | return ret; | 1633 | return ret; |
1634 | 1634 | ||
1635 | ah->ah_current_channel.freq = channel->freq; | 1635 | ah->ah_current_channel.center_freq = channel->center_freq; |
1636 | ah->ah_current_channel.val = channel->val; | 1636 | ah->ah_current_channel.hw_value = channel->hw_value; |
1637 | ah->ah_turbo = channel->val == CHANNEL_T ? true : false; | 1637 | ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false; |
1638 | 1638 | ||
1639 | return 0; | 1639 | return 0; |
1640 | } | 1640 | } |
@@ -1797,11 +1797,11 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, | |||
1797 | 1797 | ||
1798 | if (ret) { | 1798 | if (ret) { |
1799 | ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", | 1799 | ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", |
1800 | channel->freq); | 1800 | channel->center_freq); |
1801 | return ret; | 1801 | return ret; |
1802 | } | 1802 | } |
1803 | 1803 | ||
1804 | ret = ath5k_hw_noise_floor_calibration(ah, channel->freq); | 1804 | ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq); |
1805 | if (ret) | 1805 | if (ret) |
1806 | return ret; | 1806 | return ret; |
1807 | 1807 | ||
@@ -1848,10 +1848,10 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, | |||
1848 | ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); | 1848 | ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); |
1849 | 1849 | ||
1850 | done: | 1850 | done: |
1851 | ath5k_hw_noise_floor_calibration(ah, channel->freq); | 1851 | ath5k_hw_noise_floor_calibration(ah, channel->center_freq); |
1852 | 1852 | ||
1853 | /* Request RF gain */ | 1853 | /* Request RF gain */ |
1854 | if (channel->val & CHANNEL_5GHZ) { | 1854 | if (channel->hw_value & CHANNEL_5GHZ) { |
1855 | ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_max, | 1855 | ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_max, |
1856 | AR5K_PHY_PAPD_PROBE_TXPOWER) | | 1856 | AR5K_PHY_PAPD_PROBE_TXPOWER) | |
1857 | AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE); | 1857 | AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE); |