diff options
Diffstat (limited to 'drivers/net/wireless/ath5k/initvals.c')
-rw-r--r-- | drivers/net/wireless/ath5k/initvals.c | 234 |
1 files changed, 234 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath5k/initvals.c index fdbab2f08178..04c84e9da89d 100644 --- a/drivers/net/wireless/ath5k/initvals.c +++ b/drivers/net/wireless/ath5k/initvals.c | |||
@@ -1282,6 +1282,213 @@ static const struct ath5k_ini_mode rf2413_ini_mode_end[] = { | |||
1282 | { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } }, | 1282 | { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } }, |
1283 | }; | 1283 | }; |
1284 | 1284 | ||
1285 | /* Initial mode-specific settings for RF2425 (Written after ar5212_ini) */ | ||
1286 | /* XXX: No dumps for turbog yet, so turbog is the same with g here with some | ||
1287 | * minor tweaking based on dumps from other chips */ | ||
1288 | static const struct ath5k_ini_mode rf2425_ini_mode_end[] = { | ||
1289 | { AR5K_TXCFG, | ||
1290 | /* g gTurbo */ | ||
1291 | { 0x00000015, 0x00000015 } }, | ||
1292 | { AR5K_USEC_5211, | ||
1293 | { 0x12e013ab, 0x098813cf } }, | ||
1294 | { AR5K_PHY_TURBO, | ||
1295 | { 0x00000000, 0x00000003 } }, | ||
1296 | { AR5K_PHY(10), | ||
1297 | { 0x0a020001, 0x0a020001 } }, | ||
1298 | { AR5K_PHY(13), | ||
1299 | { 0x00000e0e, 0x00000e0e } }, | ||
1300 | { AR5K_PHY(14), | ||
1301 | { 0x0000000b, 0x0000000b } }, | ||
1302 | { AR5K_PHY(17), | ||
1303 | { 0x13721422, 0x13721422 } }, | ||
1304 | { AR5K_PHY(18), | ||
1305 | { 0x00199a65, 0x00199a65 } }, | ||
1306 | { AR5K_PHY(20), | ||
1307 | { 0x0c98b0da, 0x0c98b0da } }, | ||
1308 | { AR5K_PHY_SIG, | ||
1309 | { 0x7ec80d2e, 0x7ec80d2e } }, | ||
1310 | { AR5K_PHY_AGCCOARSE, | ||
1311 | { 0x3139605e, 0x3139605e } }, | ||
1312 | { AR5K_PHY(27), | ||
1313 | { 0x050cb081, 0x050cb081 } }, | ||
1314 | { AR5K_PHY_RX_DELAY, | ||
1315 | { 0x00000898, 0x000007d0 } }, | ||
1316 | { AR5K_PHY_FRAME_CTL_5211, | ||
1317 | { 0xf7b81000, 0xf7b81000 } }, | ||
1318 | { AR5K_PHY_CCKTXCTL, | ||
1319 | { 0x00000000, 0x00000000 } }, | ||
1320 | { AR5K_PHY(642), | ||
1321 | { 0xd03e6788, 0xd03e6788 } }, | ||
1322 | { AR5K_PHY_GAIN_2GHZ, | ||
1323 | { 0x0052c140, 0x0052c140 } }, | ||
1324 | { 0xa21c, | ||
1325 | { 0x1883800a, 0x1883800a } }, | ||
1326 | { 0xa324, | ||
1327 | { 0xa7cfa7cf, 0xa7cfa7cf } }, | ||
1328 | { 0xa328, | ||
1329 | { 0xa7cfa7cf, 0xa7cfa7cf } }, | ||
1330 | { 0xa32c, | ||
1331 | { 0xa7cfa7cf, 0xa7cfa7cf } }, | ||
1332 | { 0xa330, | ||
1333 | { 0xa7cfa7cf, 0xa7cfa7cf } }, | ||
1334 | { 0xa334, | ||
1335 | { 0xa7cfa7cf, 0xa7cfa7cf } }, | ||
1336 | { AR5K_DCU_FP, | ||
1337 | { 0x000003e0, 0x000003e0 } }, | ||
1338 | { 0x8060, | ||
1339 | { 0x0000000f, 0x0000000f } }, | ||
1340 | { 0x809c, | ||
1341 | { 0x00000000, 0x00000000 } }, | ||
1342 | { 0x80a0, | ||
1343 | { 0x00000000, 0x00000000 } }, | ||
1344 | { 0x8118, | ||
1345 | { 0x00000000, 0x00000000 } }, | ||
1346 | { 0x811c, | ||
1347 | { 0x00000000, 0x00000000 } }, | ||
1348 | { 0x8120, | ||
1349 | { 0x00000000, 0x00000000 } }, | ||
1350 | { 0x8124, | ||
1351 | { 0x00000000, 0x00000000 } }, | ||
1352 | { 0x8128, | ||
1353 | { 0x00000000, 0x00000000 } }, | ||
1354 | { 0x812c, | ||
1355 | { 0x00000000, 0x00000000 } }, | ||
1356 | { 0x8130, | ||
1357 | { 0x00000000, 0x00000000 } }, | ||
1358 | { 0x8134, | ||
1359 | { 0x00000000, 0x00000000 } }, | ||
1360 | { 0x8138, | ||
1361 | { 0x00000000, 0x00000000 } }, | ||
1362 | { 0x813c, | ||
1363 | { 0x00000000, 0x00000000 } }, | ||
1364 | { 0x8140, | ||
1365 | { 0x800003f9, 0x800003f9 } }, | ||
1366 | { 0x8144, | ||
1367 | { 0x00000000, 0x00000000 } }, | ||
1368 | { AR5K_PHY_AGC, | ||
1369 | { 0x00000000, 0x00000000 } }, | ||
1370 | { AR5K_PHY(11), | ||
1371 | { 0x0000a000, 0x0000a000 } }, | ||
1372 | { AR5K_PHY(15), | ||
1373 | { 0x00200400, 0x00200400 } }, | ||
1374 | { AR5K_PHY(19), | ||
1375 | { 0x1284233c, 0x1284233c } }, | ||
1376 | { AR5K_PHY_SCR, | ||
1377 | { 0x0000001f, 0x0000001f } }, | ||
1378 | { AR5K_PHY_SLMT, | ||
1379 | { 0x00000080, 0x00000080 } }, | ||
1380 | { AR5K_PHY_SCAL, | ||
1381 | { 0x0000000e, 0x0000000e } }, | ||
1382 | { AR5K_PHY(86), | ||
1383 | { 0x00081fff, 0x00081fff } }, | ||
1384 | { AR5K_PHY(96), | ||
1385 | { 0x00000000, 0x00000000 } }, | ||
1386 | { AR5K_PHY(97), | ||
1387 | { 0x02800000, 0x02800000 } }, | ||
1388 | { AR5K_PHY(104), | ||
1389 | { 0x00000000, 0x00000000 } }, | ||
1390 | { AR5K_PHY(119), | ||
1391 | { 0xfebadbe8, 0xfebadbe8 } }, | ||
1392 | { AR5K_PHY(120), | ||
1393 | { 0x00000000, 0x00000000 } }, | ||
1394 | { AR5K_PHY(121), | ||
1395 | { 0xaaaaaaaa, 0xaaaaaaaa } }, | ||
1396 | { AR5K_PHY(122), | ||
1397 | { 0x3c466478, 0x3c466478 } }, | ||
1398 | { AR5K_PHY(123), | ||
1399 | { 0x000000aa, 0x000000aa } }, | ||
1400 | { AR5K_PHY_SCLOCK, | ||
1401 | { 0x0000000c, 0x0000000c } }, | ||
1402 | { AR5K_PHY_SDELAY, | ||
1403 | { 0x000000ff, 0x000000ff } }, | ||
1404 | { AR5K_PHY_SPENDING, | ||
1405 | { 0x00000014, 0x00000014 } }, | ||
1406 | { 0xa228, | ||
1407 | { 0x000009b5, 0x000009b5 } }, | ||
1408 | { AR5K_PHY_TXPOWER_RATE3, | ||
1409 | { 0x20202020, 0x20202020 } }, | ||
1410 | { AR5K_PHY_TXPOWER_RATE4, | ||
1411 | { 0x20202020, 0x20202020 } }, | ||
1412 | { 0xa23c, | ||
1413 | { 0x93c889af, 0x93c889af } }, | ||
1414 | { 0xa24c, | ||
1415 | { 0x00000001, 0x00000001 } }, | ||
1416 | { 0xa250, | ||
1417 | { 0x0000a000, 0x0000a000 } }, | ||
1418 | { 0xa254, | ||
1419 | { 0x00000000, 0x00000000 } }, | ||
1420 | { 0xa258, | ||
1421 | { 0x0cc75380, 0x0cc75380 } }, | ||
1422 | { 0xa25c, | ||
1423 | { 0x0f0f0f01, 0x0f0f0f01 } }, | ||
1424 | { 0xa260, | ||
1425 | { 0x5f690f01, 0x5f690f01 } }, | ||
1426 | { 0xa264, | ||
1427 | { 0x00418a11, 0x00418a11 } }, | ||
1428 | { 0xa268, | ||
1429 | { 0x00000000, 0x00000000 } }, | ||
1430 | { 0xa26c, | ||
1431 | { 0x0c30c166, 0x0c30c166 } }, | ||
1432 | { 0xa270, | ||
1433 | { 0x00820820, 0x00820820 } }, | ||
1434 | { 0xa274, | ||
1435 | { 0x081a3caa, 0x081a3caa } }, | ||
1436 | { 0xa278, | ||
1437 | { 0x1ce739ce, 0x1ce739ce } }, | ||
1438 | { 0xa27c, | ||
1439 | { 0x051701ce, 0x051701ce } }, | ||
1440 | { 0xa300, | ||
1441 | { 0x16010000, 0x16010000 } }, | ||
1442 | { 0xa304, | ||
1443 | { 0x2c032402, 0x2c032402 } }, | ||
1444 | { 0xa308, | ||
1445 | { 0x48433e42, 0x48433e42 } }, | ||
1446 | { 0xa30c, | ||
1447 | { 0x5a0f500b, 0x5a0f500b } }, | ||
1448 | { 0xa310, | ||
1449 | { 0x6c4b624a, 0x6c4b624a } }, | ||
1450 | { 0xa314, | ||
1451 | { 0x7e8b748a, 0x7e8b748a } }, | ||
1452 | { 0xa318, | ||
1453 | { 0x96cf8ccb, 0x96cf8ccb } }, | ||
1454 | { 0xa31c, | ||
1455 | { 0xa34f9d0f, 0xa34f9d0f } }, | ||
1456 | { 0xa320, | ||
1457 | { 0xa7cfa58f, 0xa7cfa58f } }, | ||
1458 | { 0xa348, | ||
1459 | { 0x3fffffff, 0x3fffffff } }, | ||
1460 | { 0xa34c, | ||
1461 | { 0x3fffffff, 0x3fffffff } }, | ||
1462 | { 0xa350, | ||
1463 | { 0x3fffffff, 0x3fffffff } }, | ||
1464 | { 0xa354, | ||
1465 | { 0x0003ffff, 0x0003ffff } }, | ||
1466 | { 0xa358, | ||
1467 | { 0x79a8aa1f, 0x79a8aa1f } }, | ||
1468 | { 0xa35c, | ||
1469 | { 0x066c420f, 0x066c420f } }, | ||
1470 | { 0xa360, | ||
1471 | { 0x0f282207, 0x0f282207 } }, | ||
1472 | { 0xa364, | ||
1473 | { 0x17601685, 0x17601685 } }, | ||
1474 | { 0xa368, | ||
1475 | { 0x1f801104, 0x1f801104 } }, | ||
1476 | { 0xa36c, | ||
1477 | { 0x37a00c03, 0x37a00c03 } }, | ||
1478 | { 0xa370, | ||
1479 | { 0x3fc40883, 0x3fc40883 } }, | ||
1480 | { 0xa374, | ||
1481 | { 0x57c00803, 0x57c00803 } }, | ||
1482 | { 0xa378, | ||
1483 | { 0x5fd80682, 0x5fd80682 } }, | ||
1484 | { 0xa37c, | ||
1485 | { 0x7fe00482, 0x7fe00482 } }, | ||
1486 | { 0xa380, | ||
1487 | { 0x7f3c7bba, 0x7f3c7bba } }, | ||
1488 | { 0xa384, | ||
1489 | { 0xf3307ff0, 0xf3307ff0 } }, | ||
1490 | }; | ||
1491 | |||
1285 | /* | 1492 | /* |
1286 | * Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with | 1493 | * Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with |
1287 | * RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI) | 1494 | * RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI) |
@@ -1542,7 +1749,34 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel) | |||
1542 | ARRAY_SIZE(rf5112_ini_bbgain), | 1749 | ARRAY_SIZE(rf5112_ini_bbgain), |
1543 | rf5112_ini_bbgain, change_channel); | 1750 | rf5112_ini_bbgain, change_channel); |
1544 | 1751 | ||
1752 | } else if (ah->ah_radio == AR5K_RF2425) { | ||
1753 | |||
1754 | if (mode < 2) { | ||
1755 | ATH5K_ERR(ah->ah_sc, | ||
1756 | "unsupported channel mode: %d\n", mode); | ||
1757 | return -EINVAL; | ||
1758 | } | ||
1759 | |||
1760 | /* Map b to g */ | ||
1761 | if (mode == 2) | ||
1762 | mode = 0; | ||
1763 | else | ||
1764 | mode = mode - 3; | ||
1765 | |||
1766 | /* Override a setting from ar5212_ini */ | ||
1767 | ath5k_hw_reg_write(ah, 0x018830c6, AR5K_PHY(648)); | ||
1768 | |||
1769 | ath5k_hw_ini_mode_registers(ah, | ||
1770 | ARRAY_SIZE(rf2425_ini_mode_end), | ||
1771 | rf2425_ini_mode_end, mode); | ||
1772 | |||
1773 | /* Baseband gain table */ | ||
1774 | ath5k_hw_ini_registers(ah, | ||
1775 | ARRAY_SIZE(rf5112_ini_bbgain), | ||
1776 | rf5112_ini_bbgain, change_channel); | ||
1777 | |||
1545 | } | 1778 | } |
1779 | |||
1546 | /* For AR5211 */ | 1780 | /* For AR5211 */ |
1547 | } else if (ah->ah_version == AR5K_AR5211) { | 1781 | } else if (ah->ah_version == AR5K_AR5211) { |
1548 | 1782 | ||