diff options
Diffstat (limited to 'drivers/net/wireless/ath5k/ath5k.h')
-rw-r--r-- | drivers/net/wireless/ath5k/ath5k.h | 73 |
1 files changed, 24 insertions, 49 deletions
diff --git a/drivers/net/wireless/ath5k/ath5k.h b/drivers/net/wireless/ath5k/ath5k.h index 0eda785fe62f..b9af2b84c05f 100644 --- a/drivers/net/wireless/ath5k/ath5k.h +++ b/drivers/net/wireless/ath5k/ath5k.h | |||
@@ -165,9 +165,6 @@ | |||
165 | #define AR5K_INI_VAL_XR 0 | 165 | #define AR5K_INI_VAL_XR 0 |
166 | #define AR5K_INI_VAL_MAX 5 | 166 | #define AR5K_INI_VAL_MAX 5 |
167 | 167 | ||
168 | #define AR5K_RF5111_INI_RF_MAX_BANKS AR5K_MAX_RF_BANKS | ||
169 | #define AR5K_RF5112_INI_RF_MAX_BANKS AR5K_MAX_RF_BANKS | ||
170 | |||
171 | /* Used for BSSID etc manipulation */ | 168 | /* Used for BSSID etc manipulation */ |
172 | #define AR5K_LOW_ID(_a)( \ | 169 | #define AR5K_LOW_ID(_a)( \ |
173 | (_a)[0] | (_a)[1] << 8 | (_a)[2] << 16 | (_a)[3] << 24 \ | 170 | (_a)[0] | (_a)[1] << 8 | (_a)[2] << 16 | (_a)[3] << 24 \ |
@@ -225,6 +222,7 @@ | |||
225 | #endif | 222 | #endif |
226 | 223 | ||
227 | /* Initial values */ | 224 | /* Initial values */ |
225 | #define AR5K_INIT_CYCRSSI_THR1 2 | ||
228 | #define AR5K_INIT_TX_LATENCY 502 | 226 | #define AR5K_INIT_TX_LATENCY 502 |
229 | #define AR5K_INIT_USEC 39 | 227 | #define AR5K_INIT_USEC 39 |
230 | #define AR5K_INIT_USEC_TURBO 79 | 228 | #define AR5K_INIT_USEC_TURBO 79 |
@@ -316,7 +314,7 @@ struct ath5k_srev_name { | |||
316 | #define AR5K_SREV_AR5424 0x90 /* Condor */ | 314 | #define AR5K_SREV_AR5424 0x90 /* Condor */ |
317 | #define AR5K_SREV_AR5413 0xa4 /* Eagle lite */ | 315 | #define AR5K_SREV_AR5413 0xa4 /* Eagle lite */ |
318 | #define AR5K_SREV_AR5414 0xa0 /* Eagle */ | 316 | #define AR5K_SREV_AR5414 0xa0 /* Eagle */ |
319 | #define AR5K_SREV_AR2415 0xb0 /* Cobra */ | 317 | #define AR5K_SREV_AR2415 0xb0 /* Talon */ |
320 | #define AR5K_SREV_AR5416 0xc0 /* PCI-E */ | 318 | #define AR5K_SREV_AR5416 0xc0 /* PCI-E */ |
321 | #define AR5K_SREV_AR5418 0xca /* PCI-E */ | 319 | #define AR5K_SREV_AR5418 0xca /* PCI-E */ |
322 | #define AR5K_SREV_AR2425 0xe0 /* Swan */ | 320 | #define AR5K_SREV_AR2425 0xe0 /* Swan */ |
@@ -334,7 +332,7 @@ struct ath5k_srev_name { | |||
334 | #define AR5K_SREV_RAD_2112B 0x46 | 332 | #define AR5K_SREV_RAD_2112B 0x46 |
335 | #define AR5K_SREV_RAD_2413 0x50 | 333 | #define AR5K_SREV_RAD_2413 0x50 |
336 | #define AR5K_SREV_RAD_5413 0x60 | 334 | #define AR5K_SREV_RAD_5413 0x60 |
337 | #define AR5K_SREV_RAD_2316 0x70 | 335 | #define AR5K_SREV_RAD_2316 0x70 /* Cobra SoC */ |
338 | #define AR5K_SREV_RAD_2317 0x80 | 336 | #define AR5K_SREV_RAD_2317 0x80 |
339 | #define AR5K_SREV_RAD_5424 0xa0 /* Mostly same as 5413 */ | 337 | #define AR5K_SREV_RAD_5424 0xa0 /* Mostly same as 5413 */ |
340 | #define AR5K_SREV_RAD_2425 0xa2 | 338 | #define AR5K_SREV_RAD_2425 0xa2 |
@@ -342,7 +340,8 @@ struct ath5k_srev_name { | |||
342 | 340 | ||
343 | #define AR5K_SREV_PHY_5211 0x30 | 341 | #define AR5K_SREV_PHY_5211 0x30 |
344 | #define AR5K_SREV_PHY_5212 0x41 | 342 | #define AR5K_SREV_PHY_5212 0x41 |
345 | #define AR5K_SREV_PHY_2112B 0x43 | 343 | #define AR5K_SREV_PHY_5212A 0x42 |
344 | #define AR5K_SREV_PHY_5212B 0x43 | ||
346 | #define AR5K_SREV_PHY_2413 0x45 | 345 | #define AR5K_SREV_PHY_2413 0x45 |
347 | #define AR5K_SREV_PHY_5413 0x61 | 346 | #define AR5K_SREV_PHY_5413 0x61 |
348 | #define AR5K_SREV_PHY_2425 0x70 | 347 | #define AR5K_SREV_PHY_2425 0x70 |
@@ -649,49 +648,21 @@ struct ath5k_beacon_state { | |||
649 | 648 | ||
650 | enum ath5k_rfgain { | 649 | enum ath5k_rfgain { |
651 | AR5K_RFGAIN_INACTIVE = 0, | 650 | AR5K_RFGAIN_INACTIVE = 0, |
651 | AR5K_RFGAIN_ACTIVE, | ||
652 | AR5K_RFGAIN_READ_REQUESTED, | 652 | AR5K_RFGAIN_READ_REQUESTED, |
653 | AR5K_RFGAIN_NEED_CHANGE, | 653 | AR5K_RFGAIN_NEED_CHANGE, |
654 | }; | 654 | }; |
655 | 655 | ||
656 | #define AR5K_GAIN_CRN_FIX_BITS_5111 4 | ||
657 | #define AR5K_GAIN_CRN_FIX_BITS_5112 7 | ||
658 | #define AR5K_GAIN_CRN_MAX_FIX_BITS AR5K_GAIN_CRN_FIX_BITS_5112 | ||
659 | #define AR5K_GAIN_DYN_ADJUST_HI_MARGIN 15 | ||
660 | #define AR5K_GAIN_DYN_ADJUST_LO_MARGIN 20 | ||
661 | #define AR5K_GAIN_CCK_PROBE_CORR 5 | ||
662 | #define AR5K_GAIN_CCK_OFDM_GAIN_DELTA 15 | ||
663 | #define AR5K_GAIN_STEP_COUNT 10 | ||
664 | #define AR5K_GAIN_PARAM_TX_CLIP 0 | ||
665 | #define AR5K_GAIN_PARAM_PD_90 1 | ||
666 | #define AR5K_GAIN_PARAM_PD_84 2 | ||
667 | #define AR5K_GAIN_PARAM_GAIN_SEL 3 | ||
668 | #define AR5K_GAIN_PARAM_MIX_ORN 0 | ||
669 | #define AR5K_GAIN_PARAM_PD_138 1 | ||
670 | #define AR5K_GAIN_PARAM_PD_137 2 | ||
671 | #define AR5K_GAIN_PARAM_PD_136 3 | ||
672 | #define AR5K_GAIN_PARAM_PD_132 4 | ||
673 | #define AR5K_GAIN_PARAM_PD_131 5 | ||
674 | #define AR5K_GAIN_PARAM_PD_130 6 | ||
675 | #define AR5K_GAIN_CHECK_ADJUST(_g) \ | ||
676 | ((_g)->g_current <= (_g)->g_low || (_g)->g_current >= (_g)->g_high) | ||
677 | |||
678 | struct ath5k_gain_opt_step { | ||
679 | s16 gos_param[AR5K_GAIN_CRN_MAX_FIX_BITS]; | ||
680 | s32 gos_gain; | ||
681 | }; | ||
682 | |||
683 | struct ath5k_gain { | 656 | struct ath5k_gain { |
684 | u32 g_step_idx; | 657 | u8 g_step_idx; |
685 | u32 g_current; | 658 | u8 g_current; |
686 | u32 g_target; | 659 | u8 g_target; |
687 | u32 g_low; | 660 | u8 g_low; |
688 | u32 g_high; | 661 | u8 g_high; |
689 | u32 g_f_corr; | 662 | u8 g_f_corr; |
690 | u32 g_active; | 663 | u8 g_state; |
691 | const struct ath5k_gain_opt_step *g_step; | ||
692 | }; | 664 | }; |
693 | 665 | ||
694 | |||
695 | /********************\ | 666 | /********************\ |
696 | COMMON DEFINITIONS | 667 | COMMON DEFINITIONS |
697 | \********************/ | 668 | \********************/ |
@@ -1053,7 +1024,6 @@ struct ath5k_hw { | |||
1053 | bool ah_running; | 1024 | bool ah_running; |
1054 | bool ah_single_chip; | 1025 | bool ah_single_chip; |
1055 | bool ah_combined_mic; | 1026 | bool ah_combined_mic; |
1056 | enum ath5k_rfgain ah_rf_gain; | ||
1057 | 1027 | ||
1058 | u32 ah_mac_srev; | 1028 | u32 ah_mac_srev; |
1059 | u16 ah_mac_version; | 1029 | u16 ah_mac_version; |
@@ -1061,7 +1031,6 @@ struct ath5k_hw { | |||
1061 | u16 ah_phy_revision; | 1031 | u16 ah_phy_revision; |
1062 | u16 ah_radio_5ghz_revision; | 1032 | u16 ah_radio_5ghz_revision; |
1063 | u16 ah_radio_2ghz_revision; | 1033 | u16 ah_radio_2ghz_revision; |
1064 | u32 ah_phy_spending; | ||
1065 | 1034 | ||
1066 | enum ath5k_version ah_version; | 1035 | enum ath5k_version ah_version; |
1067 | enum ath5k_radio ah_radio; | 1036 | enum ath5k_radio ah_radio; |
@@ -1112,8 +1081,9 @@ struct ath5k_hw { | |||
1112 | u32 ah_txq_isr; | 1081 | u32 ah_txq_isr; |
1113 | u32 *ah_rf_banks; | 1082 | u32 *ah_rf_banks; |
1114 | size_t ah_rf_banks_size; | 1083 | size_t ah_rf_banks_size; |
1084 | size_t ah_rf_regs_count; | ||
1115 | struct ath5k_gain ah_gain; | 1085 | struct ath5k_gain ah_gain; |
1116 | u32 ah_offset[AR5K_MAX_RF_BANKS]; | 1086 | u8 ah_offset[AR5K_MAX_RF_BANKS]; |
1117 | 1087 | ||
1118 | struct { | 1088 | struct { |
1119 | u16 txp_pcdac[AR5K_EEPROM_POWER_TABLE_SIZE]; | 1089 | u16 txp_pcdac[AR5K_EEPROM_POWER_TABLE_SIZE]; |
@@ -1186,6 +1156,7 @@ extern void ath5k_hw_update_mib_counters(struct ath5k_hw *ah, struct ieee80211_l | |||
1186 | /* EEPROM access functions */ | 1156 | /* EEPROM access functions */ |
1187 | extern int ath5k_eeprom_init(struct ath5k_hw *ah); | 1157 | extern int ath5k_eeprom_init(struct ath5k_hw *ah); |
1188 | extern int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac); | 1158 | extern int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac); |
1159 | extern bool ath5k_eeprom_is_hb63(struct ath5k_hw *ah); | ||
1189 | 1160 | ||
1190 | /* Protocol Control Unit Functions */ | 1161 | /* Protocol Control Unit Functions */ |
1191 | extern int ath5k_hw_set_opmode(struct ath5k_hw *ah); | 1162 | extern int ath5k_hw_set_opmode(struct ath5k_hw *ah); |
@@ -1261,10 +1232,12 @@ extern int ath5k_hw_disable_pspoll(struct ath5k_hw *ah); | |||
1261 | extern int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel); | 1232 | extern int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel); |
1262 | 1233 | ||
1263 | /* Initialize RF */ | 1234 | /* Initialize RF */ |
1264 | extern int ath5k_hw_rfregs(struct ath5k_hw *ah, struct ieee80211_channel *channel, unsigned int mode); | 1235 | extern int ath5k_hw_rfregs_init(struct ath5k_hw *ah, |
1265 | extern int ath5k_hw_rfgain(struct ath5k_hw *ah, unsigned int freq); | 1236 | struct ieee80211_channel *channel, |
1266 | extern enum ath5k_rfgain ath5k_hw_get_rf_gain(struct ath5k_hw *ah); | 1237 | unsigned int mode); |
1267 | extern int ath5k_hw_set_rfgain_opt(struct ath5k_hw *ah); | 1238 | extern int ath5k_hw_rfgain_init(struct ath5k_hw *ah, unsigned int freq); |
1239 | extern enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah); | ||
1240 | extern int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah); | ||
1268 | /* PHY/RF channel functions */ | 1241 | /* PHY/RF channel functions */ |
1269 | extern bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags); | 1242 | extern bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags); |
1270 | extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel); | 1243 | extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel); |
@@ -1286,6 +1259,7 @@ extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, unsigned int power); | |||
1286 | 1259 | ||
1287 | /* | 1260 | /* |
1288 | * Translate usec to hw clock units | 1261 | * Translate usec to hw clock units |
1262 | * TODO: Half/quarter rate | ||
1289 | */ | 1263 | */ |
1290 | static inline unsigned int ath5k_hw_htoclock(unsigned int usec, bool turbo) | 1264 | static inline unsigned int ath5k_hw_htoclock(unsigned int usec, bool turbo) |
1291 | { | 1265 | { |
@@ -1294,6 +1268,7 @@ static inline unsigned int ath5k_hw_htoclock(unsigned int usec, bool turbo) | |||
1294 | 1268 | ||
1295 | /* | 1269 | /* |
1296 | * Translate hw clock units to usec | 1270 | * Translate hw clock units to usec |
1271 | * TODO: Half/quarter rate | ||
1297 | */ | 1272 | */ |
1298 | static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo) | 1273 | static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo) |
1299 | { | 1274 | { |