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path: root/drivers/net/wireless/ath/ath9k
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k')
-rw-r--r--drivers/net/wireless/ath/ath9k/Kconfig1
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h172
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_calib.c76
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c66
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.h6
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_hw.c22
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mci.c1
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_paprd.c87
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.h75
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9340_initvals.h6
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9485_initvals.h338
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h41
-rw-r--r--drivers/net/wireless/ath/ath9k/beacon.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/btcoex.c1
-rw-r--r--drivers/net/wireless/ath/ath9k/btcoex.h1
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c1
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.h3
-rw-r--r--drivers/net/wireless/ath/ath9k/common.h8
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c407
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h33
-rw-r--r--drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h4
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c29
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_9287.c9
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/gpio.c58
-rw-r--r--drivers/net/wireless/ath/ath9k/htc.h4
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_beacon.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_debug.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_gpio.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_init.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_main.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_txrx.c28
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c11
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h11
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c66
-rw-r--r--drivers/net/wireless/ath/ath9k/link.c27
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c176
-rw-r--r--drivers/net/wireless/ath/ath9k/mci.c42
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c27
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.c53
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.h16
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c29
48 files changed, 1243 insertions, 756 deletions
diff --git a/drivers/net/wireless/ath/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig
index c7aa6646123e..5fc15bf8be09 100644
--- a/drivers/net/wireless/ath/ath9k/Kconfig
+++ b/drivers/net/wireless/ath/ath9k/Kconfig
@@ -17,6 +17,7 @@ config ATH9K_BTCOEX_SUPPORT
17config ATH9K 17config ATH9K
18 tristate "Atheros 802.11n wireless cards support" 18 tristate "Atheros 802.11n wireless cards support"
19 depends on MAC80211 19 depends on MAC80211
20 select ATH_COMMON
20 select ATH9K_HW 21 select ATH9K_HW
21 select MAC80211_LEDS 22 select MAC80211_LEDS
22 select LEDS_CLASS 23 select LEDS_CLASS
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
index 6f7cf49eff4d..262e1e036fd7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
@@ -534,98 +534,98 @@ static const u32 ar9300_2p2_baseband_core[][2] = {
534 534
535static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { 535static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
536 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 536 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
537 {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352}, 537 {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
538 {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584}, 538 {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
539 {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800}, 539 {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
540 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 540 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
541 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, 541 {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
542 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 542 {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
543 {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, 543 {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
544 {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, 544 {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
545 {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, 545 {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
546 {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, 546 {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
547 {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, 547 {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
548 {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, 548 {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
549 {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, 549 {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
550 {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, 550 {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
551 {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, 551 {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
552 {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, 552 {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04},
553 {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, 553 {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20},
554 {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, 554 {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20},
555 {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, 555 {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22},
556 {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, 556 {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24},
557 {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, 557 {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640},
558 {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, 558 {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660},
559 {0x0000a544, 0x52022470, 0x52022470, 0x3f001861, 0x3f001861}, 559 {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861},
560 {0x0000a548, 0x55022490, 0x55022490, 0x43001a81, 0x43001a81}, 560 {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81},
561 {0x0000a54c, 0x59022492, 0x59022492, 0x47001a83, 0x47001a83}, 561 {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
562 {0x0000a550, 0x5d022692, 0x5d022692, 0x4a001c84, 0x4a001c84}, 562 {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84},
563 {0x0000a554, 0x61022892, 0x61022892, 0x4e001ce3, 0x4e001ce3}, 563 {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3},
564 {0x0000a558, 0x65024890, 0x65024890, 0x52001ce5, 0x52001ce5}, 564 {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5},
565 {0x0000a55c, 0x69024892, 0x69024892, 0x56001ce9, 0x56001ce9}, 565 {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9},
566 {0x0000a560, 0x6e024c92, 0x6e024c92, 0x5a001ceb, 0x5a001ceb}, 566 {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb},
567 {0x0000a564, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 567 {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
568 {0x0000a568, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 568 {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
569 {0x0000a56c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 569 {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
570 {0x0000a570, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 570 {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
571 {0x0000a574, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 571 {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
572 {0x0000a578, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 572 {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
573 {0x0000a57c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec}, 573 {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
574 {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, 574 {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000},
575 {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, 575 {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002},
576 {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, 576 {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004},
577 {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, 577 {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200},
578 {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, 578 {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202},
579 {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, 579 {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400},
580 {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, 580 {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402},
581 {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, 581 {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404},
582 {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, 582 {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603},
583 {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, 583 {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02},
584 {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, 584 {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04},
585 {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, 585 {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20},
586 {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, 586 {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20},
587 {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, 587 {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22},
588 {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, 588 {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24},
589 {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, 589 {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640},
590 {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, 590 {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660},
591 {0x0000a5c4, 0x52822470, 0x52822470, 0x3f801861, 0x3f801861}, 591 {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861},
592 {0x0000a5c8, 0x55822490, 0x55822490, 0x43801a81, 0x43801a81}, 592 {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81},
593 {0x0000a5cc, 0x59822492, 0x59822492, 0x47801a83, 0x47801a83}, 593 {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83},
594 {0x0000a5d0, 0x5d822692, 0x5d822692, 0x4a801c84, 0x4a801c84}, 594 {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84},
595 {0x0000a5d4, 0x61822892, 0x61822892, 0x4e801ce3, 0x4e801ce3}, 595 {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3},
596 {0x0000a5d8, 0x65824890, 0x65824890, 0x52801ce5, 0x52801ce5}, 596 {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5},
597 {0x0000a5dc, 0x69824892, 0x69824892, 0x56801ce9, 0x56801ce9}, 597 {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9},
598 {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x5a801ceb, 0x5a801ceb}, 598 {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb},
599 {0x0000a5e4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 599 {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
600 {0x0000a5e8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 600 {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
601 {0x0000a5ec, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 601 {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
602 {0x0000a5f0, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 602 {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
603 {0x0000a5f4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 603 {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
604 {0x0000a5f8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 604 {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
605 {0x0000a5fc, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec}, 605 {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
606 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 606 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
607 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 607 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
608 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 608 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
609 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 609 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
610 {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 610 {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
611 {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000}, 611 {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
612 {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501}, 612 {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
613 {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501}, 613 {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
614 {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03}, 614 {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
615 {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04}, 615 {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
616 {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04}, 616 {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
617 {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005}, 617 {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
618 {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005}, 618 {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
619 {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005}, 619 {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
620 {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005}, 620 {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
621 {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005}, 621 {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
622 {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352}, 622 {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
623 {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584}, 623 {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
624 {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800}, 624 {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
625 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 625 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
626 {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352}, 626 {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
627 {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584}, 627 {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
628 {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800}, 628 {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
629 {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 629 {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
630 {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 630 {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
631 {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 631 {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 162401f22f8c..8b0d8dcd7625 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -891,6 +891,74 @@ static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
891 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1); 891 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
892} 892}
893 893
894static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
895{
896 int offset[8], total = 0, test;
897 int agc_out, i;
898
899 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
900 AR_PHY_65NM_RXRF_GAINSTAGES_RX_OVERRIDE, 0x1);
901 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
902 AR_PHY_65NM_RXRF_GAINSTAGES_LNAON_CALDC, 0x0);
903 if (is_2g)
904 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
905 AR_PHY_65NM_RXRF_GAINSTAGES_LNA2G_GAIN_OVR, 0x0);
906 else
907 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
908 AR_PHY_65NM_RXRF_GAINSTAGES_LNA5G_GAIN_OVR, 0x0);
909
910 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain),
911 AR_PHY_65NM_RXTX2_RXON_OVR, 0x1);
912 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain),
913 AR_PHY_65NM_RXTX2_RXON, 0x0);
914
915 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
916 AR_PHY_65NM_RXRF_AGC_AGC_OVERRIDE, 0x1);
917 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
918 AR_PHY_65NM_RXRF_AGC_AGC_ON_OVR, 0x1);
919 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
920 AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0x1);
921 if (is_2g)
922 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
923 AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0);
924 else
925 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
926 AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0);
927
928 for (i = 6; i > 0; i--) {
929 offset[i] = BIT(i - 1);
930 test = total + offset[i];
931
932 if (is_2g)
933 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
934 AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR,
935 test);
936 else
937 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
938 AR_PHY_65NM_RXRF_AGC_AGC5G_CALDAC_OVR,
939 test);
940 udelay(100);
941 agc_out = REG_READ_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
942 AR_PHY_65NM_RXRF_AGC_AGC_OUT);
943 offset[i] = (agc_out) ? 0 : 1;
944 total += (offset[i] << (i - 1));
945 }
946
947 if (is_2g)
948 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
949 AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, total);
950 else
951 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
952 AR_PHY_65NM_RXRF_AGC_AGC5G_CALDAC_OVR, total);
953
954 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
955 AR_PHY_65NM_RXRF_GAINSTAGES_RX_OVERRIDE, 0);
956 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain),
957 AR_PHY_65NM_RXTX2_RXON_OVR, 0);
958 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
959 AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0);
960}
961
894static bool ar9003_hw_init_cal(struct ath_hw *ah, 962static bool ar9003_hw_init_cal(struct ath_hw *ah,
895 struct ath9k_channel *chan) 963 struct ath9k_channel *chan)
896{ 964{
@@ -989,6 +1057,14 @@ skip_tx_iqcal:
989 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, 1057 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
990 AR_PHY_AGC_CONTROL_CAL, 1058 AR_PHY_AGC_CONTROL_CAL,
991 0, AH_WAIT_TIMEOUT); 1059 0, AH_WAIT_TIMEOUT);
1060 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
1061 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
1062 if (!(ah->rxchainmask & (1 << i)))
1063 continue;
1064 ar9003_hw_manual_peak_cal(ah, i,
1065 IS_CHAN_2GHZ(chan));
1066 }
1067 }
992 } 1068 }
993 1069
994 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) 1070 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index c86cb6400040..562186ca9b52 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -2987,10 +2987,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
2987 case EEP_RX_MASK: 2987 case EEP_RX_MASK:
2988 return pBase->txrxMask & 0xf; 2988 return pBase->txrxMask & 0xf;
2989 case EEP_PAPRD: 2989 case EEP_PAPRD:
2990 if (AR_SREV_9462(ah))
2991 return false;
2992 if (!ah->config.enable_paprd)
2993 return false;
2994 return !!(pBase->featureEnable & BIT(5)); 2990 return !!(pBase->featureEnable & BIT(5));
2995 case EEP_CHAIN_MASK_REDUCE: 2991 case EEP_CHAIN_MASK_REDUCE:
2996 return (pBase->miscConfiguration >> 0x3) & 0x1; 2992 return (pBase->miscConfiguration >> 0x3) & 0x1;
@@ -3005,24 +3001,24 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
3005 } 3001 }
3006} 3002}
3007 3003
3008static bool ar9300_eeprom_read_byte(struct ath_common *common, int address, 3004static bool ar9300_eeprom_read_byte(struct ath_hw *ah, int address,
3009 u8 *buffer) 3005 u8 *buffer)
3010{ 3006{
3011 u16 val; 3007 u16 val;
3012 3008
3013 if (unlikely(!ath9k_hw_nvram_read(common, address / 2, &val))) 3009 if (unlikely(!ath9k_hw_nvram_read(ah, address / 2, &val)))
3014 return false; 3010 return false;
3015 3011
3016 *buffer = (val >> (8 * (address % 2))) & 0xff; 3012 *buffer = (val >> (8 * (address % 2))) & 0xff;
3017 return true; 3013 return true;
3018} 3014}
3019 3015
3020static bool ar9300_eeprom_read_word(struct ath_common *common, int address, 3016static bool ar9300_eeprom_read_word(struct ath_hw *ah, int address,
3021 u8 *buffer) 3017 u8 *buffer)
3022{ 3018{
3023 u16 val; 3019 u16 val;
3024 3020
3025 if (unlikely(!ath9k_hw_nvram_read(common, address / 2, &val))) 3021 if (unlikely(!ath9k_hw_nvram_read(ah, address / 2, &val)))
3026 return false; 3022 return false;
3027 3023
3028 buffer[0] = val >> 8; 3024 buffer[0] = val >> 8;
@@ -3048,14 +3044,14 @@ static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer,
3048 * the 16-bit word at that address 3044 * the 16-bit word at that address
3049 */ 3045 */
3050 if (address % 2 == 0) { 3046 if (address % 2 == 0) {
3051 if (!ar9300_eeprom_read_byte(common, address--, buffer++)) 3047 if (!ar9300_eeprom_read_byte(ah, address--, buffer++))
3052 goto error; 3048 goto error;
3053 3049
3054 count--; 3050 count--;
3055 } 3051 }
3056 3052
3057 for (i = 0; i < count / 2; i++) { 3053 for (i = 0; i < count / 2; i++) {
3058 if (!ar9300_eeprom_read_word(common, address, buffer)) 3054 if (!ar9300_eeprom_read_word(ah, address, buffer))
3059 goto error; 3055 goto error;
3060 3056
3061 address -= 2; 3057 address -= 2;
@@ -3063,7 +3059,7 @@ static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer,
3063 } 3059 }
3064 3060
3065 if (count % 2) 3061 if (count % 2)
3066 if (!ar9300_eeprom_read_byte(common, address, buffer)) 3062 if (!ar9300_eeprom_read_byte(ah, address, buffer))
3067 goto error; 3063 goto error;
3068 3064
3069 return true; 3065 return true;
@@ -3240,12 +3236,11 @@ static bool ar9300_check_eeprom_header(struct ath_hw *ah, eeprom_read_op read,
3240static int ar9300_eeprom_restore_flash(struct ath_hw *ah, u8 *mptr, 3236static int ar9300_eeprom_restore_flash(struct ath_hw *ah, u8 *mptr,
3241 int mdata_size) 3237 int mdata_size)
3242{ 3238{
3243 struct ath_common *common = ath9k_hw_common(ah);
3244 u16 *data = (u16 *) mptr; 3239 u16 *data = (u16 *) mptr;
3245 int i; 3240 int i;
3246 3241
3247 for (i = 0; i < mdata_size / 2; i++, data++) 3242 for (i = 0; i < mdata_size / 2; i++, data++)
3248 ath9k_hw_nvram_read(common, i, data); 3243 ath9k_hw_nvram_read(ah, i, data);
3249 3244
3250 return 0; 3245 return 0;
3251} 3246}
@@ -5076,6 +5071,33 @@ static inline u8 mcsidx_to_tgtpwridx(unsigned int mcs_idx, u8 base_pwridx)
5076 return base_pwridx + 4 * (mcs_idx / 8) + mod_idx - 2; 5071 return base_pwridx + 4 * (mcs_idx / 8) + mod_idx - 2;
5077} 5072}
5078 5073
5074static void ar9003_paprd_set_txpower(struct ath_hw *ah,
5075 struct ath9k_channel *chan,
5076 u8 *targetPowerValT2)
5077{
5078 int i;
5079
5080 if (!ar9003_is_paprd_enabled(ah))
5081 return;
5082
5083 if (IS_CHAN_HT40(chan))
5084 i = ALL_TARGET_HT40_7;
5085 else
5086 i = ALL_TARGET_HT20_7;
5087
5088 if (IS_CHAN_2GHZ(chan)) {
5089 if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) &&
5090 !AR_SREV_9462(ah) && !AR_SREV_9565(ah)) {
5091 if (IS_CHAN_HT40(chan))
5092 i = ALL_TARGET_HT40_0_8_16;
5093 else
5094 i = ALL_TARGET_HT20_0_8_16;
5095 }
5096 }
5097
5098 ah->paprd_target_power = targetPowerValT2[i];
5099}
5100
5079static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah, 5101static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
5080 struct ath9k_channel *chan, u16 cfgCtl, 5102 struct ath9k_channel *chan, u16 cfgCtl,
5081 u8 twiceAntennaReduction, 5103 u8 twiceAntennaReduction,
@@ -5097,7 +5119,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
5097 */ 5119 */
5098 ar9003_hw_get_target_power_eeprom(ah, chan, targetPowerValT2); 5120 ar9003_hw_get_target_power_eeprom(ah, chan, targetPowerValT2);
5099 5121
5100 if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) { 5122 if (ar9003_is_paprd_enabled(ah)) {
5101 if (IS_CHAN_2GHZ(chan)) 5123 if (IS_CHAN_2GHZ(chan))
5102 modal_hdr = &eep->modalHeader2G; 5124 modal_hdr = &eep->modalHeader2G;
5103 else 5125 else
@@ -5138,7 +5160,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
5138 twiceAntennaReduction, 5160 twiceAntennaReduction,
5139 powerLimit); 5161 powerLimit);
5140 5162
5141 if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) { 5163 if (ar9003_is_paprd_enabled(ah)) {
5142 for (i = 0; i < ar9300RateSize; i++) { 5164 for (i = 0; i < ar9300RateSize; i++) {
5143 if ((ah->paprd_ratemask & (1 << i)) && 5165 if ((ah->paprd_ratemask & (1 << i)) &&
5144 (abs(targetPowerValT2[i] - 5166 (abs(targetPowerValT2[i] -
@@ -5170,19 +5192,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
5170 /* Write target power array to registers */ 5192 /* Write target power array to registers */
5171 ar9003_hw_tx_power_regwrite(ah, targetPowerValT2); 5193 ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);
5172 ar9003_hw_calibration_apply(ah, chan->channel); 5194 ar9003_hw_calibration_apply(ah, chan->channel);
5173 5195 ar9003_paprd_set_txpower(ah, chan, targetPowerValT2);
5174 if (IS_CHAN_2GHZ(chan)) {
5175 if (IS_CHAN_HT40(chan))
5176 i = ALL_TARGET_HT40_0_8_16;
5177 else
5178 i = ALL_TARGET_HT20_0_8_16;
5179 } else {
5180 if (IS_CHAN_HT40(chan))
5181 i = ALL_TARGET_HT40_7;
5182 else
5183 i = ALL_TARGET_HT20_7;
5184 }
5185 ah->paprd_target_power = targetPowerValT2[i];
5186} 5196}
5187 5197
5188static u16 ath9k_hw_ar9300_get_spur_channel(struct ath_hw *ah, 5198static u16 ath9k_hw_ar9300_get_spur_channel(struct ath_hw *ah,
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
index 41b1a75e6bec..54ba42f4108a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
@@ -68,13 +68,13 @@
68#define AR9300_BASE_ADDR 0x3ff 68#define AR9300_BASE_ADDR 0x3ff
69#define AR9300_BASE_ADDR_512 0x1ff 69#define AR9300_BASE_ADDR_512 0x1ff
70 70
71#define AR9300_OTP_BASE 0x14000 71#define AR9300_OTP_BASE (AR_SREV_9340(ah) ? 0x30000 : 0x14000)
72#define AR9300_OTP_STATUS 0x15f18 72#define AR9300_OTP_STATUS (AR_SREV_9340(ah) ? 0x30018 : 0x15f18)
73#define AR9300_OTP_STATUS_TYPE 0x7 73#define AR9300_OTP_STATUS_TYPE 0x7
74#define AR9300_OTP_STATUS_VALID 0x4 74#define AR9300_OTP_STATUS_VALID 0x4
75#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 75#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2
76#define AR9300_OTP_STATUS_SM_BUSY 0x1 76#define AR9300_OTP_STATUS_SM_BUSY 0x1
77#define AR9300_OTP_READ_DATA 0x15f1c 77#define AR9300_OTP_READ_DATA (AR_SREV_9340(ah) ? 0x3001c : 0x15f1c)
78 78
79enum targetPowerHTRates { 79enum targetPowerHTRates {
80 HT_TARGET_RATE_0_8_16, 80 HT_TARGET_RATE_0_8_16,
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 0693cd95b746..74fd3977feeb 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -35,12 +35,6 @@
35 */ 35 */
36static void ar9003_hw_init_mode_regs(struct ath_hw *ah) 36static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
37{ 37{
38#define AR9462_BB_CTX_COEFJ(x) \
39 ar9462_##x##_baseband_core_txfir_coeff_japan_2484
40
41#define AR9462_BBC_TXIFR_COEFFJ \
42 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
43
44 if (AR_SREV_9330_11(ah)) { 38 if (AR_SREV_9330_11(ah)) {
45 /* mac */ 39 /* mac */
46 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], 40 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
@@ -70,6 +64,10 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
70 INIT_INI_ARRAY(&ah->iniModesTxGain, 64 INIT_INI_ARRAY(&ah->iniModesTxGain,
71 ar9331_modes_lowest_ob_db_tx_gain_1p1); 65 ar9331_modes_lowest_ob_db_tx_gain_1p1);
72 66
67 /* Japan 2484 Mhz CCK */
68 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
69 ar9331_1p1_baseband_core_txfir_coeff_japan_2484);
70
73 /* additional clock settings */ 71 /* additional clock settings */
74 if (ah->is_clk_25mhz) 72 if (ah->is_clk_25mhz)
75 INIT_INI_ARRAY(&ah->iniAdditional, 73 INIT_INI_ARRAY(&ah->iniAdditional,
@@ -106,6 +104,10 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
106 INIT_INI_ARRAY(&ah->iniModesTxGain, 104 INIT_INI_ARRAY(&ah->iniModesTxGain,
107 ar9331_modes_lowest_ob_db_tx_gain_1p2); 105 ar9331_modes_lowest_ob_db_tx_gain_1p2);
108 106
107 /* Japan 2484 Mhz CCK */
108 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
109 ar9331_1p2_baseband_core_txfir_coeff_japan_2484);
110
109 /* additional clock settings */ 111 /* additional clock settings */
110 if (ah->is_clk_25mhz) 112 if (ah->is_clk_25mhz)
111 INIT_INI_ARRAY(&ah->iniAdditional, 113 INIT_INI_ARRAY(&ah->iniAdditional,
@@ -180,6 +182,10 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
180 INIT_INI_ARRAY(&ah->iniModesTxGain, 182 INIT_INI_ARRAY(&ah->iniModesTxGain,
181 ar9485_modes_lowest_ob_db_tx_gain_1_1); 183 ar9485_modes_lowest_ob_db_tx_gain_1_1);
182 184
185 /* Japan 2484 Mhz CCK */
186 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
187 ar9485_1_1_baseband_core_txfir_coeff_japan_2484);
188
183 /* Load PCIE SERDES settings from INI */ 189 /* Load PCIE SERDES settings from INI */
184 190
185 /* Awake Setting */ 191 /* Awake Setting */
@@ -229,9 +235,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
229 ar9462_modes_fast_clock_2p0); 235 ar9462_modes_fast_clock_2p0);
230 236
231 INIT_INI_ARRAY(&ah->iniCckfirJapan2484, 237 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
232 AR9462_BB_CTX_COEFJ(2p0)); 238 ar9462_2p0_baseband_core_txfir_coeff_japan_2484);
233
234 INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ);
235 } else if (AR_SREV_9550(ah)) { 239 } else if (AR_SREV_9550(ah)) {
236 /* mac */ 240 /* mac */
237 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], 241 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mci.c b/drivers/net/wireless/ath/ath9k/ar9003_mci.c
index 42b4412d6794..8dd069259e7b 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mci.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mci.c
@@ -714,7 +714,6 @@ bool ar9003_mci_start_reset(struct ath_hw *ah, struct ath9k_channel *chan)
714 714
715 return true; 715 return true;
716} 716}
717EXPORT_SYMBOL(ar9003_mci_start_reset);
718 717
719int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan, 718int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,
720 struct ath9k_hw_cal_data *caldata) 719 struct ath9k_hw_cal_data *caldata)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
index 0ed3846f9cbb..09c1f9da67a0 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
@@ -74,15 +74,23 @@ static int ar9003_get_training_power_2g(struct ath_hw *ah)
74 unsigned int power, scale, delta; 74 unsigned int power, scale, delta;
75 75
76 scale = ar9003_get_paprd_scale_factor(ah, chan); 76 scale = ar9003_get_paprd_scale_factor(ah, chan);
77 power = REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE5,
78 AR_PHY_POWERTX_RATE5_POWERTXHT20_0);
79 77
80 delta = abs((int) ah->paprd_target_power - (int) power); 78 if (AR_SREV_9330(ah) || AR_SREV_9340(ah) ||
81 if (delta > scale) 79 AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
82 return -1; 80 power = ah->paprd_target_power + 2;
83 81 } else if (AR_SREV_9485(ah)) {
84 if (delta < 4) 82 power = 25;
85 power -= 4 - delta; 83 } else {
84 power = REG_READ_FIELD(ah, AR_PHY_POWERTX_RATE5,
85 AR_PHY_POWERTX_RATE5_POWERTXHT20_0);
86
87 delta = abs((int) ah->paprd_target_power - (int) power);
88 if (delta > scale)
89 return -1;
90
91 if (delta < 4)
92 power -= 4 - delta;
93 }
86 94
87 return power; 95 return power;
88} 96}
@@ -169,6 +177,9 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
169 REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK, 177 REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK,
170 ah->paprd_ratemask_ht40); 178 ah->paprd_ratemask_ht40);
171 179
180 ath_dbg(common, CALIBRATE, "PAPRD HT20 mask: 0x%x, HT40 mask: 0x%x\n",
181 ah->paprd_ratemask, ah->paprd_ratemask_ht40);
182
172 for (i = 0; i < ah->caps.max_txchains; i++) { 183 for (i = 0; i < ah->caps.max_txchains; i++) {
173 REG_RMW_FIELD(ah, ctrl0[i], 184 REG_RMW_FIELD(ah, ctrl0[i],
174 AR_PHY_PAPRD_CTRL0_USE_SINGLE_TABLE_MASK, 1); 185 AR_PHY_PAPRD_CTRL0_USE_SINGLE_TABLE_MASK, 1);
@@ -204,7 +215,20 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
204 AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28); 215 AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28);
205 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1, 216 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1,
206 AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1); 217 AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1);
207 val = AR_SREV_9462(ah) ? 0x91 : 147; 218
219 if (AR_SREV_9485(ah)) {
220 val = 148;
221 } else {
222 if (IS_CHAN_2GHZ(ah->curchan)) {
223 if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
224 val = 145;
225 else
226 val = 147;
227 } else {
228 val = 137;
229 }
230 }
231
208 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2, 232 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2,
209 AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, val); 233 AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, val);
210 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 234 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
@@ -215,15 +239,24 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
215 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7); 239 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
216 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 240 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
217 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1); 241 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
218 if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9550(ah)) 242
243 if (AR_SREV_9485(ah) ||
244 AR_SREV_9462(ah) ||
245 AR_SREV_9565(ah) ||
246 AR_SREV_9550(ah) ||
247 AR_SREV_9330(ah) ||
248 AR_SREV_9340(ah))
219 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 249 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
220 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, 250 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, -3);
221 -3);
222 else 251 else
223 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 252 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
224 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, 253 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, -6);
225 -6); 254
226 val = AR_SREV_9462(ah) ? -10 : -15; 255 val = -10;
256
257 if (IS_CHAN_2GHZ(ah->curchan) && !AR_SREV_9462(ah) && !AR_SREV_9565(ah))
258 val = -15;
259
227 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 260 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
228 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE, 261 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE,
229 val); 262 val);
@@ -262,9 +295,6 @@ static void ar9003_paprd_get_gain_table(struct ath_hw *ah)
262 u32 reg = AR_PHY_TXGAIN_TABLE; 295 u32 reg = AR_PHY_TXGAIN_TABLE;
263 int i; 296 int i;
264 297
265 memset(entry, 0, sizeof(ah->paprd_gain_table_entries));
266 memset(index, 0, sizeof(ah->paprd_gain_table_index));
267
268 for (i = 0; i < PAPRD_GAIN_TABLE_ENTRIES; i++) { 298 for (i = 0; i < PAPRD_GAIN_TABLE_ENTRIES; i++) {
269 entry[i] = REG_READ(ah, reg); 299 entry[i] = REG_READ(ah, reg);
270 index[i] = (entry[i] >> 24) & 0xff; 300 index[i] = (entry[i] >> 24) & 0xff;
@@ -763,7 +793,7 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah,
763} 793}
764EXPORT_SYMBOL(ar9003_paprd_populate_single_table); 794EXPORT_SYMBOL(ar9003_paprd_populate_single_table);
765 795
766int ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain) 796void ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain)
767{ 797{
768 unsigned int i, desired_gain, gain_index; 798 unsigned int i, desired_gain, gain_index;
769 unsigned int train_power = ah->paprd_training_power; 799 unsigned int train_power = ah->paprd_training_power;
@@ -781,8 +811,6 @@ int ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain)
781 811
782 REG_CLR_BIT(ah, AR_PHY_PAPRD_TRAINER_STAT1, 812 REG_CLR_BIT(ah, AR_PHY_PAPRD_TRAINER_STAT1,
783 AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE); 813 AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE);
784
785 return 0;
786} 814}
787EXPORT_SYMBOL(ar9003_paprd_setup_gain_table); 815EXPORT_SYMBOL(ar9003_paprd_setup_gain_table);
788 816
@@ -894,7 +922,7 @@ int ar9003_paprd_create_curve(struct ath_hw *ah,
894 922
895 memset(caldata->pa_table[chain], 0, sizeof(caldata->pa_table[chain])); 923 memset(caldata->pa_table[chain], 0, sizeof(caldata->pa_table[chain]));
896 924
897 buf = kmalloc(2 * 48 * sizeof(u32), GFP_ATOMIC); 925 buf = kmalloc(2 * 48 * sizeof(u32), GFP_KERNEL);
898 if (!buf) 926 if (!buf)
899 return -ENOMEM; 927 return -ENOMEM;
900 928
@@ -945,9 +973,13 @@ EXPORT_SYMBOL(ar9003_paprd_init_table);
945bool ar9003_paprd_is_done(struct ath_hw *ah) 973bool ar9003_paprd_is_done(struct ath_hw *ah)
946{ 974{
947 int paprd_done, agc2_pwr; 975 int paprd_done, agc2_pwr;
976
948 paprd_done = REG_READ_FIELD(ah, AR_PHY_PAPRD_TRAINER_STAT1, 977 paprd_done = REG_READ_FIELD(ah, AR_PHY_PAPRD_TRAINER_STAT1,
949 AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE); 978 AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE);
950 979
980 if (AR_SREV_9485(ah))
981 goto exit;
982
951 if (paprd_done == 0x1) { 983 if (paprd_done == 0x1) {
952 agc2_pwr = REG_READ_FIELD(ah, AR_PHY_PAPRD_TRAINER_STAT1, 984 agc2_pwr = REG_READ_FIELD(ah, AR_PHY_PAPRD_TRAINER_STAT1,
953 AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR); 985 AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR);
@@ -963,7 +995,16 @@ bool ar9003_paprd_is_done(struct ath_hw *ah)
963 if (agc2_pwr <= PAPRD_IDEAL_AGC2_PWR_RANGE) 995 if (agc2_pwr <= PAPRD_IDEAL_AGC2_PWR_RANGE)
964 paprd_done = 0; 996 paprd_done = 0;
965 } 997 }
966 998exit:
967 return !!paprd_done; 999 return !!paprd_done;
968} 1000}
969EXPORT_SYMBOL(ar9003_paprd_is_done); 1001EXPORT_SYMBOL(ar9003_paprd_is_done);
1002
1003bool ar9003_is_paprd_enabled(struct ath_hw *ah)
1004{
1005 if ((ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->config.enable_paprd)
1006 return true;
1007
1008 return false;
1009}
1010EXPORT_SYMBOL(ar9003_is_paprd_enabled);
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 759f5f5a7154..ce19c09fa8e8 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -784,7 +784,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
784 REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites); 784 REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites);
785 785
786 if (chan->channel == 2484) 786 if (chan->channel == 2484)
787 ar9003_hw_prog_ini(ah, &ah->ini_japan2484, 1); 787 ar9003_hw_prog_ini(ah, &ah->iniCckfirJapan2484, 1);
788 788
789 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) 789 if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
790 REG_WRITE(ah, AR_GLB_SWREG_DISCONT_MODE, 790 REG_WRITE(ah, AR_GLB_SWREG_DISCONT_MODE,
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 8f585233a788..107956298488 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -698,13 +698,6 @@
698#define AR_PHY_65NM_CH0_THERM_SAR_ADC_OUT 0x0000ff00 698#define AR_PHY_65NM_CH0_THERM_SAR_ADC_OUT 0x0000ff00
699#define AR_PHY_65NM_CH0_THERM_SAR_ADC_OUT_S 8 699#define AR_PHY_65NM_CH0_THERM_SAR_ADC_OUT_S 8
700 700
701#define AR_PHY_65NM_CH0_RXTX1 0x16100
702#define AR_PHY_65NM_CH0_RXTX2 0x16104
703#define AR_PHY_65NM_CH1_RXTX1 0x16500
704#define AR_PHY_65NM_CH1_RXTX2 0x16504
705#define AR_PHY_65NM_CH2_RXTX1 0x16900
706#define AR_PHY_65NM_CH2_RXTX2 0x16904
707
708#define AR_CH0_TOP2 (AR_SREV_9300(ah) ? 0x1628c : \ 701#define AR_CH0_TOP2 (AR_SREV_9300(ah) ? 0x1628c : \
709 (AR_SREV_9462(ah) ? 0x16290 : 0x16284)) 702 (AR_SREV_9462(ah) ? 0x16290 : 0x16284))
710#define AR_CH0_TOP2_XPABIASLVL 0xf000 703#define AR_CH0_TOP2_XPABIASLVL 0xf000
@@ -1152,9 +1145,8 @@
1152#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT 0x0ffe0000 1145#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT 0x0ffe0000
1153#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT_S 17 1146#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT_S 17
1154 1147
1155#define AR_PHY_PAPRD_TRAINER_CNTL1 (AR_SM_BASE + \ 1148#define AR_PHY_PAPRD_TRAINER_CNTL1 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x580 : 0x490))
1156 (AR_SREV_9485(ah) ? \ 1149
1157 0x580 : 0x490))
1158#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE 0x00000001 1150#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE 0x00000001
1159#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE_S 0 1151#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE_S 0
1160#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING 0x0000007e 1152#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING 0x0000007e
@@ -1170,15 +1162,13 @@
1170#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP 0x0003f000 1162#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP 0x0003f000
1171#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP_S 12 1163#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP_S 12
1172 1164
1173#define AR_PHY_PAPRD_TRAINER_CNTL2 (AR_SM_BASE + \ 1165#define AR_PHY_PAPRD_TRAINER_CNTL2 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x584 : 0x494))
1174 (AR_SREV_9485(ah) ? \ 1166
1175 0x584 : 0x494))
1176#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN 0xFFFFFFFF 1167#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN 0xFFFFFFFF
1177#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN_S 0 1168#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN_S 0
1178 1169
1179#define AR_PHY_PAPRD_TRAINER_CNTL3 (AR_SM_BASE + \ 1170#define AR_PHY_PAPRD_TRAINER_CNTL3 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x588 : 0x498))
1180 (AR_SREV_9485(ah) ? \ 1171
1181 0x588 : 0x498))
1182#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE 0x0000003f 1172#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE 0x0000003f
1183#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE_S 0 1173#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE_S 0
1184#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP 0x00000fc0 1174#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP 0x00000fc0
@@ -1194,9 +1184,8 @@
1194#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE 0x20000000 1184#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE 0x20000000
1195#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE_S 29 1185#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE_S 29
1196 1186
1197#define AR_PHY_PAPRD_TRAINER_CNTL4 (AR_SM_BASE + \ 1187#define AR_PHY_PAPRD_TRAINER_CNTL4 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x58c : 0x49c))
1198 (AR_SREV_9485(ah) ? \ 1188
1199 0x58c : 0x49c))
1200#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES 0x03ff0000 1189#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES 0x03ff0000
1201#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES_S 16 1190#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES_S 16
1202#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_SAFETY_DELTA 0x0000f000 1191#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_SAFETY_DELTA 0x0000f000
@@ -1215,7 +1204,8 @@
1215#define AR_PHY_PAPRD_PRE_POST_SCALING 0x3FFFF 1204#define AR_PHY_PAPRD_PRE_POST_SCALING 0x3FFFF
1216#define AR_PHY_PAPRD_PRE_POST_SCALING_S 0 1205#define AR_PHY_PAPRD_PRE_POST_SCALING_S 0
1217 1206
1218#define AR_PHY_PAPRD_TRAINER_STAT1 (AR_SM_BASE + 0x4a0) 1207#define AR_PHY_PAPRD_TRAINER_STAT1 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x590 : 0x4a0))
1208
1219#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE 0x00000001 1209#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE 0x00000001
1220#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE_S 0 1210#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE_S 0
1221#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_INCOMPLETE 0x00000002 1211#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_INCOMPLETE 0x00000002
@@ -1229,7 +1219,8 @@
1229#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR 0x0001fe00 1219#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR 0x0001fe00
1230#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR_S 9 1220#define AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR_S 9
1231 1221
1232#define AR_PHY_PAPRD_TRAINER_STAT2 (AR_SM_BASE + 0x4a4) 1222#define AR_PHY_PAPRD_TRAINER_STAT2 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x594 : 0x4a4))
1223
1233#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_VAL 0x0000ffff 1224#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_VAL 0x0000ffff
1234#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_VAL_S 0 1225#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_VAL_S 0
1235#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_COARSE_IDX 0x001f0000 1226#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_COARSE_IDX 0x001f0000
@@ -1237,7 +1228,8 @@
1237#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_IDX 0x00600000 1228#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_IDX 0x00600000
1238#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_IDX_S 21 1229#define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_IDX_S 21
1239 1230
1240#define AR_PHY_PAPRD_TRAINER_STAT3 (AR_SM_BASE + 0x4a8) 1231#define AR_PHY_PAPRD_TRAINER_STAT3 (AR_SM_BASE + (AR_SREV_9485(ah) ? 0x598 : 0x4a8))
1232
1241#define AR_PHY_PAPRD_TRAINER_STAT3_PAPRD_TRAIN_SAMPLES_CNT 0x000fffff 1233#define AR_PHY_PAPRD_TRAINER_STAT3_PAPRD_TRAIN_SAMPLES_CNT 0x000fffff
1242#define AR_PHY_PAPRD_TRAINER_STAT3_PAPRD_TRAIN_SAMPLES_CNT_S 0 1234#define AR_PHY_PAPRD_TRAINER_STAT3_PAPRD_TRAIN_SAMPLES_CNT_S 0
1243 1235
@@ -1286,4 +1278,43 @@
1286#define AR_BTCOEX_WL_LNADIV_BT_INACTIVE_THRESHOLD 0xFC000000 1278#define AR_BTCOEX_WL_LNADIV_BT_INACTIVE_THRESHOLD 0xFC000000
1287#define AR_BTCOEX_WL_LNADIV_BT_INACTIVE_THRESHOLD_S 26 1279#define AR_BTCOEX_WL_LNADIV_BT_INACTIVE_THRESHOLD_S 26
1288 1280
1281/* Manual Peak detector calibration */
1282#define AR_PHY_65NM_BASE 0x16000
1283#define AR_PHY_65NM_RXRF_GAINSTAGES(i) (AR_PHY_65NM_BASE + \
1284 (i * 0x400) + 0x8)
1285#define AR_PHY_65NM_RXRF_GAINSTAGES_RX_OVERRIDE 0x80000000
1286#define AR_PHY_65NM_RXRF_GAINSTAGES_RX_OVERRIDE_S 31
1287#define AR_PHY_65NM_RXRF_GAINSTAGES_LNAON_CALDC 0x00000002
1288#define AR_PHY_65NM_RXRF_GAINSTAGES_LNAON_CALDC_S 1
1289#define AR_PHY_65NM_RXRF_GAINSTAGES_LNA2G_GAIN_OVR 0x70000000
1290#define AR_PHY_65NM_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_S 28
1291#define AR_PHY_65NM_RXRF_GAINSTAGES_LNA5G_GAIN_OVR 0x03800000
1292#define AR_PHY_65NM_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_S 23
1293
1294#define AR_PHY_65NM_RXTX2(i) (AR_PHY_65NM_BASE + \
1295 (i * 0x400) + 0x104)
1296#define AR_PHY_65NM_RXTX2_RXON_OVR 0x00001000
1297#define AR_PHY_65NM_RXTX2_RXON_OVR_S 12
1298#define AR_PHY_65NM_RXTX2_RXON 0x00000800
1299#define AR_PHY_65NM_RXTX2_RXON_S 11
1300
1301#define AR_PHY_65NM_RXRF_AGC(i) (AR_PHY_65NM_BASE + \
1302 (i * 0x400) + 0xc)
1303#define AR_PHY_65NM_RXRF_AGC_AGC_OVERRIDE 0x80000000
1304#define AR_PHY_65NM_RXRF_AGC_AGC_OVERRIDE_S 31
1305#define AR_PHY_65NM_RXRF_AGC_AGC_ON_OVR 0x40000000
1306#define AR_PHY_65NM_RXRF_AGC_AGC_ON_OVR_S 30
1307#define AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR 0x20000000
1308#define AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR_S 29
1309#define AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR 0x1E000000
1310#define AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR_S 25
1311#define AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR 0x00078000
1312#define AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR_S 15
1313#define AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR 0x01F80000
1314#define AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR_S 19
1315#define AR_PHY_65NM_RXRF_AGC_AGC5G_CALDAC_OVR 0x00007e00
1316#define AR_PHY_65NM_RXRF_AGC_AGC5G_CALDAC_OVR_S 9
1317#define AR_PHY_65NM_RXRF_AGC_AGC_OUT 0x00000004
1318#define AR_PHY_65NM_RXRF_AGC_AGC_OUT_S 2
1319
1289#endif /* AR9003_PHY_H */ 1320#endif /* AR9003_PHY_H */
diff --git a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
index 1d8235e19f0f..f69d292bdc02 100644
--- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
@@ -211,6 +211,8 @@ static const u32 ar9340_1p0_radio_core_40M[][2] = {
211 {0x0001609c, 0x02566f3a}, 211 {0x0001609c, 0x02566f3a},
212 {0x000160ac, 0xa4647c00}, 212 {0x000160ac, 0xa4647c00},
213 {0x000160b0, 0x01885f5a}, 213 {0x000160b0, 0x01885f5a},
214 {0x00008244, 0x0010f400},
215 {0x0000824c, 0x0001e800},
214}; 216};
215 217
216#define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble 218#define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble
@@ -1273,9 +1275,9 @@ static const u32 ar9340_1p0_mac_core[][2] = {
1273 {0x000081f8, 0x00000000}, 1275 {0x000081f8, 0x00000000},
1274 {0x000081fc, 0x00000000}, 1276 {0x000081fc, 0x00000000},
1275 {0x00008240, 0x00100000}, 1277 {0x00008240, 0x00100000},
1276 {0x00008244, 0x0010f424}, 1278 {0x00008244, 0x0010f3d7},
1277 {0x00008248, 0x00000800}, 1279 {0x00008248, 0x00000800},
1278 {0x0000824c, 0x0001e848}, 1280 {0x0000824c, 0x0001e7ae},
1279 {0x00008250, 0x00000000}, 1281 {0x00008250, 0x00000000},
1280 {0x00008254, 0x00000000}, 1282 {0x00008254, 0x00000000},
1281 {0x00008258, 0x00000000}, 1283 {0x00008258, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
index 58f30f65c6b6..ccc42a71b436 100644
--- a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
@@ -78,7 +78,7 @@ static const u32 ar9462_2p0_baseband_postamble[][5] = {
78 {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, 78 {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
79 {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, 79 {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
80 {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, 80 {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
81 {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, 81 {0x0000a2c4, 0x00058d18, 0x00058d18, 0x00058d18, 0x00058d18},
82 {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982}, 82 {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
83 {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b}, 83 {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
84 {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 84 {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
index fb4497fc7a3d..a3710f3bb90c 100644
--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
@@ -18,7 +18,7 @@
18#ifndef INITVALS_9485_H 18#ifndef INITVALS_9485_H
19#define INITVALS_9485_H 19#define INITVALS_9485_H
20 20
21/* AR9485 1.0 */ 21/* AR9485 1.1 */
22 22
23#define ar9485_1_1_mac_postamble ar9300_2p2_mac_postamble 23#define ar9485_1_1_mac_postamble ar9300_2p2_mac_postamble
24 24
@@ -31,6 +31,11 @@ static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
31 31
32static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = { 32static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
33 /* Addr allmodes */ 33 /* Addr allmodes */
34 {0x00009e00, 0x037216a0},
35 {0x00009e04, 0x00182020},
36 {0x00009e18, 0x00000000},
37 {0x00009e2c, 0x00004121},
38 {0x00009e44, 0x02282324},
34 {0x0000a000, 0x00060005}, 39 {0x0000a000, 0x00060005},
35 {0x0000a004, 0x00810080}, 40 {0x0000a004, 0x00810080},
36 {0x0000a008, 0x00830082}, 41 {0x0000a008, 0x00830082},
@@ -164,6 +169,11 @@ static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
164static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = { 169static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
165 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 170 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
166 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002}, 171 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
172 {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
173 {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
174 {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
175 {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
176 {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
167 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8}, 177 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
168 {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 178 {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
169 {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000}, 179 {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
@@ -198,6 +208,22 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
198 {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb}, 208 {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
199 {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb}, 209 {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
200 {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb}, 210 {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
211 {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
212 {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
213 {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
214 {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
215 {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
216 {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
217 {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
218 {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
219 {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
220 {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
221 {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
222 {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
223 {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
224 {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
225 {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
226 {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
201 {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 227 {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
202 {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 228 {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
203 {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 229 {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -234,9 +260,193 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
234 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260}, 260 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
235}; 261};
236 262
237#define ar9485Modes_high_ob_db_tx_gain_1_1 ar9485Modes_high_power_tx_gain_1_1 263static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
264 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
265 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
266 {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
267 {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
268 {0x0000a2e0, 0x00000000, 0x00000000, 0xffc63a84, 0xffc63a84},
269 {0x0000a2e4, 0x00000000, 0x00000000, 0xfe0fc000, 0xfe0fc000},
270 {0x0000a2e8, 0x00000000, 0x00000000, 0xfff00000, 0xfff00000},
271 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
272 {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
273 {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
274 {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
275 {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
276 {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
277 {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
278 {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
279 {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
280 {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
281 {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
282 {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
283 {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
284 {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
285 {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
286 {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
287 {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
288 {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
289 {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
290 {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
291 {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
292 {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
293 {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
294 {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
295 {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
296 {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
297 {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
298 {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
299 {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
300 {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
301 {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
302 {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
303 {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
304 {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
305 {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
306 {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
307 {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
308 {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
309 {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
310 {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
311 {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
312 {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
313 {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
314 {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
315 {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
316 {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
317 {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
318 {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
319 {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
320 {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
321 {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
322 {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
323 {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
324 {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
325 {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
326 {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
327 {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
328 {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
329 {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
330 {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
331 {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
332 {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
333 {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
334 {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
335 {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
336 {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
337 {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
338 {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
339 {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
340 {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
341 {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
342 {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
343 {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
344 {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
345 {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
346 {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
347 {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
348 {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
349 {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
350 {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
351 {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
352 {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
353 {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
354 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
355};
238 356
239#define ar9485Modes_low_ob_db_tx_gain_1_1 ar9485Modes_high_ob_db_tx_gain_1_1 357static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
358 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
359 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
360 {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
361 {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
362 {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
363 {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
364 {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
365 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
366 {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
367 {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
368 {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
369 {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
370 {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
371 {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
372 {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
373 {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
374 {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
375 {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
376 {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
377 {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
378 {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
379 {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
380 {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
381 {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
382 {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
383 {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
384 {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
385 {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
386 {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
387 {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
388 {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
389 {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
390 {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
391 {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
392 {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
393 {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
394 {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
395 {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
396 {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
397 {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
398 {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
399 {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
400 {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
401 {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
402 {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
403 {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
404 {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
405 {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
406 {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
407 {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
408 {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
409 {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
410 {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
411 {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
412 {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
413 {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
414 {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
415 {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
416 {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
417 {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
418 {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
419 {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
420 {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
421 {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
422 {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
423 {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
424 {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
425 {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
426 {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
427 {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
428 {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
429 {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
430 {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
431 {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
432 {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
433 {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
434 {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
435 {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
436 {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
437 {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
438 {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
439 {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
440 {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
441 {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
442 {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
443 {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
444 {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
445 {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
446 {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
447 {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
448 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
449};
240 450
241#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1 451#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
242 452
@@ -245,19 +455,19 @@ static const u32 ar9485_1_1[][2] = {
245 {0x0000a580, 0x00000000}, 455 {0x0000a580, 0x00000000},
246 {0x0000a584, 0x00000000}, 456 {0x0000a584, 0x00000000},
247 {0x0000a588, 0x00000000}, 457 {0x0000a588, 0x00000000},
248 {0x0000a58c, 0x00000000}, 458 {0x0000a58c, 0x01804000},
249 {0x0000a590, 0x00000000}, 459 {0x0000a590, 0x02808a02},
250 {0x0000a594, 0x00000000}, 460 {0x0000a594, 0x0340ca02},
251 {0x0000a598, 0x00000000}, 461 {0x0000a598, 0x0340cd03},
252 {0x0000a59c, 0x00000000}, 462 {0x0000a59c, 0x0340cd03},
253 {0x0000a5a0, 0x00000000}, 463 {0x0000a5a0, 0x06415304},
254 {0x0000a5a4, 0x00000000}, 464 {0x0000a5a4, 0x04c11905},
255 {0x0000a5a8, 0x00000000}, 465 {0x0000a5a8, 0x06415905},
256 {0x0000a5ac, 0x00000000}, 466 {0x0000a5ac, 0x06415905},
257 {0x0000a5b0, 0x00000000}, 467 {0x0000a5b0, 0x06415905},
258 {0x0000a5b4, 0x00000000}, 468 {0x0000a5b4, 0x06415905},
259 {0x0000a5b8, 0x00000000}, 469 {0x0000a5b8, 0x06415905},
260 {0x0000a5bc, 0x00000000}, 470 {0x0000a5bc, 0x06415905},
261}; 471};
262 472
263static const u32 ar9485_1_1_radio_core[][2] = { 473static const u32 ar9485_1_1_radio_core[][2] = {
@@ -340,7 +550,7 @@ static const u32 ar9485_1_1_baseband_core[][2] = {
340 {0x00009880, 0x201fff00}, 550 {0x00009880, 0x201fff00},
341 {0x00009884, 0x00001042}, 551 {0x00009884, 0x00001042},
342 {0x000098a4, 0x00200400}, 552 {0x000098a4, 0x00200400},
343 {0x000098b0, 0x52440bbe}, 553 {0x000098b0, 0x32840bbe},
344 {0x000098d0, 0x004b6a8e}, 554 {0x000098d0, 0x004b6a8e},
345 {0x000098d4, 0x00000820}, 555 {0x000098d4, 0x00000820},
346 {0x000098dc, 0x00000000}, 556 {0x000098dc, 0x00000000},
@@ -362,7 +572,7 @@ static const u32 ar9485_1_1_baseband_core[][2] = {
362 {0x00009d18, 0x00000000}, 572 {0x00009d18, 0x00000000},
363 {0x00009d1c, 0x00000000}, 573 {0x00009d1c, 0x00000000},
364 {0x00009e08, 0x0038233c}, 574 {0x00009e08, 0x0038233c},
365 {0x00009e24, 0x9927b515}, 575 {0x00009e24, 0x992bb515},
366 {0x00009e28, 0x12ef0200}, 576 {0x00009e28, 0x12ef0200},
367 {0x00009e30, 0x06336f77}, 577 {0x00009e30, 0x06336f77},
368 {0x00009e34, 0x6af6532f}, 578 {0x00009e34, 0x6af6532f},
@@ -427,7 +637,7 @@ static const u32 ar9485_1_1_baseband_core[][2] = {
427 {0x0000a408, 0x0e79e5c6}, 637 {0x0000a408, 0x0e79e5c6},
428 {0x0000a40c, 0x00820820}, 638 {0x0000a40c, 0x00820820},
429 {0x0000a414, 0x1ce739cf}, 639 {0x0000a414, 0x1ce739cf},
430 {0x0000a418, 0x2d0019ce}, 640 {0x0000a418, 0x2d0021ce},
431 {0x0000a41c, 0x1ce739ce}, 641 {0x0000a41c, 0x1ce739ce},
432 {0x0000a420, 0x000001ce}, 642 {0x0000a420, 0x000001ce},
433 {0x0000a424, 0x1ce739ce}, 643 {0x0000a424, 0x1ce739ce},
@@ -443,8 +653,8 @@ static const u32 ar9485_1_1_baseband_core[][2] = {
443 {0x0000a44c, 0x00000001}, 653 {0x0000a44c, 0x00000001},
444 {0x0000a450, 0x00010000}, 654 {0x0000a450, 0x00010000},
445 {0x0000a5c4, 0xbfad9d74}, 655 {0x0000a5c4, 0xbfad9d74},
446 {0x0000a5c8, 0x0048060a}, 656 {0x0000a5c8, 0x00480605},
447 {0x0000a5cc, 0x00000637}, 657 {0x0000a5cc, 0x00002e37},
448 {0x0000a760, 0x03020100}, 658 {0x0000a760, 0x03020100},
449 {0x0000a764, 0x09080504}, 659 {0x0000a764, 0x09080504},
450 {0x0000a768, 0x0d0c0b0a}, 660 {0x0000a768, 0x0d0c0b0a},
@@ -464,17 +674,22 @@ static const u32 ar9485_1_1_baseband_core[][2] = {
464 674
465static const u32 ar9485_common_rx_gain_1_1[][2] = { 675static const u32 ar9485_common_rx_gain_1_1[][2] = {
466 /* Addr allmodes */ 676 /* Addr allmodes */
467 {0x0000a000, 0x00010000}, 677 {0x00009e00, 0x03721b20},
468 {0x0000a004, 0x00030002}, 678 {0x00009e04, 0x00082020},
469 {0x0000a008, 0x00050004}, 679 {0x00009e18, 0x0300501e},
470 {0x0000a00c, 0x00810080}, 680 {0x00009e2c, 0x00002e21},
471 {0x0000a010, 0x01800082}, 681 {0x00009e44, 0x02182324},
472 {0x0000a014, 0x01820181}, 682 {0x0000a000, 0x00060005},
473 {0x0000a018, 0x01840183}, 683 {0x0000a004, 0x00810080},
474 {0x0000a01c, 0x01880185}, 684 {0x0000a008, 0x00830082},
475 {0x0000a020, 0x018a0189}, 685 {0x0000a00c, 0x00850084},
476 {0x0000a024, 0x02850284}, 686 {0x0000a010, 0x01820181},
477 {0x0000a028, 0x02890288}, 687 {0x0000a014, 0x01840183},
688 {0x0000a018, 0x01880185},
689 {0x0000a01c, 0x018a0189},
690 {0x0000a020, 0x02850284},
691 {0x0000a024, 0x02890288},
692 {0x0000a028, 0x028b028a},
478 {0x0000a02c, 0x03850384}, 693 {0x0000a02c, 0x03850384},
479 {0x0000a030, 0x03890388}, 694 {0x0000a030, 0x03890388},
480 {0x0000a034, 0x038b038a}, 695 {0x0000a034, 0x038b038a},
@@ -496,15 +711,15 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {
496 {0x0000a074, 0x00000000}, 711 {0x0000a074, 0x00000000},
497 {0x0000a078, 0x00000000}, 712 {0x0000a078, 0x00000000},
498 {0x0000a07c, 0x00000000}, 713 {0x0000a07c, 0x00000000},
499 {0x0000a080, 0x28282828}, 714 {0x0000a080, 0x18181818},
500 {0x0000a084, 0x28282828}, 715 {0x0000a084, 0x18181818},
501 {0x0000a088, 0x28282828}, 716 {0x0000a088, 0x18181818},
502 {0x0000a08c, 0x28282828}, 717 {0x0000a08c, 0x18181818},
503 {0x0000a090, 0x28282828}, 718 {0x0000a090, 0x18181818},
504 {0x0000a094, 0x21212128}, 719 {0x0000a094, 0x18181818},
505 {0x0000a098, 0x171c1c1c}, 720 {0x0000a098, 0x17181818},
506 {0x0000a09c, 0x02020212}, 721 {0x0000a09c, 0x02020b0b},
507 {0x0000a0a0, 0x00000202}, 722 {0x0000a0a0, 0x02020202},
508 {0x0000a0a4, 0x00000000}, 723 {0x0000a0a4, 0x00000000},
509 {0x0000a0a8, 0x00000000}, 724 {0x0000a0a8, 0x00000000},
510 {0x0000a0ac, 0x00000000}, 725 {0x0000a0ac, 0x00000000},
@@ -512,22 +727,22 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {
512 {0x0000a0b4, 0x00000000}, 727 {0x0000a0b4, 0x00000000},
513 {0x0000a0b8, 0x00000000}, 728 {0x0000a0b8, 0x00000000},
514 {0x0000a0bc, 0x00000000}, 729 {0x0000a0bc, 0x00000000},
515 {0x0000a0c0, 0x001f0000}, 730 {0x0000a0c0, 0x22072208},
516 {0x0000a0c4, 0x111f1100}, 731 {0x0000a0c4, 0x22052206},
517 {0x0000a0c8, 0x111d111e}, 732 {0x0000a0c8, 0x22032204},
518 {0x0000a0cc, 0x111b111c}, 733 {0x0000a0cc, 0x22012202},
519 {0x0000a0d0, 0x22032204}, 734 {0x0000a0d0, 0x221f2200},
520 {0x0000a0d4, 0x22012202}, 735 {0x0000a0d4, 0x221d221e},
521 {0x0000a0d8, 0x221f2200}, 736 {0x0000a0d8, 0x33023303},
522 {0x0000a0dc, 0x221d221e}, 737 {0x0000a0dc, 0x33003301},
523 {0x0000a0e0, 0x33013302}, 738 {0x0000a0e0, 0x331e331f},
524 {0x0000a0e4, 0x331f3300}, 739 {0x0000a0e4, 0x4402331d},
525 {0x0000a0e8, 0x4402331e}, 740 {0x0000a0e8, 0x44004401},
526 {0x0000a0ec, 0x44004401}, 741 {0x0000a0ec, 0x441e441f},
527 {0x0000a0f0, 0x441e441f}, 742 {0x0000a0f0, 0x55025503},
528 {0x0000a0f4, 0x55015502}, 743 {0x0000a0f4, 0x55005501},
529 {0x0000a0f8, 0x551f5500}, 744 {0x0000a0f8, 0x551e551f},
530 {0x0000a0fc, 0x6602551e}, 745 {0x0000a0fc, 0x6602551d},
531 {0x0000a100, 0x66006601}, 746 {0x0000a100, 0x66006601},
532 {0x0000a104, 0x661e661f}, 747 {0x0000a104, 0x661e661f},
533 {0x0000a108, 0x7703661d}, 748 {0x0000a108, 0x7703661d},
@@ -636,17 +851,12 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
636 {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 851 {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
637 {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c}, 852 {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
638 {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044}, 853 {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
639 {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
640 {0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
641 {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, 854 {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
642 {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec80d2e, 0x7ec80d2e}, 855 {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec80d2e, 0x7ec80d2e},
643 {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, 856 {0x00009e14, 0x31395d53, 0x31396053, 0x312e6053, 0x312e5d53},
644 {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
645 {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, 857 {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
646 {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, 858 {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
647 {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
648 {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222}, 859 {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222},
649 {0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
650 {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010}, 860 {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
651 {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, 861 {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
652 {0x0000a204, 0x01303fc0, 0x01303fc4, 0x01303fc4, 0x01303fc0}, 862 {0x0000a204, 0x01303fc0, 0x01303fc4, 0x01303fc4, 0x01303fc0},
@@ -850,4 +1060,6 @@ static const u32 ar9485_1_1_mac_core[][2] = {
850 {0x000083d0, 0x000301ff}, 1060 {0x000083d0, 0x000301ff},
851}; 1061};
852 1062
1063#define ar9485_1_1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
1064
853#endif /* INITVALS_9485_H */ 1065#endif /* INITVALS_9485_H */
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 4e125d8904a0..86e26a19efda 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -129,10 +129,10 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
129#define ATH_TXMAXTRY 13 129#define ATH_TXMAXTRY 13
130 130
131#define TID_TO_WME_AC(_tid) \ 131#define TID_TO_WME_AC(_tid) \
132 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ 132 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
133 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \ 133 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
134 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ 134 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
135 WME_AC_VO) 135 IEEE80211_AC_VO)
136 136
137#define ATH_AGGR_DELIM_SZ 4 137#define ATH_AGGR_DELIM_SZ 4
138#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 138#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
@@ -259,19 +259,21 @@ struct ath_atx_tid {
259}; 259};
260 260
261struct ath_node { 261struct ath_node {
262#ifdef CONFIG_ATH9K_DEBUGFS 262 struct ath_softc *sc;
263 struct list_head list; /* for sc->nodes */
264#endif
265 struct ieee80211_sta *sta; /* station struct we're part of */ 263 struct ieee80211_sta *sta; /* station struct we're part of */
266 struct ieee80211_vif *vif; /* interface with which we're associated */ 264 struct ieee80211_vif *vif; /* interface with which we're associated */
267 struct ath_atx_tid tid[WME_NUM_TID]; 265 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
268 struct ath_atx_ac ac[WME_NUM_AC]; 266 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
269 int ps_key; 267 int ps_key;
270 268
271 u16 maxampdu; 269 u16 maxampdu;
272 u8 mpdudensity; 270 u8 mpdudensity;
273 271
274 bool sleeping; 272 bool sleeping;
273
274#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
275 struct dentry *node_stat;
276#endif
275}; 277};
276 278
277#define AGGR_CLEANUP BIT(1) 279#define AGGR_CLEANUP BIT(1)
@@ -299,9 +301,9 @@ struct ath_tx {
299 struct list_head txbuf; 301 struct list_head txbuf;
300 struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; 302 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
301 struct ath_descdma txdma; 303 struct ath_descdma txdma;
302 struct ath_txq *txq_map[WME_NUM_AC]; 304 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
303 u32 txq_max_pending[WME_NUM_AC]; 305 u32 txq_max_pending[IEEE80211_NUM_ACS];
304 u16 max_aggr_framelen[WME_NUM_AC][4][32]; 306 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
305}; 307};
306 308
307struct ath_rx_edma { 309struct ath_rx_edma {
@@ -461,6 +463,12 @@ void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
461/* BTCOEX */ 463/* BTCOEX */
462/**********/ 464/**********/
463 465
466#define ATH_DUMP_BTCOEX(_s, _val) \
467 do { \
468 len += snprintf(buf + len, size - len, \
469 "%20s : %10d\n", _s, (_val)); \
470 } while (0)
471
464enum bt_op_flags { 472enum bt_op_flags {
465 BT_OP_PRIORITY_DETECTED, 473 BT_OP_PRIORITY_DETECTED,
466 BT_OP_SCAN, 474 BT_OP_SCAN,
@@ -482,6 +490,7 @@ struct ath_btcoex {
482 int rssi_count; 490 int rssi_count;
483 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */ 491 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
484 struct ath_mci_profile mci; 492 struct ath_mci_profile mci;
493 u8 stomp_audio;
485}; 494};
486 495
487#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 496#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
@@ -494,7 +503,7 @@ void ath9k_btcoex_timer_pause(struct ath_softc *sc);
494void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status); 503void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
495u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen); 504u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
496void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc); 505void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
497int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 len, u32 size); 506int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
498#else 507#else
499static inline int ath9k_init_btcoex(struct ath_softc *sc) 508static inline int ath9k_init_btcoex(struct ath_softc *sc)
500{ 509{
@@ -521,8 +530,7 @@ static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
521static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) 530static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
522{ 531{
523} 532}
524static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, 533static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
525 u32 len, u32 size)
526{ 534{
527 return 0; 535 return 0;
528} 536}
@@ -717,9 +725,6 @@ struct ath_softc {
717 725
718#ifdef CONFIG_ATH9K_DEBUGFS 726#ifdef CONFIG_ATH9K_DEBUGFS
719 struct ath9k_debug debug; 727 struct ath9k_debug debug;
720 spinlock_t nodes_lock;
721 struct list_head nodes; /* basically, stations */
722 unsigned int tx_complete_poll_work_seen;
723#endif 728#endif
724 struct ath_beacon_config cur_beacon_conf; 729 struct ath_beacon_config cur_beacon_conf;
725 struct delayed_work tx_complete_work; 730 struct delayed_work tx_complete_work;
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index 1b48414dca95..531fffd801a3 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -46,7 +46,7 @@ static void ath9k_beaconq_config(struct ath_softc *sc)
46 qi.tqi_cwmax = 0; 46 qi.tqi_cwmax = 0;
47 } else { 47 } else {
48 /* Adhoc mode; important thing is to use 2x cwmin. */ 48 /* Adhoc mode; important thing is to use 2x cwmin. */
49 txq = sc->tx.txq_map[WME_AC_BE]; 49 txq = sc->tx.txq_map[IEEE80211_AC_BE];
50 ath9k_hw_get_txq_props(ah, txq->axq_qnum, &qi_be); 50 ath9k_hw_get_txq_props(ah, txq->axq_qnum, &qi_be);
51 qi.tqi_aifs = qi_be.tqi_aifs; 51 qi.tqi_aifs = qi_be.tqi_aifs;
52 if (ah->slottime == ATH9K_SLOT_TIME_20) 52 if (ah->slottime == ATH9K_SLOT_TIME_20)
diff --git a/drivers/net/wireless/ath/ath9k/btcoex.c b/drivers/net/wireless/ath/ath9k/btcoex.c
index c90e9bc4b026..9963b0bf9f72 100644
--- a/drivers/net/wireless/ath/ath9k/btcoex.c
+++ b/drivers/net/wireless/ath/ath9k/btcoex.c
@@ -49,6 +49,7 @@ static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
49 { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */ 49 { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
50 { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */ 50 { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
51 { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */ 51 { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
52 { 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
52}; 53};
53 54
54void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum) 55void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
diff --git a/drivers/net/wireless/ath/ath9k/btcoex.h b/drivers/net/wireless/ath/ath9k/btcoex.h
index 2f84ab273d0c..6de26ea5d5fa 100644
--- a/drivers/net/wireless/ath/ath9k/btcoex.h
+++ b/drivers/net/wireless/ath/ath9k/btcoex.h
@@ -50,6 +50,7 @@ enum ath_stomp_type {
50 ATH_BTCOEX_STOMP_LOW, 50 ATH_BTCOEX_STOMP_LOW,
51 ATH_BTCOEX_STOMP_NONE, 51 ATH_BTCOEX_STOMP_NONE,
52 ATH_BTCOEX_STOMP_LOW_FTP, 52 ATH_BTCOEX_STOMP_LOW_FTP,
53 ATH_BTCOEX_STOMP_AUDIO,
53 ATH_BTCOEX_STOMP_MAX 54 ATH_BTCOEX_STOMP_MAX
54}; 55};
55 56
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index f3448a032e6f..1e8508530e98 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -69,6 +69,7 @@ s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
69 69
70 if (chan && chan->noisefloor) { 70 if (chan && chan->noisefloor) {
71 s8 delta = chan->noisefloor - 71 s8 delta = chan->noisefloor -
72 ATH9K_NF_CAL_NOISE_THRESH -
72 ath9k_hw_get_default_nf(ah, chan); 73 ath9k_hw_get_default_nf(ah, chan);
73 if (delta > 0) 74 if (delta > 0)
74 noise += delta; 75 noise += delta;
diff --git a/drivers/net/wireless/ath/ath9k/calib.h b/drivers/net/wireless/ath/ath9k/calib.h
index 1060c19a5012..60dcb6c22db9 100644
--- a/drivers/net/wireless/ath/ath9k/calib.h
+++ b/drivers/net/wireless/ath/ath9k/calib.h
@@ -21,6 +21,9 @@
21 21
22#define AR_PHY_CCA_FILTERWINDOW_LENGTH 5 22#define AR_PHY_CCA_FILTERWINDOW_LENGTH 5
23 23
24/* Internal noise floor can vary by about 6db depending on the frequency */
25#define ATH9K_NF_CAL_NOISE_THRESH 6
26
24#define NUM_NF_READINGS 6 27#define NUM_NF_READINGS 6
25#define ATH9K_NF_CAL_HIST_MAX 5 28#define ATH9K_NF_CAL_HIST_MAX 5
26 29
diff --git a/drivers/net/wireless/ath/ath9k/common.h b/drivers/net/wireless/ath/ath9k/common.h
index ad14fecc76c6..5f845beeb18b 100644
--- a/drivers/net/wireless/ath/ath9k/common.h
+++ b/drivers/net/wireless/ath/ath9k/common.h
@@ -23,18 +23,10 @@
23 23
24/* Common header for Atheros 802.11n base driver cores */ 24/* Common header for Atheros 802.11n base driver cores */
25 25
26#define WME_NUM_TID 16
27#define WME_BA_BMP_SIZE 64 26#define WME_BA_BMP_SIZE 64
28#define WME_MAX_BA WME_BA_BMP_SIZE 27#define WME_MAX_BA WME_BA_BMP_SIZE
29#define ATH_TID_MAX_BUFS (2 * WME_MAX_BA) 28#define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
30 29
31/* These must match mac80211 skb queue mapping numbers */
32#define WME_AC_VO 0
33#define WME_AC_VI 1
34#define WME_AC_BE 2
35#define WME_AC_BK 3
36#define WME_NUM_AC 4
37
38#define ATH_RSSI_DUMMY_MARKER 0x127 30#define ATH_RSSI_DUMMY_MARKER 0x127
39#define ATH_RSSI_LPF_LEN 10 31#define ATH_RSSI_LPF_LEN 10
40#define RSSI_LPF_THRESHOLD -20 32#define RSSI_LPF_THRESHOLD -20
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index a8be94b2a53a..13ff9edc2401 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -512,62 +512,19 @@ static const struct file_operations fops_interrupt = {
512 .llseek = default_llseek, 512 .llseek = default_llseek,
513}; 513};
514 514
515#define PR_QNUM(_n) sc->tx.txq_map[_n]->axq_qnum
516#define PR(str, elem) \
517 do { \
518 len += snprintf(buf + len, size - len, \
519 "%s%13u%11u%10u%10u\n", str, \
520 sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].elem, \
521 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].elem, \
522 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].elem, \
523 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].elem); \
524 if (len >= size) \
525 goto done; \
526} while(0)
527
528#define PRX(str, elem) \
529do { \
530 len += snprintf(buf + len, size - len, \
531 "%s%13u%11u%10u%10u\n", str, \
532 (unsigned int)(sc->tx.txq_map[WME_AC_BE]->elem), \
533 (unsigned int)(sc->tx.txq_map[WME_AC_BK]->elem), \
534 (unsigned int)(sc->tx.txq_map[WME_AC_VI]->elem), \
535 (unsigned int)(sc->tx.txq_map[WME_AC_VO]->elem)); \
536 if (len >= size) \
537 goto done; \
538} while(0)
539
540#define PRQLE(str, elem) \
541do { \
542 len += snprintf(buf + len, size - len, \
543 "%s%13i%11i%10i%10i\n", str, \
544 list_empty(&sc->tx.txq_map[WME_AC_BE]->elem), \
545 list_empty(&sc->tx.txq_map[WME_AC_BK]->elem), \
546 list_empty(&sc->tx.txq_map[WME_AC_VI]->elem), \
547 list_empty(&sc->tx.txq_map[WME_AC_VO]->elem)); \
548 if (len >= size) \
549 goto done; \
550} while (0)
551
552static ssize_t read_file_xmit(struct file *file, char __user *user_buf, 515static ssize_t read_file_xmit(struct file *file, char __user *user_buf,
553 size_t count, loff_t *ppos) 516 size_t count, loff_t *ppos)
554{ 517{
555 struct ath_softc *sc = file->private_data; 518 struct ath_softc *sc = file->private_data;
556 char *buf; 519 char *buf;
557 unsigned int len = 0, size = 8000; 520 unsigned int len = 0, size = 2048;
558 int i;
559 ssize_t retval = 0; 521 ssize_t retval = 0;
560 char tmp[32];
561 522
562 buf = kzalloc(size, GFP_KERNEL); 523 buf = kzalloc(size, GFP_KERNEL);
563 if (buf == NULL) 524 if (buf == NULL)
564 return -ENOMEM; 525 return -ENOMEM;
565 526
566 len += sprintf(buf, "Num-Tx-Queues: %i tx-queues-setup: 0x%x" 527 len += sprintf(buf, "%30s %10s%10s%10s\n\n",
567 " poll-work-seen: %u\n"
568 "%30s %10s%10s%10s\n\n",
569 ATH9K_NUM_TX_QUEUES, sc->tx.txqsetup,
570 sc->tx_complete_poll_work_seen,
571 "BE", "BK", "VI", "VO"); 528 "BE", "BK", "VI", "VO");
572 529
573 PR("MPDUs Queued: ", queued); 530 PR("MPDUs Queued: ", queued);
@@ -587,62 +544,11 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf,
587 PR("DELIM Underrun: ", delim_underrun); 544 PR("DELIM Underrun: ", delim_underrun);
588 PR("TX-Pkts-All: ", tx_pkts_all); 545 PR("TX-Pkts-All: ", tx_pkts_all);
589 PR("TX-Bytes-All: ", tx_bytes_all); 546 PR("TX-Bytes-All: ", tx_bytes_all);
590 PR("hw-put-tx-buf: ", puttxbuf); 547 PR("HW-put-tx-buf: ", puttxbuf);
591 PR("hw-tx-start: ", txstart); 548 PR("HW-tx-start: ", txstart);
592 PR("hw-tx-proc-desc: ", txprocdesc); 549 PR("HW-tx-proc-desc: ", txprocdesc);
593 PR("TX-Failed: ", txfailed); 550 PR("TX-Failed: ", txfailed);
594 len += snprintf(buf + len, size - len,
595 "%s%11p%11p%10p%10p\n", "txq-memory-address:",
596 sc->tx.txq_map[WME_AC_BE],
597 sc->tx.txq_map[WME_AC_BK],
598 sc->tx.txq_map[WME_AC_VI],
599 sc->tx.txq_map[WME_AC_VO]);
600 if (len >= size)
601 goto done;
602
603 PRX("axq-qnum: ", axq_qnum);
604 PRX("axq-depth: ", axq_depth);
605 PRX("axq-ampdu_depth: ", axq_ampdu_depth);
606 PRX("axq-stopped ", stopped);
607 PRX("tx-in-progress ", axq_tx_inprogress);
608 PRX("pending-frames ", pending_frames);
609 PRX("txq_headidx: ", txq_headidx);
610 PRX("txq_tailidx: ", txq_headidx);
611
612 PRQLE("axq_q empty: ", axq_q);
613 PRQLE("axq_acq empty: ", axq_acq);
614 for (i = 0; i < ATH_TXFIFO_DEPTH; i++) {
615 snprintf(tmp, sizeof(tmp) - 1, "txq_fifo[%i] empty: ", i);
616 PRQLE(tmp, txq_fifo[i]);
617 }
618 551
619 /* Print out more detailed queue-info */
620 for (i = 0; i <= WME_AC_BK; i++) {
621 struct ath_txq *txq = &(sc->tx.txq[i]);
622 struct ath_atx_ac *ac;
623 struct ath_atx_tid *tid;
624 if (len >= size)
625 goto done;
626 spin_lock_bh(&txq->axq_lock);
627 if (!list_empty(&txq->axq_acq)) {
628 ac = list_first_entry(&txq->axq_acq, struct ath_atx_ac,
629 list);
630 len += snprintf(buf + len, size - len,
631 "txq[%i] first-ac: %p sched: %i\n",
632 i, ac, ac->sched);
633 if (list_empty(&ac->tid_q) || (len >= size))
634 goto done_for;
635 tid = list_first_entry(&ac->tid_q, struct ath_atx_tid,
636 list);
637 len += snprintf(buf + len, size - len,
638 " first-tid: %p sched: %i paused: %i\n",
639 tid, tid->sched, tid->paused);
640 }
641 done_for:
642 spin_unlock_bh(&txq->axq_lock);
643 }
644
645done:
646 if (len > size) 552 if (len > size)
647 len = size; 553 len = size;
648 554
@@ -652,62 +558,41 @@ done:
652 return retval; 558 return retval;
653} 559}
654 560
655static ssize_t read_file_stations(struct file *file, char __user *user_buf, 561static ssize_t read_file_queues(struct file *file, char __user *user_buf,
656 size_t count, loff_t *ppos) 562 size_t count, loff_t *ppos)
657{ 563{
658 struct ath_softc *sc = file->private_data; 564 struct ath_softc *sc = file->private_data;
565 struct ath_txq *txq;
659 char *buf; 566 char *buf;
660 unsigned int len = 0, size = 64000; 567 unsigned int len = 0, size = 1024;
661 struct ath_node *an = NULL;
662 ssize_t retval = 0; 568 ssize_t retval = 0;
663 int q; 569 int i;
570 char *qname[4] = {"VO", "VI", "BE", "BK"};
664 571
665 buf = kzalloc(size, GFP_KERNEL); 572 buf = kzalloc(size, GFP_KERNEL);
666 if (buf == NULL) 573 if (buf == NULL)
667 return -ENOMEM; 574 return -ENOMEM;
668 575
669 len += snprintf(buf + len, size - len, 576 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
670 "Stations:\n" 577 txq = sc->tx.txq_map[i];
671 " tid: addr sched paused buf_q-empty an ac baw\n" 578 len += snprintf(buf + len, size - len, "(%s): ", qname[i]);
672 " ac: addr sched tid_q-empty txq\n");
673
674 spin_lock(&sc->nodes_lock);
675 list_for_each_entry(an, &sc->nodes, list) {
676 unsigned short ma = an->maxampdu;
677 if (ma == 0)
678 ma = 65535; /* see ath_lookup_rate */
679 len += snprintf(buf + len, size - len,
680 "iface: %pM sta: %pM max-ampdu: %hu mpdu-density: %uus\n",
681 an->vif->addr, an->sta->addr, ma,
682 (unsigned int)(an->mpdudensity));
683 if (len >= size)
684 goto done;
685
686 for (q = 0; q < WME_NUM_TID; q++) {
687 struct ath_atx_tid *tid = &(an->tid[q]);
688 len += snprintf(buf + len, size - len,
689 " tid: %p %s %s %i %p %p %hu\n",
690 tid, tid->sched ? "sched" : "idle",
691 tid->paused ? "paused" : "running",
692 skb_queue_empty(&tid->buf_q),
693 tid->an, tid->ac, tid->baw_size);
694 if (len >= size)
695 goto done;
696 }
697 579
698 for (q = 0; q < WME_NUM_AC; q++) { 580 ath_txq_lock(sc, txq);
699 struct ath_atx_ac *ac = &(an->ac[q]); 581
700 len += snprintf(buf + len, size - len, 582 len += snprintf(buf + len, size - len, "%s: %d ",
701 " ac: %p %s %i %p\n", 583 "qnum", txq->axq_qnum);
702 ac, ac->sched ? "sched" : "idle", 584 len += snprintf(buf + len, size - len, "%s: %2d ",
703 list_empty(&ac->tid_q), ac->txq); 585 "qdepth", txq->axq_depth);
704 if (len >= size) 586 len += snprintf(buf + len, size - len, "%s: %2d ",
705 goto done; 587 "ampdu-depth", txq->axq_ampdu_depth);
706 } 588 len += snprintf(buf + len, size - len, "%s: %3d ",
589 "pending", txq->pending_frames);
590 len += snprintf(buf + len, size - len, "%s: %d\n",
591 "stopped", txq->stopped);
592
593 ath_txq_unlock(sc, txq);
707 } 594 }
708 595
709done:
710 spin_unlock(&sc->nodes_lock);
711 if (len > size) 596 if (len > size)
712 len = size; 597 len = size;
713 598
@@ -837,6 +722,9 @@ static ssize_t read_file_reset(struct file *file, char __user *user_buf,
837 len += snprintf(buf + len, sizeof(buf) - len, 722 len += snprintf(buf + len, sizeof(buf) - len,
838 "%17s: %2d\n", "PLL RX Hang", 723 "%17s: %2d\n", "PLL RX Hang",
839 sc->debug.stats.reset[RESET_TYPE_PLL_HANG]); 724 sc->debug.stats.reset[RESET_TYPE_PLL_HANG]);
725 len += snprintf(buf + len, sizeof(buf) - len,
726 "%17s: %2d\n", "MCI Reset",
727 sc->debug.stats.reset[RESET_TYPE_MCI]);
840 728
841 if (len > sizeof(buf)) 729 if (len > sizeof(buf))
842 len = sizeof(buf); 730 len = sizeof(buf);
@@ -919,8 +807,8 @@ static const struct file_operations fops_xmit = {
919 .llseek = default_llseek, 807 .llseek = default_llseek,
920}; 808};
921 809
922static const struct file_operations fops_stations = { 810static const struct file_operations fops_queues = {
923 .read = read_file_stations, 811 .read = read_file_queues,
924 .open = simple_open, 812 .open = simple_open,
925 .owner = THIS_MODULE, 813 .owner = THIS_MODULE,
926 .llseek = default_llseek, 814 .llseek = default_llseek,
@@ -1599,8 +1487,14 @@ static ssize_t read_file_btcoex(struct file *file, char __user *user_buf,
1599 if (buf == NULL) 1487 if (buf == NULL)
1600 return -ENOMEM; 1488 return -ENOMEM;
1601 1489
1602 len = ath9k_dump_btcoex(sc, buf, len, size); 1490 if (!sc->sc_ah->common.btcoex_enabled) {
1491 len = snprintf(buf, size, "%s\n",
1492 "BTCOEX is disabled");
1493 goto exit;
1494 }
1603 1495
1496 len = ath9k_dump_btcoex(sc, buf, size);
1497exit:
1604 retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); 1498 retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
1605 kfree(buf); 1499 kfree(buf);
1606 1500
@@ -1615,6 +1509,215 @@ static const struct file_operations fops_btcoex = {
1615}; 1509};
1616#endif 1510#endif
1617 1511
1512static ssize_t read_file_node_stat(struct file *file, char __user *user_buf,
1513 size_t count, loff_t *ppos)
1514{
1515 struct ath_node *an = file->private_data;
1516 struct ath_softc *sc = an->sc;
1517 struct ath_atx_tid *tid;
1518 struct ath_atx_ac *ac;
1519 struct ath_txq *txq;
1520 u32 len = 0, size = 4096;
1521 char *buf;
1522 size_t retval;
1523 int tidno, acno;
1524
1525 buf = kzalloc(size, GFP_KERNEL);
1526 if (buf == NULL)
1527 return -ENOMEM;
1528
1529 if (!an->sta->ht_cap.ht_supported) {
1530 len = snprintf(buf, size, "%s\n",
1531 "HT not supported");
1532 goto exit;
1533 }
1534
1535 len = snprintf(buf, size, "Max-AMPDU: %d\n",
1536 an->maxampdu);
1537 len += snprintf(buf + len, size - len, "MPDU Density: %d\n\n",
1538 an->mpdudensity);
1539
1540 len += snprintf(buf + len, size - len,
1541 "%2s%7s\n", "AC", "SCHED");
1542
1543 for (acno = 0, ac = &an->ac[acno];
1544 acno < IEEE80211_NUM_ACS; acno++, ac++) {
1545 txq = ac->txq;
1546 ath_txq_lock(sc, txq);
1547 len += snprintf(buf + len, size - len,
1548 "%2d%7d\n",
1549 acno, ac->sched);
1550 ath_txq_unlock(sc, txq);
1551 }
1552
1553 len += snprintf(buf + len, size - len,
1554 "\n%3s%11s%10s%10s%10s%10s%9s%6s%8s\n",
1555 "TID", "SEQ_START", "SEQ_NEXT", "BAW_SIZE",
1556 "BAW_HEAD", "BAW_TAIL", "BAR_IDX", "SCHED", "PAUSED");
1557
1558 for (tidno = 0, tid = &an->tid[tidno];
1559 tidno < IEEE80211_NUM_TIDS; tidno++, tid++) {
1560 txq = tid->ac->txq;
1561 ath_txq_lock(sc, txq);
1562 len += snprintf(buf + len, size - len,
1563 "%3d%11d%10d%10d%10d%10d%9d%6d%8d\n",
1564 tid->tidno, tid->seq_start, tid->seq_next,
1565 tid->baw_size, tid->baw_head, tid->baw_tail,
1566 tid->bar_index, tid->sched, tid->paused);
1567 ath_txq_unlock(sc, txq);
1568 }
1569exit:
1570 retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
1571 kfree(buf);
1572
1573 return retval;
1574}
1575
1576static const struct file_operations fops_node_stat = {
1577 .read = read_file_node_stat,
1578 .open = simple_open,
1579 .owner = THIS_MODULE,
1580 .llseek = default_llseek,
1581};
1582
1583void ath9k_sta_add_debugfs(struct ieee80211_hw *hw,
1584 struct ieee80211_vif *vif,
1585 struct ieee80211_sta *sta,
1586 struct dentry *dir)
1587{
1588 struct ath_node *an = (struct ath_node *)sta->drv_priv;
1589 an->node_stat = debugfs_create_file("node_stat", S_IRUGO,
1590 dir, an, &fops_node_stat);
1591}
1592
1593void ath9k_sta_remove_debugfs(struct ieee80211_hw *hw,
1594 struct ieee80211_vif *vif,
1595 struct ieee80211_sta *sta,
1596 struct dentry *dir)
1597{
1598 struct ath_node *an = (struct ath_node *)sta->drv_priv;
1599 debugfs_remove(an->node_stat);
1600}
1601
1602/* Ethtool support for get-stats */
1603
1604#define AMKSTR(nm) #nm "_BE", #nm "_BK", #nm "_VI", #nm "_VO"
1605static const char ath9k_gstrings_stats[][ETH_GSTRING_LEN] = {
1606 "tx_pkts_nic",
1607 "tx_bytes_nic",
1608 "rx_pkts_nic",
1609 "rx_bytes_nic",
1610 AMKSTR(d_tx_pkts),
1611 AMKSTR(d_tx_bytes),
1612 AMKSTR(d_tx_mpdus_queued),
1613 AMKSTR(d_tx_mpdus_completed),
1614 AMKSTR(d_tx_mpdu_xretries),
1615 AMKSTR(d_tx_aggregates),
1616 AMKSTR(d_tx_ampdus_queued_hw),
1617 AMKSTR(d_tx_ampdus_queued_sw),
1618 AMKSTR(d_tx_ampdus_completed),
1619 AMKSTR(d_tx_ampdu_retries),
1620 AMKSTR(d_tx_ampdu_xretries),
1621 AMKSTR(d_tx_fifo_underrun),
1622 AMKSTR(d_tx_op_exceeded),
1623 AMKSTR(d_tx_timer_expiry),
1624 AMKSTR(d_tx_desc_cfg_err),
1625 AMKSTR(d_tx_data_underrun),
1626 AMKSTR(d_tx_delim_underrun),
1627 "d_rx_decrypt_crc_err",
1628 "d_rx_phy_err",
1629 "d_rx_mic_err",
1630 "d_rx_pre_delim_crc_err",
1631 "d_rx_post_delim_crc_err",
1632 "d_rx_decrypt_busy_err",
1633
1634 "d_rx_phyerr_radar",
1635 "d_rx_phyerr_ofdm_timing",
1636 "d_rx_phyerr_cck_timing",
1637
1638};
1639#define ATH9K_SSTATS_LEN ARRAY_SIZE(ath9k_gstrings_stats)
1640
1641void ath9k_get_et_strings(struct ieee80211_hw *hw,
1642 struct ieee80211_vif *vif,
1643 u32 sset, u8 *data)
1644{
1645 if (sset == ETH_SS_STATS)
1646 memcpy(data, *ath9k_gstrings_stats,
1647 sizeof(ath9k_gstrings_stats));
1648}
1649
1650int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
1651 struct ieee80211_vif *vif, int sset)
1652{
1653 if (sset == ETH_SS_STATS)
1654 return ATH9K_SSTATS_LEN;
1655 return 0;
1656}
1657
1658#define AWDATA(elem) \
1659 do { \
1660 data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BE)].elem; \
1661 data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BK)].elem; \
1662 data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VI)].elem; \
1663 data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VO)].elem; \
1664 } while (0)
1665
1666#define AWDATA_RX(elem) \
1667 do { \
1668 data[i++] = sc->debug.stats.rxstats.elem; \
1669 } while (0)
1670
1671void ath9k_get_et_stats(struct ieee80211_hw *hw,
1672 struct ieee80211_vif *vif,
1673 struct ethtool_stats *stats, u64 *data)
1674{
1675 struct ath_softc *sc = hw->priv;
1676 int i = 0;
1677
1678 data[i++] = (sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BE)].tx_pkts_all +
1679 sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BK)].tx_pkts_all +
1680 sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VI)].tx_pkts_all +
1681 sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VO)].tx_pkts_all);
1682 data[i++] = (sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BE)].tx_bytes_all +
1683 sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BK)].tx_bytes_all +
1684 sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VI)].tx_bytes_all +
1685 sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VO)].tx_bytes_all);
1686 AWDATA_RX(rx_pkts_all);
1687 AWDATA_RX(rx_bytes_all);
1688
1689 AWDATA(tx_pkts_all);
1690 AWDATA(tx_bytes_all);
1691 AWDATA(queued);
1692 AWDATA(completed);
1693 AWDATA(xretries);
1694 AWDATA(a_aggr);
1695 AWDATA(a_queued_hw);
1696 AWDATA(a_queued_sw);
1697 AWDATA(a_completed);
1698 AWDATA(a_retries);
1699 AWDATA(a_xretries);
1700 AWDATA(fifo_underrun);
1701 AWDATA(xtxop);
1702 AWDATA(timer_exp);
1703 AWDATA(desc_cfg_err);
1704 AWDATA(data_underrun);
1705 AWDATA(delim_underrun);
1706
1707 AWDATA_RX(decrypt_crc_err);
1708 AWDATA_RX(phy_err);
1709 AWDATA_RX(mic_err);
1710 AWDATA_RX(pre_delim_crc_err);
1711 AWDATA_RX(post_delim_crc_err);
1712 AWDATA_RX(decrypt_busy_err);
1713
1714 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_RADAR]);
1715 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_OFDM_TIMING]);
1716 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_CCK_TIMING]);
1717
1718 WARN_ON(i != ATH9K_SSTATS_LEN);
1719}
1720
1618int ath9k_init_debug(struct ath_hw *ah) 1721int ath9k_init_debug(struct ath_hw *ah)
1619{ 1722{
1620 struct ath_common *common = ath9k_hw_common(ah); 1723 struct ath_common *common = ath9k_hw_common(ah);
@@ -1638,16 +1741,16 @@ int ath9k_init_debug(struct ath_hw *ah)
1638 &fops_interrupt); 1741 &fops_interrupt);
1639 debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc, 1742 debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
1640 &fops_xmit); 1743 &fops_xmit);
1744 debugfs_create_file("queues", S_IRUSR, sc->debug.debugfs_phy, sc,
1745 &fops_queues);
1641 debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, 1746 debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
1642 &sc->tx.txq_max_pending[WME_AC_BK]); 1747 &sc->tx.txq_max_pending[IEEE80211_AC_BK]);
1643 debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, 1748 debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
1644 &sc->tx.txq_max_pending[WME_AC_BE]); 1749 &sc->tx.txq_max_pending[IEEE80211_AC_BE]);
1645 debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, 1750 debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
1646 &sc->tx.txq_max_pending[WME_AC_VI]); 1751 &sc->tx.txq_max_pending[IEEE80211_AC_VI]);
1647 debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, 1752 debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
1648 &sc->tx.txq_max_pending[WME_AC_VO]); 1753 &sc->tx.txq_max_pending[IEEE80211_AC_VO]);
1649 debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
1650 &fops_stations);
1651 debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc, 1754 debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
1652 &fops_misc); 1755 &fops_misc);
1653 debugfs_create_file("reset", S_IRUSR, sc->debug.debugfs_phy, sc, 1756 debugfs_create_file("reset", S_IRUSR, sc->debug.debugfs_phy, sc,
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 2ed9785a38fa..375c3b46411e 100644
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -41,6 +41,7 @@ enum ath_reset_type {
41 RESET_TYPE_PLL_HANG, 41 RESET_TYPE_PLL_HANG,
42 RESET_TYPE_MAC_HANG, 42 RESET_TYPE_MAC_HANG,
43 RESET_TYPE_BEACON_STUCK, 43 RESET_TYPE_BEACON_STUCK,
44 RESET_TYPE_MCI,
44 __RESET_TYPE_MAX 45 __RESET_TYPE_MAX
45}; 46};
46 47
@@ -178,6 +179,21 @@ struct ath_tx_stats {
178 u32 txfailed; 179 u32 txfailed;
179}; 180};
180 181
182/*
183 * Various utility macros to print TX/Queue counters.
184 */
185#define PR_QNUM(_n) sc->tx.txq_map[_n]->axq_qnum
186#define TXSTATS sc->debug.stats.txstats
187#define PR(str, elem) \
188 do { \
189 len += snprintf(buf + len, size - len, \
190 "%s%13u%11u%10u%10u\n", str, \
191 TXSTATS[PR_QNUM(IEEE80211_AC_BE)].elem, \
192 TXSTATS[PR_QNUM(IEEE80211_AC_BK)].elem, \
193 TXSTATS[PR_QNUM(IEEE80211_AC_VI)].elem, \
194 TXSTATS[PR_QNUM(IEEE80211_AC_VO)].elem); \
195 } while(0)
196
181#define RX_STAT_INC(c) (sc->debug.stats.rxstats.c++) 197#define RX_STAT_INC(c) (sc->debug.stats.rxstats.c++)
182 198
183/** 199/**
@@ -291,7 +307,22 @@ void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
291 struct ath_tx_status *ts, struct ath_txq *txq, 307 struct ath_tx_status *ts, struct ath_txq *txq,
292 unsigned int flags); 308 unsigned int flags);
293void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs); 309void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
294 310int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
311 struct ieee80211_vif *vif, int sset);
312void ath9k_get_et_stats(struct ieee80211_hw *hw,
313 struct ieee80211_vif *vif,
314 struct ethtool_stats *stats, u64 *data);
315void ath9k_get_et_strings(struct ieee80211_hw *hw,
316 struct ieee80211_vif *vif,
317 u32 sset, u8 *data);
318void ath9k_sta_add_debugfs(struct ieee80211_hw *hw,
319 struct ieee80211_vif *vif,
320 struct ieee80211_sta *sta,
321 struct dentry *dir);
322void ath9k_sta_remove_debugfs(struct ieee80211_hw *hw,
323 struct ieee80211_vif *vif,
324 struct ieee80211_sta *sta,
325 struct dentry *dir);
295#else 326#else
296 327
297#define RX_STAT_INC(c) /* NOP */ 328#define RX_STAT_INC(c) /* NOP */
diff --git a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c
index ea2a6cf7ef23..24877b00cbf4 100644
--- a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c
+++ b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c
@@ -42,10 +42,15 @@ struct radar_types {
42#define MIN_PPB_THRESH 50 42#define MIN_PPB_THRESH 50
43#define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100) 43#define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
44#define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF) 44#define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
45/* percentage of pulse width tolerance */
46#define WIDTH_TOLERANCE 5
47#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
48#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)
45 49
46#define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB) \ 50#define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB) \
47{ \ 51{ \
48 ID, WMIN, WMAX, (PRF2PRI(PMAX) - PRI_TOLERANCE), \ 52 ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX), \
53 (PRF2PRI(PMAX) - PRI_TOLERANCE), \
49 (PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF, \ 54 (PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF, \
50 PPB_THRESH(PPB), PRI_TOLERANCE, \ 55 PPB_THRESH(PPB), PRI_TOLERANCE, \
51} 56}
@@ -274,7 +279,7 @@ static bool dpd_set_domain(struct dfs_pattern_detector *dpd,
274 279
275static struct dfs_pattern_detector default_dpd = { 280static struct dfs_pattern_detector default_dpd = {
276 .exit = dpd_exit, 281 .exit = dpd_exit,
277 .set_domain = dpd_set_domain, 282 .set_dfs_domain = dpd_set_domain,
278 .add_pulse = dpd_add_pulse, 283 .add_pulse = dpd_add_pulse,
279 .region = NL80211_DFS_UNSET, 284 .region = NL80211_DFS_UNSET,
280}; 285};
@@ -291,10 +296,11 @@ dfs_pattern_detector_init(enum nl80211_dfs_regions region)
291 *dpd = default_dpd; 296 *dpd = default_dpd;
292 INIT_LIST_HEAD(&dpd->channel_detectors); 297 INIT_LIST_HEAD(&dpd->channel_detectors);
293 298
294 if (dpd->set_domain(dpd, region)) 299 if (dpd->set_dfs_domain(dpd, region))
295 return dpd; 300 return dpd;
296 301
297 pr_err("Could not set DFS domain to %d. ", region); 302 pr_err("Could not set DFS domain to %d. ", region);
303 kfree(dpd);
298 return NULL; 304 return NULL;
299} 305}
300EXPORT_SYMBOL(dfs_pattern_detector_init); 306EXPORT_SYMBOL(dfs_pattern_detector_init);
diff --git a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h
index fd0328a30995..cda52f39f28a 100644
--- a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h
+++ b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h
@@ -62,7 +62,7 @@ struct radar_detector_specs {
62/** 62/**
63 * struct dfs_pattern_detector - DFS pattern detector 63 * struct dfs_pattern_detector - DFS pattern detector
64 * @exit(): destructor 64 * @exit(): destructor
65 * @set_domain(): set DFS domain, resets detector lines upon domain changes 65 * @set_dfs_domain(): set DFS domain, resets detector lines upon domain changes
66 * @add_pulse(): add radar pulse to detector, returns true on detection 66 * @add_pulse(): add radar pulse to detector, returns true on detection
67 * @region: active DFS region, NL80211_DFS_UNSET until set 67 * @region: active DFS region, NL80211_DFS_UNSET until set
68 * @num_radar_types: number of different radar types 68 * @num_radar_types: number of different radar types
@@ -72,7 +72,7 @@ struct radar_detector_specs {
72 */ 72 */
73struct dfs_pattern_detector { 73struct dfs_pattern_detector {
74 void (*exit)(struct dfs_pattern_detector *dpd); 74 void (*exit)(struct dfs_pattern_detector *dpd);
75 bool (*set_domain)(struct dfs_pattern_detector *dpd, 75 bool (*set_dfs_domain)(struct dfs_pattern_detector *dpd,
76 enum nl80211_dfs_regions region); 76 enum nl80211_dfs_regions region);
77 bool (*add_pulse)(struct dfs_pattern_detector *dpd, 77 bool (*add_pulse)(struct dfs_pattern_detector *dpd,
78 struct pulse_event *pe); 78 struct pulse_event *pe);
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index 0512397a293c..971d770722cf 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -113,9 +113,34 @@ void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
113 } 113 }
114} 114}
115 115
116bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data) 116static bool ath9k_hw_nvram_read_blob(struct ath_hw *ah, u32 off,
117 u16 *data)
117{ 118{
118 return common->bus_ops->eeprom_read(common, off, data); 119 u16 *blob_data;
120
121 if (off * sizeof(u16) > ah->eeprom_blob->size)
122 return false;
123
124 blob_data = (u16 *)ah->eeprom_blob->data;
125 *data = blob_data[off];
126 return true;
127}
128
129bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data)
130{
131 struct ath_common *common = ath9k_hw_common(ah);
132 bool ret;
133
134 if (ah->eeprom_blob)
135 ret = ath9k_hw_nvram_read_blob(ah, off, data);
136 else
137 ret = common->bus_ops->eeprom_read(common, off, data);
138
139 if (!ret)
140 ath_dbg(common, EEPROM,
141 "unable to read eeprom region at offset %u\n", off);
142
143 return ret;
119} 144}
120 145
121void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, 146void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index 319c651fa6c5..40d4f62d0f16 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -663,7 +663,7 @@ int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
663 int16_t targetRight); 663 int16_t targetRight);
664bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize, 664bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
665 u16 *indexL, u16 *indexR); 665 u16 *indexL, u16 *indexR);
666bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data); 666bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data);
667void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data, 667void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
668 int eep_start_loc, int size); 668 int eep_start_loc, int size);
669void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, 669void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index 7d075105a85d..c2bfd748eed8 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -32,16 +32,12 @@ static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
32 32
33static bool __ath9k_hw_4k_fill_eeprom(struct ath_hw *ah) 33static bool __ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
34{ 34{
35 struct ath_common *common = ath9k_hw_common(ah);
36 u16 *eep_data = (u16 *)&ah->eeprom.map4k; 35 u16 *eep_data = (u16 *)&ah->eeprom.map4k;
37 int addr, eep_start_loc = 64; 36 int addr, eep_start_loc = 64;
38 37
39 for (addr = 0; addr < SIZE_EEPROM_4K; addr++) { 38 for (addr = 0; addr < SIZE_EEPROM_4K; addr++) {
40 if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, eep_data)) { 39 if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data))
41 ath_dbg(common, EEPROM,
42 "Unable to read eeprom region\n");
43 return false; 40 return false;
44 }
45 eep_data++; 41 eep_data++;
46 } 42 }
47 43
@@ -196,7 +192,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
196 192
197 193
198 if (!ath9k_hw_use_flash(ah)) { 194 if (!ath9k_hw_use_flash(ah)) {
199 if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET, 195 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
200 &magic)) { 196 &magic)) {
201 ath_err(common, "Reading Magic # failed\n"); 197 ath_err(common, "Reading Magic # failed\n");
202 return false; 198 return false;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
index cd742fb944c2..3ae1f3df0637 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -33,18 +33,13 @@ static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah)
33static bool __ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) 33static bool __ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
34{ 34{
35 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 35 struct ar9287_eeprom *eep = &ah->eeprom.map9287;
36 struct ath_common *common = ath9k_hw_common(ah);
37 u16 *eep_data; 36 u16 *eep_data;
38 int addr, eep_start_loc = AR9287_EEP_START_LOC; 37 int addr, eep_start_loc = AR9287_EEP_START_LOC;
39 eep_data = (u16 *)eep; 38 eep_data = (u16 *)eep;
40 39
41 for (addr = 0; addr < SIZE_EEPROM_AR9287; addr++) { 40 for (addr = 0; addr < SIZE_EEPROM_AR9287; addr++) {
42 if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, 41 if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data))
43 eep_data)) {
44 ath_dbg(common, EEPROM,
45 "Unable to read eeprom region\n");
46 return false; 42 return false;
47 }
48 eep_data++; 43 eep_data++;
49 } 44 }
50 45
@@ -190,7 +185,7 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
190 struct ath_common *common = ath9k_hw_common(ah); 185 struct ath_common *common = ath9k_hw_common(ah);
191 186
192 if (!ath9k_hw_use_flash(ah)) { 187 if (!ath9k_hw_use_flash(ah)) {
193 if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET, 188 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
194 &magic)) { 189 &magic)) {
195 ath_err(common, "Reading Magic # failed\n"); 190 ath_err(common, "Reading Magic # failed\n");
196 return false; 191 return false;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index a8ac30a00720..1c25368b3836 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -91,17 +91,13 @@ static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah)
91 91
92static bool __ath9k_hw_def_fill_eeprom(struct ath_hw *ah) 92static bool __ath9k_hw_def_fill_eeprom(struct ath_hw *ah)
93{ 93{
94 struct ath_common *common = ath9k_hw_common(ah);
95 u16 *eep_data = (u16 *)&ah->eeprom.def; 94 u16 *eep_data = (u16 *)&ah->eeprom.def;
96 int addr, ar5416_eep_start_loc = 0x100; 95 int addr, ar5416_eep_start_loc = 0x100;
97 96
98 for (addr = 0; addr < SIZE_EEPROM_DEF; addr++) { 97 for (addr = 0; addr < SIZE_EEPROM_DEF; addr++) {
99 if (!ath9k_hw_nvram_read(common, addr + ar5416_eep_start_loc, 98 if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc,
100 eep_data)) { 99 eep_data))
101 ath_err(ath9k_hw_common(ah),
102 "Unable to read eeprom region\n");
103 return false; 100 return false;
104 }
105 eep_data++; 101 eep_data++;
106 } 102 }
107 return true; 103 return true;
@@ -271,7 +267,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
271 bool need_swap = false; 267 bool need_swap = false;
272 int i, addr, size; 268 int i, addr, size;
273 269
274 if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { 270 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) {
275 ath_err(common, "Reading Magic # failed\n"); 271 ath_err(common, "Reading Magic # failed\n");
276 return false; 272 return false;
277 } 273 }
diff --git a/drivers/net/wireless/ath/ath9k/gpio.c b/drivers/net/wireless/ath/ath9k/gpio.c
index a8ea57b9f49c..4b412aaf4f36 100644
--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++ b/drivers/net/wireless/ath/ath9k/gpio.c
@@ -247,6 +247,9 @@ static void ath_btcoex_period_timer(unsigned long data)
247 stomp_type = ATH_BTCOEX_STOMP_ALL; 247 stomp_type = ATH_BTCOEX_STOMP_ALL;
248 timer_period = btcoex->btscan_no_stomp; 248 timer_period = btcoex->btscan_no_stomp;
249 } 249 }
250 } else if (btcoex->stomp_audio >= 5) {
251 stomp_type = ATH_BTCOEX_STOMP_AUDIO;
252 btcoex->stomp_audio = 0;
250 } 253 }
251 254
252 ath9k_hw_btcoex_bt_stomp(ah, stomp_type); 255 ath9k_hw_btcoex_bt_stomp(ah, stomp_type);
@@ -295,7 +298,7 @@ static void ath_btcoex_no_stomp_timer(void *arg)
295 (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && 298 (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) &&
296 test_bit(BT_OP_SCAN, &btcoex->op_flags))) 299 test_bit(BT_OP_SCAN, &btcoex->op_flags)))
297 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); 300 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
298 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL) 301 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
299 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW); 302 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);
300 303
301 ath9k_hw_btcoex_enable(ah); 304 ath9k_hw_btcoex_enable(ah);
@@ -471,7 +474,7 @@ int ath9k_init_btcoex(struct ath_softc *sc)
471 r = ath_init_btcoex_timer(sc); 474 r = ath_init_btcoex_timer(sc);
472 if (r) 475 if (r)
473 return -1; 476 return -1;
474 txq = sc->tx.txq_map[WME_AC_BE]; 477 txq = sc->tx.txq_map[IEEE80211_AC_BE];
475 ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum); 478 ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
476 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; 479 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
477 if (ath9k_hw_mci_is_enabled(ah)) { 480 if (ath9k_hw_mci_is_enabled(ah)) {
@@ -494,35 +497,31 @@ int ath9k_init_btcoex(struct ath_softc *sc)
494 return 0; 497 return 0;
495} 498}
496 499
497int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 len, u32 size) 500static int ath9k_dump_mci_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
498{ 501{
499#define ATH_DUMP_BTCOEX(_s, _val) \
500 do { \
501 len += snprintf(buf + len, size - len, \
502 "%20s : %10d\n", _s, (_val)); \
503 } while (0)
504
505 struct ath_btcoex *btcoex = &sc->btcoex; 502 struct ath_btcoex *btcoex = &sc->btcoex;
506 struct ath_mci_profile *mci = &btcoex->mci; 503 struct ath_mci_profile *mci = &btcoex->mci;
507 struct ath_hw *ah = sc->sc_ah; 504 struct ath_hw *ah = sc->sc_ah;
508 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 505 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
506 u32 len = 0;
509 int i; 507 int i;
510 508
511 ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci)); 509 ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci));
512 ATH_DUMP_BTCOEX("Number of MGMT", mci->num_mgmt); 510 ATH_DUMP_BTCOEX("MGMT", mci->num_mgmt);
513 ATH_DUMP_BTCOEX("Number of SCO", mci->num_sco); 511 ATH_DUMP_BTCOEX("SCO", mci->num_sco);
514 ATH_DUMP_BTCOEX("Number of A2DP", mci->num_a2dp); 512 ATH_DUMP_BTCOEX("A2DP", mci->num_a2dp);
515 ATH_DUMP_BTCOEX("Number of HID", mci->num_hid); 513 ATH_DUMP_BTCOEX("HID", mci->num_hid);
516 ATH_DUMP_BTCOEX("Number of PAN", mci->num_pan); 514 ATH_DUMP_BTCOEX("PAN", mci->num_pan);
517 ATH_DUMP_BTCOEX("Number of ACL", mci->num_other_acl); 515 ATH_DUMP_BTCOEX("ACL", mci->num_other_acl);
518 ATH_DUMP_BTCOEX("Number of BDR", mci->num_bdr); 516 ATH_DUMP_BTCOEX("BDR", mci->num_bdr);
519 ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit); 517 ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit);
520 ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type); 518 ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
521 ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period); 519 ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
522 ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle); 520 ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
523 ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time); 521 ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
524 ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx); 522 ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx);
525 ATH_DUMP_BTCOEX("Concur RSSI count", btcoex->rssi_count); 523 ATH_DUMP_BTCOEX("Concurrent RSSI cnt", btcoex->rssi_count);
524
526 len += snprintf(buf + len, size - len, "BT Weights: "); 525 len += snprintf(buf + len, size - len, "BT Weights: ");
527 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 526 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
528 len += snprintf(buf + len, size - len, "%08x ", 527 len += snprintf(buf + len, size - len, "%08x ",
@@ -537,9 +536,32 @@ int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 len, u32 size)
537 for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++) 536 for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
538 len += snprintf(buf + len, size - len, "%08x ", 537 len += snprintf(buf + len, size - len, "%08x ",
539 btcoex_hw->tx_prio[i]); 538 btcoex_hw->tx_prio[i]);
539
540 len += snprintf(buf + len, size - len, "\n"); 540 len += snprintf(buf + len, size - len, "\n");
541#undef ATH_DUMP_BTCOEX
542 541
543 return len; 542 return len;
544} 543}
544
545static int ath9k_dump_legacy_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
546{
547
548 struct ath_btcoex *btcoex = &sc->btcoex;
549 u32 len = 0;
550
551 ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
552 ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
553 ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
554 ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
555
556 return len;
557}
558
559int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
560{
561 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
562 return ath9k_dump_mci_btcoex(sc, buf, size);
563 else
564 return ath9k_dump_legacy_btcoex(sc, buf, size);
565}
566
545#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ 567#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
diff --git a/drivers/net/wireless/ath/ath9k/htc.h b/drivers/net/wireless/ath/ath9k/htc.h
index b30596fcf73a..96bfb18078fa 100644
--- a/drivers/net/wireless/ath/ath9k/htc.h
+++ b/drivers/net/wireless/ath/ath9k/htc.h
@@ -331,7 +331,7 @@ struct ath_tx_stats {
331 u32 skb_success; 331 u32 skb_success;
332 u32 skb_failed; 332 u32 skb_failed;
333 u32 cab_queued; 333 u32 cab_queued;
334 u32 queue_stats[WME_NUM_AC]; 334 u32 queue_stats[IEEE80211_NUM_ACS];
335}; 335};
336 336
337struct ath_rx_stats { 337struct ath_rx_stats {
@@ -493,7 +493,7 @@ struct ath9k_htc_priv {
493 493
494 int beaconq; 494 int beaconq;
495 int cabq; 495 int cabq;
496 int hwq_map[WME_NUM_AC]; 496 int hwq_map[IEEE80211_NUM_ACS];
497 497
498#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT 498#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
499 struct ath_btcoex btcoex; 499 struct ath_btcoex btcoex;
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c b/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c
index 1318d79f5c44..d0ce1f5bba10 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c
@@ -33,7 +33,7 @@ void ath9k_htc_beaconq_config(struct ath9k_htc_priv *priv)
33 qi.tqi_cwmin = 0; 33 qi.tqi_cwmin = 0;
34 qi.tqi_cwmax = 0; 34 qi.tqi_cwmax = 0;
35 } else if (priv->ah->opmode == NL80211_IFTYPE_ADHOC) { 35 } else if (priv->ah->opmode == NL80211_IFTYPE_ADHOC) {
36 int qnum = priv->hwq_map[WME_AC_BE]; 36 int qnum = priv->hwq_map[IEEE80211_AC_BE];
37 37
38 ath9k_hw_get_txq_props(ah, qnum, &qi_be); 38 ath9k_hw_get_txq_props(ah, qnum, &qi_be);
39 39
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_debug.c b/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
index 3035deb7a0cd..87110de577ef 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_debug.c
@@ -218,16 +218,16 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf,
218 218
219 len += snprintf(buf + len, sizeof(buf) - len, 219 len += snprintf(buf + len, sizeof(buf) - len,
220 "%20s : %10u\n", "BE queued", 220 "%20s : %10u\n", "BE queued",
221 priv->debug.tx_stats.queue_stats[WME_AC_BE]); 221 priv->debug.tx_stats.queue_stats[IEEE80211_AC_BE]);
222 len += snprintf(buf + len, sizeof(buf) - len, 222 len += snprintf(buf + len, sizeof(buf) - len,
223 "%20s : %10u\n", "BK queued", 223 "%20s : %10u\n", "BK queued",
224 priv->debug.tx_stats.queue_stats[WME_AC_BK]); 224 priv->debug.tx_stats.queue_stats[IEEE80211_AC_BK]);
225 len += snprintf(buf + len, sizeof(buf) - len, 225 len += snprintf(buf + len, sizeof(buf) - len,
226 "%20s : %10u\n", "VI queued", 226 "%20s : %10u\n", "VI queued",
227 priv->debug.tx_stats.queue_stats[WME_AC_VI]); 227 priv->debug.tx_stats.queue_stats[IEEE80211_AC_VI]);
228 len += snprintf(buf + len, sizeof(buf) - len, 228 len += snprintf(buf + len, sizeof(buf) - len,
229 "%20s : %10u\n", "VO queued", 229 "%20s : %10u\n", "VO queued",
230 priv->debug.tx_stats.queue_stats[WME_AC_VO]); 230 priv->debug.tx_stats.queue_stats[IEEE80211_AC_VO]);
231 231
232 if (len > sizeof(buf)) 232 if (len > sizeof(buf))
233 len = sizeof(buf); 233 len = sizeof(buf);
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_gpio.c b/drivers/net/wireless/ath/ath9k/htc_drv_gpio.c
index 0eacfc13c915..105582d6b714 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_gpio.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_gpio.c
@@ -207,7 +207,7 @@ void ath9k_htc_init_btcoex(struct ath9k_htc_priv *priv, char *product)
207 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; 207 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
208 ath9k_hw_btcoex_init_3wire(priv->ah); 208 ath9k_hw_btcoex_init_3wire(priv->ah);
209 ath_htc_init_btcoex_work(priv); 209 ath_htc_init_btcoex_work(priv);
210 qnum = priv->hwq_map[WME_AC_BE]; 210 qnum = priv->hwq_map[IEEE80211_AC_BE];
211 ath9k_hw_init_btcoex_hw(priv->ah, qnum); 211 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
212 break; 212 break;
213 default: 213 default:
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
index 5ecf1287dddd..05d5ba66cac3 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
@@ -549,20 +549,20 @@ static int ath9k_init_queues(struct ath9k_htc_priv *priv)
549 goto err; 549 goto err;
550 } 550 }
551 551
552 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) { 552 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
553 ath_err(common, "Unable to setup xmit queue for BE traffic\n"); 553 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
554 goto err; 554 goto err;
555 } 555 }
556 556
557 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) { 557 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
558 ath_err(common, "Unable to setup xmit queue for BK traffic\n"); 558 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
559 goto err; 559 goto err;
560 } 560 }
561 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) { 561 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
562 ath_err(common, "Unable to setup xmit queue for VI traffic\n"); 562 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
563 goto err; 563 goto err;
564 } 564 }
565 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) { 565 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
566 ath_err(common, "Unable to setup xmit queue for VO traffic\n"); 566 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
567 goto err; 567 goto err;
568 } 568 }
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 02cce95331d8..9c07a8fa5134 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1349,7 +1349,7 @@ static int ath9k_htc_conf_tx(struct ieee80211_hw *hw,
1349 struct ath9k_tx_queue_info qi; 1349 struct ath9k_tx_queue_info qi;
1350 int ret = 0, qnum; 1350 int ret = 0, qnum;
1351 1351
1352 if (queue >= WME_NUM_AC) 1352 if (queue >= IEEE80211_NUM_ACS)
1353 return 0; 1353 return 0;
1354 1354
1355 mutex_lock(&priv->mutex); 1355 mutex_lock(&priv->mutex);
@@ -1376,7 +1376,7 @@ static int ath9k_htc_conf_tx(struct ieee80211_hw *hw,
1376 } 1376 }
1377 1377
1378 if ((priv->ah->opmode == NL80211_IFTYPE_ADHOC) && 1378 if ((priv->ah->opmode == NL80211_IFTYPE_ADHOC) &&
1379 (qnum == priv->hwq_map[WME_AC_BE])) 1379 (qnum == priv->hwq_map[IEEE80211_AC_BE]))
1380 ath9k_htc_beaconq_config(priv); 1380 ath9k_htc_beaconq_config(priv);
1381out: 1381out:
1382 ath9k_htc_ps_restore(priv); 1382 ath9k_htc_ps_restore(priv);
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
index e4ec98332988..b6a5a08810b8 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
@@ -21,10 +21,10 @@
21/******/ 21/******/
22 22
23static const int subtype_txq_to_hwq[] = { 23static const int subtype_txq_to_hwq[] = {
24 [WME_AC_BE] = ATH_TXQ_AC_BE, 24 [IEEE80211_AC_BE] = ATH_TXQ_AC_BE,
25 [WME_AC_BK] = ATH_TXQ_AC_BK, 25 [IEEE80211_AC_BK] = ATH_TXQ_AC_BK,
26 [WME_AC_VI] = ATH_TXQ_AC_VI, 26 [IEEE80211_AC_VI] = ATH_TXQ_AC_VI,
27 [WME_AC_VO] = ATH_TXQ_AC_VO, 27 [IEEE80211_AC_VO] = ATH_TXQ_AC_VO,
28}; 28};
29 29
30#define ATH9K_HTC_INIT_TXQ(subtype) do { \ 30#define ATH9K_HTC_INIT_TXQ(subtype) do { \
@@ -41,15 +41,15 @@ int get_hw_qnum(u16 queue, int *hwq_map)
41{ 41{
42 switch (queue) { 42 switch (queue) {
43 case 0: 43 case 0:
44 return hwq_map[WME_AC_VO]; 44 return hwq_map[IEEE80211_AC_VO];
45 case 1: 45 case 1:
46 return hwq_map[WME_AC_VI]; 46 return hwq_map[IEEE80211_AC_VI];
47 case 2: 47 case 2:
48 return hwq_map[WME_AC_BE]; 48 return hwq_map[IEEE80211_AC_BE];
49 case 3: 49 case 3:
50 return hwq_map[WME_AC_BK]; 50 return hwq_map[IEEE80211_AC_BK];
51 default: 51 default:
52 return hwq_map[WME_AC_BE]; 52 return hwq_map[IEEE80211_AC_BE];
53 } 53 }
54} 54}
55 55
@@ -106,20 +106,20 @@ static inline enum htc_endpoint_id get_htc_epid(struct ath9k_htc_priv *priv,
106 106
107 switch (qnum) { 107 switch (qnum) {
108 case 0: 108 case 0:
109 TX_QSTAT_INC(WME_AC_VO); 109 TX_QSTAT_INC(IEEE80211_AC_VO);
110 epid = priv->data_vo_ep; 110 epid = priv->data_vo_ep;
111 break; 111 break;
112 case 1: 112 case 1:
113 TX_QSTAT_INC(WME_AC_VI); 113 TX_QSTAT_INC(IEEE80211_AC_VI);
114 epid = priv->data_vi_ep; 114 epid = priv->data_vi_ep;
115 break; 115 break;
116 case 2: 116 case 2:
117 TX_QSTAT_INC(WME_AC_BE); 117 TX_QSTAT_INC(IEEE80211_AC_BE);
118 epid = priv->data_be_ep; 118 epid = priv->data_be_ep;
119 break; 119 break;
120 case 3: 120 case 3:
121 default: 121 default:
122 TX_QSTAT_INC(WME_AC_BK); 122 TX_QSTAT_INC(IEEE80211_AC_BK);
123 epid = priv->data_bk_ep; 123 epid = priv->data_bk_ep;
124 break; 124 break;
125 } 125 }
@@ -1082,7 +1082,7 @@ static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv,
1082 rx_status->freq = hw->conf.channel->center_freq; 1082 rx_status->freq = hw->conf.channel->center_freq;
1083 rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR; 1083 rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR;
1084 rx_status->antenna = rxbuf->rxstatus.rs_antenna; 1084 rx_status->antenna = rxbuf->rxstatus.rs_antenna;
1085 rx_status->flag |= RX_FLAG_MACTIME_START; 1085 rx_status->flag |= RX_FLAG_MACTIME_END;
1086 1086
1087 return true; 1087 return true;
1088 1088
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 71cd9f0c96af..7cb787065913 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1456,7 +1456,7 @@ static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type)
1456 switch (type) { 1456 switch (type) {
1457 case ATH9K_RESET_POWER_ON: 1457 case ATH9K_RESET_POWER_ON:
1458 ret = ath9k_hw_set_reset_power_on(ah); 1458 ret = ath9k_hw_set_reset_power_on(ah);
1459 if (!ret) 1459 if (ret)
1460 ah->reset_power_on = true; 1460 ah->reset_power_on = true;
1461 break; 1461 break;
1462 case ATH9K_RESET_WARM: 1462 case ATH9K_RESET_WARM:
@@ -2561,11 +2561,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2561 pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB; 2561 pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB;
2562 } 2562 }
2563 2563
2564 if (AR_SREV_9485_10(ah)) {
2565 pCap->pcie_lcr_extsync_en = true;
2566 pCap->pcie_lcr_offset = 0x80;
2567 }
2568
2569 if (ath9k_hw_dfs_tested(ah)) 2564 if (ath9k_hw_dfs_tested(ah))
2570 pCap->hw_caps |= ATH9K_HW_CAP_DFS; 2565 pCap->hw_caps |= ATH9K_HW_CAP_DFS;
2571 2566
@@ -2604,6 +2599,10 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2604 pCap->hw_caps |= ATH9K_HW_WOW_PATTERN_MATCH_DWORD; 2599 pCap->hw_caps |= ATH9K_HW_WOW_PATTERN_MATCH_DWORD;
2605 } 2600 }
2606 2601
2602 if (AR_SREV_9300_20_OR_LATER(ah) &&
2603 ah->eep_ops->get_eeprom(ah, EEP_PAPRD))
2604 pCap->hw_caps |= ATH9K_HW_CAP_PAPRD;
2605
2607 return 0; 2606 return 0;
2608} 2607}
2609 2608
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 3e73bfe2315e..7f1a8e91c908 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -20,6 +20,7 @@
20#include <linux/if_ether.h> 20#include <linux/if_ether.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/firmware.h>
23 24
24#include "mac.h" 25#include "mac.h"
25#include "ani.h" 26#include "ani.h"
@@ -247,6 +248,7 @@ enum ath9k_hw_caps {
247 ATH9K_HW_WOW_DEVICE_CAPABLE = BIT(17), 248 ATH9K_HW_WOW_DEVICE_CAPABLE = BIT(17),
248 ATH9K_HW_WOW_PATTERN_MATCH_EXACT = BIT(18), 249 ATH9K_HW_WOW_PATTERN_MATCH_EXACT = BIT(18),
249 ATH9K_HW_WOW_PATTERN_MATCH_DWORD = BIT(19), 250 ATH9K_HW_WOW_PATTERN_MATCH_DWORD = BIT(19),
251 ATH9K_HW_CAP_PAPRD = BIT(20),
250}; 252};
251 253
252/* 254/*
@@ -273,8 +275,6 @@ struct ath9k_hw_capabilities {
273 u8 rx_status_len; 275 u8 rx_status_len;
274 u8 tx_desc_len; 276 u8 tx_desc_len;
275 u8 txs_len; 277 u8 txs_len;
276 u16 pcie_lcr_offset;
277 bool pcie_lcr_extsync_en;
278}; 278};
279 279
280struct ath9k_ops_config { 280struct ath9k_ops_config {
@@ -877,7 +877,6 @@ struct ath_hw {
877 struct ar5416IniArray iniModesTxGain; 877 struct ar5416IniArray iniModesTxGain;
878 struct ar5416IniArray iniCckfirNormal; 878 struct ar5416IniArray iniCckfirNormal;
879 struct ar5416IniArray iniCckfirJapan2484; 879 struct ar5416IniArray iniCckfirJapan2484;
880 struct ar5416IniArray ini_japan2484;
881 struct ar5416IniArray iniModes_9271_ANI_reg; 880 struct ar5416IniArray iniModes_9271_ANI_reg;
882 struct ar5416IniArray ini_radio_post_sys2ant; 881 struct ar5416IniArray ini_radio_post_sys2ant;
883 882
@@ -923,6 +922,8 @@ struct ath_hw {
923 bool is_clk_25mhz; 922 bool is_clk_25mhz;
924 int (*get_mac_revision)(void); 923 int (*get_mac_revision)(void);
925 int (*external_reset)(void); 924 int (*external_reset)(void);
925
926 const struct firmware *eeprom_blob;
926}; 927};
927 928
928struct ath_bus_ops { 929struct ath_bus_ops {
@@ -930,7 +931,6 @@ struct ath_bus_ops {
930 void (*read_cachesize)(struct ath_common *common, int *csz); 931 void (*read_cachesize)(struct ath_common *common, int *csz);
931 bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data); 932 bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
932 void (*bt_coex_prep)(struct ath_common *common); 933 void (*bt_coex_prep)(struct ath_common *common);
933 void (*extn_synch_en)(struct ath_common *common);
934 void (*aspm_init)(struct ath_common *common); 934 void (*aspm_init)(struct ath_common *common);
935}; 935};
936 936
@@ -1062,9 +1062,10 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah,
1062 int chain); 1062 int chain);
1063int ar9003_paprd_create_curve(struct ath_hw *ah, 1063int ar9003_paprd_create_curve(struct ath_hw *ah,
1064 struct ath9k_hw_cal_data *caldata, int chain); 1064 struct ath9k_hw_cal_data *caldata, int chain);
1065int ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain); 1065void ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain);
1066int ar9003_paprd_init_table(struct ath_hw *ah); 1066int ar9003_paprd_init_table(struct ath_hw *ah);
1067bool ar9003_paprd_is_done(struct ath_hw *ah); 1067bool ar9003_paprd_is_done(struct ath_hw *ah);
1068bool ar9003_is_paprd_enabled(struct ath_hw *ah);
1068 1069
1069/* Hardware family op attach helpers */ 1070/* Hardware family op attach helpers */
1070void ar5008_hw_attach_phy_ops(struct ath_hw *ah); 1071void ar5008_hw_attach_phy_ops(struct ath_hw *ah);
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 546bae93647b..f69ef5d48c7b 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -23,6 +23,11 @@
23 23
24#include "ath9k.h" 24#include "ath9k.h"
25 25
26struct ath9k_eeprom_ctx {
27 struct completion complete;
28 struct ath_hw *ah;
29};
30
26static char *dev_info = "ath9k"; 31static char *dev_info = "ath9k";
27 32
28MODULE_AUTHOR("Atheros Communications"); 33MODULE_AUTHOR("Atheros Communications");
@@ -435,7 +440,7 @@ static int ath9k_init_queues(struct ath_softc *sc)
435 sc->config.cabqReadytime = ATH_CABQ_READY_TIME; 440 sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
436 ath_cabq_update(sc); 441 ath_cabq_update(sc);
437 442
438 for (i = 0; i < WME_NUM_AC; i++) { 443 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
439 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i); 444 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
440 sc->tx.txq_map[i]->mac80211_qnum = i; 445 sc->tx.txq_map[i]->mac80211_qnum = i;
441 sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH; 446 sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
@@ -506,6 +511,51 @@ static void ath9k_init_misc(struct ath_softc *sc)
506 sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT; 511 sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT;
507} 512}
508 513
514static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
515 void *ctx)
516{
517 struct ath9k_eeprom_ctx *ec = ctx;
518
519 if (eeprom_blob)
520 ec->ah->eeprom_blob = eeprom_blob;
521
522 complete(&ec->complete);
523}
524
525static int ath9k_eeprom_request(struct ath_softc *sc, const char *name)
526{
527 struct ath9k_eeprom_ctx ec;
528 struct ath_hw *ah = ah = sc->sc_ah;
529 int err;
530
531 /* try to load the EEPROM content asynchronously */
532 init_completion(&ec.complete);
533 ec.ah = sc->sc_ah;
534
535 err = request_firmware_nowait(THIS_MODULE, 1, name, sc->dev, GFP_KERNEL,
536 &ec, ath9k_eeprom_request_cb);
537 if (err < 0) {
538 ath_err(ath9k_hw_common(ah),
539 "EEPROM request failed\n");
540 return err;
541 }
542
543 wait_for_completion(&ec.complete);
544
545 if (!ah->eeprom_blob) {
546 ath_err(ath9k_hw_common(ah),
547 "Unable to load EEPROM file %s\n", name);
548 return -EINVAL;
549 }
550
551 return 0;
552}
553
554static void ath9k_eeprom_release(struct ath_softc *sc)
555{
556 release_firmware(sc->sc_ah->eeprom_blob);
557}
558
509static int ath9k_init_softc(u16 devid, struct ath_softc *sc, 559static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
510 const struct ath_bus_ops *bus_ops) 560 const struct ath_bus_ops *bus_ops)
511{ 561{
@@ -563,10 +613,6 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
563 spin_lock_init(&sc->sc_serial_rw); 613 spin_lock_init(&sc->sc_serial_rw);
564 spin_lock_init(&sc->sc_pm_lock); 614 spin_lock_init(&sc->sc_pm_lock);
565 mutex_init(&sc->mutex); 615 mutex_init(&sc->mutex);
566#ifdef CONFIG_ATH9K_DEBUGFS
567 spin_lock_init(&sc->nodes_lock);
568 INIT_LIST_HEAD(&sc->nodes);
569#endif
570#ifdef CONFIG_ATH9K_MAC_DEBUG 616#ifdef CONFIG_ATH9K_MAC_DEBUG
571 spin_lock_init(&sc->debug.samp_lock); 617 spin_lock_init(&sc->debug.samp_lock);
572#endif 618#endif
@@ -587,6 +633,12 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
587 ath_read_cachesize(common, &csz); 633 ath_read_cachesize(common, &csz);
588 common->cachelsz = csz << 2; /* convert to bytes */ 634 common->cachelsz = csz << 2; /* convert to bytes */
589 635
636 if (pdata && pdata->eeprom_name) {
637 ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
638 if (ret)
639 goto err_eeprom;
640 }
641
590 /* Initializes the hardware for all supported chipsets */ 642 /* Initializes the hardware for all supported chipsets */
591 ret = ath9k_hw_init(ah); 643 ret = ath9k_hw_init(ah);
592 if (ret) 644 if (ret)
@@ -623,7 +675,8 @@ err_btcoex:
623err_queues: 675err_queues:
624 ath9k_hw_deinit(ah); 676 ath9k_hw_deinit(ah);
625err_hw: 677err_hw:
626 678 ath9k_eeprom_release(sc);
679err_eeprom:
627 kfree(ah); 680 kfree(ah);
628 sc->sc_ah = NULL; 681 sc->sc_ah = NULL;
629 682
@@ -886,6 +939,7 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
886 if (sc->dfs_detector != NULL) 939 if (sc->dfs_detector != NULL)
887 sc->dfs_detector->exit(sc->dfs_detector); 940 sc->dfs_detector->exit(sc->dfs_detector);
888 941
942 ath9k_eeprom_release(sc);
889 kfree(sc->sc_ah); 943 kfree(sc->sc_ah);
890 sc->sc_ah = NULL; 944 sc->sc_ah = NULL;
891} 945}
diff --git a/drivers/net/wireless/ath/ath9k/link.c b/drivers/net/wireless/ath/ath9k/link.c
index 223b9693527e..ade3afb21f91 100644
--- a/drivers/net/wireless/ath/ath9k/link.c
+++ b/drivers/net/wireless/ath/ath9k/link.c
@@ -27,9 +27,6 @@ void ath_tx_complete_poll_work(struct work_struct *work)
27 struct ath_txq *txq; 27 struct ath_txq *txq;
28 int i; 28 int i;
29 bool needreset = false; 29 bool needreset = false;
30#ifdef CONFIG_ATH9K_DEBUGFS
31 sc->tx_complete_poll_work_seen++;
32#endif
33 30
34 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) 31 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
35 if (ATH_TXQ_SETUP(sc, i)) { 32 if (ATH_TXQ_SETUP(sc, i)) {
@@ -182,13 +179,15 @@ void ath_rx_poll(unsigned long data)
182static void ath_paprd_activate(struct ath_softc *sc) 179static void ath_paprd_activate(struct ath_softc *sc)
183{ 180{
184 struct ath_hw *ah = sc->sc_ah; 181 struct ath_hw *ah = sc->sc_ah;
182 struct ath_common *common = ath9k_hw_common(ah);
185 struct ath9k_hw_cal_data *caldata = ah->caldata; 183 struct ath9k_hw_cal_data *caldata = ah->caldata;
186 int chain; 184 int chain;
187 185
188 if (!caldata || !caldata->paprd_done) 186 if (!caldata || !caldata->paprd_done) {
187 ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n");
189 return; 188 return;
189 }
190 190
191 ath9k_ps_wakeup(sc);
192 ar9003_paprd_enable(ah, false); 191 ar9003_paprd_enable(ah, false);
193 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 192 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
194 if (!(ah->txchainmask & BIT(chain))) 193 if (!(ah->txchainmask & BIT(chain)))
@@ -197,8 +196,8 @@ static void ath_paprd_activate(struct ath_softc *sc)
197 ar9003_paprd_populate_single_table(ah, caldata, chain); 196 ar9003_paprd_populate_single_table(ah, caldata, chain);
198 } 197 }
199 198
199 ath_dbg(common, CALIBRATE, "Activating PAPRD\n");
200 ar9003_paprd_enable(ah, true); 200 ar9003_paprd_enable(ah, true);
201 ath9k_ps_restore(sc);
202} 201}
203 202
204static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain) 203static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
@@ -211,7 +210,7 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int
211 int time_left; 210 int time_left;
212 211
213 memset(&txctl, 0, sizeof(txctl)); 212 memset(&txctl, 0, sizeof(txctl));
214 txctl.txq = sc->tx.txq_map[WME_AC_BE]; 213 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE];
215 214
216 memset(tx_info, 0, sizeof(*tx_info)); 215 memset(tx_info, 0, sizeof(*tx_info));
217 tx_info->band = hw->conf.channel->band; 216 tx_info->band = hw->conf.channel->band;
@@ -256,8 +255,10 @@ void ath_paprd_calibrate(struct work_struct *work)
256 int len = 1800; 255 int len = 1800;
257 int ret; 256 int ret;
258 257
259 if (!caldata || !caldata->paprd_packet_sent || caldata->paprd_done) 258 if (!caldata || !caldata->paprd_packet_sent || caldata->paprd_done) {
259 ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n");
260 return; 260 return;
261 }
261 262
262 ath9k_ps_wakeup(sc); 263 ath9k_ps_wakeup(sc);
263 264
@@ -433,11 +434,15 @@ set_timer:
433 cal_interval = min(cal_interval, (u32)short_cal_interval); 434 cal_interval = min(cal_interval, (u32)short_cal_interval);
434 435
435 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 436 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
436 if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD) && ah->caldata) { 437
437 if (!ah->caldata->paprd_done) 438 if (ar9003_is_paprd_enabled(ah) && ah->caldata) {
439 if (!ah->caldata->paprd_done) {
438 ieee80211_queue_work(sc->hw, &sc->paprd_work); 440 ieee80211_queue_work(sc->hw, &sc->paprd_work);
439 else if (!ah->paprd_table_write_done) 441 } else if (!ah->paprd_table_write_done) {
442 ath9k_ps_wakeup(sc);
440 ath_paprd_activate(sc); 443 ath_paprd_activate(sc);
444 ath9k_ps_restore(sc);
445 }
441 } 446 }
442} 447}
443 448
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index c084532291a1..be30a9af1528 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -331,11 +331,7 @@ static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
331 u8 density; 331 u8 density;
332 an = (struct ath_node *)sta->drv_priv; 332 an = (struct ath_node *)sta->drv_priv;
333 333
334#ifdef CONFIG_ATH9K_DEBUGFS 334 an->sc = sc;
335 spin_lock(&sc->nodes_lock);
336 list_add(&an->list, &sc->nodes);
337 spin_unlock(&sc->nodes_lock);
338#endif
339 an->sta = sta; 335 an->sta = sta;
340 an->vif = vif; 336 an->vif = vif;
341 337
@@ -352,13 +348,6 @@ static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
352{ 348{
353 struct ath_node *an = (struct ath_node *)sta->drv_priv; 349 struct ath_node *an = (struct ath_node *)sta->drv_priv;
354 350
355#ifdef CONFIG_ATH9K_DEBUGFS
356 spin_lock(&sc->nodes_lock);
357 list_del(&an->list);
358 spin_unlock(&sc->nodes_lock);
359 an->sta = NULL;
360#endif
361
362 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) 351 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
363 ath_tx_node_cleanup(sc, an); 352 ath_tx_node_cleanup(sc, an);
364} 353}
@@ -494,17 +483,6 @@ irqreturn_t ath_isr(int irq, void *dev)
494 if (status & SCHED_INTR) 483 if (status & SCHED_INTR)
495 sched = true; 484 sched = true;
496 485
497#ifdef CONFIG_PM_SLEEP
498 if (status & ATH9K_INT_BMISS) {
499 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
500 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
501 atomic_inc(&sc->wow_got_bmiss_intr);
502 atomic_dec(&sc->wow_sleep_proc_intr);
503 }
504 ath_dbg(common, INTERRUPT, "beacon miss interrupt\n");
505 }
506#endif
507
508 /* 486 /*
509 * If a FATAL or RXORN interrupt is received, we have to reset the 487 * If a FATAL or RXORN interrupt is received, we have to reset the
510 * chip immediately. 488 * chip immediately.
@@ -523,7 +501,15 @@ irqreturn_t ath_isr(int irq, void *dev)
523 501
524 goto chip_reset; 502 goto chip_reset;
525 } 503 }
526 504#ifdef CONFIG_PM_SLEEP
505 if (status & ATH9K_INT_BMISS) {
506 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
507 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
508 atomic_inc(&sc->wow_got_bmiss_intr);
509 atomic_dec(&sc->wow_sleep_proc_intr);
510 }
511 }
512#endif
527 if (status & ATH9K_INT_SWBA) 513 if (status & ATH9K_INT_SWBA)
528 tasklet_schedule(&sc->bcon_tasklet); 514 tasklet_schedule(&sc->bcon_tasklet);
529 515
@@ -686,9 +672,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
686 672
687 spin_unlock_bh(&sc->sc_pcu_lock); 673 spin_unlock_bh(&sc->sc_pcu_lock);
688 674
689 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
690 common->bus_ops->extn_synch_en(common);
691
692 mutex_unlock(&sc->mutex); 675 mutex_unlock(&sc->mutex);
693 676
694 ath9k_ps_restore(sc); 677 ath9k_ps_restore(sc);
@@ -1331,7 +1314,7 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw,
1331 struct ath9k_tx_queue_info qi; 1314 struct ath9k_tx_queue_info qi;
1332 int ret = 0; 1315 int ret = 0;
1333 1316
1334 if (queue >= WME_NUM_AC) 1317 if (queue >= IEEE80211_NUM_ACS)
1335 return 0; 1318 return 0;
1336 1319
1337 txq = sc->tx.txq_map[queue]; 1320 txq = sc->tx.txq_map[queue];
@@ -1900,134 +1883,6 @@ static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
1900 return 0; 1883 return 0;
1901} 1884}
1902 1885
1903#ifdef CONFIG_ATH9K_DEBUGFS
1904
1905/* Ethtool support for get-stats */
1906
1907#define AMKSTR(nm) #nm "_BE", #nm "_BK", #nm "_VI", #nm "_VO"
1908static const char ath9k_gstrings_stats[][ETH_GSTRING_LEN] = {
1909 "tx_pkts_nic",
1910 "tx_bytes_nic",
1911 "rx_pkts_nic",
1912 "rx_bytes_nic",
1913 AMKSTR(d_tx_pkts),
1914 AMKSTR(d_tx_bytes),
1915 AMKSTR(d_tx_mpdus_queued),
1916 AMKSTR(d_tx_mpdus_completed),
1917 AMKSTR(d_tx_mpdu_xretries),
1918 AMKSTR(d_tx_aggregates),
1919 AMKSTR(d_tx_ampdus_queued_hw),
1920 AMKSTR(d_tx_ampdus_queued_sw),
1921 AMKSTR(d_tx_ampdus_completed),
1922 AMKSTR(d_tx_ampdu_retries),
1923 AMKSTR(d_tx_ampdu_xretries),
1924 AMKSTR(d_tx_fifo_underrun),
1925 AMKSTR(d_tx_op_exceeded),
1926 AMKSTR(d_tx_timer_expiry),
1927 AMKSTR(d_tx_desc_cfg_err),
1928 AMKSTR(d_tx_data_underrun),
1929 AMKSTR(d_tx_delim_underrun),
1930
1931 "d_rx_decrypt_crc_err",
1932 "d_rx_phy_err",
1933 "d_rx_mic_err",
1934 "d_rx_pre_delim_crc_err",
1935 "d_rx_post_delim_crc_err",
1936 "d_rx_decrypt_busy_err",
1937
1938 "d_rx_phyerr_radar",
1939 "d_rx_phyerr_ofdm_timing",
1940 "d_rx_phyerr_cck_timing",
1941
1942};
1943#define ATH9K_SSTATS_LEN ARRAY_SIZE(ath9k_gstrings_stats)
1944
1945static void ath9k_get_et_strings(struct ieee80211_hw *hw,
1946 struct ieee80211_vif *vif,
1947 u32 sset, u8 *data)
1948{
1949 if (sset == ETH_SS_STATS)
1950 memcpy(data, *ath9k_gstrings_stats,
1951 sizeof(ath9k_gstrings_stats));
1952}
1953
1954static int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
1955 struct ieee80211_vif *vif, int sset)
1956{
1957 if (sset == ETH_SS_STATS)
1958 return ATH9K_SSTATS_LEN;
1959 return 0;
1960}
1961
1962#define PR_QNUM(_n) (sc->tx.txq_map[_n]->axq_qnum)
1963#define AWDATA(elem) \
1964 do { \
1965 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].elem; \
1966 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].elem; \
1967 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].elem; \
1968 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].elem; \
1969 } while (0)
1970
1971#define AWDATA_RX(elem) \
1972 do { \
1973 data[i++] = sc->debug.stats.rxstats.elem; \
1974 } while (0)
1975
1976static void ath9k_get_et_stats(struct ieee80211_hw *hw,
1977 struct ieee80211_vif *vif,
1978 struct ethtool_stats *stats, u64 *data)
1979{
1980 struct ath_softc *sc = hw->priv;
1981 int i = 0;
1982
1983 data[i++] = (sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].tx_pkts_all +
1984 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].tx_pkts_all +
1985 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].tx_pkts_all +
1986 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].tx_pkts_all);
1987 data[i++] = (sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].tx_bytes_all +
1988 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].tx_bytes_all +
1989 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].tx_bytes_all +
1990 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].tx_bytes_all);
1991 AWDATA_RX(rx_pkts_all);
1992 AWDATA_RX(rx_bytes_all);
1993
1994 AWDATA(tx_pkts_all);
1995 AWDATA(tx_bytes_all);
1996 AWDATA(queued);
1997 AWDATA(completed);
1998 AWDATA(xretries);
1999 AWDATA(a_aggr);
2000 AWDATA(a_queued_hw);
2001 AWDATA(a_queued_sw);
2002 AWDATA(a_completed);
2003 AWDATA(a_retries);
2004 AWDATA(a_xretries);
2005 AWDATA(fifo_underrun);
2006 AWDATA(xtxop);
2007 AWDATA(timer_exp);
2008 AWDATA(desc_cfg_err);
2009 AWDATA(data_underrun);
2010 AWDATA(delim_underrun);
2011
2012 AWDATA_RX(decrypt_crc_err);
2013 AWDATA_RX(phy_err);
2014 AWDATA_RX(mic_err);
2015 AWDATA_RX(pre_delim_crc_err);
2016 AWDATA_RX(post_delim_crc_err);
2017 AWDATA_RX(decrypt_busy_err);
2018
2019 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_RADAR]);
2020 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_OFDM_TIMING]);
2021 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_CCK_TIMING]);
2022
2023 WARN_ON(i != ATH9K_SSTATS_LEN);
2024}
2025
2026/* End of ethtool get-stats functions */
2027
2028#endif
2029
2030
2031#ifdef CONFIG_PM_SLEEP 1886#ifdef CONFIG_PM_SLEEP
2032 1887
2033static void ath9k_wow_map_triggers(struct ath_softc *sc, 1888static void ath9k_wow_map_triggers(struct ath_softc *sc,
@@ -2421,7 +2276,12 @@ struct ieee80211_ops ath9k_ops = {
2421 2276
2422#ifdef CONFIG_ATH9K_DEBUGFS 2277#ifdef CONFIG_ATH9K_DEBUGFS
2423 .get_et_sset_count = ath9k_get_et_sset_count, 2278 .get_et_sset_count = ath9k_get_et_sset_count,
2424 .get_et_stats = ath9k_get_et_stats, 2279 .get_et_stats = ath9k_get_et_stats,
2425 .get_et_strings = ath9k_get_et_strings, 2280 .get_et_strings = ath9k_get_et_strings,
2281#endif
2282
2283#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
2284 .sta_add_debugfs = ath9k_sta_add_debugfs,
2285 .sta_remove_debugfs = ath9k_sta_remove_debugfs,
2426#endif 2286#endif
2427}; 2287};
diff --git a/drivers/net/wireless/ath/ath9k/mci.c b/drivers/net/wireless/ath/ath9k/mci.c
index 0dd2cbb52d65..5c02702f21e7 100644
--- a/drivers/net/wireless/ath/ath9k/mci.c
+++ b/drivers/net/wireless/ath/ath9k/mci.c
@@ -207,23 +207,6 @@ skip_tuning:
207 ath9k_btcoex_timer_resume(sc); 207 ath9k_btcoex_timer_resume(sc);
208} 208}
209 209
210static void ath_mci_wait_btcal_done(struct ath_softc *sc)
211{
212 struct ath_hw *ah = sc->sc_ah;
213
214 /* Stop tx & rx */
215 ieee80211_stop_queues(sc->hw);
216 ath_stoprecv(sc);
217 ath_drain_all_txq(sc, false);
218
219 /* Wait for cal done */
220 ar9003_mci_start_reset(ah, ah->curchan);
221
222 /* Resume tx & rx */
223 ath_startrecv(sc);
224 ieee80211_wake_queues(sc->hw);
225}
226
227static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload) 210static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
228{ 211{
229 struct ath_hw *ah = sc->sc_ah; 212 struct ath_hw *ah = sc->sc_ah;
@@ -235,7 +218,7 @@ static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
235 case MCI_GPM_BT_CAL_REQ: 218 case MCI_GPM_BT_CAL_REQ:
236 if (mci_hw->bt_state == MCI_BT_AWAKE) { 219 if (mci_hw->bt_state == MCI_BT_AWAKE) {
237 mci_hw->bt_state = MCI_BT_CAL_START; 220 mci_hw->bt_state = MCI_BT_CAL_START;
238 ath_mci_wait_btcal_done(sc); 221 ath9k_queue_reset(sc, RESET_TYPE_MCI);
239 } 222 }
240 ath_dbg(common, MCI, "MCI State : %d\n", mci_hw->bt_state); 223 ath_dbg(common, MCI, "MCI State : %d\n", mci_hw->bt_state);
241 break; 224 break;
@@ -274,8 +257,9 @@ static void ath_mci_set_concur_txprio(struct ath_softc *sc)
274{ 257{
275 struct ath_btcoex *btcoex = &sc->btcoex; 258 struct ath_btcoex *btcoex = &sc->btcoex;
276 struct ath_mci_profile *mci = &btcoex->mci; 259 struct ath_mci_profile *mci = &btcoex->mci;
277 u8 stomp_txprio[] = { 0, 0, 0, 0 }; /* all, low, none, low_ftp */ 260 u8 stomp_txprio[ATH_BTCOEX_STOMP_MAX];
278 261
262 memset(stomp_txprio, 0, sizeof(stomp_txprio));
279 if (mci->num_mgmt) { 263 if (mci->num_mgmt) {
280 stomp_txprio[ATH_BTCOEX_STOMP_ALL] = ATH_MCI_INQUIRY_PRIO; 264 stomp_txprio[ATH_BTCOEX_STOMP_ALL] = ATH_MCI_INQUIRY_PRIO;
281 if (!mci->num_pan && !mci->num_other_acl) 265 if (!mci->num_pan && !mci->num_other_acl)
@@ -578,6 +562,8 @@ void ath_mci_intr(struct ath_softc *sc)
578 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM; 562 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;
579 563
580 while (more_data == MCI_GPM_MORE) { 564 while (more_data == MCI_GPM_MORE) {
565 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
566 return;
581 567
582 pgpm = mci->gpm_buf.bf_addr; 568 pgpm = mci->gpm_buf.bf_addr;
583 offset = ar9003_mci_get_next_gpm_offset(ah, false, 569 offset = ar9003_mci_get_next_gpm_offset(ah, false,
@@ -744,12 +730,30 @@ void ath9k_mci_set_txpower(struct ath_softc *sc, bool setchannel,
744 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false); 730 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
745} 731}
746 732
733static void ath9k_mci_stomp_audio(struct ath_softc *sc)
734{
735 struct ath_hw *ah = sc->sc_ah;
736 struct ath_btcoex *btcoex = &sc->btcoex;
737 struct ath_mci_profile *mci = &btcoex->mci;
738
739 if (!mci->num_sco && !mci->num_a2dp)
740 return;
741
742 if (ah->stats.avgbrssi > 25) {
743 btcoex->stomp_audio = 0;
744 return;
745 }
746
747 btcoex->stomp_audio++;
748}
747void ath9k_mci_update_rssi(struct ath_softc *sc) 749void ath9k_mci_update_rssi(struct ath_softc *sc)
748{ 750{
749 struct ath_hw *ah = sc->sc_ah; 751 struct ath_hw *ah = sc->sc_ah;
750 struct ath_btcoex *btcoex = &sc->btcoex; 752 struct ath_btcoex *btcoex = &sc->btcoex;
751 struct ath9k_hw_mci *mci_hw = &sc->sc_ah->btcoex_hw.mci; 753 struct ath9k_hw_mci *mci_hw = &sc->sc_ah->btcoex_hw.mci;
752 754
755 ath9k_mci_stomp_audio(sc);
756
753 if (!(mci_hw->config & ATH_MCI_CONFIG_CONCUR_TX)) 757 if (!(mci_hw->config & ATH_MCI_CONFIG_CONCUR_TX))
754 return; 758 return;
755 759
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index f088f4bf9a26..8e9b826f878b 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -96,17 +96,6 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
96 return true; 96 return true;
97} 97}
98 98
99static void ath_pci_extn_synch_enable(struct ath_common *common)
100{
101 struct ath_softc *sc = (struct ath_softc *) common->priv;
102 struct pci_dev *pdev = to_pci_dev(sc->dev);
103 u8 lnkctl;
104
105 pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
106 lnkctl |= PCI_EXP_LNKCTL_ES;
107 pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
108}
109
110/* Need to be called after we discover btcoex capabilities */ 99/* Need to be called after we discover btcoex capabilities */
111static void ath_pci_aspm_init(struct ath_common *common) 100static void ath_pci_aspm_init(struct ath_common *common)
112{ 101{
@@ -153,7 +142,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = {
153 .ath_bus_type = ATH_PCI, 142 .ath_bus_type = ATH_PCI,
154 .read_cachesize = ath_pci_read_cachesize, 143 .read_cachesize = ath_pci_read_cachesize,
155 .eeprom_read = ath_pci_eeprom_read, 144 .eeprom_read = ath_pci_eeprom_read,
156 .extn_synch_en = ath_pci_extn_synch_enable,
157 .aspm_init = ath_pci_aspm_init, 145 .aspm_init = ath_pci_aspm_init,
158}; 146};
159 147
@@ -299,7 +287,7 @@ static void ath_pci_remove(struct pci_dev *pdev)
299 pci_release_region(pdev, 0); 287 pci_release_region(pdev, 0);
300} 288}
301 289
302#ifdef CONFIG_PM 290#ifdef CONFIG_PM_SLEEP
303 291
304static int ath_pci_suspend(struct device *device) 292static int ath_pci_suspend(struct device *device)
305{ 293{
@@ -345,22 +333,15 @@ static int ath_pci_resume(struct device *device)
345 return 0; 333 return 0;
346} 334}
347 335
348static const struct dev_pm_ops ath9k_pm_ops = { 336static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
349 .suspend = ath_pci_suspend,
350 .resume = ath_pci_resume,
351 .freeze = ath_pci_suspend,
352 .thaw = ath_pci_resume,
353 .poweroff = ath_pci_suspend,
354 .restore = ath_pci_resume,
355};
356 337
357#define ATH9K_PM_OPS (&ath9k_pm_ops) 338#define ATH9K_PM_OPS (&ath9k_pm_ops)
358 339
359#else /* !CONFIG_PM */ 340#else /* !CONFIG_PM_SLEEP */
360 341
361#define ATH9K_PM_OPS NULL 342#define ATH9K_PM_OPS NULL
362 343
363#endif /* !CONFIG_PM */ 344#endif /* !CONFIG_PM_SLEEP */
364 345
365 346
366MODULE_DEVICE_TABLE(pci, ath_pci_id_table); 347MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 27ed80b54881..714558d1ba78 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -982,16 +982,6 @@ static void ath_rc_update_per(struct ath_softc *sc,
982 } 982 }
983} 983}
984 984
985static void ath_debug_stat_retries(struct ath_rate_priv *rc, int rix,
986 int xretries, int retries, u8 per)
987{
988 struct ath_rc_stats *stats = &rc->rcstats[rix];
989
990 stats->xretries += xretries;
991 stats->retries += retries;
992 stats->per = per;
993}
994
995static void ath_rc_update_ht(struct ath_softc *sc, 985static void ath_rc_update_ht(struct ath_softc *sc,
996 struct ath_rate_priv *ath_rc_priv, 986 struct ath_rate_priv *ath_rc_priv,
997 struct ieee80211_tx_info *tx_info, 987 struct ieee80211_tx_info *tx_info,
@@ -1065,14 +1055,6 @@ static void ath_rc_update_ht(struct ath_softc *sc,
1065 1055
1066} 1056}
1067 1057
1068static void ath_debug_stat_rc(struct ath_rate_priv *rc, int final_rate)
1069{
1070 struct ath_rc_stats *stats;
1071
1072 stats = &rc->rcstats[final_rate];
1073 stats->success++;
1074}
1075
1076static void ath_rc_tx_status(struct ath_softc *sc, 1058static void ath_rc_tx_status(struct ath_softc *sc,
1077 struct ath_rate_priv *ath_rc_priv, 1059 struct ath_rate_priv *ath_rc_priv,
1078 struct sk_buff *skb) 1060 struct sk_buff *skb)
@@ -1350,7 +1332,25 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1350 } 1332 }
1351} 1333}
1352 1334
1353#ifdef CONFIG_ATH9K_DEBUGFS 1335#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
1336
1337void ath_debug_stat_rc(struct ath_rate_priv *rc, int final_rate)
1338{
1339 struct ath_rc_stats *stats;
1340
1341 stats = &rc->rcstats[final_rate];
1342 stats->success++;
1343}
1344
1345void ath_debug_stat_retries(struct ath_rate_priv *rc, int rix,
1346 int xretries, int retries, u8 per)
1347{
1348 struct ath_rc_stats *stats = &rc->rcstats[rix];
1349
1350 stats->xretries += xretries;
1351 stats->retries += retries;
1352 stats->per = per;
1353}
1354 1354
1355static ssize_t read_file_rcstat(struct file *file, char __user *user_buf, 1355static ssize_t read_file_rcstat(struct file *file, char __user *user_buf,
1356 size_t count, loff_t *ppos) 1356 size_t count, loff_t *ppos)
@@ -1428,10 +1428,17 @@ static void ath_rate_add_sta_debugfs(void *priv, void *priv_sta,
1428 struct dentry *dir) 1428 struct dentry *dir)
1429{ 1429{
1430 struct ath_rate_priv *rc = priv_sta; 1430 struct ath_rate_priv *rc = priv_sta;
1431 debugfs_create_file("rc_stats", S_IRUGO, dir, rc, &fops_rcstat); 1431 rc->debugfs_rcstats = debugfs_create_file("rc_stats", S_IRUGO,
1432 dir, rc, &fops_rcstat);
1433}
1434
1435static void ath_rate_remove_sta_debugfs(void *priv, void *priv_sta)
1436{
1437 struct ath_rate_priv *rc = priv_sta;
1438 debugfs_remove(rc->debugfs_rcstats);
1432} 1439}
1433 1440
1434#endif /* CONFIG_ATH9K_DEBUGFS */ 1441#endif /* CONFIG_MAC80211_DEBUGFS && CONFIG_ATH9K_DEBUGFS */
1435 1442
1436static void *ath_rate_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) 1443static void *ath_rate_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir)
1437{ 1444{
@@ -1476,8 +1483,10 @@ static struct rate_control_ops ath_rate_ops = {
1476 .free = ath_rate_free, 1483 .free = ath_rate_free,
1477 .alloc_sta = ath_rate_alloc_sta, 1484 .alloc_sta = ath_rate_alloc_sta,
1478 .free_sta = ath_rate_free_sta, 1485 .free_sta = ath_rate_free_sta,
1479#ifdef CONFIG_ATH9K_DEBUGFS 1486
1487#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
1480 .add_sta_debugfs = ath_rate_add_sta_debugfs, 1488 .add_sta_debugfs = ath_rate_add_sta_debugfs,
1489 .remove_sta_debugfs = ath_rate_remove_sta_debugfs,
1481#endif 1490#endif
1482}; 1491};
1483 1492
diff --git a/drivers/net/wireless/ath/ath9k/rc.h b/drivers/net/wireless/ath/ath9k/rc.h
index 268e67dc5fb2..267dbfcfaa96 100644
--- a/drivers/net/wireless/ath/ath9k/rc.h
+++ b/drivers/net/wireless/ath/ath9k/rc.h
@@ -211,10 +211,26 @@ struct ath_rate_priv {
211 struct ath_rateset neg_ht_rates; 211 struct ath_rateset neg_ht_rates;
212 const struct ath_rate_table *rate_table; 212 const struct ath_rate_table *rate_table;
213 213
214#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
214 struct dentry *debugfs_rcstats; 215 struct dentry *debugfs_rcstats;
215 struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; 216 struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
217#endif
216}; 218};
217 219
220#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
221void ath_debug_stat_rc(struct ath_rate_priv *rc, int final_rate);
222void ath_debug_stat_retries(struct ath_rate_priv *rc, int rix,
223 int xretries, int retries, u8 per);
224#else
225static inline void ath_debug_stat_rc(struct ath_rate_priv *rc, int final_rate)
226{
227}
228static inline void ath_debug_stat_retries(struct ath_rate_priv *rc, int rix,
229 int xretries, int retries, u8 per)
230{
231}
232#endif
233
218#ifdef CONFIG_ATH9K_RATE_CONTROL 234#ifdef CONFIG_ATH9K_RATE_CONTROL
219int ath_rate_control_register(void); 235int ath_rate_control_register(void);
220void ath_rate_control_unregister(void); 236void ath_rate_control_unregister(void);
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index 6aafbb77c498..d4df98a938bf 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -976,7 +976,7 @@ static int ath9k_rx_skb_preprocess(struct ath_common *common,
976 rx_status->freq = hw->conf.channel->center_freq; 976 rx_status->freq = hw->conf.channel->center_freq;
977 rx_status->signal = ah->noise + rx_stats->rs_rssi; 977 rx_status->signal = ah->noise + rx_stats->rs_rssi;
978 rx_status->antenna = rx_stats->rs_antenna; 978 rx_status->antenna = rx_stats->rs_antenna;
979 rx_status->flag |= RX_FLAG_MACTIME_START; 979 rx_status->flag |= RX_FLAG_MACTIME_END;
980 if (rx_stats->rs_moreaggr) 980 if (rx_stats->rs_moreaggr)
981 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; 981 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
982 982
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 1ffca7511fa8..90e48a0fafe5 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -312,7 +312,6 @@ static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
312 } 312 }
313 313
314 bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list); 314 bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list);
315 bf->bf_next = NULL;
316 list_del(&bf->list); 315 list_del(&bf->list);
317 316
318 spin_unlock_bh(&sc->tx.txbuflock); 317 spin_unlock_bh(&sc->tx.txbuflock);
@@ -394,7 +393,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
394 u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first; 393 u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first;
395 u32 ba[WME_BA_BMP_SIZE >> 5]; 394 u32 ba[WME_BA_BMP_SIZE >> 5];
396 int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; 395 int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0;
397 bool rc_update = true; 396 bool rc_update = true, isba;
398 struct ieee80211_tx_rate rates[4]; 397 struct ieee80211_tx_rate rates[4];
399 struct ath_frame_info *fi; 398 struct ath_frame_info *fi;
400 int nframes; 399 int nframes;
@@ -438,13 +437,17 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
438 tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; 437 tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK;
439 tid = ATH_AN_2_TID(an, tidno); 438 tid = ATH_AN_2_TID(an, tidno);
440 seq_first = tid->seq_start; 439 seq_first = tid->seq_start;
440 isba = ts->ts_flags & ATH9K_TX_BA;
441 441
442 /* 442 /*
443 * The hardware occasionally sends a tx status for the wrong TID. 443 * The hardware occasionally sends a tx status for the wrong TID.
444 * In this case, the BA status cannot be considered valid and all 444 * In this case, the BA status cannot be considered valid and all
445 * subframes need to be retransmitted 445 * subframes need to be retransmitted
446 *
447 * Only BlockAcks have a TID and therefore normal Acks cannot be
448 * checked
446 */ 449 */
447 if (tidno != ts->tid) 450 if (isba && tidno != ts->tid)
448 txok = false; 451 txok = false;
449 452
450 isaggr = bf_isaggr(bf); 453 isaggr = bf_isaggr(bf);
@@ -1259,7 +1262,7 @@ void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
1259 int tidno; 1262 int tidno;
1260 1263
1261 for (tidno = 0, tid = &an->tid[tidno]; 1264 for (tidno = 0, tid = &an->tid[tidno];
1262 tidno < WME_NUM_TID; tidno++, tid++) { 1265 tidno < IEEE80211_NUM_TIDS; tidno++, tid++) {
1263 1266
1264 if (!tid->sched) 1267 if (!tid->sched)
1265 continue; 1268 continue;
@@ -1293,7 +1296,7 @@ void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an)
1293 int tidno; 1296 int tidno;
1294 1297
1295 for (tidno = 0, tid = &an->tid[tidno]; 1298 for (tidno = 0, tid = &an->tid[tidno];
1296 tidno < WME_NUM_TID; tidno++, tid++) { 1299 tidno < IEEE80211_NUM_TIDS; tidno++, tid++) {
1297 1300
1298 ac = tid->ac; 1301 ac = tid->ac;
1299 txq = ac->txq; 1302 txq = ac->txq;
@@ -1350,10 +1353,10 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
1350 struct ath_hw *ah = sc->sc_ah; 1353 struct ath_hw *ah = sc->sc_ah;
1351 struct ath9k_tx_queue_info qi; 1354 struct ath9k_tx_queue_info qi;
1352 static const int subtype_txq_to_hwq[] = { 1355 static const int subtype_txq_to_hwq[] = {
1353 [WME_AC_BE] = ATH_TXQ_AC_BE, 1356 [IEEE80211_AC_BE] = ATH_TXQ_AC_BE,
1354 [WME_AC_BK] = ATH_TXQ_AC_BK, 1357 [IEEE80211_AC_BK] = ATH_TXQ_AC_BK,
1355 [WME_AC_VI] = ATH_TXQ_AC_VI, 1358 [IEEE80211_AC_VI] = ATH_TXQ_AC_VI,
1356 [WME_AC_VO] = ATH_TXQ_AC_VO, 1359 [IEEE80211_AC_VO] = ATH_TXQ_AC_VO,
1357 }; 1360 };
1358 int axq_qnum, i; 1361 int axq_qnum, i;
1359 1362
@@ -2315,6 +2318,8 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
2315 2318
2316 ath_txq_lock(sc, txq); 2319 ath_txq_lock(sc, txq);
2317 2320
2321 TX_STAT_INC(txq->axq_qnum, txprocdesc);
2322
2318 if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) { 2323 if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) {
2319 ath_txq_unlock(sc, txq); 2324 ath_txq_unlock(sc, txq);
2320 return; 2325 return;
@@ -2442,7 +2447,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2442 int tidno, acno; 2447 int tidno, acno;
2443 2448
2444 for (tidno = 0, tid = &an->tid[tidno]; 2449 for (tidno = 0, tid = &an->tid[tidno];
2445 tidno < WME_NUM_TID; 2450 tidno < IEEE80211_NUM_TIDS;
2446 tidno++, tid++) { 2451 tidno++, tid++) {
2447 tid->an = an; 2452 tid->an = an;
2448 tid->tidno = tidno; 2453 tid->tidno = tidno;
@@ -2460,7 +2465,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2460 } 2465 }
2461 2466
2462 for (acno = 0, ac = &an->ac[acno]; 2467 for (acno = 0, ac = &an->ac[acno];
2463 acno < WME_NUM_AC; acno++, ac++) { 2468 acno < IEEE80211_NUM_ACS; acno++, ac++) {
2464 ac->sched = false; 2469 ac->sched = false;
2465 ac->txq = sc->tx.txq_map[acno]; 2470 ac->txq = sc->tx.txq_map[acno];
2466 INIT_LIST_HEAD(&ac->tid_q); 2471 INIT_LIST_HEAD(&ac->tid_q);
@@ -2475,7 +2480,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
2475 int tidno; 2480 int tidno;
2476 2481
2477 for (tidno = 0, tid = &an->tid[tidno]; 2482 for (tidno = 0, tid = &an->tid[tidno];
2478 tidno < WME_NUM_TID; tidno++, tid++) { 2483 tidno < IEEE80211_NUM_TIDS; tidno++, tid++) {
2479 2484
2480 ac = tid->ac; 2485 ac = tid->ac;
2481 txq = ac->txq; 2486 txq = ac->txq;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 11:38:09 -0500