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path: root/drivers/net/wireless/ath/ath9k/calib.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/calib.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 1f0c5fe4a68b..d1bbb02af8de 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -116,7 +116,7 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
116 "NF calibrated [ctl] [chain 1] is %d\n", nf); 116 "NF calibrated [ctl] [chain 1] is %d\n", nf);
117 nfarray[1] = nf; 117 nfarray[1] = nf;
118 118
119 if (!AR_SREV_9280(ah)) { 119 if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) {
120 nf = MS(REG_READ(ah, AR_PHY_CH2_CCA), 120 nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
121 AR_PHY_CH2_MINCCA_PWR); 121 AR_PHY_CH2_MINCCA_PWR);
122 if (nf & 0x100) 122 if (nf & 0x100)
@@ -154,7 +154,7 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
154 "NF calibrated [ext] [chain 1] is %d\n", nf); 154 "NF calibrated [ext] [chain 1] is %d\n", nf);
155 nfarray[4] = nf; 155 nfarray[4] = nf;
156 156
157 if (!AR_SREV_9280(ah)) { 157 if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) {
158 nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA), 158 nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
159 AR_PHY_CH2_EXT_MINCCA_PWR); 159 AR_PHY_CH2_EXT_MINCCA_PWR);
160 if (nf & 0x100) 160 if (nf & 0x100)
@@ -613,7 +613,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
613 613
614 if (AR_SREV_9285(ah)) 614 if (AR_SREV_9285(ah))
615 chainmask = 0x9; 615 chainmask = 0x9;
616 else if (AR_SREV_9280(ah)) 616 else if (AR_SREV_9280(ah) || AR_SREV_9287(ah))
617 chainmask = 0x1B; 617 chainmask = 0x1B;
618 else 618 else
619 chainmask = 0x3F; 619 chainmask = 0x3F;
@@ -873,7 +873,7 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
873 if (AR_SREV_9285_11_OR_LATER(ah)) 873 if (AR_SREV_9285_11_OR_LATER(ah))
874 ath9k_hw_9285_pa_cal(ah); 874 ath9k_hw_9285_pa_cal(ah);
875 875
876 if (OLC_FOR_AR9280_20_LATER) 876 if (OLC_FOR_AR9280_20_LATER || OLC_FOR_AR9287_10_LATER)
877 ath9k_olc_temp_compensation(ah); 877 ath9k_olc_temp_compensation(ah);
878 ath9k_hw_getnf(ah, chan); 878 ath9k_hw_getnf(ah, chan);
879 ath9k_hw_loadnf(ah, ah->curchan); 879 ath9k_hw_loadnf(ah, ah->curchan);
@@ -929,8 +929,11 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
929 return false; 929 return false;
930 } else { 930 } else {
931 if (AR_SREV_9280_10_OR_LATER(ah)) { 931 if (AR_SREV_9280_10_OR_LATER(ah)) {
932 REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); 932 if (!AR_SREV_9287_10_OR_LATER(ah))
933 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 933 REG_CLR_BIT(ah, AR_PHY_ADC_CTL,
934 AR_PHY_ADC_CTL_OFF_PWDADC);
935 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
936 AR_PHY_AGC_CONTROL_FLTR_CAL);
934 } 937 }
935 938
936 /* Calibrate the AGC */ 939 /* Calibrate the AGC */
@@ -948,8 +951,11 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
948 } 951 }
949 952
950 if (AR_SREV_9280_10_OR_LATER(ah)) { 953 if (AR_SREV_9280_10_OR_LATER(ah)) {
951 REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); 954 if (!AR_SREV_9287_10_OR_LATER(ah))
952 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 955 REG_SET_BIT(ah, AR_PHY_ADC_CTL,
956 AR_PHY_ADC_CTL_OFF_PWDADC);
957 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
958 AR_PHY_AGC_CONTROL_FLTR_CAL);
953 } 959 }
954 } 960 }
955 961