diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath6kl/init.c')
-rw-r--r-- | drivers/net/wireless/ath/ath6kl/init.c | 1293 |
1 files changed, 1293 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath6kl/init.c b/drivers/net/wireless/ath/ath6kl/init.c new file mode 100644 index 000000000000..fe61871e9874 --- /dev/null +++ b/drivers/net/wireless/ath/ath6kl/init.c | |||
@@ -0,0 +1,1293 @@ | |||
1 | |||
2 | /* | ||
3 | * Copyright (c) 2011 Atheros Communications Inc. | ||
4 | * | ||
5 | * Permission to use, copy, modify, and/or distribute this software for any | ||
6 | * purpose with or without fee is hereby granted, provided that the above | ||
7 | * copyright notice and this permission notice appear in all copies. | ||
8 | * | ||
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | ||
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | ||
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||
16 | */ | ||
17 | |||
18 | #include <linux/mmc/sdio_func.h> | ||
19 | #include "core.h" | ||
20 | #include "cfg80211.h" | ||
21 | #include "target.h" | ||
22 | #include "debug.h" | ||
23 | #include "hif-ops.h" | ||
24 | |||
25 | unsigned int debug_mask; | ||
26 | |||
27 | module_param(debug_mask, uint, 0644); | ||
28 | |||
29 | /* | ||
30 | * Include definitions here that can be used to tune the WLAN module | ||
31 | * behavior. Different customers can tune the behavior as per their needs, | ||
32 | * here. | ||
33 | */ | ||
34 | |||
35 | /* | ||
36 | * This configuration item enable/disable keepalive support. | ||
37 | * Keepalive support: In the absence of any data traffic to AP, null | ||
38 | * frames will be sent to the AP at periodic interval, to keep the association | ||
39 | * active. This configuration item defines the periodic interval. | ||
40 | * Use value of zero to disable keepalive support | ||
41 | * Default: 60 seconds | ||
42 | */ | ||
43 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 | ||
44 | |||
45 | /* | ||
46 | * This configuration item sets the value of disconnect timeout | ||
47 | * Firmware delays sending the disconnec event to the host for this | ||
48 | * timeout after is gets disconnected from the current AP. | ||
49 | * If the firmware successly roams within the disconnect timeout | ||
50 | * it sends a new connect event | ||
51 | */ | ||
52 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 | ||
53 | |||
54 | #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 | ||
55 | |||
56 | enum addr_type { | ||
57 | DATASET_PATCH_ADDR, | ||
58 | APP_LOAD_ADDR, | ||
59 | APP_START_OVERRIDE_ADDR, | ||
60 | }; | ||
61 | |||
62 | #define ATH6KL_DATA_OFFSET 64 | ||
63 | struct sk_buff *ath6kl_buf_alloc(int size) | ||
64 | { | ||
65 | struct sk_buff *skb; | ||
66 | u16 reserved; | ||
67 | |||
68 | /* Add chacheline space at front and back of buffer */ | ||
69 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + | ||
70 | sizeof(struct htc_packet); | ||
71 | skb = dev_alloc_skb(size + reserved); | ||
72 | |||
73 | if (skb) | ||
74 | skb_reserve(skb, reserved - L1_CACHE_BYTES); | ||
75 | return skb; | ||
76 | } | ||
77 | |||
78 | void ath6kl_init_profile_info(struct ath6kl *ar) | ||
79 | { | ||
80 | ar->ssid_len = 0; | ||
81 | memset(ar->ssid, 0, sizeof(ar->ssid)); | ||
82 | |||
83 | ar->dot11_auth_mode = OPEN_AUTH; | ||
84 | ar->auth_mode = NONE_AUTH; | ||
85 | ar->prwise_crypto = NONE_CRYPT; | ||
86 | ar->prwise_crypto_len = 0; | ||
87 | ar->grp_crypto = NONE_CRYPT; | ||
88 | ar->grp_crpto_len = 0; | ||
89 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); | ||
90 | memset(ar->req_bssid, 0, sizeof(ar->req_bssid)); | ||
91 | memset(ar->bssid, 0, sizeof(ar->bssid)); | ||
92 | ar->bss_ch = 0; | ||
93 | ar->nw_type = ar->next_mode = INFRA_NETWORK; | ||
94 | } | ||
95 | |||
96 | static u8 ath6kl_get_fw_iftype(struct ath6kl *ar) | ||
97 | { | ||
98 | switch (ar->nw_type) { | ||
99 | case INFRA_NETWORK: | ||
100 | return HI_OPTION_FW_MODE_BSS_STA; | ||
101 | case ADHOC_NETWORK: | ||
102 | return HI_OPTION_FW_MODE_IBSS; | ||
103 | case AP_NETWORK: | ||
104 | return HI_OPTION_FW_MODE_AP; | ||
105 | default: | ||
106 | ath6kl_err("Unsupported interface type :%d\n", ar->nw_type); | ||
107 | return 0xff; | ||
108 | } | ||
109 | } | ||
110 | |||
111 | static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, | ||
112 | u32 item_offset) | ||
113 | { | ||
114 | u32 addr = 0; | ||
115 | |||
116 | if (ar->target_type == TARGET_TYPE_AR6003) | ||
117 | addr = ATH6KL_HI_START_ADDR + item_offset; | ||
118 | |||
119 | return addr; | ||
120 | } | ||
121 | |||
122 | static int ath6kl_set_host_app_area(struct ath6kl *ar) | ||
123 | { | ||
124 | u32 address, data; | ||
125 | struct host_app_area host_app_area; | ||
126 | |||
127 | /* Fetch the address of the host_app_area_s | ||
128 | * instance in the host interest area */ | ||
129 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); | ||
130 | address = TARG_VTOP(address); | ||
131 | |||
132 | if (ath6kl_read_reg_diag(ar, &address, &data)) | ||
133 | return -EIO; | ||
134 | |||
135 | address = TARG_VTOP(data); | ||
136 | host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION; | ||
137 | if (ath6kl_access_datadiag(ar, address, | ||
138 | (u8 *)&host_app_area, | ||
139 | sizeof(struct host_app_area), false)) | ||
140 | return -EIO; | ||
141 | |||
142 | return 0; | ||
143 | } | ||
144 | |||
145 | static inline void set_ac2_ep_map(struct ath6kl *ar, | ||
146 | u8 ac, | ||
147 | enum htc_endpoint_id ep) | ||
148 | { | ||
149 | ar->ac2ep_map[ac] = ep; | ||
150 | ar->ep2ac_map[ep] = ac; | ||
151 | } | ||
152 | |||
153 | /* connect to a service */ | ||
154 | static int ath6kl_connectservice(struct ath6kl *ar, | ||
155 | struct htc_service_connect_req *con_req, | ||
156 | char *desc) | ||
157 | { | ||
158 | int status; | ||
159 | struct htc_service_connect_resp response; | ||
160 | |||
161 | memset(&response, 0, sizeof(response)); | ||
162 | |||
163 | status = htc_conn_service(ar->htc_target, con_req, &response); | ||
164 | if (status) { | ||
165 | ath6kl_err("failed to connect to %s service status:%d\n", | ||
166 | desc, status); | ||
167 | return status; | ||
168 | } | ||
169 | |||
170 | switch (con_req->svc_id) { | ||
171 | case WMI_CONTROL_SVC: | ||
172 | if (test_bit(WMI_ENABLED, &ar->flag)) | ||
173 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); | ||
174 | ar->ctrl_ep = response.endpoint; | ||
175 | break; | ||
176 | case WMI_DATA_BE_SVC: | ||
177 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); | ||
178 | break; | ||
179 | case WMI_DATA_BK_SVC: | ||
180 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); | ||
181 | break; | ||
182 | case WMI_DATA_VI_SVC: | ||
183 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); | ||
184 | break; | ||
185 | case WMI_DATA_VO_SVC: | ||
186 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); | ||
187 | break; | ||
188 | default: | ||
189 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); | ||
190 | return -EINVAL; | ||
191 | } | ||
192 | |||
193 | return 0; | ||
194 | } | ||
195 | |||
196 | static int ath6kl_init_service_ep(struct ath6kl *ar) | ||
197 | { | ||
198 | struct htc_service_connect_req connect; | ||
199 | |||
200 | memset(&connect, 0, sizeof(connect)); | ||
201 | |||
202 | /* these fields are the same for all service endpoints */ | ||
203 | connect.ep_cb.rx = ath6kl_rx; | ||
204 | connect.ep_cb.rx_refill = ath6kl_rx_refill; | ||
205 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; | ||
206 | |||
207 | /* | ||
208 | * Set the max queue depth so that our ath6kl_tx_queue_full handler | ||
209 | * gets called. | ||
210 | */ | ||
211 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; | ||
212 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; | ||
213 | if (!connect.ep_cb.rx_refill_thresh) | ||
214 | connect.ep_cb.rx_refill_thresh++; | ||
215 | |||
216 | /* connect to control service */ | ||
217 | connect.svc_id = WMI_CONTROL_SVC; | ||
218 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) | ||
219 | return -EIO; | ||
220 | |||
221 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; | ||
222 | |||
223 | /* | ||
224 | * Limit the HTC message size on the send path, although e can | ||
225 | * receive A-MSDU frames of 4K, we will only send ethernet-sized | ||
226 | * (802.3) frames on the send path. | ||
227 | */ | ||
228 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; | ||
229 | |||
230 | /* | ||
231 | * To reduce the amount of committed memory for larger A_MSDU | ||
232 | * frames, use the recv-alloc threshold mechanism for larger | ||
233 | * packets. | ||
234 | */ | ||
235 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; | ||
236 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; | ||
237 | |||
238 | /* | ||
239 | * For the remaining data services set the connection flag to | ||
240 | * reduce dribbling, if configured to do so. | ||
241 | */ | ||
242 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; | ||
243 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; | ||
244 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; | ||
245 | |||
246 | connect.svc_id = WMI_DATA_BE_SVC; | ||
247 | |||
248 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) | ||
249 | return -EIO; | ||
250 | |||
251 | /* connect to back-ground map this to WMI LOW_PRI */ | ||
252 | connect.svc_id = WMI_DATA_BK_SVC; | ||
253 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) | ||
254 | return -EIO; | ||
255 | |||
256 | /* connect to Video service, map this to to HI PRI */ | ||
257 | connect.svc_id = WMI_DATA_VI_SVC; | ||
258 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) | ||
259 | return -EIO; | ||
260 | |||
261 | /* | ||
262 | * Connect to VO service, this is currently not mapped to a WMI | ||
263 | * priority stream due to historical reasons. WMI originally | ||
264 | * defined 3 priorities over 3 mailboxes We can change this when | ||
265 | * WMI is reworked so that priorities are not dependent on | ||
266 | * mailboxes. | ||
267 | */ | ||
268 | connect.svc_id = WMI_DATA_VO_SVC; | ||
269 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) | ||
270 | return -EIO; | ||
271 | |||
272 | return 0; | ||
273 | } | ||
274 | |||
275 | static void ath6kl_init_control_info(struct ath6kl *ar) | ||
276 | { | ||
277 | u8 ctr; | ||
278 | |||
279 | clear_bit(WMI_ENABLED, &ar->flag); | ||
280 | ath6kl_init_profile_info(ar); | ||
281 | ar->def_txkey_index = 0; | ||
282 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); | ||
283 | ar->ch_hint = 0; | ||
284 | ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL; | ||
285 | ar->listen_intvl_b = 0; | ||
286 | ar->tx_pwr = 0; | ||
287 | clear_bit(SKIP_SCAN, &ar->flag); | ||
288 | set_bit(WMM_ENABLED, &ar->flag); | ||
289 | ar->intra_bss = 1; | ||
290 | memset(&ar->sc_params, 0, sizeof(ar->sc_params)); | ||
291 | ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT; | ||
292 | ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS; | ||
293 | |||
294 | memset((u8 *)ar->sta_list, 0, | ||
295 | AP_MAX_NUM_STA * sizeof(struct ath6kl_sta)); | ||
296 | |||
297 | spin_lock_init(&ar->mcastpsq_lock); | ||
298 | |||
299 | /* Init the PS queues */ | ||
300 | for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { | ||
301 | spin_lock_init(&ar->sta_list[ctr].psq_lock); | ||
302 | skb_queue_head_init(&ar->sta_list[ctr].psq); | ||
303 | } | ||
304 | |||
305 | skb_queue_head_init(&ar->mcastpsq); | ||
306 | |||
307 | memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3); | ||
308 | } | ||
309 | |||
310 | /* | ||
311 | * Set HTC/Mbox operational parameters, this can only be called when the | ||
312 | * target is in the BMI phase. | ||
313 | */ | ||
314 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | ||
315 | u8 htc_ctrl_buf) | ||
316 | { | ||
317 | int status; | ||
318 | u32 blk_size; | ||
319 | |||
320 | blk_size = ar->mbox_info.block_size; | ||
321 | |||
322 | if (htc_ctrl_buf) | ||
323 | blk_size |= ((u32)htc_ctrl_buf) << 16; | ||
324 | |||
325 | /* set the host interest area for the block size */ | ||
326 | status = ath6kl_bmi_write(ar, | ||
327 | ath6kl_get_hi_item_addr(ar, | ||
328 | HI_ITEM(hi_mbox_io_block_sz)), | ||
329 | (u8 *)&blk_size, | ||
330 | 4); | ||
331 | if (status) { | ||
332 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | ||
333 | goto out; | ||
334 | } | ||
335 | |||
336 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", | ||
337 | blk_size, | ||
338 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); | ||
339 | |||
340 | if (mbox_isr_yield_val) { | ||
341 | /* set the host interest area for the mbox ISR yield limit */ | ||
342 | status = ath6kl_bmi_write(ar, | ||
343 | ath6kl_get_hi_item_addr(ar, | ||
344 | HI_ITEM(hi_mbox_isr_yield_limit)), | ||
345 | (u8 *)&mbox_isr_yield_val, | ||
346 | 4); | ||
347 | if (status) { | ||
348 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | ||
349 | goto out; | ||
350 | } | ||
351 | } | ||
352 | |||
353 | out: | ||
354 | return status; | ||
355 | } | ||
356 | |||
357 | #define REG_DUMP_COUNT_AR6003 60 | ||
358 | #define REGISTER_DUMP_LEN_MAX 60 | ||
359 | |||
360 | static void ath6kl_dump_target_assert_info(struct ath6kl *ar) | ||
361 | { | ||
362 | u32 address; | ||
363 | u32 regdump_loc = 0; | ||
364 | int status; | ||
365 | u32 regdump_val[REGISTER_DUMP_LEN_MAX]; | ||
366 | u32 i; | ||
367 | |||
368 | if (ar->target_type != TARGET_TYPE_AR6003) | ||
369 | return; | ||
370 | |||
371 | /* the reg dump pointer is copied to the host interest area */ | ||
372 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); | ||
373 | address = TARG_VTOP(address); | ||
374 | |||
375 | /* read RAM location through diagnostic window */ | ||
376 | status = ath6kl_read_reg_diag(ar, &address, ®dump_loc); | ||
377 | |||
378 | if (status || !regdump_loc) { | ||
379 | ath6kl_err("failed to get ptr to register dump area\n"); | ||
380 | return; | ||
381 | } | ||
382 | |||
383 | ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", | ||
384 | regdump_loc); | ||
385 | |||
386 | regdump_loc = TARG_VTOP(regdump_loc); | ||
387 | |||
388 | /* fetch register dump data */ | ||
389 | status = ath6kl_access_datadiag(ar, | ||
390 | regdump_loc, | ||
391 | (u8 *)®dump_val[0], | ||
392 | REG_DUMP_COUNT_AR6003 * (sizeof(u32)), | ||
393 | true); | ||
394 | |||
395 | if (status) { | ||
396 | ath6kl_err("failed to get register dump\n"); | ||
397 | return; | ||
398 | } | ||
399 | ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); | ||
400 | |||
401 | for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) | ||
402 | ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", | ||
403 | i, regdump_val[i]); | ||
404 | |||
405 | } | ||
406 | |||
407 | void ath6kl_target_failure(struct ath6kl *ar) | ||
408 | { | ||
409 | ath6kl_err("target asserted\n"); | ||
410 | |||
411 | /* try dumping target assertion information (if any) */ | ||
412 | ath6kl_dump_target_assert_info(ar); | ||
413 | |||
414 | } | ||
415 | |||
416 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar) | ||
417 | { | ||
418 | int status = 0; | ||
419 | |||
420 | /* | ||
421 | * Configure the device for rx dot11 header rules. "0,0" are the | ||
422 | * default values. Required if checksum offload is needed. Set | ||
423 | * RxMetaVersion to 2. | ||
424 | */ | ||
425 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, | ||
426 | ar->rx_meta_ver, 0, 0)) { | ||
427 | ath6kl_err("unable to set the rx frame format\n"); | ||
428 | status = -EIO; | ||
429 | } | ||
430 | |||
431 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) | ||
432 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1, | ||
433 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { | ||
434 | ath6kl_err("unable to set power save fail event policy\n"); | ||
435 | status = -EIO; | ||
436 | } | ||
437 | |||
438 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) | ||
439 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0, | ||
440 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { | ||
441 | ath6kl_err("unable to set barker preamble policy\n"); | ||
442 | status = -EIO; | ||
443 | } | ||
444 | |||
445 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, | ||
446 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { | ||
447 | ath6kl_err("unable to set keep alive interval\n"); | ||
448 | status = -EIO; | ||
449 | } | ||
450 | |||
451 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, | ||
452 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { | ||
453 | ath6kl_err("unable to set disconnect timeout\n"); | ||
454 | status = -EIO; | ||
455 | } | ||
456 | |||
457 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) | ||
458 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) { | ||
459 | ath6kl_err("unable to set txop bursting\n"); | ||
460 | status = -EIO; | ||
461 | } | ||
462 | |||
463 | return status; | ||
464 | } | ||
465 | |||
466 | int ath6kl_configure_target(struct ath6kl *ar) | ||
467 | { | ||
468 | u32 param, ram_reserved_size; | ||
469 | u8 fw_iftype; | ||
470 | |||
471 | fw_iftype = ath6kl_get_fw_iftype(ar); | ||
472 | if (fw_iftype == 0xff) | ||
473 | return -EINVAL; | ||
474 | |||
475 | /* Tell target which HTC version it is used*/ | ||
476 | param = HTC_PROTOCOL_VERSION; | ||
477 | if (ath6kl_bmi_write(ar, | ||
478 | ath6kl_get_hi_item_addr(ar, | ||
479 | HI_ITEM(hi_app_host_interest)), | ||
480 | (u8 *)¶m, 4) != 0) { | ||
481 | ath6kl_err("bmi_write_memory for htc version failed\n"); | ||
482 | return -EIO; | ||
483 | } | ||
484 | |||
485 | /* set the firmware mode to STA/IBSS/AP */ | ||
486 | param = 0; | ||
487 | |||
488 | if (ath6kl_bmi_read(ar, | ||
489 | ath6kl_get_hi_item_addr(ar, | ||
490 | HI_ITEM(hi_option_flag)), | ||
491 | (u8 *)¶m, 4) != 0) { | ||
492 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); | ||
493 | return -EIO; | ||
494 | } | ||
495 | |||
496 | param |= (1 << HI_OPTION_NUM_DEV_SHIFT); | ||
497 | param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT); | ||
498 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | ||
499 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | ||
500 | |||
501 | if (ath6kl_bmi_write(ar, | ||
502 | ath6kl_get_hi_item_addr(ar, | ||
503 | HI_ITEM(hi_option_flag)), | ||
504 | (u8 *)¶m, | ||
505 | 4) != 0) { | ||
506 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | ||
507 | return -EIO; | ||
508 | } | ||
509 | |||
510 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); | ||
511 | |||
512 | /* | ||
513 | * Hardcode the address use for the extended board data | ||
514 | * Ideally this should be pre-allocate by the OS at boot time | ||
515 | * But since it is a new feature and board data is loaded | ||
516 | * at init time, we have to workaround this from host. | ||
517 | * It is difficult to patch the firmware boot code, | ||
518 | * but possible in theory. | ||
519 | */ | ||
520 | |||
521 | if (ar->target_type == TARGET_TYPE_AR6003) { | ||
522 | if (ar->version.target_ver == AR6003_REV2_VERSION) { | ||
523 | param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; | ||
524 | ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE; | ||
525 | } else { | ||
526 | param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; | ||
527 | ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE; | ||
528 | } | ||
529 | |||
530 | if (ath6kl_bmi_write(ar, | ||
531 | ath6kl_get_hi_item_addr(ar, | ||
532 | HI_ITEM(hi_board_ext_data)), | ||
533 | (u8 *)¶m, 4) != 0) { | ||
534 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | ||
535 | return -EIO; | ||
536 | } | ||
537 | if (ath6kl_bmi_write(ar, | ||
538 | ath6kl_get_hi_item_addr(ar, | ||
539 | HI_ITEM(hi_end_ram_reserve_sz)), | ||
540 | (u8 *)&ram_reserved_size, 4) != 0) { | ||
541 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | ||
542 | return -EIO; | ||
543 | } | ||
544 | } | ||
545 | |||
546 | /* set the block size for the target */ | ||
547 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) | ||
548 | /* use default number of control buffers */ | ||
549 | return -EIO; | ||
550 | |||
551 | return 0; | ||
552 | } | ||
553 | |||
554 | struct ath6kl *ath6kl_core_alloc(struct device *sdev) | ||
555 | { | ||
556 | struct net_device *dev; | ||
557 | struct ath6kl *ar; | ||
558 | struct wireless_dev *wdev; | ||
559 | |||
560 | wdev = ath6kl_cfg80211_init(sdev); | ||
561 | if (!wdev) { | ||
562 | ath6kl_err("ath6kl_cfg80211_init failed\n"); | ||
563 | return NULL; | ||
564 | } | ||
565 | |||
566 | ar = wdev_priv(wdev); | ||
567 | ar->dev = sdev; | ||
568 | ar->wdev = wdev; | ||
569 | wdev->iftype = NL80211_IFTYPE_STATION; | ||
570 | |||
571 | dev = alloc_netdev(0, "wlan%d", ether_setup); | ||
572 | if (!dev) { | ||
573 | ath6kl_err("no memory for network device instance\n"); | ||
574 | ath6kl_cfg80211_deinit(ar); | ||
575 | return NULL; | ||
576 | } | ||
577 | |||
578 | dev->ieee80211_ptr = wdev; | ||
579 | SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy)); | ||
580 | wdev->netdev = dev; | ||
581 | ar->sme_state = SME_DISCONNECTED; | ||
582 | ar->auto_auth_stage = AUTH_IDLE; | ||
583 | |||
584 | init_netdev(dev); | ||
585 | |||
586 | ar->net_dev = dev; | ||
587 | ar->wlan_state = WLAN_ENABLED; | ||
588 | |||
589 | ar->wlan_pwr_state = WLAN_POWER_STATE_ON; | ||
590 | |||
591 | spin_lock_init(&ar->lock); | ||
592 | |||
593 | ath6kl_init_control_info(ar); | ||
594 | init_waitqueue_head(&ar->event_wq); | ||
595 | sema_init(&ar->sem, 1); | ||
596 | clear_bit(DESTROY_IN_PROGRESS, &ar->flag); | ||
597 | |||
598 | INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue); | ||
599 | |||
600 | setup_timer(&ar->disconnect_timer, disconnect_timer_handler, | ||
601 | (unsigned long) dev); | ||
602 | |||
603 | return ar; | ||
604 | } | ||
605 | |||
606 | int ath6kl_unavail_ev(struct ath6kl *ar) | ||
607 | { | ||
608 | ath6kl_destroy(ar->net_dev, 1); | ||
609 | |||
610 | return 0; | ||
611 | } | ||
612 | |||
613 | /* firmware upload */ | ||
614 | static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type) | ||
615 | { | ||
616 | WARN_ON(target_ver != AR6003_REV2_VERSION && | ||
617 | target_ver != AR6003_REV3_VERSION); | ||
618 | |||
619 | switch (type) { | ||
620 | case DATASET_PATCH_ADDR: | ||
621 | return (target_ver == AR6003_REV2_VERSION) ? | ||
622 | AR6003_REV2_DATASET_PATCH_ADDRESS : | ||
623 | AR6003_REV3_DATASET_PATCH_ADDRESS; | ||
624 | case APP_LOAD_ADDR: | ||
625 | return (target_ver == AR6003_REV2_VERSION) ? | ||
626 | AR6003_REV2_APP_LOAD_ADDRESS : | ||
627 | 0x1234; | ||
628 | case APP_START_OVERRIDE_ADDR: | ||
629 | return (target_ver == AR6003_REV2_VERSION) ? | ||
630 | AR6003_REV2_APP_START_OVERRIDE : | ||
631 | AR6003_REV3_APP_START_OVERRIDE; | ||
632 | default: | ||
633 | return 0; | ||
634 | } | ||
635 | } | ||
636 | |||
637 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, | ||
638 | u8 **fw, size_t *fw_len) | ||
639 | { | ||
640 | const struct firmware *fw_entry; | ||
641 | int ret; | ||
642 | |||
643 | ret = request_firmware(&fw_entry, filename, ar->dev); | ||
644 | if (ret) | ||
645 | return ret; | ||
646 | |||
647 | *fw_len = fw_entry->size; | ||
648 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | ||
649 | |||
650 | if (*fw == NULL) | ||
651 | ret = -ENOMEM; | ||
652 | |||
653 | release_firmware(fw_entry); | ||
654 | |||
655 | return ret; | ||
656 | } | ||
657 | |||
658 | static int ath6kl_fetch_board_file(struct ath6kl *ar) | ||
659 | { | ||
660 | const char *filename; | ||
661 | int ret; | ||
662 | |||
663 | switch (ar->version.target_ver) { | ||
664 | case AR6003_REV2_VERSION: | ||
665 | filename = AR6003_REV2_BOARD_DATA_FILE; | ||
666 | break; | ||
667 | default: | ||
668 | filename = AR6003_REV3_BOARD_DATA_FILE; | ||
669 | break; | ||
670 | } | ||
671 | |||
672 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | ||
673 | &ar->fw_board_len); | ||
674 | if (ret == 0) { | ||
675 | /* managed to get proper board file */ | ||
676 | return 0; | ||
677 | } | ||
678 | |||
679 | /* there was no proper board file, try to use default instead */ | ||
680 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", | ||
681 | filename, ret); | ||
682 | |||
683 | switch (ar->version.target_ver) { | ||
684 | case AR6003_REV2_VERSION: | ||
685 | filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; | ||
686 | break; | ||
687 | default: | ||
688 | filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; | ||
689 | break; | ||
690 | } | ||
691 | |||
692 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | ||
693 | &ar->fw_board_len); | ||
694 | if (ret) { | ||
695 | ath6kl_err("Failed to get default board file %s: %d\n", | ||
696 | filename, ret); | ||
697 | return ret; | ||
698 | } | ||
699 | |||
700 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); | ||
701 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); | ||
702 | |||
703 | return 0; | ||
704 | } | ||
705 | |||
706 | |||
707 | static int ath6kl_upload_board_file(struct ath6kl *ar) | ||
708 | { | ||
709 | u32 board_address, board_ext_address, param; | ||
710 | int ret; | ||
711 | |||
712 | if (ar->fw_board == NULL) { | ||
713 | ret = ath6kl_fetch_board_file(ar); | ||
714 | if (ret) | ||
715 | return ret; | ||
716 | } | ||
717 | |||
718 | /* Determine where in Target RAM to write Board Data */ | ||
719 | ath6kl_bmi_read(ar, | ||
720 | ath6kl_get_hi_item_addr(ar, | ||
721 | HI_ITEM(hi_board_data)), | ||
722 | (u8 *) &board_address, 4); | ||
723 | ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n", | ||
724 | board_address); | ||
725 | |||
726 | /* determine where in target ram to write extended board data */ | ||
727 | ath6kl_bmi_read(ar, | ||
728 | ath6kl_get_hi_item_addr(ar, | ||
729 | HI_ITEM(hi_board_ext_data)), | ||
730 | (u8 *) &board_ext_address, 4); | ||
731 | |||
732 | ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n", | ||
733 | board_ext_address); | ||
734 | |||
735 | if (board_ext_address == 0) { | ||
736 | ath6kl_err("Failed to get board file target address.\n"); | ||
737 | return -EINVAL; | ||
738 | } | ||
739 | |||
740 | if (ar->fw_board_len == (AR6003_BOARD_DATA_SZ + | ||
741 | AR6003_BOARD_EXT_DATA_SZ)) { | ||
742 | /* write extended board data */ | ||
743 | ret = ath6kl_bmi_write(ar, board_ext_address, | ||
744 | ar->fw_board + AR6003_BOARD_DATA_SZ, | ||
745 | AR6003_BOARD_EXT_DATA_SZ); | ||
746 | |||
747 | if (ret) { | ||
748 | ath6kl_err("Failed to write extended board data: %d\n", | ||
749 | ret); | ||
750 | return ret; | ||
751 | } | ||
752 | |||
753 | /* record that extended board data is initialized */ | ||
754 | param = (AR6003_BOARD_EXT_DATA_SZ << 16) | 1; | ||
755 | ath6kl_bmi_write(ar, | ||
756 | ath6kl_get_hi_item_addr(ar, | ||
757 | HI_ITEM(hi_board_ext_data_config)), | ||
758 | (unsigned char *) ¶m, 4); | ||
759 | } | ||
760 | |||
761 | if (ar->fw_board_len < AR6003_BOARD_DATA_SZ) { | ||
762 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); | ||
763 | ret = -EINVAL; | ||
764 | return ret; | ||
765 | } | ||
766 | |||
767 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, | ||
768 | AR6003_BOARD_DATA_SZ); | ||
769 | |||
770 | if (ret) { | ||
771 | ath6kl_err("Board file bmi write failed: %d\n", ret); | ||
772 | return ret; | ||
773 | } | ||
774 | |||
775 | /* record the fact that Board Data IS initialized */ | ||
776 | param = 1; | ||
777 | ath6kl_bmi_write(ar, | ||
778 | ath6kl_get_hi_item_addr(ar, | ||
779 | HI_ITEM(hi_board_data_initialized)), | ||
780 | (u8 *)¶m, 4); | ||
781 | |||
782 | return ret; | ||
783 | } | ||
784 | |||
785 | static int ath6kl_upload_otp(struct ath6kl *ar) | ||
786 | { | ||
787 | const char *filename; | ||
788 | u32 address, param; | ||
789 | int ret; | ||
790 | |||
791 | switch (ar->version.target_ver) { | ||
792 | case AR6003_REV2_VERSION: | ||
793 | filename = AR6003_REV2_OTP_FILE; | ||
794 | break; | ||
795 | default: | ||
796 | filename = AR6003_REV3_OTP_FILE; | ||
797 | break; | ||
798 | } | ||
799 | |||
800 | if (ar->fw_otp == NULL) { | ||
801 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, | ||
802 | &ar->fw_otp_len); | ||
803 | if (ret) { | ||
804 | ath6kl_err("Failed to get OTP file %s: %d\n", | ||
805 | filename, ret); | ||
806 | return ret; | ||
807 | } | ||
808 | } | ||
809 | |||
810 | address = ath6kl_get_load_address(ar->version.target_ver, | ||
811 | APP_LOAD_ADDR); | ||
812 | |||
813 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, | ||
814 | ar->fw_otp_len); | ||
815 | if (ret) { | ||
816 | ath6kl_err("Failed to upload OTP file: %d\n", ret); | ||
817 | return ret; | ||
818 | } | ||
819 | |||
820 | /* execute the OTP code */ | ||
821 | param = 0; | ||
822 | address = ath6kl_get_load_address(ar->version.target_ver, | ||
823 | APP_START_OVERRIDE_ADDR); | ||
824 | ath6kl_bmi_execute(ar, address, ¶m); | ||
825 | |||
826 | return ret; | ||
827 | } | ||
828 | |||
829 | static int ath6kl_upload_firmware(struct ath6kl *ar) | ||
830 | { | ||
831 | const char *filename; | ||
832 | u32 address; | ||
833 | int ret; | ||
834 | |||
835 | switch (ar->version.target_ver) { | ||
836 | case AR6003_REV2_VERSION: | ||
837 | filename = AR6003_REV2_FIRMWARE_FILE; | ||
838 | break; | ||
839 | default: | ||
840 | filename = AR6003_REV3_FIRMWARE_FILE; | ||
841 | break; | ||
842 | } | ||
843 | |||
844 | if (ar->fw == NULL) { | ||
845 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); | ||
846 | if (ret) { | ||
847 | ath6kl_err("Failed to get firmware file %s: %d\n", | ||
848 | filename, ret); | ||
849 | return ret; | ||
850 | } | ||
851 | } | ||
852 | |||
853 | address = ath6kl_get_load_address(ar->version.target_ver, | ||
854 | APP_LOAD_ADDR); | ||
855 | |||
856 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); | ||
857 | |||
858 | if (ret) { | ||
859 | ath6kl_err("Failed to write firmware: %d\n", ret); | ||
860 | return ret; | ||
861 | } | ||
862 | |||
863 | /* Set starting address for firmware */ | ||
864 | address = ath6kl_get_load_address(ar->version.target_ver, | ||
865 | APP_START_OVERRIDE_ADDR); | ||
866 | ath6kl_bmi_set_app_start(ar, address); | ||
867 | |||
868 | return ret; | ||
869 | } | ||
870 | |||
871 | static int ath6kl_upload_patch(struct ath6kl *ar) | ||
872 | { | ||
873 | const char *filename; | ||
874 | u32 address, param; | ||
875 | int ret; | ||
876 | |||
877 | switch (ar->version.target_ver) { | ||
878 | case AR6003_REV2_VERSION: | ||
879 | filename = AR6003_REV2_PATCH_FILE; | ||
880 | break; | ||
881 | default: | ||
882 | filename = AR6003_REV3_PATCH_FILE; | ||
883 | break; | ||
884 | } | ||
885 | |||
886 | if (ar->fw_patch == NULL) { | ||
887 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, | ||
888 | &ar->fw_patch_len); | ||
889 | if (ret) { | ||
890 | ath6kl_err("Failed to get patch file %s: %d\n", | ||
891 | filename, ret); | ||
892 | return ret; | ||
893 | } | ||
894 | } | ||
895 | |||
896 | address = ath6kl_get_load_address(ar->version.target_ver, | ||
897 | DATASET_PATCH_ADDR); | ||
898 | |||
899 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); | ||
900 | if (ret) { | ||
901 | ath6kl_err("Failed to write patch file: %d\n", ret); | ||
902 | return ret; | ||
903 | } | ||
904 | |||
905 | param = address; | ||
906 | ath6kl_bmi_write(ar, | ||
907 | ath6kl_get_hi_item_addr(ar, | ||
908 | HI_ITEM(hi_dset_list_head)), | ||
909 | (unsigned char *) ¶m, 4); | ||
910 | |||
911 | return 0; | ||
912 | } | ||
913 | |||
914 | static int ath6kl_init_upload(struct ath6kl *ar) | ||
915 | { | ||
916 | u32 param, options, sleep, address; | ||
917 | int status = 0; | ||
918 | |||
919 | if (ar->target_type != TARGET_TYPE_AR6003) | ||
920 | return -EINVAL; | ||
921 | |||
922 | /* temporarily disable system sleep */ | ||
923 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | ||
924 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | ||
925 | if (status) | ||
926 | return status; | ||
927 | |||
928 | options = param; | ||
929 | |||
930 | param |= ATH6KL_OPTION_SLEEP_DISABLE; | ||
931 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
932 | if (status) | ||
933 | return status; | ||
934 | |||
935 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | ||
936 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | ||
937 | if (status) | ||
938 | return status; | ||
939 | |||
940 | sleep = param; | ||
941 | |||
942 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); | ||
943 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
944 | if (status) | ||
945 | return status; | ||
946 | |||
947 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", | ||
948 | options, sleep); | ||
949 | |||
950 | /* program analog PLL register */ | ||
951 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, | ||
952 | 0xF9104001); | ||
953 | if (status) | ||
954 | return status; | ||
955 | |||
956 | /* Run at 80/88MHz by default */ | ||
957 | param = SM(CPU_CLOCK_STANDARD, 1); | ||
958 | |||
959 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; | ||
960 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
961 | if (status) | ||
962 | return status; | ||
963 | |||
964 | param = 0; | ||
965 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; | ||
966 | param = SM(LPO_CAL_ENABLE, 1); | ||
967 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
968 | if (status) | ||
969 | return status; | ||
970 | |||
971 | /* WAR to avoid SDIO CRC err */ | ||
972 | if (ar->version.target_ver == AR6003_REV2_VERSION) { | ||
973 | ath6kl_err("temporary war to avoid sdio crc error\n"); | ||
974 | |||
975 | param = 0x20; | ||
976 | |||
977 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; | ||
978 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
979 | if (status) | ||
980 | return status; | ||
981 | |||
982 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; | ||
983 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
984 | if (status) | ||
985 | return status; | ||
986 | |||
987 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; | ||
988 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
989 | if (status) | ||
990 | return status; | ||
991 | |||
992 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; | ||
993 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
994 | if (status) | ||
995 | return status; | ||
996 | } | ||
997 | |||
998 | /* write EEPROM data to Target RAM */ | ||
999 | status = ath6kl_upload_board_file(ar); | ||
1000 | if (status) | ||
1001 | return status; | ||
1002 | |||
1003 | /* transfer One time Programmable data */ | ||
1004 | status = ath6kl_upload_otp(ar); | ||
1005 | if (status) | ||
1006 | return status; | ||
1007 | |||
1008 | /* Download Target firmware */ | ||
1009 | status = ath6kl_upload_firmware(ar); | ||
1010 | if (status) | ||
1011 | return status; | ||
1012 | |||
1013 | status = ath6kl_upload_patch(ar); | ||
1014 | if (status) | ||
1015 | return status; | ||
1016 | |||
1017 | /* Restore system sleep */ | ||
1018 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | ||
1019 | status = ath6kl_bmi_reg_write(ar, address, sleep); | ||
1020 | if (status) | ||
1021 | return status; | ||
1022 | |||
1023 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | ||
1024 | param = options | 0x20; | ||
1025 | status = ath6kl_bmi_reg_write(ar, address, param); | ||
1026 | if (status) | ||
1027 | return status; | ||
1028 | |||
1029 | /* Configure GPIO AR6003 UART */ | ||
1030 | param = CONFIG_AR600x_DEBUG_UART_TX_PIN; | ||
1031 | status = ath6kl_bmi_write(ar, | ||
1032 | ath6kl_get_hi_item_addr(ar, | ||
1033 | HI_ITEM(hi_dbg_uart_txpin)), | ||
1034 | (u8 *)¶m, 4); | ||
1035 | |||
1036 | return status; | ||
1037 | } | ||
1038 | |||
1039 | static int ath6kl_init(struct net_device *dev) | ||
1040 | { | ||
1041 | struct ath6kl *ar = ath6kl_priv(dev); | ||
1042 | int status = 0; | ||
1043 | s32 timeleft; | ||
1044 | |||
1045 | if (!ar) | ||
1046 | return -EIO; | ||
1047 | |||
1048 | /* Do we need to finish the BMI phase */ | ||
1049 | if (ath6kl_bmi_done(ar)) { | ||
1050 | status = -EIO; | ||
1051 | goto ath6kl_init_done; | ||
1052 | } | ||
1053 | |||
1054 | /* Indicate that WMI is enabled (although not ready yet) */ | ||
1055 | set_bit(WMI_ENABLED, &ar->flag); | ||
1056 | ar->wmi = ath6kl_wmi_init((void *) ar); | ||
1057 | if (!ar->wmi) { | ||
1058 | ath6kl_err("failed to initialize wmi\n"); | ||
1059 | status = -EIO; | ||
1060 | goto ath6kl_init_done; | ||
1061 | } | ||
1062 | |||
1063 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); | ||
1064 | |||
1065 | /* | ||
1066 | * The reason we have to wait for the target here is that the | ||
1067 | * driver layer has to init BMI in order to set the host block | ||
1068 | * size. | ||
1069 | */ | ||
1070 | if (htc_wait_target(ar->htc_target)) { | ||
1071 | status = -EIO; | ||
1072 | goto err_wmi_cleanup; | ||
1073 | } | ||
1074 | |||
1075 | if (ath6kl_init_service_ep(ar)) { | ||
1076 | status = -EIO; | ||
1077 | goto err_cleanup_scatter; | ||
1078 | } | ||
1079 | |||
1080 | /* setup access class priority mappings */ | ||
1081 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ | ||
1082 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; | ||
1083 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; | ||
1084 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ | ||
1085 | |||
1086 | /* give our connected endpoints some buffers */ | ||
1087 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); | ||
1088 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); | ||
1089 | |||
1090 | /* allocate some buffers that handle larger AMSDU frames */ | ||
1091 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); | ||
1092 | |||
1093 | /* setup credit distribution */ | ||
1094 | ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); | ||
1095 | |||
1096 | ath6kl_cookie_init(ar); | ||
1097 | |||
1098 | /* start HTC */ | ||
1099 | status = htc_start(ar->htc_target); | ||
1100 | |||
1101 | if (status) { | ||
1102 | ath6kl_cookie_cleanup(ar); | ||
1103 | goto err_rxbuf_cleanup; | ||
1104 | } | ||
1105 | |||
1106 | /* Wait for Wmi event to be ready */ | ||
1107 | timeleft = wait_event_interruptible_timeout(ar->event_wq, | ||
1108 | test_bit(WMI_READY, | ||
1109 | &ar->flag), | ||
1110 | WMI_TIMEOUT); | ||
1111 | |||
1112 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { | ||
1113 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", | ||
1114 | ATH6KL_ABI_VERSION, ar->version.abi_ver); | ||
1115 | status = -EIO; | ||
1116 | goto err_htc_stop; | ||
1117 | } | ||
1118 | |||
1119 | if (!timeleft || signal_pending(current)) { | ||
1120 | ath6kl_err("wmi is not ready or wait was interrupted\n"); | ||
1121 | status = -EIO; | ||
1122 | goto err_htc_stop; | ||
1123 | } | ||
1124 | |||
1125 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); | ||
1126 | |||
1127 | /* communicate the wmi protocol verision to the target */ | ||
1128 | if ((ath6kl_set_host_app_area(ar)) != 0) | ||
1129 | ath6kl_err("unable to set the host app area\n"); | ||
1130 | |||
1131 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | | ||
1132 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; | ||
1133 | |||
1134 | status = ath6kl_target_config_wlan_params(ar); | ||
1135 | if (!status) | ||
1136 | goto ath6kl_init_done; | ||
1137 | |||
1138 | err_htc_stop: | ||
1139 | htc_stop(ar->htc_target); | ||
1140 | err_rxbuf_cleanup: | ||
1141 | htc_flush_rx_buf(ar->htc_target); | ||
1142 | ath6kl_cleanup_amsdu_rxbufs(ar); | ||
1143 | err_cleanup_scatter: | ||
1144 | ath6kl_hif_cleanup_scatter(ar); | ||
1145 | err_wmi_cleanup: | ||
1146 | ath6kl_wmi_shutdown(ar->wmi); | ||
1147 | clear_bit(WMI_ENABLED, &ar->flag); | ||
1148 | ar->wmi = NULL; | ||
1149 | |||
1150 | ath6kl_init_done: | ||
1151 | return status; | ||
1152 | } | ||
1153 | |||
1154 | int ath6kl_core_init(struct ath6kl *ar) | ||
1155 | { | ||
1156 | int ret = 0; | ||
1157 | struct ath6kl_bmi_target_info targ_info; | ||
1158 | |||
1159 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); | ||
1160 | if (!ar->ath6kl_wq) | ||
1161 | return -ENOMEM; | ||
1162 | |||
1163 | ret = ath6kl_bmi_init(ar); | ||
1164 | if (ret) | ||
1165 | goto err_wq; | ||
1166 | |||
1167 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); | ||
1168 | if (ret) | ||
1169 | goto err_bmi_cleanup; | ||
1170 | |||
1171 | ar->version.target_ver = le32_to_cpu(targ_info.version); | ||
1172 | ar->target_type = le32_to_cpu(targ_info.type); | ||
1173 | ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version); | ||
1174 | |||
1175 | ret = ath6kl_configure_target(ar); | ||
1176 | if (ret) | ||
1177 | goto err_bmi_cleanup; | ||
1178 | |||
1179 | ar->htc_target = htc_create(ar); | ||
1180 | |||
1181 | if (!ar->htc_target) { | ||
1182 | ret = -ENOMEM; | ||
1183 | goto err_bmi_cleanup; | ||
1184 | } | ||
1185 | |||
1186 | ar->aggr_cntxt = aggr_init(ar->net_dev); | ||
1187 | if (!ar->aggr_cntxt) { | ||
1188 | ath6kl_err("failed to initialize aggr\n"); | ||
1189 | ret = -ENOMEM; | ||
1190 | goto err_htc_cleanup; | ||
1191 | } | ||
1192 | |||
1193 | ret = ath6kl_init_upload(ar); | ||
1194 | if (ret) | ||
1195 | goto err_htc_cleanup; | ||
1196 | |||
1197 | ret = ath6kl_init(ar->net_dev); | ||
1198 | if (ret) | ||
1199 | goto err_htc_cleanup; | ||
1200 | |||
1201 | /* This runs the init function if registered */ | ||
1202 | ret = register_netdev(ar->net_dev); | ||
1203 | if (ret) { | ||
1204 | ath6kl_err("register_netdev failed\n"); | ||
1205 | ath6kl_destroy(ar->net_dev, 0); | ||
1206 | return ret; | ||
1207 | } | ||
1208 | |||
1209 | set_bit(NETDEV_REGISTERED, &ar->flag); | ||
1210 | |||
1211 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", | ||
1212 | __func__, ar->net_dev->name, ar->net_dev, ar); | ||
1213 | |||
1214 | return ret; | ||
1215 | |||
1216 | err_htc_cleanup: | ||
1217 | htc_cleanup(ar->htc_target); | ||
1218 | err_bmi_cleanup: | ||
1219 | ath6kl_bmi_cleanup(ar); | ||
1220 | err_wq: | ||
1221 | destroy_workqueue(ar->ath6kl_wq); | ||
1222 | return ret; | ||
1223 | } | ||
1224 | |||
1225 | void ath6kl_stop_txrx(struct ath6kl *ar) | ||
1226 | { | ||
1227 | struct net_device *ndev = ar->net_dev; | ||
1228 | |||
1229 | if (!ndev) | ||
1230 | return; | ||
1231 | |||
1232 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); | ||
1233 | |||
1234 | if (down_interruptible(&ar->sem)) { | ||
1235 | ath6kl_err("down_interruptible failed\n"); | ||
1236 | return; | ||
1237 | } | ||
1238 | |||
1239 | if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR) | ||
1240 | ath6kl_stop_endpoint(ndev, false, true); | ||
1241 | |||
1242 | ar->wlan_state = WLAN_DISABLED; | ||
1243 | } | ||
1244 | |||
1245 | /* | ||
1246 | * We need to differentiate between the surprise and planned removal of the | ||
1247 | * device because of the following consideration: | ||
1248 | * | ||
1249 | * - In case of surprise removal, the hcd already frees up the pending | ||
1250 | * for the device and hence there is no need to unregister the function | ||
1251 | * driver inorder to get these requests. For planned removal, the function | ||
1252 | * driver has to explicitly unregister itself to have the hcd return all the | ||
1253 | * pending requests before the data structures for the devices are freed up. | ||
1254 | * Note that as per the current implementation, the function driver will | ||
1255 | * end up releasing all the devices since there is no API to selectively | ||
1256 | * release a particular device. | ||
1257 | * | ||
1258 | * - Certain commands issued to the target can be skipped for surprise | ||
1259 | * removal since they will anyway not go through. | ||
1260 | */ | ||
1261 | void ath6kl_destroy(struct net_device *dev, unsigned int unregister) | ||
1262 | { | ||
1263 | struct ath6kl *ar; | ||
1264 | |||
1265 | if (!dev || !ath6kl_priv(dev)) { | ||
1266 | ath6kl_err("failed to get device structure\n"); | ||
1267 | return; | ||
1268 | } | ||
1269 | |||
1270 | ar = ath6kl_priv(dev); | ||
1271 | |||
1272 | destroy_workqueue(ar->ath6kl_wq); | ||
1273 | |||
1274 | if (ar->htc_target) | ||
1275 | htc_cleanup(ar->htc_target); | ||
1276 | |||
1277 | aggr_module_destroy(ar->aggr_cntxt); | ||
1278 | |||
1279 | ath6kl_cookie_cleanup(ar); | ||
1280 | |||
1281 | ath6kl_cleanup_amsdu_rxbufs(ar); | ||
1282 | |||
1283 | ath6kl_bmi_cleanup(ar); | ||
1284 | |||
1285 | if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) { | ||
1286 | unregister_netdev(dev); | ||
1287 | clear_bit(NETDEV_REGISTERED, &ar->flag); | ||
1288 | } | ||
1289 | |||
1290 | free_netdev(dev); | ||
1291 | |||
1292 | ath6kl_cfg80211_deinit(ar); | ||
1293 | } | ||