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-rw-r--r--drivers/net/wireless/ath/ath5k/ahb.c44
-rw-r--r--drivers/net/wireless/ath/ath5k/ani.c84
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h272
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c31
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c1138
-rw-r--r--drivers/net/wireless/ath/ath5k/base.h205
-rw-r--r--drivers/net/wireless/ath/ath5k/caps.c45
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.c218
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.h21
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.c10
-rw-r--r--drivers/net/wireless/ath/ath5k/dma.c12
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c4
-rw-r--r--drivers/net/wireless/ath/ath5k/initvals.c2
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c68
-rw-r--r--drivers/net/wireless/ath/ath5k/mac80211-ops.c257
-rw-r--r--drivers/net/wireless/ath/ath5k/pci.c38
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c24
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c41
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c9
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c44
-rw-r--r--drivers/net/wireless/ath/ath5k/rfkill.c65
-rw-r--r--drivers/net/wireless/ath/ath5k/sysfs.c32
-rw-r--r--drivers/net/wireless/ath/ath5k/trace.h12
23 files changed, 1257 insertions, 1419 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ahb.c b/drivers/net/wireless/ath/ath5k/ahb.c
index ba682a0b2dd8..9f69a4c9a3f3 100644
--- a/drivers/net/wireless/ath/ath5k/ahb.c
+++ b/drivers/net/wireless/ath/ath5k/ahb.c
@@ -35,8 +35,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
35static bool 35static bool
36ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 36ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
37{ 37{
38 struct ath5k_softc *sc = common->priv; 38 struct ath5k_hw *ah = common->priv;
39 struct platform_device *pdev = to_platform_device(sc->dev); 39 struct platform_device *pdev = to_platform_device(ah->dev);
40 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 40 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
41 u16 *eeprom, *eeprom_end; 41 u16 *eeprom, *eeprom_end;
42 42
@@ -56,8 +56,7 @@ ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
56 56
57int ath5k_hw_read_srev(struct ath5k_hw *ah) 57int ath5k_hw_read_srev(struct ath5k_hw *ah)
58{ 58{
59 struct ath5k_softc *sc = ah->ah_sc; 59 struct platform_device *pdev = to_platform_device(ah->dev);
60 struct platform_device *pdev = to_platform_device(sc->dev);
61 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 60 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
62 ah->ah_mac_srev = bcfg->devid; 61 ah->ah_mac_srev = bcfg->devid;
63 return 0; 62 return 0;
@@ -65,12 +64,11 @@ int ath5k_hw_read_srev(struct ath5k_hw *ah)
65 64
66static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) 65static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
67{ 66{
68 struct ath5k_softc *sc = ah->ah_sc; 67 struct platform_device *pdev = to_platform_device(ah->dev);
69 struct platform_device *pdev = to_platform_device(sc->dev);
70 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 68 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
71 u8 *cfg_mac; 69 u8 *cfg_mac;
72 70
73 if (to_platform_device(sc->dev)->id == 0) 71 if (to_platform_device(ah->dev)->id == 0)
74 cfg_mac = bcfg->config->wlan0_mac; 72 cfg_mac = bcfg->config->wlan0_mac;
75 else 73 else
76 cfg_mac = bcfg->config->wlan1_mac; 74 cfg_mac = bcfg->config->wlan1_mac;
@@ -90,7 +88,7 @@ static const struct ath_bus_ops ath_ahb_bus_ops = {
90static int ath_ahb_probe(struct platform_device *pdev) 88static int ath_ahb_probe(struct platform_device *pdev)
91{ 89{
92 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 90 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
93 struct ath5k_softc *sc; 91 struct ath5k_hw *ah;
94 struct ieee80211_hw *hw; 92 struct ieee80211_hw *hw;
95 struct resource *res; 93 struct resource *res;
96 void __iomem *mem; 94 void __iomem *mem;
@@ -127,19 +125,19 @@ static int ath_ahb_probe(struct platform_device *pdev)
127 125
128 irq = res->start; 126 irq = res->start;
129 127
130 hw = ieee80211_alloc_hw(sizeof(struct ath5k_softc), &ath5k_hw_ops); 128 hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
131 if (hw == NULL) { 129 if (hw == NULL) {
132 dev_err(&pdev->dev, "no memory for ieee80211_hw\n"); 130 dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
133 ret = -ENOMEM; 131 ret = -ENOMEM;
134 goto err_out; 132 goto err_out;
135 } 133 }
136 134
137 sc = hw->priv; 135 ah = hw->priv;
138 sc->hw = hw; 136 ah->hw = hw;
139 sc->dev = &pdev->dev; 137 ah->dev = &pdev->dev;
140 sc->iobase = mem; 138 ah->iobase = mem;
141 sc->irq = irq; 139 ah->irq = irq;
142 sc->devid = bcfg->devid; 140 ah->devid = bcfg->devid;
143 141
144 if (bcfg->devid >= AR5K_SREV_AR2315_R6) { 142 if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
145 /* Enable WMAC AHB arbitration */ 143 /* Enable WMAC AHB arbitration */
@@ -155,7 +153,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
155 /* Enable WMAC DMA access (assuming 5312 or 231x*/ 153 /* Enable WMAC DMA access (assuming 5312 or 231x*/
156 /* TODO: check other platforms */ 154 /* TODO: check other platforms */
157 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE); 155 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
158 if (to_platform_device(sc->dev)->id == 0) 156 if (to_platform_device(ah->dev)->id == 0)
159 reg |= AR5K_AR5312_ENABLE_WLAN0; 157 reg |= AR5K_AR5312_ENABLE_WLAN0;
160 else 158 else
161 reg |= AR5K_AR5312_ENABLE_WLAN1; 159 reg |= AR5K_AR5312_ENABLE_WLAN1;
@@ -166,13 +164,13 @@ static int ath_ahb_probe(struct platform_device *pdev)
166 * used as pass-through. Disable 2 GHz support in the 164 * used as pass-through. Disable 2 GHz support in the
167 * driver for it 165 * driver for it
168 */ 166 */
169 if (to_platform_device(sc->dev)->id == 0 && 167 if (to_platform_device(ah->dev)->id == 0 &&
170 (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) == 168 (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
171 (BD_WLAN1 | BD_WLAN0)) 169 (BD_WLAN1 | BD_WLAN0))
172 __set_bit(ATH_STAT_2G_DISABLED, sc->status); 170 __set_bit(ATH_STAT_2G_DISABLED, ah->status);
173 } 171 }
174 172
175 ret = ath5k_init_softc(sc, &ath_ahb_bus_ops); 173 ret = ath5k_init_softc(ah, &ath_ahb_bus_ops);
176 if (ret != 0) { 174 if (ret != 0) {
177 dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret); 175 dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
178 ret = -ENODEV; 176 ret = -ENODEV;
@@ -194,13 +192,13 @@ static int ath_ahb_remove(struct platform_device *pdev)
194{ 192{
195 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 193 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
196 struct ieee80211_hw *hw = platform_get_drvdata(pdev); 194 struct ieee80211_hw *hw = platform_get_drvdata(pdev);
197 struct ath5k_softc *sc; 195 struct ath5k_hw *ah;
198 u32 reg; 196 u32 reg;
199 197
200 if (!hw) 198 if (!hw)
201 return 0; 199 return 0;
202 200
203 sc = hw->priv; 201 ah = hw->priv;
204 202
205 if (bcfg->devid >= AR5K_SREV_AR2315_R6) { 203 if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
206 /* Disable WMAC AHB arbitration */ 204 /* Disable WMAC AHB arbitration */
@@ -210,14 +208,14 @@ static int ath_ahb_remove(struct platform_device *pdev)
210 } else { 208 } else {
211 /*Stop DMA access */ 209 /*Stop DMA access */
212 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE); 210 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
213 if (to_platform_device(sc->dev)->id == 0) 211 if (to_platform_device(ah->dev)->id == 0)
214 reg &= ~AR5K_AR5312_ENABLE_WLAN0; 212 reg &= ~AR5K_AR5312_ENABLE_WLAN0;
215 else 213 else
216 reg &= ~AR5K_AR5312_ENABLE_WLAN1; 214 reg &= ~AR5K_AR5312_ENABLE_WLAN1;
217 __raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE); 215 __raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE);
218 } 216 }
219 217
220 ath5k_deinit_softc(sc); 218 ath5k_deinit_softc(ah);
221 platform_set_drvdata(pdev, NULL); 219 platform_set_drvdata(pdev, NULL);
222 ieee80211_free_hw(hw); 220 ieee80211_free_hw(hw);
223 221
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c
index 2f0b967a6d8e..603ae15f139b 100644
--- a/drivers/net/wireless/ath/ath5k/ani.c
+++ b/drivers/net/wireless/ath/ath5k/ani.c
@@ -74,7 +74,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
74 static const s8 fr[] = { -78, -80 }; 74 static const s8 fr[] = { -78, -80 };
75#endif 75#endif
76 if (level < 0 || level >= ARRAY_SIZE(sz)) { 76 if (level < 0 || level >= ARRAY_SIZE(sz)) {
77 ATH5K_ERR(ah->ah_sc, "noise immunity level %d out of range", 77 ATH5K_ERR(ah, "noise immunity level %d out of range",
78 level); 78 level);
79 return; 79 return;
80 } 80 }
@@ -88,8 +88,8 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
89 AR5K_PHY_SIG_FIRPWR, fr[level]); 89 AR5K_PHY_SIG_FIRPWR, fr[level]);
90 90
91 ah->ah_sc->ani_state.noise_imm_level = level; 91 ah->ani_state.noise_imm_level = level;
92 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 92 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
93} 93}
94 94
95 95
@@ -105,8 +105,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; 105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
106 106
107 if (level < 0 || level >= ARRAY_SIZE(val) || 107 if (level < 0 || level >= ARRAY_SIZE(val) ||
108 level > ah->ah_sc->ani_state.max_spur_level) { 108 level > ah->ani_state.max_spur_level) {
109 ATH5K_ERR(ah->ah_sc, "spur immunity level %d out of range", 109 ATH5K_ERR(ah, "spur immunity level %d out of range",
110 level); 110 level);
111 return; 111 return;
112 } 112 }
@@ -114,8 +114,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR, 114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR,
115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]); 115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]);
116 116
117 ah->ah_sc->ani_state.spur_level = level; 117 ah->ani_state.spur_level = level;
118 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 118 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
119} 119}
120 120
121 121
@@ -130,15 +130,15 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level)
130 static const int val[] = { 0, 4, 8 }; 130 static const int val[] = { 0, 4, 8 };
131 131
132 if (level < 0 || level >= ARRAY_SIZE(val)) { 132 if (level < 0 || level >= ARRAY_SIZE(val)) {
133 ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); 133 ATH5K_ERR(ah, "firstep level %d out of range", level);
134 return; 134 return;
135 } 135 }
136 136
137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
138 AR5K_PHY_SIG_FIRSTEP, val[level]); 138 AR5K_PHY_SIG_FIRSTEP, val[level]);
139 139
140 ah->ah_sc->ani_state.firstep_level = level; 140 ah->ani_state.firstep_level = level;
141 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 141 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
142} 142}
143 143
144 144
@@ -178,8 +178,8 @@ ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on)
178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, 178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN); 179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN);
180 180
181 ah->ah_sc->ani_state.ofdm_weak_sig = on; 181 ah->ani_state.ofdm_weak_sig = on;
182 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 182 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
183 on ? "on" : "off"); 183 on ? "on" : "off");
184} 184}
185 185
@@ -195,8 +195,8 @@ ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on)
195 static const int val[] = { 8, 6 }; 195 static const int val[] = { 8, 6 };
196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, 196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR,
197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); 197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]);
198 ah->ah_sc->ani_state.cck_weak_sig = on; 198 ah->ani_state.cck_weak_sig = on;
199 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 199 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
200 on ? "on" : "off"); 200 on ? "on" : "off");
201} 201}
202 202
@@ -218,7 +218,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
218{ 218{
219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
220 220
221 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", 221 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "raise immunity (%s)",
222 ofdm_trigger ? "ODFM" : "CCK"); 222 ofdm_trigger ? "ODFM" : "CCK");
223 223
224 /* first: raise noise immunity */ 224 /* first: raise noise immunity */
@@ -229,13 +229,13 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
229 229
230 /* only OFDM: raise spur immunity level */ 230 /* only OFDM: raise spur immunity level */
231 if (ofdm_trigger && 231 if (ofdm_trigger &&
232 as->spur_level < ah->ah_sc->ani_state.max_spur_level) { 232 as->spur_level < ah->ani_state.max_spur_level) {
233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1); 233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1);
234 return; 234 return;
235 } 235 }
236 236
237 /* AP mode */ 237 /* AP mode */
238 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 238 if (ah->opmode == NL80211_IFTYPE_AP) {
239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL) 239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1); 240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
241 return; 241 return;
@@ -248,7 +248,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
248 * don't shut out a remote node by raising immunity too high. */ 248 * don't shut out a remote node by raising immunity too high. */
249 249
250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) { 250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) {
251 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 251 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
252 "beacon RSSI high"); 252 "beacon RSSI high");
253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak 253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak
254 * signal detection */ 254 * signal detection */
@@ -265,7 +265,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) { 265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
266 /* beacon RSSI in mid range, we need OFDM weak signal detect, 266 /* beacon RSSI in mid range, we need OFDM weak signal detect,
267 * but can raise firstep level */ 267 * but can raise firstep level */
268 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 268 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
269 "beacon RSSI mid"); 269 "beacon RSSI mid");
270 if (ofdm_trigger && as->ofdm_weak_sig == false) 270 if (ofdm_trigger && as->ofdm_weak_sig == false)
271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
@@ -275,7 +275,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) { 275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) {
276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal 276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal
277 * detect and zero firstep level to maximize CCK sensitivity */ 277 * detect and zero firstep level to maximize CCK sensitivity */
278 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 278 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
279 "beacon RSSI low, 2GHz"); 279 "beacon RSSI low, 2GHz");
280 if (ofdm_trigger && as->ofdm_weak_sig == true) 280 if (ofdm_trigger && as->ofdm_weak_sig == true)
281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
@@ -303,9 +303,9 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
303{ 303{
304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
305 305
306 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); 306 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "lower immunity");
307 307
308 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 308 if (ah->opmode == NL80211_IFTYPE_AP) {
309 /* AP mode */ 309 /* AP mode */
310 if (as->firstep_level > 0) { 310 if (as->firstep_level > 0) {
311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1); 311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1);
@@ -464,7 +464,7 @@ ath5k_ani_period_restart(struct ath5k_hw *ah, struct ath5k_ani_state *as)
464void 464void
465ath5k_ani_calibration(struct ath5k_hw *ah) 465ath5k_ani_calibration(struct ath5k_hw *ah)
466{ 466{
467 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 467 struct ath5k_ani_state *as = &ah->ani_state;
468 int listen, ofdm_high, ofdm_low, cck_high, cck_low; 468 int listen, ofdm_high, ofdm_low, cck_high, cck_low;
469 469
470 /* get listen time since last call and add it to the counter because we 470 /* get listen time since last call and add it to the counter because we
@@ -483,9 +483,9 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000; 483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000;
484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000; 484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000;
485 485
486 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 486 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
487 "listen %d (now %d)", as->listen_time, listen); 487 "listen %d (now %d)", as->listen_time, listen);
488 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 488 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
489 "check high ofdm %d/%d cck %d/%d", 489 "check high ofdm %d/%d cck %d/%d",
490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high); 490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high);
491 491
@@ -498,7 +498,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) { 498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) {
499 /* If more than 5 (TODO: why 5?) periods have passed and we got 499 /* If more than 5 (TODO: why 5?) periods have passed and we got
500 * relatively little errors we can try to lower immunity */ 500 * relatively little errors we can try to lower immunity */
501 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 501 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
502 "check low ofdm %d/%d cck %d/%d", 502 "check low ofdm %d/%d cck %d/%d",
503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low); 503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low);
504 504
@@ -525,7 +525,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
525void 525void
526ath5k_ani_mib_intr(struct ath5k_hw *ah) 526ath5k_ani_mib_intr(struct ath5k_hw *ah)
527{ 527{
528 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 528 struct ath5k_ani_state *as = &ah->ani_state;
529 529
530 /* nothing to do here if HW does not have PHY error counters - they 530 /* nothing to do here if HW does not have PHY error counters - they
531 * can't be the reason for the MIB interrupt then */ 531 * can't be the reason for the MIB interrupt then */
@@ -536,7 +536,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT); 536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT);
537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT); 537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT);
538 538
539 if (ah->ah_sc->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO) 539 if (ah->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO)
540 return; 540 return;
541 541
542 /* If one of the errors triggered, we can get a superfluous second 542 /* If one of the errors triggered, we can get a superfluous second
@@ -547,7 +547,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
547 547
548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH || 548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH ||
549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
550 tasklet_schedule(&ah->ah_sc->ani_tasklet); 550 tasklet_schedule(&ah->ani_tasklet);
551} 551}
552 552
553 553
@@ -561,16 +561,16 @@ void
561ath5k_ani_phy_error_report(struct ath5k_hw *ah, 561ath5k_ani_phy_error_report(struct ath5k_hw *ah,
562 enum ath5k_phy_error_code phyerr) 562 enum ath5k_phy_error_code phyerr)
563{ 563{
564 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 564 struct ath5k_ani_state *as = &ah->ani_state;
565 565
566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) { 566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) {
567 as->ofdm_errors++; 567 as->ofdm_errors++;
568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH) 568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH)
569 tasklet_schedule(&ah->ah_sc->ani_tasklet); 569 tasklet_schedule(&ah->ani_tasklet);
570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) { 570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) {
571 as->cck_errors++; 571 as->cck_errors++;
572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
573 tasklet_schedule(&ah->ah_sc->ani_tasklet); 573 tasklet_schedule(&ah->ani_tasklet);
574 } 574 }
575} 575}
576 576
@@ -631,24 +631,24 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
631 return; 631 return;
632 632
633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) { 633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) {
634 ATH5K_ERR(ah->ah_sc, "ANI mode %d out of range", mode); 634 ATH5K_ERR(ah, "ANI mode %d out of range", mode);
635 return; 635 return;
636 } 636 }
637 637
638 /* clear old state information */ 638 /* clear old state information */
639 memset(&ah->ah_sc->ani_state, 0, sizeof(ah->ah_sc->ani_state)); 639 memset(&ah->ani_state, 0, sizeof(ah->ani_state));
640 640
641 /* older hardware has more spur levels than newer */ 641 /* older hardware has more spur levels than newer */
642 if (ah->ah_mac_srev < AR5K_SREV_AR2414) 642 if (ah->ah_mac_srev < AR5K_SREV_AR2414)
643 ah->ah_sc->ani_state.max_spur_level = 7; 643 ah->ani_state.max_spur_level = 7;
644 else 644 else
645 ah->ah_sc->ani_state.max_spur_level = 2; 645 ah->ani_state.max_spur_level = 2;
646 646
647 /* initial values for our ani parameters */ 647 /* initial values for our ani parameters */
648 if (mode == ATH5K_ANI_MODE_OFF) { 648 if (mode == ATH5K_ANI_MODE_OFF) {
649 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI off\n"); 649 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI off\n");
650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) { 650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) {
651 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 651 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
652 "ANI manual low -> high sensitivity\n"); 652 "ANI manual low -> high sensitivity\n");
653 ath5k_ani_set_noise_immunity_level(ah, 0); 653 ath5k_ani_set_noise_immunity_level(ah, 0);
654 ath5k_ani_set_spur_immunity_level(ah, 0); 654 ath5k_ani_set_spur_immunity_level(ah, 0);
@@ -656,17 +656,17 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
657 ath5k_ani_set_cck_weak_signal_detection(ah, true); 657 ath5k_ani_set_cck_weak_signal_detection(ah, true);
658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) { 658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) {
659 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 659 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
660 "ANI manual high -> low sensitivity\n"); 660 "ANI manual high -> low sensitivity\n");
661 ath5k_ani_set_noise_immunity_level(ah, 661 ath5k_ani_set_noise_immunity_level(ah,
662 ATH5K_ANI_MAX_NOISE_IMM_LVL); 662 ATH5K_ANI_MAX_NOISE_IMM_LVL);
663 ath5k_ani_set_spur_immunity_level(ah, 663 ath5k_ani_set_spur_immunity_level(ah,
664 ah->ah_sc->ani_state.max_spur_level); 664 ah->ani_state.max_spur_level);
665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
667 ath5k_ani_set_cck_weak_signal_detection(ah, false); 667 ath5k_ani_set_cck_weak_signal_detection(ah, false);
668 } else if (mode == ATH5K_ANI_MODE_AUTO) { 668 } else if (mode == ATH5K_ANI_MODE_AUTO) {
669 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI auto\n"); 669 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI auto\n");
670 ath5k_ani_set_noise_immunity_level(ah, 0); 670 ath5k_ani_set_noise_immunity_level(ah, 0);
671 ath5k_ani_set_spur_immunity_level(ah, 0); 671 ath5k_ani_set_spur_immunity_level(ah, 0);
672 ath5k_ani_set_firstep_level(ah, 0); 672 ath5k_ani_set_firstep_level(ah, 0);
@@ -692,7 +692,7 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
692 ~AR5K_RX_FILTER_PHYERR); 692 ~AR5K_RX_FILTER_PHYERR);
693 } 693 }
694 694
695 ah->ah_sc->ani_state.ani_mode = mode; 695 ah->ani_state.ani_mode = mode;
696} 696}
697 697
698 698
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index 8ff17941bb28..277d5cbe0068 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -24,8 +24,10 @@
24#define CHAN_DEBUG 0 24#define CHAN_DEBUG 0
25 25
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/interrupt.h>
27#include <linux/types.h> 28#include <linux/types.h>
28#include <linux/average.h> 29#include <linux/average.h>
30#include <linux/leds.h>
29#include <net/mac80211.h> 31#include <net/mac80211.h>
30 32
31/* RX/TX descriptor hw structs 33/* RX/TX descriptor hw structs
@@ -36,7 +38,9 @@
36 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities) 38 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities)
37 * and clean up common bits, then introduce set/get functions in eeprom.c */ 39 * and clean up common bits, then introduce set/get functions in eeprom.c */
38#include "eeprom.h" 40#include "eeprom.h"
41#include "debug.h"
39#include "../ath.h" 42#include "../ath.h"
43#include "ani.h"
40 44
41/* PCI IDs */ 45/* PCI IDs */
42#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */ 46#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */
@@ -538,6 +542,27 @@ enum ath5k_tx_queue_id {
538#define AR5K_TXQ_FLAG_COMPRESSION_ENABLE 0x2000 /* Enable hw compression -not implemented-*/ 542#define AR5K_TXQ_FLAG_COMPRESSION_ENABLE 0x2000 /* Enable hw compression -not implemented-*/
539 543
540/* 544/*
545 * Data transmit queue state. One of these exists for each
546 * hardware transmit queue. Packets sent to us from above
547 * are assigned to queues based on their priority. Not all
548 * devices support a complete set of hardware transmit queues.
549 * For those devices the array sc_ac2q will map multiple
550 * priorities to fewer hardware queues (typically all to one
551 * hardware queue).
552 */
553struct ath5k_txq {
554 unsigned int qnum; /* hardware q number */
555 u32 *link; /* link ptr in last TX desc */
556 struct list_head q; /* transmit queue */
557 spinlock_t lock; /* lock on q and link */
558 bool setup;
559 int txq_len; /* number of queued buffers */
560 int txq_max; /* max allowed num of queued buffers */
561 bool txq_poll_mark;
562 unsigned int txq_stuck; /* informational counter */
563};
564
565/*
541 * A struct to hold tx queue's parameters 566 * A struct to hold tx queue's parameters
542 */ 567 */
543struct ath5k_txq_info { 568struct ath5k_txq_info {
@@ -947,35 +972,6 @@ enum ath5k_power_mode {
947#define AR5K_SOFTLED_ON 0 972#define AR5K_SOFTLED_ON 0
948#define AR5K_SOFTLED_OFF 1 973#define AR5K_SOFTLED_OFF 1
949 974
950/*
951 * Chipset capabilities -see ath5k_hw_get_capability-
952 * get_capability function is not yet fully implemented
953 * in ath5k so most of these don't work yet...
954 * TODO: Implement these & merge with _TUNE_ stuff above
955 */
956enum ath5k_capability_type {
957 AR5K_CAP_REG_DMN = 0, /* Used to get current reg. domain id */
958 AR5K_CAP_TKIP_MIC = 2, /* Can handle TKIP MIC in hardware */
959 AR5K_CAP_TKIP_SPLIT = 3, /* TKIP uses split keys */
960 AR5K_CAP_PHYCOUNTERS = 4, /* PHY error counters */
961 AR5K_CAP_DIVERSITY = 5, /* Supports fast diversity */
962 AR5K_CAP_NUM_TXQUEUES = 6, /* Used to get max number of hw txqueues */
963 AR5K_CAP_VEOL = 7, /* Supports virtual EOL */
964 AR5K_CAP_COMPRESSION = 8, /* Supports compression */
965 AR5K_CAP_BURST = 9, /* Supports packet bursting */
966 AR5K_CAP_FASTFRAME = 10, /* Supports fast frames */
967 AR5K_CAP_TXPOW = 11, /* Used to get global tx power limit */
968 AR5K_CAP_TPC = 12, /* Can do per-packet tx power control (needed for 802.11a) */
969 AR5K_CAP_BSSIDMASK = 13, /* Supports bssid mask */
970 AR5K_CAP_MCAST_KEYSRCH = 14, /* Supports multicast key search */
971 AR5K_CAP_TSF_ADJUST = 15, /* Supports beacon tsf adjust */
972 AR5K_CAP_XR = 16, /* Supports XR mode */
973 AR5K_CAP_WME_TKIPMIC = 17, /* Supports TKIP MIC when using WMM */
974 AR5K_CAP_CHAN_HALFRATE = 18, /* Supports half rate channels */
975 AR5K_CAP_CHAN_QUARTERRATE = 19, /* Supports quarter rate channels */
976 AR5K_CAP_RFSILENT = 20, /* Supports RFsilent */
977};
978
979 975
980/* XXX: we *may* move cap_range stuff to struct wiphy */ 976/* XXX: we *may* move cap_range stuff to struct wiphy */
981struct ath5k_capabilities { 977struct ath5k_capabilities {
@@ -1027,9 +1023,66 @@ struct ath5k_avg_val {
1027 int avg_weight; 1023 int avg_weight;
1028}; 1024};
1029 1025
1030/***************************************\ 1026#define ATH5K_LED_MAX_NAME_LEN 31
1031 HARDWARE ABSTRACTION LAYER STRUCTURE 1027
1032\***************************************/ 1028/*
1029 * State for LED triggers
1030 */
1031struct ath5k_led {
1032 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
1033 struct ath5k_hw *ah; /* driver state */
1034 struct led_classdev led_dev; /* led classdev */
1035};
1036
1037/* Rfkill */
1038struct ath5k_rfkill {
1039 /* GPIO PIN for rfkill */
1040 u16 gpio;
1041 /* polarity of rfkill GPIO PIN */
1042 bool polarity;
1043 /* RFKILL toggle tasklet */
1044 struct tasklet_struct toggleq;
1045};
1046
1047/* statistics */
1048struct ath5k_statistics {
1049 /* antenna use */
1050 unsigned int antenna_rx[5]; /* frames count per antenna RX */
1051 unsigned int antenna_tx[5]; /* frames count per antenna TX */
1052
1053 /* frame errors */
1054 unsigned int rx_all_count; /* all RX frames, including errors */
1055 unsigned int tx_all_count; /* all TX frames, including errors */
1056 unsigned int rx_bytes_count; /* all RX bytes, including errored pkts
1057 * and the MAC headers for each packet
1058 */
1059 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts
1060 * and the MAC headers and padding for
1061 * each packet.
1062 */
1063 unsigned int rxerr_crc;
1064 unsigned int rxerr_phy;
1065 unsigned int rxerr_phy_code[32];
1066 unsigned int rxerr_fifo;
1067 unsigned int rxerr_decrypt;
1068 unsigned int rxerr_mic;
1069 unsigned int rxerr_proc;
1070 unsigned int rxerr_jumbo;
1071 unsigned int txerr_retry;
1072 unsigned int txerr_fifo;
1073 unsigned int txerr_filt;
1074
1075 /* MIB counters */
1076 unsigned int ack_fail;
1077 unsigned int rts_fail;
1078 unsigned int rts_ok;
1079 unsigned int fcs_error;
1080 unsigned int beacons;
1081
1082 unsigned int mib_intr;
1083 unsigned int rxorn_intr;
1084 unsigned int rxeol_intr;
1085};
1033 1086
1034/* 1087/*
1035 * Misc defines 1088 * Misc defines
@@ -1038,12 +1091,114 @@ struct ath5k_avg_val {
1038#define AR5K_MAX_GPIO 10 1091#define AR5K_MAX_GPIO 10
1039#define AR5K_MAX_RF_BANKS 8 1092#define AR5K_MAX_RF_BANKS 8
1040 1093
1041/* TODO: Clean up and merge with ath5k_softc */ 1094#if CHAN_DEBUG
1095#define ATH_CHAN_MAX (26 + 26 + 26 + 200 + 200)
1096#else
1097#define ATH_CHAN_MAX (14 + 14 + 14 + 252 + 20)
1098#endif
1099
1100#define ATH_RXBUF 40 /* number of RX buffers */
1101#define ATH_TXBUF 200 /* number of TX buffers */
1102#define ATH_BCBUF 4 /* number of beacon buffers */
1103#define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
1104#define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
1105
1106/* Driver state associated with an instance of a device */
1042struct ath5k_hw { 1107struct ath5k_hw {
1043 struct ath_common common; 1108 struct ath_common common;
1044 1109
1045 struct ath5k_softc *ah_sc; 1110 struct pci_dev *pdev;
1046 void __iomem *ah_iobase; 1111 struct device *dev; /* for dma mapping */
1112 int irq;
1113 u16 devid;
1114 void __iomem *iobase; /* address of the device */
1115 struct mutex lock; /* dev-level lock */
1116 struct ieee80211_hw *hw; /* IEEE 802.11 common */
1117 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
1118 struct ieee80211_channel channels[ATH_CHAN_MAX];
1119 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
1120 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
1121 enum nl80211_iftype opmode;
1122
1123#ifdef CONFIG_ATH5K_DEBUG
1124 struct ath5k_dbg_info debug; /* debug info */
1125#endif /* CONFIG_ATH5K_DEBUG */
1126
1127 struct ath5k_buf *bufptr; /* allocated buffer ptr */
1128 struct ath5k_desc *desc; /* TX/RX descriptors */
1129 dma_addr_t desc_daddr; /* DMA (physical) address */
1130 size_t desc_len; /* size of TX/RX descriptors */
1131
1132 DECLARE_BITMAP(status, 6);
1133#define ATH_STAT_INVALID 0 /* disable hardware accesses */
1134#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
1135#define ATH_STAT_PROMISC 2
1136#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
1137#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
1138#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
1139
1140 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
1141 struct ieee80211_channel *curchan; /* current h/w channel */
1142
1143 u16 nvifs;
1144
1145 enum ath5k_int imask; /* interrupt mask copy */
1146
1147 spinlock_t irqlock;
1148 bool rx_pending; /* rx tasklet pending */
1149 bool tx_pending; /* tx tasklet pending */
1150
1151 u8 lladdr[ETH_ALEN];
1152 u8 bssidmask[ETH_ALEN];
1153
1154 unsigned int led_pin, /* GPIO pin for driving LED */
1155 led_on; /* pin setting for LED on */
1156
1157 struct work_struct reset_work; /* deferred chip reset */
1158
1159 unsigned int rxbufsize; /* rx size based on mtu */
1160 struct list_head rxbuf; /* receive buffer */
1161 spinlock_t rxbuflock;
1162 u32 *rxlink; /* link ptr in last RX desc */
1163 struct tasklet_struct rxtq; /* rx intr tasklet */
1164 struct ath5k_led rx_led; /* rx led */
1165
1166 struct list_head txbuf; /* transmit buffer */
1167 spinlock_t txbuflock;
1168 unsigned int txbuf_len; /* buf count in txbuf list */
1169 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
1170 struct tasklet_struct txtq; /* tx intr tasklet */
1171 struct ath5k_led tx_led; /* tx led */
1172
1173 struct ath5k_rfkill rf_kill;
1174
1175 struct tasklet_struct calib; /* calibration tasklet */
1176
1177 spinlock_t block; /* protects beacon */
1178 struct tasklet_struct beacontq; /* beacon intr tasklet */
1179 struct list_head bcbuf; /* beacon buffer */
1180 struct ieee80211_vif *bslot[ATH_BCBUF];
1181 u16 num_ap_vifs;
1182 u16 num_adhoc_vifs;
1183 unsigned int bhalq, /* SW q for outgoing beacons */
1184 bmisscount, /* missed beacon transmits */
1185 bintval, /* beacon interval in TU */
1186 bsent;
1187 unsigned int nexttbtt; /* next beacon time in TU */
1188 struct ath5k_txq *cabq; /* content after beacon */
1189
1190 int power_level; /* Requested tx power in dBm */
1191 bool assoc; /* associate state */
1192 bool enable_beacon; /* true if beacons are on */
1193
1194 struct ath5k_statistics stats;
1195
1196 struct ath5k_ani_state ani_state;
1197 struct tasklet_struct ani_tasklet; /* ANI calibration */
1198
1199 struct delayed_work tx_complete_work;
1200
1201 struct survey_info survey; /* collected survey info */
1047 1202
1048 enum ath5k_int ah_imr; 1203 enum ath5k_int ah_imr;
1049 1204
@@ -1172,43 +1327,43 @@ struct ath_bus_ops {
1172extern const struct ieee80211_ops ath5k_hw_ops; 1327extern const struct ieee80211_ops ath5k_hw_ops;
1173 1328
1174/* Initialization and detach functions */ 1329/* Initialization and detach functions */
1175int ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops); 1330int ath5k_init_softc(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops);
1176void ath5k_deinit_softc(struct ath5k_softc *sc); 1331void ath5k_deinit_softc(struct ath5k_hw *ah);
1177int ath5k_hw_init(struct ath5k_softc *sc); 1332int ath5k_hw_init(struct ath5k_hw *ah);
1178void ath5k_hw_deinit(struct ath5k_hw *ah); 1333void ath5k_hw_deinit(struct ath5k_hw *ah);
1179 1334
1180int ath5k_sysfs_register(struct ath5k_softc *sc); 1335int ath5k_sysfs_register(struct ath5k_hw *ah);
1181void ath5k_sysfs_unregister(struct ath5k_softc *sc); 1336void ath5k_sysfs_unregister(struct ath5k_hw *ah);
1182 1337
1183/* base.c */ 1338/* base.c */
1184struct ath5k_buf; 1339struct ath5k_buf;
1185struct ath5k_txq; 1340struct ath5k_txq;
1186 1341
1187void ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable); 1342void ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable);
1188bool ath5k_any_vif_assoc(struct ath5k_softc *sc); 1343bool ath5k_any_vif_assoc(struct ath5k_hw *ah);
1189void ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, 1344void ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1190 struct ath5k_txq *txq); 1345 struct ath5k_txq *txq);
1191int ath5k_init_hw(struct ath5k_softc *sc); 1346int ath5k_start(struct ieee80211_hw *hw);
1192int ath5k_stop_hw(struct ath5k_softc *sc); 1347void ath5k_stop(struct ieee80211_hw *hw);
1193void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif); 1348void ath5k_mode_setup(struct ath5k_hw *ah, struct ieee80211_vif *vif);
1194void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, 1349void ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah,
1195 struct ieee80211_vif *vif); 1350 struct ieee80211_vif *vif);
1196int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan); 1351int ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan);
1197void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf); 1352void ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf);
1198int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif); 1353int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1199void ath5k_beacon_config(struct ath5k_softc *sc); 1354void ath5k_beacon_config(struct ath5k_hw *ah);
1200void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); 1355void ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf);
1201void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); 1356void ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf);
1202 1357
1203/*Chip id helper functions */ 1358/*Chip id helper functions */
1204const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val); 1359const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val);
1205int ath5k_hw_read_srev(struct ath5k_hw *ah); 1360int ath5k_hw_read_srev(struct ath5k_hw *ah);
1206 1361
1207/* LED functions */ 1362/* LED functions */
1208int ath5k_init_leds(struct ath5k_softc *sc); 1363int ath5k_init_leds(struct ath5k_hw *ah);
1209void ath5k_led_enable(struct ath5k_softc *sc); 1364void ath5k_led_enable(struct ath5k_hw *ah);
1210void ath5k_led_off(struct ath5k_softc *sc); 1365void ath5k_led_off(struct ath5k_hw *ah);
1211void ath5k_unregister_leds(struct ath5k_softc *sc); 1366void ath5k_unregister_leds(struct ath5k_hw *ah);
1212 1367
1213 1368
1214/* Reset Functions */ 1369/* Reset Functions */
@@ -1322,9 +1477,6 @@ void ath5k_rfkill_hw_stop(struct ath5k_hw *ah);
1322 1477
1323/* Misc functions TODO: Cleanup */ 1478/* Misc functions TODO: Cleanup */
1324int ath5k_hw_set_capabilities(struct ath5k_hw *ah); 1479int ath5k_hw_set_capabilities(struct ath5k_hw *ah);
1325int ath5k_hw_get_capability(struct ath5k_hw *ah,
1326 enum ath5k_capability_type cap_type, u32 capability,
1327 u32 *result);
1328int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id); 1480int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id);
1329int ath5k_hw_disable_pspoll(struct ath5k_hw *ah); 1481int ath5k_hw_disable_pspoll(struct ath5k_hw *ah);
1330 1482
@@ -1384,7 +1536,7 @@ static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
1384 (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6))) 1536 (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
1385 return AR5K_AR2315_PCI_BASE + reg; 1537 return AR5K_AR2315_PCI_BASE + reg;
1386 1538
1387 return ah->ah_iobase + reg; 1539 return ah->iobase + reg;
1388} 1540}
1389 1541
1390static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1542static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
@@ -1401,12 +1553,12 @@ static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1401 1553
1402static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1554static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
1403{ 1555{
1404 return ioread32(ah->ah_iobase + reg); 1556 return ioread32(ah->iobase + reg);
1405} 1557}
1406 1558
1407static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg) 1559static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1408{ 1560{
1409 iowrite32(val, ah->ah_iobase + reg); 1561 iowrite32(val, ah->iobase + reg);
1410} 1562}
1411 1563
1412#endif 1564#endif
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index 14dc52e4b50a..f8a6b380d96d 100644
--- a/drivers/net/wireless/ath/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -59,7 +59,7 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
59 cur_val = ath5k_hw_reg_read(ah, cur_reg); 59 cur_val = ath5k_hw_reg_read(ah, cur_reg);
60 60
61 if (cur_val != var_pattern) { 61 if (cur_val != var_pattern) {
62 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n"); 62 ATH5K_ERR(ah, "POST Failed !!!\n");
63 return -EAGAIN; 63 return -EAGAIN;
64 } 64 }
65 65
@@ -74,7 +74,7 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
74 cur_val = ath5k_hw_reg_read(ah, cur_reg); 74 cur_val = ath5k_hw_reg_read(ah, cur_reg);
75 75
76 if (cur_val != var_pattern) { 76 if (cur_val != var_pattern) {
77 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n"); 77 ATH5K_ERR(ah, "POST Failed !!!\n");
78 return -EAGAIN; 78 return -EAGAIN;
79 } 79 }
80 80
@@ -95,19 +95,18 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
95/** 95/**
96 * ath5k_hw_init - Check if hw is supported and init the needed structs 96 * ath5k_hw_init - Check if hw is supported and init the needed structs
97 * 97 *
98 * @sc: The &struct ath5k_softc we got from the driver's init_softc function 98 * @ah: The &struct ath5k_hw we got from the driver's init_softc function
99 * 99 *
100 * Check if the device is supported, perform a POST and initialize the needed 100 * Check if the device is supported, perform a POST and initialize the needed
101 * structs. Returns -ENOMEM if we don't have memory for the needed structs, 101 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
102 * -ENODEV if the device is not supported or prints an error msg if something 102 * -ENODEV if the device is not supported or prints an error msg if something
103 * else went wrong. 103 * else went wrong.
104 */ 104 */
105int ath5k_hw_init(struct ath5k_softc *sc) 105int ath5k_hw_init(struct ath5k_hw *ah)
106{ 106{
107 static const u8 zero_mac[ETH_ALEN] = { }; 107 static const u8 zero_mac[ETH_ALEN] = { };
108 struct ath5k_hw *ah = sc->ah;
109 struct ath_common *common = ath5k_hw_common(ah); 108 struct ath_common *common = ath5k_hw_common(ah);
110 struct pci_dev *pdev = sc->pdev; 109 struct pci_dev *pdev = ah->pdev;
111 struct ath5k_eeprom_info *ee; 110 struct ath5k_eeprom_info *ee;
112 int ret; 111 int ret;
113 u32 srev; 112 u32 srev;
@@ -123,8 +122,8 @@ int ath5k_hw_init(struct ath5k_softc *sc)
123 ah->ah_retry_long = AR5K_INIT_RETRY_LONG; 122 ah->ah_retry_long = AR5K_INIT_RETRY_LONG;
124 ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT; 123 ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT;
125 ah->ah_noise_floor = -95; /* until first NF calibration is run */ 124 ah->ah_noise_floor = -95; /* until first NF calibration is run */
126 sc->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO; 125 ah->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO;
127 ah->ah_current_channel = &sc->channels[0]; 126 ah->ah_current_channel = &ah->channels[0];
128 127
129 /* 128 /*
130 * Find the mac version 129 * Find the mac version
@@ -237,7 +236,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
237 ah->ah_single_chip = true; 236 ah->ah_single_chip = true;
238 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413; 237 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
239 } else { 238 } else {
240 ATH5K_ERR(sc, "Couldn't identify radio revision.\n"); 239 ATH5K_ERR(ah, "Couldn't identify radio revision.\n");
241 ret = -ENODEV; 240 ret = -ENODEV;
242 goto err; 241 goto err;
243 } 242 }
@@ -246,7 +245,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
246 245
247 /* Return on unsupported chips (unsupported eeprom etc) */ 246 /* Return on unsupported chips (unsupported eeprom etc) */
248 if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) { 247 if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) {
249 ATH5K_ERR(sc, "Device not yet supported.\n"); 248 ATH5K_ERR(ah, "Device not yet supported.\n");
250 ret = -ENODEV; 249 ret = -ENODEV;
251 goto err; 250 goto err;
252 } 251 }
@@ -268,7 +267,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
268 */ 267 */
269 ret = ath5k_eeprom_init(ah); 268 ret = ath5k_eeprom_init(ah);
270 if (ret) { 269 if (ret) {
271 ATH5K_ERR(sc, "unable to init EEPROM\n"); 270 ATH5K_ERR(ah, "unable to init EEPROM\n");
272 goto err; 271 goto err;
273 } 272 }
274 273
@@ -309,17 +308,17 @@ int ath5k_hw_init(struct ath5k_softc *sc)
309 /* Get misc capabilities */ 308 /* Get misc capabilities */
310 ret = ath5k_hw_set_capabilities(ah); 309 ret = ath5k_hw_set_capabilities(ah);
311 if (ret) { 310 if (ret) {
312 ATH5K_ERR(sc, "unable to get device capabilities\n"); 311 ATH5K_ERR(ah, "unable to get device capabilities\n");
313 goto err; 312 goto err;
314 } 313 }
315 314
316 if (test_bit(ATH_STAT_2G_DISABLED, sc->status)) { 315 if (test_bit(ATH_STAT_2G_DISABLED, ah->status)) {
317 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode); 316 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode);
318 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode); 317 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode);
319 } 318 }
320 319
321 /* Crypto settings */ 320 /* Crypto settings */
322 common->keymax = (sc->ah->ah_version == AR5K_AR5210 ? 321 common->keymax = (ah->ah_version == AR5K_AR5210 ?
323 AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211); 322 AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211);
324 323
325 if (srev >= AR5K_SREV_AR5212_V4 && 324 if (srev >= AR5K_SREV_AR5212_V4 &&
@@ -339,7 +338,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
339 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */ 338 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
340 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN); 339 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
341 ath5k_hw_set_bssid(ah); 340 ath5k_hw_set_bssid(ah);
342 ath5k_hw_set_opmode(ah, sc->opmode); 341 ath5k_hw_set_opmode(ah, ah->opmode);
343 342
344 ath5k_hw_rfgain_opt_init(ah); 343 ath5k_hw_rfgain_opt_init(ah);
345 344
@@ -360,7 +359,7 @@ err:
360 */ 359 */
361void ath5k_hw_deinit(struct ath5k_hw *ah) 360void ath5k_hw_deinit(struct ath5k_hw *ah)
362{ 361{
363 __set_bit(ATH_STAT_INVALID, ah->ah_sc->status); 362 __set_bit(ATH_STAT_INVALID, ah->status);
364 363
365 if (ah->ah_rf_banks != NULL) 364 if (ah->ah_rf_banks != NULL)
366 kfree(ah->ah_rf_banks); 365 kfree(ah->ah_rf_banks);
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index dce848f76d7c..f54dff44ed50 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -86,7 +86,7 @@ MODULE_SUPPORTED_DEVICE("Atheros 5xxx WLAN cards");
86MODULE_LICENSE("Dual BSD/GPL"); 86MODULE_LICENSE("Dual BSD/GPL");
87 87
88static int ath5k_init(struct ieee80211_hw *hw); 88static int ath5k_init(struct ieee80211_hw *hw);
89static int ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, 89static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
90 bool skip_pcu); 90 bool skip_pcu);
91 91
92/* Known SREVs */ 92/* Known SREVs */
@@ -238,8 +238,8 @@ static const struct ath_ops ath5k_common_ops = {
238static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) 238static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
239{ 239{
240 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 240 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
241 struct ath5k_softc *sc = hw->priv; 241 struct ath5k_hw *ah = hw->priv;
242 struct ath_regulatory *regulatory = ath5k_hw_regulatory(sc->ah); 242 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
243 243
244 return ath_reg_notifier_apply(wiphy, request, regulatory); 244 return ath_reg_notifier_apply(wiphy, request, regulatory);
245} 245}
@@ -289,7 +289,7 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
289 band = IEEE80211_BAND_2GHZ; 289 band = IEEE80211_BAND_2GHZ;
290 break; 290 break;
291 default: 291 default:
292 ATH5K_WARN(ah->ah_sc, "bad mode, not copying channels\n"); 292 ATH5K_WARN(ah, "bad mode, not copying channels\n");
293 return 0; 293 return 0;
294 } 294 }
295 295
@@ -327,51 +327,50 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
327} 327}
328 328
329static void 329static void
330ath5k_setup_rate_idx(struct ath5k_softc *sc, struct ieee80211_supported_band *b) 330ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b)
331{ 331{
332 u8 i; 332 u8 i;
333 333
334 for (i = 0; i < AR5K_MAX_RATES; i++) 334 for (i = 0; i < AR5K_MAX_RATES; i++)
335 sc->rate_idx[b->band][i] = -1; 335 ah->rate_idx[b->band][i] = -1;
336 336
337 for (i = 0; i < b->n_bitrates; i++) { 337 for (i = 0; i < b->n_bitrates; i++) {
338 sc->rate_idx[b->band][b->bitrates[i].hw_value] = i; 338 ah->rate_idx[b->band][b->bitrates[i].hw_value] = i;
339 if (b->bitrates[i].hw_value_short) 339 if (b->bitrates[i].hw_value_short)
340 sc->rate_idx[b->band][b->bitrates[i].hw_value_short] = i; 340 ah->rate_idx[b->band][b->bitrates[i].hw_value_short] = i;
341 } 341 }
342} 342}
343 343
344static int 344static int
345ath5k_setup_bands(struct ieee80211_hw *hw) 345ath5k_setup_bands(struct ieee80211_hw *hw)
346{ 346{
347 struct ath5k_softc *sc = hw->priv; 347 struct ath5k_hw *ah = hw->priv;
348 struct ath5k_hw *ah = sc->ah;
349 struct ieee80211_supported_band *sband; 348 struct ieee80211_supported_band *sband;
350 int max_c, count_c = 0; 349 int max_c, count_c = 0;
351 int i; 350 int i;
352 351
353 BUILD_BUG_ON(ARRAY_SIZE(sc->sbands) < IEEE80211_NUM_BANDS); 352 BUILD_BUG_ON(ARRAY_SIZE(ah->sbands) < IEEE80211_NUM_BANDS);
354 max_c = ARRAY_SIZE(sc->channels); 353 max_c = ARRAY_SIZE(ah->channels);
355 354
356 /* 2GHz band */ 355 /* 2GHz band */
357 sband = &sc->sbands[IEEE80211_BAND_2GHZ]; 356 sband = &ah->sbands[IEEE80211_BAND_2GHZ];
358 sband->band = IEEE80211_BAND_2GHZ; 357 sband->band = IEEE80211_BAND_2GHZ;
359 sband->bitrates = &sc->rates[IEEE80211_BAND_2GHZ][0]; 358 sband->bitrates = &ah->rates[IEEE80211_BAND_2GHZ][0];
360 359
361 if (test_bit(AR5K_MODE_11G, sc->ah->ah_capabilities.cap_mode)) { 360 if (test_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode)) {
362 /* G mode */ 361 /* G mode */
363 memcpy(sband->bitrates, &ath5k_rates[0], 362 memcpy(sband->bitrates, &ath5k_rates[0],
364 sizeof(struct ieee80211_rate) * 12); 363 sizeof(struct ieee80211_rate) * 12);
365 sband->n_bitrates = 12; 364 sband->n_bitrates = 12;
366 365
367 sband->channels = sc->channels; 366 sband->channels = ah->channels;
368 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 367 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
369 AR5K_MODE_11G, max_c); 368 AR5K_MODE_11G, max_c);
370 369
371 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; 370 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
372 count_c = sband->n_channels; 371 count_c = sband->n_channels;
373 max_c -= count_c; 372 max_c -= count_c;
374 } else if (test_bit(AR5K_MODE_11B, sc->ah->ah_capabilities.cap_mode)) { 373 } else if (test_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode)) {
375 /* B mode */ 374 /* B mode */
376 memcpy(sband->bitrates, &ath5k_rates[0], 375 memcpy(sband->bitrates, &ath5k_rates[0],
377 sizeof(struct ieee80211_rate) * 4); 376 sizeof(struct ieee80211_rate) * 4);
@@ -390,7 +389,7 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
390 } 389 }
391 } 390 }
392 391
393 sband->channels = sc->channels; 392 sband->channels = ah->channels;
394 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 393 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
395 AR5K_MODE_11B, max_c); 394 AR5K_MODE_11B, max_c);
396 395
@@ -398,27 +397,27 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
398 count_c = sband->n_channels; 397 count_c = sband->n_channels;
399 max_c -= count_c; 398 max_c -= count_c;
400 } 399 }
401 ath5k_setup_rate_idx(sc, sband); 400 ath5k_setup_rate_idx(ah, sband);
402 401
403 /* 5GHz band, A mode */ 402 /* 5GHz band, A mode */
404 if (test_bit(AR5K_MODE_11A, sc->ah->ah_capabilities.cap_mode)) { 403 if (test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) {
405 sband = &sc->sbands[IEEE80211_BAND_5GHZ]; 404 sband = &ah->sbands[IEEE80211_BAND_5GHZ];
406 sband->band = IEEE80211_BAND_5GHZ; 405 sband->band = IEEE80211_BAND_5GHZ;
407 sband->bitrates = &sc->rates[IEEE80211_BAND_5GHZ][0]; 406 sband->bitrates = &ah->rates[IEEE80211_BAND_5GHZ][0];
408 407
409 memcpy(sband->bitrates, &ath5k_rates[4], 408 memcpy(sband->bitrates, &ath5k_rates[4],
410 sizeof(struct ieee80211_rate) * 8); 409 sizeof(struct ieee80211_rate) * 8);
411 sband->n_bitrates = 8; 410 sband->n_bitrates = 8;
412 411
413 sband->channels = &sc->channels[count_c]; 412 sband->channels = &ah->channels[count_c];
414 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 413 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
415 AR5K_MODE_11A, max_c); 414 AR5K_MODE_11A, max_c);
416 415
417 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband; 416 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband;
418 } 417 }
419 ath5k_setup_rate_idx(sc, sband); 418 ath5k_setup_rate_idx(ah, sband);
420 419
421 ath5k_debug_dump_bands(sc); 420 ath5k_debug_dump_bands(ah);
422 421
423 return 0; 422 return 0;
424} 423}
@@ -428,14 +427,14 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
428 * To accomplish this we must first cleanup any pending DMA, 427 * To accomplish this we must first cleanup any pending DMA,
429 * then restart stuff after a la ath5k_init. 428 * then restart stuff after a la ath5k_init.
430 * 429 *
431 * Called with sc->lock. 430 * Called with ah->lock.
432 */ 431 */
433int 432int
434ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan) 433ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan)
435{ 434{
436 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 435 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
437 "channel set, resetting (%u -> %u MHz)\n", 436 "channel set, resetting (%u -> %u MHz)\n",
438 sc->curchan->center_freq, chan->center_freq); 437 ah->curchan->center_freq, chan->center_freq);
439 438
440 /* 439 /*
441 * To switch channels clear any pending DMA operations; 440 * To switch channels clear any pending DMA operations;
@@ -443,7 +442,7 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
443 * hardware at the new frequency, and then re-enable 442 * hardware at the new frequency, and then re-enable
444 * the relevant bits of the h/w. 443 * the relevant bits of the h/w.
445 */ 444 */
446 return ath5k_reset(sc, chan, true); 445 return ath5k_reset(ah, chan, true);
447} 446}
448 447
449void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 448void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
@@ -487,10 +486,10 @@ void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
487} 486}
488 487
489void 488void
490ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, 489ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah,
491 struct ieee80211_vif *vif) 490 struct ieee80211_vif *vif)
492{ 491{
493 struct ath_common *common = ath5k_hw_common(sc->ah); 492 struct ath_common *common = ath5k_hw_common(ah);
494 struct ath5k_vif_iter_data iter_data; 493 struct ath5k_vif_iter_data iter_data;
495 u32 rfilt; 494 u32 rfilt;
496 495
@@ -509,24 +508,24 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
509 ath5k_vif_iter(&iter_data, vif->addr, vif); 508 ath5k_vif_iter(&iter_data, vif->addr, vif);
510 509
511 /* Get list of all active MAC addresses */ 510 /* Get list of all active MAC addresses */
512 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 511 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
513 &iter_data); 512 &iter_data);
514 memcpy(sc->bssidmask, iter_data.mask, ETH_ALEN); 513 memcpy(ah->bssidmask, iter_data.mask, ETH_ALEN);
515 514
516 sc->opmode = iter_data.opmode; 515 ah->opmode = iter_data.opmode;
517 if (sc->opmode == NL80211_IFTYPE_UNSPECIFIED) 516 if (ah->opmode == NL80211_IFTYPE_UNSPECIFIED)
518 /* Nothing active, default to station mode */ 517 /* Nothing active, default to station mode */
519 sc->opmode = NL80211_IFTYPE_STATION; 518 ah->opmode = NL80211_IFTYPE_STATION;
520 519
521 ath5k_hw_set_opmode(sc->ah, sc->opmode); 520 ath5k_hw_set_opmode(ah, ah->opmode);
522 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", 521 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n",
523 sc->opmode, ath_opmode_to_string(sc->opmode)); 522 ah->opmode, ath_opmode_to_string(ah->opmode));
524 523
525 if (iter_data.need_set_hw_addr && iter_data.found_active) 524 if (iter_data.need_set_hw_addr && iter_data.found_active)
526 ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); 525 ath5k_hw_set_lladdr(ah, iter_data.active_mac);
527 526
528 if (ath5k_hw_hasbssidmask(sc->ah)) 527 if (ath5k_hw_hasbssidmask(ah))
529 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); 528 ath5k_hw_set_bssid_mask(ah, ah->bssidmask);
530 529
531 /* Set up RX Filter */ 530 /* Set up RX Filter */
532 if (iter_data.n_stas > 1) { 531 if (iter_data.n_stas > 1) {
@@ -534,16 +533,16 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
534 * different APs, ARPs are not received (most of the time?) 533 * different APs, ARPs are not received (most of the time?)
535 * Enabling PROMISC appears to fix that problem. 534 * Enabling PROMISC appears to fix that problem.
536 */ 535 */
537 sc->filter_flags |= AR5K_RX_FILTER_PROM; 536 ah->filter_flags |= AR5K_RX_FILTER_PROM;
538 } 537 }
539 538
540 rfilt = sc->filter_flags; 539 rfilt = ah->filter_flags;
541 ath5k_hw_set_rx_filter(sc->ah, rfilt); 540 ath5k_hw_set_rx_filter(ah, rfilt);
542 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); 541 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt);
543} 542}
544 543
545static inline int 544static inline int
546ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix) 545ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix)
547{ 546{
548 int rix; 547 int rix;
549 548
@@ -552,7 +551,7 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
552 "hw_rix out of bounds: %x\n", hw_rix)) 551 "hw_rix out of bounds: %x\n", hw_rix))
553 return 0; 552 return 0;
554 553
555 rix = sc->rate_idx[sc->curchan->band][hw_rix]; 554 rix = ah->rate_idx[ah->curchan->band][hw_rix];
556 if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix)) 555 if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix))
557 rix = 0; 556 rix = 0;
558 557
@@ -564,9 +563,9 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
564\***************/ 563\***************/
565 564
566static 565static
567struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr) 566struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr)
568{ 567{
569 struct ath_common *common = ath5k_hw_common(sc->ah); 568 struct ath_common *common = ath5k_hw_common(ah);
570 struct sk_buff *skb; 569 struct sk_buff *skb;
571 570
572 /* 571 /*
@@ -578,17 +577,17 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
578 GFP_ATOMIC); 577 GFP_ATOMIC);
579 578
580 if (!skb) { 579 if (!skb) {
581 ATH5K_ERR(sc, "can't alloc skbuff of size %u\n", 580 ATH5K_ERR(ah, "can't alloc skbuff of size %u\n",
582 common->rx_bufsize); 581 common->rx_bufsize);
583 return NULL; 582 return NULL;
584 } 583 }
585 584
586 *skb_addr = dma_map_single(sc->dev, 585 *skb_addr = dma_map_single(ah->dev,
587 skb->data, common->rx_bufsize, 586 skb->data, common->rx_bufsize,
588 DMA_FROM_DEVICE); 587 DMA_FROM_DEVICE);
589 588
590 if (unlikely(dma_mapping_error(sc->dev, *skb_addr))) { 589 if (unlikely(dma_mapping_error(ah->dev, *skb_addr))) {
591 ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__); 590 ATH5K_ERR(ah, "%s: DMA mapping failed\n", __func__);
592 dev_kfree_skb(skb); 591 dev_kfree_skb(skb);
593 return NULL; 592 return NULL;
594 } 593 }
@@ -596,15 +595,14 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
596} 595}
597 596
598static int 597static int
599ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) 598ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
600{ 599{
601 struct ath5k_hw *ah = sc->ah;
602 struct sk_buff *skb = bf->skb; 600 struct sk_buff *skb = bf->skb;
603 struct ath5k_desc *ds; 601 struct ath5k_desc *ds;
604 int ret; 602 int ret;
605 603
606 if (!skb) { 604 if (!skb) {
607 skb = ath5k_rx_skb_alloc(sc, &bf->skbaddr); 605 skb = ath5k_rx_skb_alloc(ah, &bf->skbaddr);
608 if (!skb) 606 if (!skb)
609 return -ENOMEM; 607 return -ENOMEM;
610 bf->skb = skb; 608 bf->skb = skb;
@@ -630,13 +628,13 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
630 ds->ds_data = bf->skbaddr; 628 ds->ds_data = bf->skbaddr;
631 ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0); 629 ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0);
632 if (ret) { 630 if (ret) {
633 ATH5K_ERR(sc, "%s: could not setup RX desc\n", __func__); 631 ATH5K_ERR(ah, "%s: could not setup RX desc\n", __func__);
634 return ret; 632 return ret;
635 } 633 }
636 634
637 if (sc->rxlink != NULL) 635 if (ah->rxlink != NULL)
638 *sc->rxlink = bf->daddr; 636 *ah->rxlink = bf->daddr;
639 sc->rxlink = &ds->ds_link; 637 ah->rxlink = &ds->ds_link;
640 return 0; 638 return 0;
641} 639}
642 640
@@ -664,10 +662,9 @@ static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb)
664} 662}
665 663
666static int 664static int
667ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf, 665ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf,
668 struct ath5k_txq *txq, int padsize) 666 struct ath5k_txq *txq, int padsize)
669{ 667{
670 struct ath5k_hw *ah = sc->ah;
671 struct ath5k_desc *ds = bf->desc; 668 struct ath5k_desc *ds = bf->desc;
672 struct sk_buff *skb = bf->skb; 669 struct sk_buff *skb = bf->skb;
673 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 670 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
@@ -683,10 +680,10 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
683 flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK; 680 flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK;
684 681
685 /* XXX endianness */ 682 /* XXX endianness */
686 bf->skbaddr = dma_map_single(sc->dev, skb->data, skb->len, 683 bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len,
687 DMA_TO_DEVICE); 684 DMA_TO_DEVICE);
688 685
689 rate = ieee80211_get_tx_rate(sc->hw, info); 686 rate = ieee80211_get_tx_rate(ah->hw, info);
690 if (!rate) { 687 if (!rate) {
691 ret = -EINVAL; 688 ret = -EINVAL;
692 goto err_unmap; 689 goto err_unmap;
@@ -710,20 +707,20 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
710 } 707 }
711 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 708 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
712 flags |= AR5K_TXDESC_RTSENA; 709 flags |= AR5K_TXDESC_RTSENA;
713 cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value; 710 cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value;
714 duration = le16_to_cpu(ieee80211_rts_duration(sc->hw, 711 duration = le16_to_cpu(ieee80211_rts_duration(ah->hw,
715 info->control.vif, pktlen, info)); 712 info->control.vif, pktlen, info));
716 } 713 }
717 if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 714 if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
718 flags |= AR5K_TXDESC_CTSENA; 715 flags |= AR5K_TXDESC_CTSENA;
719 cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value; 716 cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value;
720 duration = le16_to_cpu(ieee80211_ctstoself_duration(sc->hw, 717 duration = le16_to_cpu(ieee80211_ctstoself_duration(ah->hw,
721 info->control.vif, pktlen, info)); 718 info->control.vif, pktlen, info));
722 } 719 }
723 ret = ah->ah_setup_tx_desc(ah, ds, pktlen, 720 ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
724 ieee80211_get_hdrlen_from_skb(skb), padsize, 721 ieee80211_get_hdrlen_from_skb(skb), padsize,
725 get_hw_packet_type(skb), 722 get_hw_packet_type(skb),
726 (sc->power_level * 2), 723 (ah->power_level * 2),
727 hw_rate, 724 hw_rate,
728 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags, 725 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
729 cts_rate, duration); 726 cts_rate, duration);
@@ -733,7 +730,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
733 memset(mrr_rate, 0, sizeof(mrr_rate)); 730 memset(mrr_rate, 0, sizeof(mrr_rate));
734 memset(mrr_tries, 0, sizeof(mrr_tries)); 731 memset(mrr_tries, 0, sizeof(mrr_tries));
735 for (i = 0; i < 3; i++) { 732 for (i = 0; i < 3; i++) {
736 rate = ieee80211_get_alt_retry_rate(sc->hw, info, i); 733 rate = ieee80211_get_alt_retry_rate(ah->hw, info, i);
737 if (!rate) 734 if (!rate)
738 break; 735 break;
739 736
@@ -764,7 +761,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
764 761
765 return 0; 762 return 0;
766err_unmap: 763err_unmap:
767 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); 764 dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE);
768 return ret; 765 return ret;
769} 766}
770 767
@@ -773,7 +770,7 @@ err_unmap:
773\*******************/ 770\*******************/
774 771
775static int 772static int
776ath5k_desc_alloc(struct ath5k_softc *sc) 773ath5k_desc_alloc(struct ath5k_hw *ah)
777{ 774{
778 struct ath5k_desc *ds; 775 struct ath5k_desc *ds;
779 struct ath5k_buf *bf; 776 struct ath5k_buf *bf;
@@ -782,68 +779,68 @@ ath5k_desc_alloc(struct ath5k_softc *sc)
782 int ret; 779 int ret;
783 780
784 /* allocate descriptors */ 781 /* allocate descriptors */
785 sc->desc_len = sizeof(struct ath5k_desc) * 782 ah->desc_len = sizeof(struct ath5k_desc) *
786 (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1); 783 (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1);
787 784
788 sc->desc = dma_alloc_coherent(sc->dev, sc->desc_len, 785 ah->desc = dma_alloc_coherent(ah->dev, ah->desc_len,
789 &sc->desc_daddr, GFP_KERNEL); 786 &ah->desc_daddr, GFP_KERNEL);
790 if (sc->desc == NULL) { 787 if (ah->desc == NULL) {
791 ATH5K_ERR(sc, "can't allocate descriptors\n"); 788 ATH5K_ERR(ah, "can't allocate descriptors\n");
792 ret = -ENOMEM; 789 ret = -ENOMEM;
793 goto err; 790 goto err;
794 } 791 }
795 ds = sc->desc; 792 ds = ah->desc;
796 da = sc->desc_daddr; 793 da = ah->desc_daddr;
797 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n", 794 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n",
798 ds, sc->desc_len, (unsigned long long)sc->desc_daddr); 795 ds, ah->desc_len, (unsigned long long)ah->desc_daddr);
799 796
800 bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF, 797 bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF,
801 sizeof(struct ath5k_buf), GFP_KERNEL); 798 sizeof(struct ath5k_buf), GFP_KERNEL);
802 if (bf == NULL) { 799 if (bf == NULL) {
803 ATH5K_ERR(sc, "can't allocate bufptr\n"); 800 ATH5K_ERR(ah, "can't allocate bufptr\n");
804 ret = -ENOMEM; 801 ret = -ENOMEM;
805 goto err_free; 802 goto err_free;
806 } 803 }
807 sc->bufptr = bf; 804 ah->bufptr = bf;
808 805
809 INIT_LIST_HEAD(&sc->rxbuf); 806 INIT_LIST_HEAD(&ah->rxbuf);
810 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) { 807 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
811 bf->desc = ds; 808 bf->desc = ds;
812 bf->daddr = da; 809 bf->daddr = da;
813 list_add_tail(&bf->list, &sc->rxbuf); 810 list_add_tail(&bf->list, &ah->rxbuf);
814 } 811 }
815 812
816 INIT_LIST_HEAD(&sc->txbuf); 813 INIT_LIST_HEAD(&ah->txbuf);
817 sc->txbuf_len = ATH_TXBUF; 814 ah->txbuf_len = ATH_TXBUF;
818 for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) { 815 for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
819 bf->desc = ds; 816 bf->desc = ds;
820 bf->daddr = da; 817 bf->daddr = da;
821 list_add_tail(&bf->list, &sc->txbuf); 818 list_add_tail(&bf->list, &ah->txbuf);
822 } 819 }
823 820
824 /* beacon buffers */ 821 /* beacon buffers */
825 INIT_LIST_HEAD(&sc->bcbuf); 822 INIT_LIST_HEAD(&ah->bcbuf);
826 for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) { 823 for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) {
827 bf->desc = ds; 824 bf->desc = ds;
828 bf->daddr = da; 825 bf->daddr = da;
829 list_add_tail(&bf->list, &sc->bcbuf); 826 list_add_tail(&bf->list, &ah->bcbuf);
830 } 827 }
831 828
832 return 0; 829 return 0;
833err_free: 830err_free:
834 dma_free_coherent(sc->dev, sc->desc_len, sc->desc, sc->desc_daddr); 831 dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr);
835err: 832err:
836 sc->desc = NULL; 833 ah->desc = NULL;
837 return ret; 834 return ret;
838} 835}
839 836
840void 837void
841ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf) 838ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf)
842{ 839{
843 BUG_ON(!bf); 840 BUG_ON(!bf);
844 if (!bf->skb) 841 if (!bf->skb)
845 return; 842 return;
846 dma_unmap_single(sc->dev, bf->skbaddr, bf->skb->len, 843 dma_unmap_single(ah->dev, bf->skbaddr, bf->skb->len,
847 DMA_TO_DEVICE); 844 DMA_TO_DEVICE);
848 dev_kfree_skb_any(bf->skb); 845 dev_kfree_skb_any(bf->skb);
849 bf->skb = NULL; 846 bf->skb = NULL;
@@ -852,15 +849,14 @@ ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf)
852} 849}
853 850
854void 851void
855ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf) 852ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf)
856{ 853{
857 struct ath5k_hw *ah = sc->ah;
858 struct ath_common *common = ath5k_hw_common(ah); 854 struct ath_common *common = ath5k_hw_common(ah);
859 855
860 BUG_ON(!bf); 856 BUG_ON(!bf);
861 if (!bf->skb) 857 if (!bf->skb)
862 return; 858 return;
863 dma_unmap_single(sc->dev, bf->skbaddr, common->rx_bufsize, 859 dma_unmap_single(ah->dev, bf->skbaddr, common->rx_bufsize,
864 DMA_FROM_DEVICE); 860 DMA_FROM_DEVICE);
865 dev_kfree_skb_any(bf->skb); 861 dev_kfree_skb_any(bf->skb);
866 bf->skb = NULL; 862 bf->skb = NULL;
@@ -869,24 +865,24 @@ ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf)
869} 865}
870 866
871static void 867static void
872ath5k_desc_free(struct ath5k_softc *sc) 868ath5k_desc_free(struct ath5k_hw *ah)
873{ 869{
874 struct ath5k_buf *bf; 870 struct ath5k_buf *bf;
875 871
876 list_for_each_entry(bf, &sc->txbuf, list) 872 list_for_each_entry(bf, &ah->txbuf, list)
877 ath5k_txbuf_free_skb(sc, bf); 873 ath5k_txbuf_free_skb(ah, bf);
878 list_for_each_entry(bf, &sc->rxbuf, list) 874 list_for_each_entry(bf, &ah->rxbuf, list)
879 ath5k_rxbuf_free_skb(sc, bf); 875 ath5k_rxbuf_free_skb(ah, bf);
880 list_for_each_entry(bf, &sc->bcbuf, list) 876 list_for_each_entry(bf, &ah->bcbuf, list)
881 ath5k_txbuf_free_skb(sc, bf); 877 ath5k_txbuf_free_skb(ah, bf);
882 878
883 /* Free memory associated with all descriptors */ 879 /* Free memory associated with all descriptors */
884 dma_free_coherent(sc->dev, sc->desc_len, sc->desc, sc->desc_daddr); 880 dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr);
885 sc->desc = NULL; 881 ah->desc = NULL;
886 sc->desc_daddr = 0; 882 ah->desc_daddr = 0;
887 883
888 kfree(sc->bufptr); 884 kfree(ah->bufptr);
889 sc->bufptr = NULL; 885 ah->bufptr = NULL;
890} 886}
891 887
892 888
@@ -895,10 +891,9 @@ ath5k_desc_free(struct ath5k_softc *sc)
895\**************/ 891\**************/
896 892
897static struct ath5k_txq * 893static struct ath5k_txq *
898ath5k_txq_setup(struct ath5k_softc *sc, 894ath5k_txq_setup(struct ath5k_hw *ah,
899 int qtype, int subtype) 895 int qtype, int subtype)
900{ 896{
901 struct ath5k_hw *ah = sc->ah;
902 struct ath5k_txq *txq; 897 struct ath5k_txq *txq;
903 struct ath5k_txq_info qi = { 898 struct ath5k_txq_info qi = {
904 .tqi_subtype = subtype, 899 .tqi_subtype = subtype,
@@ -932,13 +927,13 @@ ath5k_txq_setup(struct ath5k_softc *sc,
932 */ 927 */
933 return ERR_PTR(qnum); 928 return ERR_PTR(qnum);
934 } 929 }
935 if (qnum >= ARRAY_SIZE(sc->txqs)) { 930 if (qnum >= ARRAY_SIZE(ah->txqs)) {
936 ATH5K_ERR(sc, "hw qnum %u out of range, max %tu!\n", 931 ATH5K_ERR(ah, "hw qnum %u out of range, max %tu!\n",
937 qnum, ARRAY_SIZE(sc->txqs)); 932 qnum, ARRAY_SIZE(ah->txqs));
938 ath5k_hw_release_tx_queue(ah, qnum); 933 ath5k_hw_release_tx_queue(ah, qnum);
939 return ERR_PTR(-EINVAL); 934 return ERR_PTR(-EINVAL);
940 } 935 }
941 txq = &sc->txqs[qnum]; 936 txq = &ah->txqs[qnum];
942 if (!txq->setup) { 937 if (!txq->setup) {
943 txq->qnum = qnum; 938 txq->qnum = qnum;
944 txq->link = NULL; 939 txq->link = NULL;
@@ -950,7 +945,7 @@ ath5k_txq_setup(struct ath5k_softc *sc,
950 txq->txq_poll_mark = false; 945 txq->txq_poll_mark = false;
951 txq->txq_stuck = 0; 946 txq->txq_stuck = 0;
952 } 947 }
953 return &sc->txqs[qnum]; 948 return &ah->txqs[qnum];
954} 949}
955 950
956static int 951static int
@@ -970,18 +965,17 @@ ath5k_beaconq_setup(struct ath5k_hw *ah)
970} 965}
971 966
972static int 967static int
973ath5k_beaconq_config(struct ath5k_softc *sc) 968ath5k_beaconq_config(struct ath5k_hw *ah)
974{ 969{
975 struct ath5k_hw *ah = sc->ah;
976 struct ath5k_txq_info qi; 970 struct ath5k_txq_info qi;
977 int ret; 971 int ret;
978 972
979 ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi); 973 ret = ath5k_hw_get_tx_queueprops(ah, ah->bhalq, &qi);
980 if (ret) 974 if (ret)
981 goto err; 975 goto err;
982 976
983 if (sc->opmode == NL80211_IFTYPE_AP || 977 if (ah->opmode == NL80211_IFTYPE_AP ||
984 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 978 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
985 /* 979 /*
986 * Always burst out beacon and CAB traffic 980 * Always burst out beacon and CAB traffic
987 * (aifs = cwmin = cwmax = 0) 981 * (aifs = cwmin = cwmax = 0)
@@ -989,7 +983,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
989 qi.tqi_aifs = 0; 983 qi.tqi_aifs = 0;
990 qi.tqi_cw_min = 0; 984 qi.tqi_cw_min = 0;
991 qi.tqi_cw_max = 0; 985 qi.tqi_cw_max = 0;
992 } else if (sc->opmode == NL80211_IFTYPE_ADHOC) { 986 } else if (ah->opmode == NL80211_IFTYPE_ADHOC) {
993 /* 987 /*
994 * Adhoc mode; backoff between 0 and (2 * cw_min). 988 * Adhoc mode; backoff between 0 and (2 * cw_min).
995 */ 989 */
@@ -998,17 +992,17 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
998 qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN; 992 qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN;
999 } 993 }
1000 994
1001 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 995 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1002 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n", 996 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n",
1003 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max); 997 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max);
1004 998
1005 ret = ath5k_hw_set_tx_queueprops(ah, sc->bhalq, &qi); 999 ret = ath5k_hw_set_tx_queueprops(ah, ah->bhalq, &qi);
1006 if (ret) { 1000 if (ret) {
1007 ATH5K_ERR(sc, "%s: unable to update parameters for beacon " 1001 ATH5K_ERR(ah, "%s: unable to update parameters for beacon "
1008 "hardware queue!\n", __func__); 1002 "hardware queue!\n", __func__);
1009 goto err; 1003 goto err;
1010 } 1004 }
1011 ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */ 1005 ret = ath5k_hw_reset_tx_queue(ah, ah->bhalq); /* push to h/w */
1012 if (ret) 1006 if (ret)
1013 goto err; 1007 goto err;
1014 1008
@@ -1017,7 +1011,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
1017 if (ret) 1011 if (ret)
1018 goto err; 1012 goto err;
1019 1013
1020 qi.tqi_ready_time = (sc->bintval * 80) / 100; 1014 qi.tqi_ready_time = (ah->bintval * 80) / 100;
1021 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); 1015 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
1022 if (ret) 1016 if (ret)
1023 goto err; 1017 goto err;
@@ -1030,7 +1024,7 @@ err:
1030/** 1024/**
1031 * ath5k_drain_tx_buffs - Empty tx buffers 1025 * ath5k_drain_tx_buffs - Empty tx buffers
1032 * 1026 *
1033 * @sc The &struct ath5k_softc 1027 * @ah The &struct ath5k_hw
1034 * 1028 *
1035 * Empty tx buffers from all queues in preparation 1029 * Empty tx buffers from all queues in preparation
1036 * of a reset or during shutdown. 1030 * of a reset or during shutdown.
@@ -1039,26 +1033,26 @@ err:
1039 * we do not need to block ath5k_tx_tasklet 1033 * we do not need to block ath5k_tx_tasklet
1040 */ 1034 */
1041static void 1035static void
1042ath5k_drain_tx_buffs(struct ath5k_softc *sc) 1036ath5k_drain_tx_buffs(struct ath5k_hw *ah)
1043{ 1037{
1044 struct ath5k_txq *txq; 1038 struct ath5k_txq *txq;
1045 struct ath5k_buf *bf, *bf0; 1039 struct ath5k_buf *bf, *bf0;
1046 int i; 1040 int i;
1047 1041
1048 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 1042 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
1049 if (sc->txqs[i].setup) { 1043 if (ah->txqs[i].setup) {
1050 txq = &sc->txqs[i]; 1044 txq = &ah->txqs[i];
1051 spin_lock_bh(&txq->lock); 1045 spin_lock_bh(&txq->lock);
1052 list_for_each_entry_safe(bf, bf0, &txq->q, list) { 1046 list_for_each_entry_safe(bf, bf0, &txq->q, list) {
1053 ath5k_debug_printtxbuf(sc, bf); 1047 ath5k_debug_printtxbuf(ah, bf);
1054 1048
1055 ath5k_txbuf_free_skb(sc, bf); 1049 ath5k_txbuf_free_skb(ah, bf);
1056 1050
1057 spin_lock_bh(&sc->txbuflock); 1051 spin_lock_bh(&ah->txbuflock);
1058 list_move_tail(&bf->list, &sc->txbuf); 1052 list_move_tail(&bf->list, &ah->txbuf);
1059 sc->txbuf_len++; 1053 ah->txbuf_len++;
1060 txq->txq_len--; 1054 txq->txq_len--;
1061 spin_unlock_bh(&sc->txbuflock); 1055 spin_unlock_bh(&ah->txbuflock);
1062 } 1056 }
1063 txq->link = NULL; 1057 txq->link = NULL;
1064 txq->txq_poll_mark = false; 1058 txq->txq_poll_mark = false;
@@ -1068,14 +1062,14 @@ ath5k_drain_tx_buffs(struct ath5k_softc *sc)
1068} 1062}
1069 1063
1070static void 1064static void
1071ath5k_txq_release(struct ath5k_softc *sc) 1065ath5k_txq_release(struct ath5k_hw *ah)
1072{ 1066{
1073 struct ath5k_txq *txq = sc->txqs; 1067 struct ath5k_txq *txq = ah->txqs;
1074 unsigned int i; 1068 unsigned int i;
1075 1069
1076 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++, txq++) 1070 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++, txq++)
1077 if (txq->setup) { 1071 if (txq->setup) {
1078 ath5k_hw_release_tx_queue(sc->ah, txq->qnum); 1072 ath5k_hw_release_tx_queue(ah, txq->qnum);
1079 txq->setup = false; 1073 txq->setup = false;
1080 } 1074 }
1081} 1075}
@@ -1089,33 +1083,32 @@ ath5k_txq_release(struct ath5k_softc *sc)
1089 * Enable the receive h/w following a reset. 1083 * Enable the receive h/w following a reset.
1090 */ 1084 */
1091static int 1085static int
1092ath5k_rx_start(struct ath5k_softc *sc) 1086ath5k_rx_start(struct ath5k_hw *ah)
1093{ 1087{
1094 struct ath5k_hw *ah = sc->ah;
1095 struct ath_common *common = ath5k_hw_common(ah); 1088 struct ath_common *common = ath5k_hw_common(ah);
1096 struct ath5k_buf *bf; 1089 struct ath5k_buf *bf;
1097 int ret; 1090 int ret;
1098 1091
1099 common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz); 1092 common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz);
1100 1093
1101 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n", 1094 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n",
1102 common->cachelsz, common->rx_bufsize); 1095 common->cachelsz, common->rx_bufsize);
1103 1096
1104 spin_lock_bh(&sc->rxbuflock); 1097 spin_lock_bh(&ah->rxbuflock);
1105 sc->rxlink = NULL; 1098 ah->rxlink = NULL;
1106 list_for_each_entry(bf, &sc->rxbuf, list) { 1099 list_for_each_entry(bf, &ah->rxbuf, list) {
1107 ret = ath5k_rxbuf_setup(sc, bf); 1100 ret = ath5k_rxbuf_setup(ah, bf);
1108 if (ret != 0) { 1101 if (ret != 0) {
1109 spin_unlock_bh(&sc->rxbuflock); 1102 spin_unlock_bh(&ah->rxbuflock);
1110 goto err; 1103 goto err;
1111 } 1104 }
1112 } 1105 }
1113 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1106 bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list);
1114 ath5k_hw_set_rxdp(ah, bf->daddr); 1107 ath5k_hw_set_rxdp(ah, bf->daddr);
1115 spin_unlock_bh(&sc->rxbuflock); 1108 spin_unlock_bh(&ah->rxbuflock);
1116 1109
1117 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */ 1110 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
1118 ath5k_update_bssid_mask_and_opmode(sc, NULL); /* set filters, etc. */ 1111 ath5k_update_bssid_mask_and_opmode(ah, NULL); /* set filters, etc. */
1119 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */ 1112 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
1120 1113
1121 return 0; 1114 return 0;
@@ -1131,21 +1124,19 @@ err:
1131 * does. 1124 * does.
1132 */ 1125 */
1133static void 1126static void
1134ath5k_rx_stop(struct ath5k_softc *sc) 1127ath5k_rx_stop(struct ath5k_hw *ah)
1135{ 1128{
1136 struct ath5k_hw *ah = sc->ah;
1137 1129
1138 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ 1130 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */
1139 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */ 1131 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */
1140 1132
1141 ath5k_debug_printrxbuffs(sc, ah); 1133 ath5k_debug_printrxbuffs(ah);
1142} 1134}
1143 1135
1144static unsigned int 1136static unsigned int
1145ath5k_rx_decrypted(struct ath5k_softc *sc, struct sk_buff *skb, 1137ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb,
1146 struct ath5k_rx_status *rs) 1138 struct ath5k_rx_status *rs)
1147{ 1139{
1148 struct ath5k_hw *ah = sc->ah;
1149 struct ath_common *common = ath5k_hw_common(ah); 1140 struct ath_common *common = ath5k_hw_common(ah);
1150 struct ieee80211_hdr *hdr = (void *)skb->data; 1141 struct ieee80211_hdr *hdr = (void *)skb->data;
1151 unsigned int keyix, hlen; 1142 unsigned int keyix, hlen;
@@ -1172,10 +1163,10 @@ ath5k_rx_decrypted(struct ath5k_softc *sc, struct sk_buff *skb,
1172 1163
1173 1164
1174static void 1165static void
1175ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb, 1166ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb,
1176 struct ieee80211_rx_status *rxs) 1167 struct ieee80211_rx_status *rxs)
1177{ 1168{
1178 struct ath_common *common = ath5k_hw_common(sc->ah); 1169 struct ath_common *common = ath5k_hw_common(ah);
1179 u64 tsf, bc_tstamp; 1170 u64 tsf, bc_tstamp;
1180 u32 hw_tu; 1171 u32 hw_tu;
1181 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1172 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
@@ -1188,11 +1179,11 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1188 * have updated the local TSF. We have to work around various 1179 * have updated the local TSF. We have to work around various
1189 * hardware bugs, though... 1180 * hardware bugs, though...
1190 */ 1181 */
1191 tsf = ath5k_hw_get_tsf64(sc->ah); 1182 tsf = ath5k_hw_get_tsf64(ah);
1192 bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp); 1183 bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp);
1193 hw_tu = TSF_TO_TU(tsf); 1184 hw_tu = TSF_TO_TU(tsf);
1194 1185
1195 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1186 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1196 "beacon %llx mactime %llx (diff %lld) tsf now %llx\n", 1187 "beacon %llx mactime %llx (diff %lld) tsf now %llx\n",
1197 (unsigned long long)bc_tstamp, 1188 (unsigned long long)bc_tstamp,
1198 (unsigned long long)rxs->mactime, 1189 (unsigned long long)rxs->mactime,
@@ -1211,7 +1202,7 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1211 * received, not like mac80211 which defines it at the start. 1202 * received, not like mac80211 which defines it at the start.
1212 */ 1203 */
1213 if (bc_tstamp > rxs->mactime) { 1204 if (bc_tstamp > rxs->mactime) {
1214 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1205 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1215 "fixing mactime from %llx to %llx\n", 1206 "fixing mactime from %llx to %llx\n",
1216 (unsigned long long)rxs->mactime, 1207 (unsigned long long)rxs->mactime,
1217 (unsigned long long)tsf); 1208 (unsigned long long)tsf);
@@ -1224,25 +1215,24 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1224 * beacons. This also takes care of synchronizing beacon sending 1215 * beacons. This also takes care of synchronizing beacon sending
1225 * times with other stations. 1216 * times with other stations.
1226 */ 1217 */
1227 if (hw_tu >= sc->nexttbtt) 1218 if (hw_tu >= ah->nexttbtt)
1228 ath5k_beacon_update_timers(sc, bc_tstamp); 1219 ath5k_beacon_update_timers(ah, bc_tstamp);
1229 1220
1230 /* Check if the beacon timers are still correct, because a TSF 1221 /* Check if the beacon timers are still correct, because a TSF
1231 * update might have created a window between them - for a 1222 * update might have created a window between them - for a
1232 * longer description see the comment of this function: */ 1223 * longer description see the comment of this function: */
1233 if (!ath5k_hw_check_beacon_timers(sc->ah, sc->bintval)) { 1224 if (!ath5k_hw_check_beacon_timers(ah, ah->bintval)) {
1234 ath5k_beacon_update_timers(sc, bc_tstamp); 1225 ath5k_beacon_update_timers(ah, bc_tstamp);
1235 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1226 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1236 "fixed beacon timers after beacon receive\n"); 1227 "fixed beacon timers after beacon receive\n");
1237 } 1228 }
1238 } 1229 }
1239} 1230}
1240 1231
1241static void 1232static void
1242ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi) 1233ath5k_update_beacon_rssi(struct ath5k_hw *ah, struct sk_buff *skb, int rssi)
1243{ 1234{
1244 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1235 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1245 struct ath5k_hw *ah = sc->ah;
1246 struct ath_common *common = ath5k_hw_common(ah); 1236 struct ath_common *common = ath5k_hw_common(ah);
1247 1237
1248 /* only beacons from our BSSID */ 1238 /* only beacons from our BSSID */
@@ -1324,7 +1314,7 @@ static int ath5k_remove_padding(struct sk_buff *skb)
1324} 1314}
1325 1315
1326static void 1316static void
1327ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb, 1317ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb,
1328 struct ath5k_rx_status *rs) 1318 struct ath5k_rx_status *rs)
1329{ 1319{
1330 struct ieee80211_rx_status *rxs; 1320 struct ieee80211_rx_status *rxs;
@@ -1357,37 +1347,37 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
1357 * impossible to comply to that. This affects IBSS merge only 1347 * impossible to comply to that. This affects IBSS merge only
1358 * right now, so it's not too bad... 1348 * right now, so it's not too bad...
1359 */ 1349 */
1360 rxs->mactime = ath5k_extend_tsf(sc->ah, rs->rs_tstamp); 1350 rxs->mactime = ath5k_extend_tsf(ah, rs->rs_tstamp);
1361 rxs->flag |= RX_FLAG_MACTIME_MPDU; 1351 rxs->flag |= RX_FLAG_MACTIME_MPDU;
1362 1352
1363 rxs->freq = sc->curchan->center_freq; 1353 rxs->freq = ah->curchan->center_freq;
1364 rxs->band = sc->curchan->band; 1354 rxs->band = ah->curchan->band;
1365 1355
1366 rxs->signal = sc->ah->ah_noise_floor + rs->rs_rssi; 1356 rxs->signal = ah->ah_noise_floor + rs->rs_rssi;
1367 1357
1368 rxs->antenna = rs->rs_antenna; 1358 rxs->antenna = rs->rs_antenna;
1369 1359
1370 if (rs->rs_antenna > 0 && rs->rs_antenna < 5) 1360 if (rs->rs_antenna > 0 && rs->rs_antenna < 5)
1371 sc->stats.antenna_rx[rs->rs_antenna]++; 1361 ah->stats.antenna_rx[rs->rs_antenna]++;
1372 else 1362 else
1373 sc->stats.antenna_rx[0]++; /* invalid */ 1363 ah->stats.antenna_rx[0]++; /* invalid */
1374 1364
1375 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs->rs_rate); 1365 rxs->rate_idx = ath5k_hw_to_driver_rix(ah, rs->rs_rate);
1376 rxs->flag |= ath5k_rx_decrypted(sc, skb, rs); 1366 rxs->flag |= ath5k_rx_decrypted(ah, skb, rs);
1377 1367
1378 if (rxs->rate_idx >= 0 && rs->rs_rate == 1368 if (rxs->rate_idx >= 0 && rs->rs_rate ==
1379 sc->sbands[sc->curchan->band].bitrates[rxs->rate_idx].hw_value_short) 1369 ah->sbands[ah->curchan->band].bitrates[rxs->rate_idx].hw_value_short)
1380 rxs->flag |= RX_FLAG_SHORTPRE; 1370 rxs->flag |= RX_FLAG_SHORTPRE;
1381 1371
1382 trace_ath5k_rx(sc, skb); 1372 trace_ath5k_rx(ah, skb);
1383 1373
1384 ath5k_update_beacon_rssi(sc, skb, rs->rs_rssi); 1374 ath5k_update_beacon_rssi(ah, skb, rs->rs_rssi);
1385 1375
1386 /* check beacons in IBSS mode */ 1376 /* check beacons in IBSS mode */
1387 if (sc->opmode == NL80211_IFTYPE_ADHOC) 1377 if (ah->opmode == NL80211_IFTYPE_ADHOC)
1388 ath5k_check_ibss_tsf(sc, skb, rxs); 1378 ath5k_check_ibss_tsf(ah, skb, rxs);
1389 1379
1390 ieee80211_rx(sc->hw, skb); 1380 ieee80211_rx(ah->hw, skb);
1391} 1381}
1392 1382
1393/** ath5k_frame_receive_ok() - Do we want to receive this frame or not? 1383/** ath5k_frame_receive_ok() - Do we want to receive this frame or not?
@@ -1396,20 +1386,20 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
1396 * statistics. Return true if we want this frame, false if not. 1386 * statistics. Return true if we want this frame, false if not.
1397 */ 1387 */
1398static bool 1388static bool
1399ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs) 1389ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs)
1400{ 1390{
1401 sc->stats.rx_all_count++; 1391 ah->stats.rx_all_count++;
1402 sc->stats.rx_bytes_count += rs->rs_datalen; 1392 ah->stats.rx_bytes_count += rs->rs_datalen;
1403 1393
1404 if (unlikely(rs->rs_status)) { 1394 if (unlikely(rs->rs_status)) {
1405 if (rs->rs_status & AR5K_RXERR_CRC) 1395 if (rs->rs_status & AR5K_RXERR_CRC)
1406 sc->stats.rxerr_crc++; 1396 ah->stats.rxerr_crc++;
1407 if (rs->rs_status & AR5K_RXERR_FIFO) 1397 if (rs->rs_status & AR5K_RXERR_FIFO)
1408 sc->stats.rxerr_fifo++; 1398 ah->stats.rxerr_fifo++;
1409 if (rs->rs_status & AR5K_RXERR_PHY) { 1399 if (rs->rs_status & AR5K_RXERR_PHY) {
1410 sc->stats.rxerr_phy++; 1400 ah->stats.rxerr_phy++;
1411 if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32) 1401 if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32)
1412 sc->stats.rxerr_phy_code[rs->rs_phyerr]++; 1402 ah->stats.rxerr_phy_code[rs->rs_phyerr]++;
1413 return false; 1403 return false;
1414 } 1404 }
1415 if (rs->rs_status & AR5K_RXERR_DECRYPT) { 1405 if (rs->rs_status & AR5K_RXERR_DECRYPT) {
@@ -1423,13 +1413,13 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
1423 * 1413 *
1424 * XXX do key cache faulting 1414 * XXX do key cache faulting
1425 */ 1415 */
1426 sc->stats.rxerr_decrypt++; 1416 ah->stats.rxerr_decrypt++;
1427 if (rs->rs_keyix == AR5K_RXKEYIX_INVALID && 1417 if (rs->rs_keyix == AR5K_RXKEYIX_INVALID &&
1428 !(rs->rs_status & AR5K_RXERR_CRC)) 1418 !(rs->rs_status & AR5K_RXERR_CRC))
1429 return true; 1419 return true;
1430 } 1420 }
1431 if (rs->rs_status & AR5K_RXERR_MIC) { 1421 if (rs->rs_status & AR5K_RXERR_MIC) {
1432 sc->stats.rxerr_mic++; 1422 ah->stats.rxerr_mic++;
1433 return true; 1423 return true;
1434 } 1424 }
1435 1425
@@ -1439,26 +1429,26 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
1439 } 1429 }
1440 1430
1441 if (unlikely(rs->rs_more)) { 1431 if (unlikely(rs->rs_more)) {
1442 sc->stats.rxerr_jumbo++; 1432 ah->stats.rxerr_jumbo++;
1443 return false; 1433 return false;
1444 } 1434 }
1445 return true; 1435 return true;
1446} 1436}
1447 1437
1448static void 1438static void
1449ath5k_set_current_imask(struct ath5k_softc *sc) 1439ath5k_set_current_imask(struct ath5k_hw *ah)
1450{ 1440{
1451 enum ath5k_int imask; 1441 enum ath5k_int imask;
1452 unsigned long flags; 1442 unsigned long flags;
1453 1443
1454 spin_lock_irqsave(&sc->irqlock, flags); 1444 spin_lock_irqsave(&ah->irqlock, flags);
1455 imask = sc->imask; 1445 imask = ah->imask;
1456 if (sc->rx_pending) 1446 if (ah->rx_pending)
1457 imask &= ~AR5K_INT_RX_ALL; 1447 imask &= ~AR5K_INT_RX_ALL;
1458 if (sc->tx_pending) 1448 if (ah->tx_pending)
1459 imask &= ~AR5K_INT_TX_ALL; 1449 imask &= ~AR5K_INT_TX_ALL;
1460 ath5k_hw_set_imr(sc->ah, imask); 1450 ath5k_hw_set_imr(ah, imask);
1461 spin_unlock_irqrestore(&sc->irqlock, flags); 1451 spin_unlock_irqrestore(&ah->irqlock, flags);
1462} 1452}
1463 1453
1464static void 1454static void
@@ -1467,39 +1457,38 @@ ath5k_tasklet_rx(unsigned long data)
1467 struct ath5k_rx_status rs = {}; 1457 struct ath5k_rx_status rs = {};
1468 struct sk_buff *skb, *next_skb; 1458 struct sk_buff *skb, *next_skb;
1469 dma_addr_t next_skb_addr; 1459 dma_addr_t next_skb_addr;
1470 struct ath5k_softc *sc = (void *)data; 1460 struct ath5k_hw *ah = (void *)data;
1471 struct ath5k_hw *ah = sc->ah;
1472 struct ath_common *common = ath5k_hw_common(ah); 1461 struct ath_common *common = ath5k_hw_common(ah);
1473 struct ath5k_buf *bf; 1462 struct ath5k_buf *bf;
1474 struct ath5k_desc *ds; 1463 struct ath5k_desc *ds;
1475 int ret; 1464 int ret;
1476 1465
1477 spin_lock(&sc->rxbuflock); 1466 spin_lock(&ah->rxbuflock);
1478 if (list_empty(&sc->rxbuf)) { 1467 if (list_empty(&ah->rxbuf)) {
1479 ATH5K_WARN(sc, "empty rx buf pool\n"); 1468 ATH5K_WARN(ah, "empty rx buf pool\n");
1480 goto unlock; 1469 goto unlock;
1481 } 1470 }
1482 do { 1471 do {
1483 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1472 bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list);
1484 BUG_ON(bf->skb == NULL); 1473 BUG_ON(bf->skb == NULL);
1485 skb = bf->skb; 1474 skb = bf->skb;
1486 ds = bf->desc; 1475 ds = bf->desc;
1487 1476
1488 /* bail if HW is still using self-linked descriptor */ 1477 /* bail if HW is still using self-linked descriptor */
1489 if (ath5k_hw_get_rxdp(sc->ah) == bf->daddr) 1478 if (ath5k_hw_get_rxdp(ah) == bf->daddr)
1490 break; 1479 break;
1491 1480
1492 ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs); 1481 ret = ah->ah_proc_rx_desc(ah, ds, &rs);
1493 if (unlikely(ret == -EINPROGRESS)) 1482 if (unlikely(ret == -EINPROGRESS))
1494 break; 1483 break;
1495 else if (unlikely(ret)) { 1484 else if (unlikely(ret)) {
1496 ATH5K_ERR(sc, "error in processing rx descriptor\n"); 1485 ATH5K_ERR(ah, "error in processing rx descriptor\n");
1497 sc->stats.rxerr_proc++; 1486 ah->stats.rxerr_proc++;
1498 break; 1487 break;
1499 } 1488 }
1500 1489
1501 if (ath5k_receive_frame_ok(sc, &rs)) { 1490 if (ath5k_receive_frame_ok(ah, &rs)) {
1502 next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr); 1491 next_skb = ath5k_rx_skb_alloc(ah, &next_skb_addr);
1503 1492
1504 /* 1493 /*
1505 * If we can't replace bf->skb with a new skb under 1494 * If we can't replace bf->skb with a new skb under
@@ -1508,24 +1497,24 @@ ath5k_tasklet_rx(unsigned long data)
1508 if (!next_skb) 1497 if (!next_skb)
1509 goto next; 1498 goto next;
1510 1499
1511 dma_unmap_single(sc->dev, bf->skbaddr, 1500 dma_unmap_single(ah->dev, bf->skbaddr,
1512 common->rx_bufsize, 1501 common->rx_bufsize,
1513 DMA_FROM_DEVICE); 1502 DMA_FROM_DEVICE);
1514 1503
1515 skb_put(skb, rs.rs_datalen); 1504 skb_put(skb, rs.rs_datalen);
1516 1505
1517 ath5k_receive_frame(sc, skb, &rs); 1506 ath5k_receive_frame(ah, skb, &rs);
1518 1507
1519 bf->skb = next_skb; 1508 bf->skb = next_skb;
1520 bf->skbaddr = next_skb_addr; 1509 bf->skbaddr = next_skb_addr;
1521 } 1510 }
1522next: 1511next:
1523 list_move_tail(&bf->list, &sc->rxbuf); 1512 list_move_tail(&bf->list, &ah->rxbuf);
1524 } while (ath5k_rxbuf_setup(sc, bf) == 0); 1513 } while (ath5k_rxbuf_setup(ah, bf) == 0);
1525unlock: 1514unlock:
1526 spin_unlock(&sc->rxbuflock); 1515 spin_unlock(&ah->rxbuflock);
1527 sc->rx_pending = false; 1516 ah->rx_pending = false;
1528 ath5k_set_current_imask(sc); 1517 ath5k_set_current_imask(ah);
1529} 1518}
1530 1519
1531 1520
@@ -1537,12 +1526,12 @@ void
1537ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, 1526ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1538 struct ath5k_txq *txq) 1527 struct ath5k_txq *txq)
1539{ 1528{
1540 struct ath5k_softc *sc = hw->priv; 1529 struct ath5k_hw *ah = hw->priv;
1541 struct ath5k_buf *bf; 1530 struct ath5k_buf *bf;
1542 unsigned long flags; 1531 unsigned long flags;
1543 int padsize; 1532 int padsize;
1544 1533
1545 trace_ath5k_tx(sc, skb, txq); 1534 trace_ath5k_tx(ah, skb, txq);
1546 1535
1547 /* 1536 /*
1548 * The hardware expects the header padded to 4 byte boundaries. 1537 * The hardware expects the header padded to 4 byte boundaries.
@@ -1550,7 +1539,7 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1550 */ 1539 */
1551 padsize = ath5k_add_padding(skb); 1540 padsize = ath5k_add_padding(skb);
1552 if (padsize < 0) { 1541 if (padsize < 0) {
1553 ATH5K_ERR(sc, "tx hdrlen not %%4: not enough" 1542 ATH5K_ERR(ah, "tx hdrlen not %%4: not enough"
1554 " headroom to pad"); 1543 " headroom to pad");
1555 goto drop_packet; 1544 goto drop_packet;
1556 } 1545 }
@@ -1559,28 +1548,28 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1559 txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX) 1548 txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX)
1560 ieee80211_stop_queue(hw, txq->qnum); 1549 ieee80211_stop_queue(hw, txq->qnum);
1561 1550
1562 spin_lock_irqsave(&sc->txbuflock, flags); 1551 spin_lock_irqsave(&ah->txbuflock, flags);
1563 if (list_empty(&sc->txbuf)) { 1552 if (list_empty(&ah->txbuf)) {
1564 ATH5K_ERR(sc, "no further txbuf available, dropping packet\n"); 1553 ATH5K_ERR(ah, "no further txbuf available, dropping packet\n");
1565 spin_unlock_irqrestore(&sc->txbuflock, flags); 1554 spin_unlock_irqrestore(&ah->txbuflock, flags);
1566 ieee80211_stop_queues(hw); 1555 ieee80211_stop_queues(hw);
1567 goto drop_packet; 1556 goto drop_packet;
1568 } 1557 }
1569 bf = list_first_entry(&sc->txbuf, struct ath5k_buf, list); 1558 bf = list_first_entry(&ah->txbuf, struct ath5k_buf, list);
1570 list_del(&bf->list); 1559 list_del(&bf->list);
1571 sc->txbuf_len--; 1560 ah->txbuf_len--;
1572 if (list_empty(&sc->txbuf)) 1561 if (list_empty(&ah->txbuf))
1573 ieee80211_stop_queues(hw); 1562 ieee80211_stop_queues(hw);
1574 spin_unlock_irqrestore(&sc->txbuflock, flags); 1563 spin_unlock_irqrestore(&ah->txbuflock, flags);
1575 1564
1576 bf->skb = skb; 1565 bf->skb = skb;
1577 1566
1578 if (ath5k_txbuf_setup(sc, bf, txq, padsize)) { 1567 if (ath5k_txbuf_setup(ah, bf, txq, padsize)) {
1579 bf->skb = NULL; 1568 bf->skb = NULL;
1580 spin_lock_irqsave(&sc->txbuflock, flags); 1569 spin_lock_irqsave(&ah->txbuflock, flags);
1581 list_add_tail(&bf->list, &sc->txbuf); 1570 list_add_tail(&bf->list, &ah->txbuf);
1582 sc->txbuf_len++; 1571 ah->txbuf_len++;
1583 spin_unlock_irqrestore(&sc->txbuflock, flags); 1572 spin_unlock_irqrestore(&ah->txbuflock, flags);
1584 goto drop_packet; 1573 goto drop_packet;
1585 } 1574 }
1586 return; 1575 return;
@@ -1590,15 +1579,15 @@ drop_packet:
1590} 1579}
1591 1580
1592static void 1581static void
1593ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb, 1582ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb,
1594 struct ath5k_txq *txq, struct ath5k_tx_status *ts) 1583 struct ath5k_txq *txq, struct ath5k_tx_status *ts)
1595{ 1584{
1596 struct ieee80211_tx_info *info; 1585 struct ieee80211_tx_info *info;
1597 u8 tries[3]; 1586 u8 tries[3];
1598 int i; 1587 int i;
1599 1588
1600 sc->stats.tx_all_count++; 1589 ah->stats.tx_all_count++;
1601 sc->stats.tx_bytes_count += skb->len; 1590 ah->stats.tx_bytes_count += skb->len;
1602 info = IEEE80211_SKB_CB(skb); 1591 info = IEEE80211_SKB_CB(skb);
1603 1592
1604 tries[0] = info->status.rates[0].count; 1593 tries[0] = info->status.rates[0].count;
@@ -1618,15 +1607,15 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
1618 info->status.rates[ts->ts_final_idx + 1].idx = -1; 1607 info->status.rates[ts->ts_final_idx + 1].idx = -1;
1619 1608
1620 if (unlikely(ts->ts_status)) { 1609 if (unlikely(ts->ts_status)) {
1621 sc->stats.ack_fail++; 1610 ah->stats.ack_fail++;
1622 if (ts->ts_status & AR5K_TXERR_FILT) { 1611 if (ts->ts_status & AR5K_TXERR_FILT) {
1623 info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 1612 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
1624 sc->stats.txerr_filt++; 1613 ah->stats.txerr_filt++;
1625 } 1614 }
1626 if (ts->ts_status & AR5K_TXERR_XRETRY) 1615 if (ts->ts_status & AR5K_TXERR_XRETRY)
1627 sc->stats.txerr_retry++; 1616 ah->stats.txerr_retry++;
1628 if (ts->ts_status & AR5K_TXERR_FIFO) 1617 if (ts->ts_status & AR5K_TXERR_FIFO)
1629 sc->stats.txerr_fifo++; 1618 ah->stats.txerr_fifo++;
1630 } else { 1619 } else {
1631 info->flags |= IEEE80211_TX_STAT_ACK; 1620 info->flags |= IEEE80211_TX_STAT_ACK;
1632 info->status.ack_signal = ts->ts_rssi; 1621 info->status.ack_signal = ts->ts_rssi;
@@ -1642,16 +1631,16 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
1642 ath5k_remove_padding(skb); 1631 ath5k_remove_padding(skb);
1643 1632
1644 if (ts->ts_antenna > 0 && ts->ts_antenna < 5) 1633 if (ts->ts_antenna > 0 && ts->ts_antenna < 5)
1645 sc->stats.antenna_tx[ts->ts_antenna]++; 1634 ah->stats.antenna_tx[ts->ts_antenna]++;
1646 else 1635 else
1647 sc->stats.antenna_tx[0]++; /* invalid */ 1636 ah->stats.antenna_tx[0]++; /* invalid */
1648 1637
1649 trace_ath5k_tx_complete(sc, skb, txq, ts); 1638 trace_ath5k_tx_complete(ah, skb, txq, ts);
1650 ieee80211_tx_status(sc->hw, skb); 1639 ieee80211_tx_status(ah->hw, skb);
1651} 1640}
1652 1641
1653static void 1642static void
1654ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq) 1643ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq)
1655{ 1644{
1656 struct ath5k_tx_status ts = {}; 1645 struct ath5k_tx_status ts = {};
1657 struct ath5k_buf *bf, *bf0; 1646 struct ath5k_buf *bf, *bf0;
@@ -1668,11 +1657,11 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1668 if (bf->skb != NULL) { 1657 if (bf->skb != NULL) {
1669 ds = bf->desc; 1658 ds = bf->desc;
1670 1659
1671 ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts); 1660 ret = ah->ah_proc_tx_desc(ah, ds, &ts);
1672 if (unlikely(ret == -EINPROGRESS)) 1661 if (unlikely(ret == -EINPROGRESS))
1673 break; 1662 break;
1674 else if (unlikely(ret)) { 1663 else if (unlikely(ret)) {
1675 ATH5K_ERR(sc, 1664 ATH5K_ERR(ah,
1676 "error %d while processing " 1665 "error %d while processing "
1677 "queue %u\n", ret, txq->qnum); 1666 "queue %u\n", ret, txq->qnum);
1678 break; 1667 break;
@@ -1681,9 +1670,9 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1681 skb = bf->skb; 1670 skb = bf->skb;
1682 bf->skb = NULL; 1671 bf->skb = NULL;
1683 1672
1684 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, 1673 dma_unmap_single(ah->dev, bf->skbaddr, skb->len,
1685 DMA_TO_DEVICE); 1674 DMA_TO_DEVICE);
1686 ath5k_tx_frame_completed(sc, skb, txq, &ts); 1675 ath5k_tx_frame_completed(ah, skb, txq, &ts);
1687 } 1676 }
1688 1677
1689 /* 1678 /*
@@ -1692,31 +1681,31 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1692 * host memory and moved on. 1681 * host memory and moved on.
1693 * Always keep the last descriptor to avoid HW races... 1682 * Always keep the last descriptor to avoid HW races...
1694 */ 1683 */
1695 if (ath5k_hw_get_txdp(sc->ah, txq->qnum) != bf->daddr) { 1684 if (ath5k_hw_get_txdp(ah, txq->qnum) != bf->daddr) {
1696 spin_lock(&sc->txbuflock); 1685 spin_lock(&ah->txbuflock);
1697 list_move_tail(&bf->list, &sc->txbuf); 1686 list_move_tail(&bf->list, &ah->txbuf);
1698 sc->txbuf_len++; 1687 ah->txbuf_len++;
1699 txq->txq_len--; 1688 txq->txq_len--;
1700 spin_unlock(&sc->txbuflock); 1689 spin_unlock(&ah->txbuflock);
1701 } 1690 }
1702 } 1691 }
1703 spin_unlock(&txq->lock); 1692 spin_unlock(&txq->lock);
1704 if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4) 1693 if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4)
1705 ieee80211_wake_queue(sc->hw, txq->qnum); 1694 ieee80211_wake_queue(ah->hw, txq->qnum);
1706} 1695}
1707 1696
1708static void 1697static void
1709ath5k_tasklet_tx(unsigned long data) 1698ath5k_tasklet_tx(unsigned long data)
1710{ 1699{
1711 int i; 1700 int i;
1712 struct ath5k_softc *sc = (void *)data; 1701 struct ath5k_hw *ah = (void *)data;
1713 1702
1714 for (i = 0; i < AR5K_NUM_TX_QUEUES; i++) 1703 for (i = 0; i < AR5K_NUM_TX_QUEUES; i++)
1715 if (sc->txqs[i].setup && (sc->ah->ah_txq_isr & BIT(i))) 1704 if (ah->txqs[i].setup && (ah->ah_txq_isr & BIT(i)))
1716 ath5k_tx_processq(sc, &sc->txqs[i]); 1705 ath5k_tx_processq(ah, &ah->txqs[i]);
1717 1706
1718 sc->tx_pending = false; 1707 ah->tx_pending = false;
1719 ath5k_set_current_imask(sc); 1708 ath5k_set_current_imask(ah);
1720} 1709}
1721 1710
1722 1711
@@ -1728,25 +1717,24 @@ ath5k_tasklet_tx(unsigned long data)
1728 * Setup the beacon frame for transmit. 1717 * Setup the beacon frame for transmit.
1729 */ 1718 */
1730static int 1719static int
1731ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) 1720ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
1732{ 1721{
1733 struct sk_buff *skb = bf->skb; 1722 struct sk_buff *skb = bf->skb;
1734 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1723 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1735 struct ath5k_hw *ah = sc->ah;
1736 struct ath5k_desc *ds; 1724 struct ath5k_desc *ds;
1737 int ret = 0; 1725 int ret = 0;
1738 u8 antenna; 1726 u8 antenna;
1739 u32 flags; 1727 u32 flags;
1740 const int padsize = 0; 1728 const int padsize = 0;
1741 1729
1742 bf->skbaddr = dma_map_single(sc->dev, skb->data, skb->len, 1730 bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len,
1743 DMA_TO_DEVICE); 1731 DMA_TO_DEVICE);
1744 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] " 1732 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] "
1745 "skbaddr %llx\n", skb, skb->data, skb->len, 1733 "skbaddr %llx\n", skb, skb->data, skb->len,
1746 (unsigned long long)bf->skbaddr); 1734 (unsigned long long)bf->skbaddr);
1747 1735
1748 if (dma_mapping_error(sc->dev, bf->skbaddr)) { 1736 if (dma_mapping_error(ah->dev, bf->skbaddr)) {
1749 ATH5K_ERR(sc, "beacon DMA mapping failed\n"); 1737 ATH5K_ERR(ah, "beacon DMA mapping failed\n");
1750 return -EIO; 1738 return -EIO;
1751 } 1739 }
1752 1740
@@ -1754,7 +1742,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1754 antenna = ah->ah_tx_ant; 1742 antenna = ah->ah_tx_ant;
1755 1743
1756 flags = AR5K_TXDESC_NOACK; 1744 flags = AR5K_TXDESC_NOACK;
1757 if (sc->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) { 1745 if (ah->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) {
1758 ds->ds_link = bf->daddr; /* self-linked */ 1746 ds->ds_link = bf->daddr; /* self-linked */
1759 flags |= AR5K_TXDESC_VEOL; 1747 flags |= AR5K_TXDESC_VEOL;
1760 } else 1748 } else
@@ -1779,7 +1767,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1779 * on all of them. 1767 * on all of them.
1780 */ 1768 */
1781 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP) 1769 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
1782 antenna = sc->bsent & 4 ? 2 : 1; 1770 antenna = ah->bsent & 4 ? 2 : 1;
1783 1771
1784 1772
1785 /* FIXME: If we are in g mode and rate is a CCK rate 1773 /* FIXME: If we are in g mode and rate is a CCK rate
@@ -1788,8 +1776,8 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1788 ds->ds_data = bf->skbaddr; 1776 ds->ds_data = bf->skbaddr;
1789 ret = ah->ah_setup_tx_desc(ah, ds, skb->len, 1777 ret = ah->ah_setup_tx_desc(ah, ds, skb->len,
1790 ieee80211_get_hdrlen_from_skb(skb), padsize, 1778 ieee80211_get_hdrlen_from_skb(skb), padsize,
1791 AR5K_PKT_TYPE_BEACON, (sc->power_level * 2), 1779 AR5K_PKT_TYPE_BEACON, (ah->power_level * 2),
1792 ieee80211_get_tx_rate(sc->hw, info)->hw_value, 1780 ieee80211_get_tx_rate(ah->hw, info)->hw_value,
1793 1, AR5K_TXKEYIX_INVALID, 1781 1, AR5K_TXKEYIX_INVALID,
1794 antenna, flags, 0, 0); 1782 antenna, flags, 0, 0);
1795 if (ret) 1783 if (ret)
@@ -1797,7 +1785,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1797 1785
1798 return 0; 1786 return 0;
1799err_unmap: 1787err_unmap:
1800 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); 1788 dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE);
1801 return ret; 1789 return ret;
1802} 1790}
1803 1791
@@ -1812,7 +1800,7 @@ int
1812ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1800ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1813{ 1801{
1814 int ret; 1802 int ret;
1815 struct ath5k_softc *sc = hw->priv; 1803 struct ath5k_hw *ah = hw->priv;
1816 struct ath5k_vif *avf = (void *)vif->drv_priv; 1804 struct ath5k_vif *avf = (void *)vif->drv_priv;
1817 struct sk_buff *skb; 1805 struct sk_buff *skb;
1818 1806
@@ -1828,9 +1816,9 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1828 goto out; 1816 goto out;
1829 } 1817 }
1830 1818
1831 ath5k_txbuf_free_skb(sc, avf->bbuf); 1819 ath5k_txbuf_free_skb(ah, avf->bbuf);
1832 avf->bbuf->skb = skb; 1820 avf->bbuf->skb = skb;
1833 ret = ath5k_beacon_setup(sc, avf->bbuf); 1821 ret = ath5k_beacon_setup(ah, avf->bbuf);
1834 if (ret) 1822 if (ret)
1835 avf->bbuf->skb = NULL; 1823 avf->bbuf->skb = NULL;
1836out: 1824out:
@@ -1846,15 +1834,14 @@ out:
1846 * or user context from ath5k_beacon_config. 1834 * or user context from ath5k_beacon_config.
1847 */ 1835 */
1848static void 1836static void
1849ath5k_beacon_send(struct ath5k_softc *sc) 1837ath5k_beacon_send(struct ath5k_hw *ah)
1850{ 1838{
1851 struct ath5k_hw *ah = sc->ah;
1852 struct ieee80211_vif *vif; 1839 struct ieee80211_vif *vif;
1853 struct ath5k_vif *avf; 1840 struct ath5k_vif *avf;
1854 struct ath5k_buf *bf; 1841 struct ath5k_buf *bf;
1855 struct sk_buff *skb; 1842 struct sk_buff *skb;
1856 1843
1857 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "in beacon_send\n"); 1844 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "in beacon_send\n");
1858 1845
1859 /* 1846 /*
1860 * Check if the previous beacon has gone out. If 1847 * Check if the previous beacon has gone out. If
@@ -1863,47 +1850,47 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1863 * indicate a problem and should not occur. If we 1850 * indicate a problem and should not occur. If we
1864 * miss too many consecutive beacons reset the device. 1851 * miss too many consecutive beacons reset the device.
1865 */ 1852 */
1866 if (unlikely(ath5k_hw_num_tx_pending(ah, sc->bhalq) != 0)) { 1853 if (unlikely(ath5k_hw_num_tx_pending(ah, ah->bhalq) != 0)) {
1867 sc->bmisscount++; 1854 ah->bmisscount++;
1868 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1855 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1869 "missed %u consecutive beacons\n", sc->bmisscount); 1856 "missed %u consecutive beacons\n", ah->bmisscount);
1870 if (sc->bmisscount > 10) { /* NB: 10 is a guess */ 1857 if (ah->bmisscount > 10) { /* NB: 10 is a guess */
1871 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1858 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1872 "stuck beacon time (%u missed)\n", 1859 "stuck beacon time (%u missed)\n",
1873 sc->bmisscount); 1860 ah->bmisscount);
1874 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 1861 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1875 "stuck beacon, resetting\n"); 1862 "stuck beacon, resetting\n");
1876 ieee80211_queue_work(sc->hw, &sc->reset_work); 1863 ieee80211_queue_work(ah->hw, &ah->reset_work);
1877 } 1864 }
1878 return; 1865 return;
1879 } 1866 }
1880 if (unlikely(sc->bmisscount != 0)) { 1867 if (unlikely(ah->bmisscount != 0)) {
1881 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1868 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1882 "resume beacon xmit after %u misses\n", 1869 "resume beacon xmit after %u misses\n",
1883 sc->bmisscount); 1870 ah->bmisscount);
1884 sc->bmisscount = 0; 1871 ah->bmisscount = 0;
1885 } 1872 }
1886 1873
1887 if ((sc->opmode == NL80211_IFTYPE_AP && sc->num_ap_vifs > 1) || 1874 if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs > 1) ||
1888 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 1875 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
1889 u64 tsf = ath5k_hw_get_tsf64(ah); 1876 u64 tsf = ath5k_hw_get_tsf64(ah);
1890 u32 tsftu = TSF_TO_TU(tsf); 1877 u32 tsftu = TSF_TO_TU(tsf);
1891 int slot = ((tsftu % sc->bintval) * ATH_BCBUF) / sc->bintval; 1878 int slot = ((tsftu % ah->bintval) * ATH_BCBUF) / ah->bintval;
1892 vif = sc->bslot[(slot + 1) % ATH_BCBUF]; 1879 vif = ah->bslot[(slot + 1) % ATH_BCBUF];
1893 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1880 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1894 "tsf %llx tsftu %x intval %u slot %u vif %p\n", 1881 "tsf %llx tsftu %x intval %u slot %u vif %p\n",
1895 (unsigned long long)tsf, tsftu, sc->bintval, slot, vif); 1882 (unsigned long long)tsf, tsftu, ah->bintval, slot, vif);
1896 } else /* only one interface */ 1883 } else /* only one interface */
1897 vif = sc->bslot[0]; 1884 vif = ah->bslot[0];
1898 1885
1899 if (!vif) 1886 if (!vif)
1900 return; 1887 return;
1901 1888
1902 avf = (void *)vif->drv_priv; 1889 avf = (void *)vif->drv_priv;
1903 bf = avf->bbuf; 1890 bf = avf->bbuf;
1904 if (unlikely(bf->skb == NULL || sc->opmode == NL80211_IFTYPE_STATION || 1891 if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION ||
1905 sc->opmode == NL80211_IFTYPE_MONITOR)) { 1892 ah->opmode == NL80211_IFTYPE_MONITOR)) {
1906 ATH5K_WARN(sc, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL); 1893 ATH5K_WARN(ah, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL);
1907 return; 1894 return;
1908 } 1895 }
1909 1896
@@ -1912,40 +1899,40 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1912 * This should never fail since we check above that no frames 1899 * This should never fail since we check above that no frames
1913 * are still pending on the queue. 1900 * are still pending on the queue.
1914 */ 1901 */
1915 if (unlikely(ath5k_hw_stop_beacon_queue(ah, sc->bhalq))) { 1902 if (unlikely(ath5k_hw_stop_beacon_queue(ah, ah->bhalq))) {
1916 ATH5K_WARN(sc, "beacon queue %u didn't start/stop ?\n", sc->bhalq); 1903 ATH5K_WARN(ah, "beacon queue %u didn't start/stop ?\n", ah->bhalq);
1917 /* NB: hw still stops DMA, so proceed */ 1904 /* NB: hw still stops DMA, so proceed */
1918 } 1905 }
1919 1906
1920 /* refresh the beacon for AP or MESH mode */ 1907 /* refresh the beacon for AP or MESH mode */
1921 if (sc->opmode == NL80211_IFTYPE_AP || 1908 if (ah->opmode == NL80211_IFTYPE_AP ||
1922 sc->opmode == NL80211_IFTYPE_MESH_POINT) 1909 ah->opmode == NL80211_IFTYPE_MESH_POINT)
1923 ath5k_beacon_update(sc->hw, vif); 1910 ath5k_beacon_update(ah->hw, vif);
1924 1911
1925 trace_ath5k_tx(sc, bf->skb, &sc->txqs[sc->bhalq]); 1912 trace_ath5k_tx(ah, bf->skb, &ah->txqs[ah->bhalq]);
1926 1913
1927 ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr); 1914 ath5k_hw_set_txdp(ah, ah->bhalq, bf->daddr);
1928 ath5k_hw_start_tx_dma(ah, sc->bhalq); 1915 ath5k_hw_start_tx_dma(ah, ah->bhalq);
1929 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", 1916 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n",
1930 sc->bhalq, (unsigned long long)bf->daddr, bf->desc); 1917 ah->bhalq, (unsigned long long)bf->daddr, bf->desc);
1931 1918
1932 skb = ieee80211_get_buffered_bc(sc->hw, vif); 1919 skb = ieee80211_get_buffered_bc(ah->hw, vif);
1933 while (skb) { 1920 while (skb) {
1934 ath5k_tx_queue(sc->hw, skb, sc->cabq); 1921 ath5k_tx_queue(ah->hw, skb, ah->cabq);
1935 1922
1936 if (sc->cabq->txq_len >= sc->cabq->txq_max) 1923 if (ah->cabq->txq_len >= ah->cabq->txq_max)
1937 break; 1924 break;
1938 1925
1939 skb = ieee80211_get_buffered_bc(sc->hw, vif); 1926 skb = ieee80211_get_buffered_bc(ah->hw, vif);
1940 } 1927 }
1941 1928
1942 sc->bsent++; 1929 ah->bsent++;
1943} 1930}
1944 1931
1945/** 1932/**
1946 * ath5k_beacon_update_timers - update beacon timers 1933 * ath5k_beacon_update_timers - update beacon timers
1947 * 1934 *
1948 * @sc: struct ath5k_softc pointer we are operating on 1935 * @ah: struct ath5k_hw pointer we are operating on
1949 * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a 1936 * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a
1950 * beacon timer update based on the current HW TSF. 1937 * beacon timer update based on the current HW TSF.
1951 * 1938 *
@@ -1959,17 +1946,16 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1959 * function to have it all together in one place. 1946 * function to have it all together in one place.
1960 */ 1947 */
1961void 1948void
1962ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf) 1949ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf)
1963{ 1950{
1964 struct ath5k_hw *ah = sc->ah;
1965 u32 nexttbtt, intval, hw_tu, bc_tu; 1951 u32 nexttbtt, intval, hw_tu, bc_tu;
1966 u64 hw_tsf; 1952 u64 hw_tsf;
1967 1953
1968 intval = sc->bintval & AR5K_BEACON_PERIOD; 1954 intval = ah->bintval & AR5K_BEACON_PERIOD;
1969 if (sc->opmode == NL80211_IFTYPE_AP && sc->num_ap_vifs > 1) { 1955 if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs > 1) {
1970 intval /= ATH_BCBUF; /* staggered multi-bss beacons */ 1956 intval /= ATH_BCBUF; /* staggered multi-bss beacons */
1971 if (intval < 15) 1957 if (intval < 15)
1972 ATH5K_WARN(sc, "intval %u is too low, min 15\n", 1958 ATH5K_WARN(ah, "intval %u is too low, min 15\n",
1973 intval); 1959 intval);
1974 } 1960 }
1975 if (WARN_ON(!intval)) 1961 if (WARN_ON(!intval))
@@ -2008,7 +1994,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2008 * automatically update the TSF and then we need to reconfigure 1994 * automatically update the TSF and then we need to reconfigure
2009 * the timers. 1995 * the timers.
2010 */ 1996 */
2011 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1997 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2012 "need to wait for HW TSF sync\n"); 1998 "need to wait for HW TSF sync\n");
2013 return; 1999 return;
2014 } else { 2000 } else {
@@ -2023,7 +2009,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2023 } 2009 }
2024#undef FUDGE 2010#undef FUDGE
2025 2011
2026 sc->nexttbtt = nexttbtt; 2012 ah->nexttbtt = nexttbtt;
2027 2013
2028 intval |= AR5K_BEACON_ENA; 2014 intval |= AR5K_BEACON_ENA;
2029 ath5k_hw_init_beacon(ah, nexttbtt, intval); 2015 ath5k_hw_init_beacon(ah, nexttbtt, intval);
@@ -2033,20 +2019,20 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2033 * of this function 2019 * of this function
2034 */ 2020 */
2035 if (bc_tsf == -1) 2021 if (bc_tsf == -1)
2036 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2022 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2037 "reconfigured timers based on HW TSF\n"); 2023 "reconfigured timers based on HW TSF\n");
2038 else if (bc_tsf == 0) 2024 else if (bc_tsf == 0)
2039 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2025 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2040 "reset HW TSF and timers\n"); 2026 "reset HW TSF and timers\n");
2041 else 2027 else
2042 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2028 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2043 "updated timers based on beacon TSF\n"); 2029 "updated timers based on beacon TSF\n");
2044 2030
2045 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2031 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2046 "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n", 2032 "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n",
2047 (unsigned long long) bc_tsf, 2033 (unsigned long long) bc_tsf,
2048 (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt); 2034 (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt);
2049 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "intval %u %s %s\n", 2035 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "intval %u %s %s\n",
2050 intval & AR5K_BEACON_PERIOD, 2036 intval & AR5K_BEACON_PERIOD,
2051 intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "", 2037 intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "",
2052 intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : ""); 2038 intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : "");
@@ -2055,22 +2041,21 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2055/** 2041/**
2056 * ath5k_beacon_config - Configure the beacon queues and interrupts 2042 * ath5k_beacon_config - Configure the beacon queues and interrupts
2057 * 2043 *
2058 * @sc: struct ath5k_softc pointer we are operating on 2044 * @ah: struct ath5k_hw pointer we are operating on
2059 * 2045 *
2060 * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA 2046 * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA
2061 * interrupts to detect TSF updates only. 2047 * interrupts to detect TSF updates only.
2062 */ 2048 */
2063void 2049void
2064ath5k_beacon_config(struct ath5k_softc *sc) 2050ath5k_beacon_config(struct ath5k_hw *ah)
2065{ 2051{
2066 struct ath5k_hw *ah = sc->ah;
2067 unsigned long flags; 2052 unsigned long flags;
2068 2053
2069 spin_lock_irqsave(&sc->block, flags); 2054 spin_lock_irqsave(&ah->block, flags);
2070 sc->bmisscount = 0; 2055 ah->bmisscount = 0;
2071 sc->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA); 2056 ah->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA);
2072 2057
2073 if (sc->enable_beacon) { 2058 if (ah->enable_beacon) {
2074 /* 2059 /*
2075 * In IBSS mode we use a self-linked tx descriptor and let the 2060 * In IBSS mode we use a self-linked tx descriptor and let the
2076 * hardware send the beacons automatically. We have to load it 2061 * hardware send the beacons automatically. We have to load it
@@ -2078,27 +2063,27 @@ ath5k_beacon_config(struct ath5k_softc *sc)
2078 * We use the SWBA interrupt only to keep track of the beacon 2063 * We use the SWBA interrupt only to keep track of the beacon
2079 * timers in order to detect automatic TSF updates. 2064 * timers in order to detect automatic TSF updates.
2080 */ 2065 */
2081 ath5k_beaconq_config(sc); 2066 ath5k_beaconq_config(ah);
2082 2067
2083 sc->imask |= AR5K_INT_SWBA; 2068 ah->imask |= AR5K_INT_SWBA;
2084 2069
2085 if (sc->opmode == NL80211_IFTYPE_ADHOC) { 2070 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2086 if (ath5k_hw_hasveol(ah)) 2071 if (ath5k_hw_hasveol(ah))
2087 ath5k_beacon_send(sc); 2072 ath5k_beacon_send(ah);
2088 } else 2073 } else
2089 ath5k_beacon_update_timers(sc, -1); 2074 ath5k_beacon_update_timers(ah, -1);
2090 } else { 2075 } else {
2091 ath5k_hw_stop_beacon_queue(sc->ah, sc->bhalq); 2076 ath5k_hw_stop_beacon_queue(ah, ah->bhalq);
2092 } 2077 }
2093 2078
2094 ath5k_hw_set_imr(ah, sc->imask); 2079 ath5k_hw_set_imr(ah, ah->imask);
2095 mmiowb(); 2080 mmiowb();
2096 spin_unlock_irqrestore(&sc->block, flags); 2081 spin_unlock_irqrestore(&ah->block, flags);
2097} 2082}
2098 2083
2099static void ath5k_tasklet_beacon(unsigned long data) 2084static void ath5k_tasklet_beacon(unsigned long data)
2100{ 2085{
2101 struct ath5k_softc *sc = (struct ath5k_softc *) data; 2086 struct ath5k_hw *ah = (struct ath5k_hw *) data;
2102 2087
2103 /* 2088 /*
2104 * Software beacon alert--time to send a beacon. 2089 * Software beacon alert--time to send a beacon.
@@ -2108,20 +2093,20 @@ static void ath5k_tasklet_beacon(unsigned long data)
2108 * transmission time) in order to detect whether 2093 * transmission time) in order to detect whether
2109 * automatic TSF updates happened. 2094 * automatic TSF updates happened.
2110 */ 2095 */
2111 if (sc->opmode == NL80211_IFTYPE_ADHOC) { 2096 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2112 /* XXX: only if VEOL supported */ 2097 /* XXX: only if VEOL supported */
2113 u64 tsf = ath5k_hw_get_tsf64(sc->ah); 2098 u64 tsf = ath5k_hw_get_tsf64(ah);
2114 sc->nexttbtt += sc->bintval; 2099 ah->nexttbtt += ah->bintval;
2115 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 2100 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
2116 "SWBA nexttbtt: %x hw_tu: %x " 2101 "SWBA nexttbtt: %x hw_tu: %x "
2117 "TSF: %llx\n", 2102 "TSF: %llx\n",
2118 sc->nexttbtt, 2103 ah->nexttbtt,
2119 TSF_TO_TU(tsf), 2104 TSF_TO_TU(tsf),
2120 (unsigned long long) tsf); 2105 (unsigned long long) tsf);
2121 } else { 2106 } else {
2122 spin_lock(&sc->block); 2107 spin_lock(&ah->block);
2123 ath5k_beacon_send(sc); 2108 ath5k_beacon_send(ah);
2124 spin_unlock(&sc->block); 2109 spin_unlock(&ah->block);
2125 } 2110 }
2126} 2111}
2127 2112
@@ -2138,12 +2123,12 @@ ath5k_intr_calibration_poll(struct ath5k_hw *ah)
2138 /* run ANI only when full calibration is not active */ 2123 /* run ANI only when full calibration is not active */
2139 ah->ah_cal_next_ani = jiffies + 2124 ah->ah_cal_next_ani = jiffies +
2140 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI); 2125 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI);
2141 tasklet_schedule(&ah->ah_sc->ani_tasklet); 2126 tasklet_schedule(&ah->ani_tasklet);
2142 2127
2143 } else if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) { 2128 } else if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) {
2144 ah->ah_cal_next_full = jiffies + 2129 ah->ah_cal_next_full = jiffies +
2145 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL); 2130 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL);
2146 tasklet_schedule(&ah->ah_sc->calib); 2131 tasklet_schedule(&ah->calib);
2147 } 2132 }
2148 /* we could use SWI to generate enough interrupts to meet our 2133 /* we could use SWI to generate enough interrupts to meet our
2149 * calibration interval requirements, if necessary: 2134 * calibration interval requirements, if necessary:
@@ -2151,44 +2136,43 @@ ath5k_intr_calibration_poll(struct ath5k_hw *ah)
2151} 2136}
2152 2137
2153static void 2138static void
2154ath5k_schedule_rx(struct ath5k_softc *sc) 2139ath5k_schedule_rx(struct ath5k_hw *ah)
2155{ 2140{
2156 sc->rx_pending = true; 2141 ah->rx_pending = true;
2157 tasklet_schedule(&sc->rxtq); 2142 tasklet_schedule(&ah->rxtq);
2158} 2143}
2159 2144
2160static void 2145static void
2161ath5k_schedule_tx(struct ath5k_softc *sc) 2146ath5k_schedule_tx(struct ath5k_hw *ah)
2162{ 2147{
2163 sc->tx_pending = true; 2148 ah->tx_pending = true;
2164 tasklet_schedule(&sc->txtq); 2149 tasklet_schedule(&ah->txtq);
2165} 2150}
2166 2151
2167static irqreturn_t 2152static irqreturn_t
2168ath5k_intr(int irq, void *dev_id) 2153ath5k_intr(int irq, void *dev_id)
2169{ 2154{
2170 struct ath5k_softc *sc = dev_id; 2155 struct ath5k_hw *ah = dev_id;
2171 struct ath5k_hw *ah = sc->ah;
2172 enum ath5k_int status; 2156 enum ath5k_int status;
2173 unsigned int counter = 1000; 2157 unsigned int counter = 1000;
2174 2158
2175 if (unlikely(test_bit(ATH_STAT_INVALID, sc->status) || 2159 if (unlikely(test_bit(ATH_STAT_INVALID, ah->status) ||
2176 ((ath5k_get_bus_type(ah) != ATH_AHB) && 2160 ((ath5k_get_bus_type(ah) != ATH_AHB) &&
2177 !ath5k_hw_is_intr_pending(ah)))) 2161 !ath5k_hw_is_intr_pending(ah))))
2178 return IRQ_NONE; 2162 return IRQ_NONE;
2179 2163
2180 do { 2164 do {
2181 ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */ 2165 ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
2182 ATH5K_DBG(sc, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n", 2166 ATH5K_DBG(ah, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n",
2183 status, sc->imask); 2167 status, ah->imask);
2184 if (unlikely(status & AR5K_INT_FATAL)) { 2168 if (unlikely(status & AR5K_INT_FATAL)) {
2185 /* 2169 /*
2186 * Fatal errors are unrecoverable. 2170 * Fatal errors are unrecoverable.
2187 * Typically these are caused by DMA errors. 2171 * Typically these are caused by DMA errors.
2188 */ 2172 */
2189 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2173 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2190 "fatal int, resetting\n"); 2174 "fatal int, resetting\n");
2191 ieee80211_queue_work(sc->hw, &sc->reset_work); 2175 ieee80211_queue_work(ah->hw, &ah->reset_work);
2192 } else if (unlikely(status & AR5K_INT_RXORN)) { 2176 } else if (unlikely(status & AR5K_INT_RXORN)) {
2193 /* 2177 /*
2194 * Receive buffers are full. Either the bus is busy or 2178 * Receive buffers are full. Either the bus is busy or
@@ -2199,16 +2183,16 @@ ath5k_intr(int irq, void *dev_id)
2199 * We don't know exactly which versions need a reset - 2183 * We don't know exactly which versions need a reset -
2200 * this guess is copied from the HAL. 2184 * this guess is copied from the HAL.
2201 */ 2185 */
2202 sc->stats.rxorn_intr++; 2186 ah->stats.rxorn_intr++;
2203 if (ah->ah_mac_srev < AR5K_SREV_AR5212) { 2187 if (ah->ah_mac_srev < AR5K_SREV_AR5212) {
2204 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2188 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2205 "rx overrun, resetting\n"); 2189 "rx overrun, resetting\n");
2206 ieee80211_queue_work(sc->hw, &sc->reset_work); 2190 ieee80211_queue_work(ah->hw, &ah->reset_work);
2207 } else 2191 } else
2208 ath5k_schedule_rx(sc); 2192 ath5k_schedule_rx(ah);
2209 } else { 2193 } else {
2210 if (status & AR5K_INT_SWBA) 2194 if (status & AR5K_INT_SWBA)
2211 tasklet_hi_schedule(&sc->beacontq); 2195 tasklet_hi_schedule(&ah->beacontq);
2212 2196
2213 if (status & AR5K_INT_RXEOL) { 2197 if (status & AR5K_INT_RXEOL) {
2214 /* 2198 /*
@@ -2216,27 +2200,27 @@ ath5k_intr(int irq, void *dev_id)
2216 * RXE bit is written, but it doesn't work at 2200 * RXE bit is written, but it doesn't work at
2217 * least on older hardware revs. 2201 * least on older hardware revs.
2218 */ 2202 */
2219 sc->stats.rxeol_intr++; 2203 ah->stats.rxeol_intr++;
2220 } 2204 }
2221 if (status & AR5K_INT_TXURN) { 2205 if (status & AR5K_INT_TXURN) {
2222 /* bump tx trigger level */ 2206 /* bump tx trigger level */
2223 ath5k_hw_update_tx_triglevel(ah, true); 2207 ath5k_hw_update_tx_triglevel(ah, true);
2224 } 2208 }
2225 if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR)) 2209 if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR))
2226 ath5k_schedule_rx(sc); 2210 ath5k_schedule_rx(ah);
2227 if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC 2211 if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC
2228 | AR5K_INT_TXERR | AR5K_INT_TXEOL)) 2212 | AR5K_INT_TXERR | AR5K_INT_TXEOL))
2229 ath5k_schedule_tx(sc); 2213 ath5k_schedule_tx(ah);
2230 if (status & AR5K_INT_BMISS) { 2214 if (status & AR5K_INT_BMISS) {
2231 /* TODO */ 2215 /* TODO */
2232 } 2216 }
2233 if (status & AR5K_INT_MIB) { 2217 if (status & AR5K_INT_MIB) {
2234 sc->stats.mib_intr++; 2218 ah->stats.mib_intr++;
2235 ath5k_hw_update_mib_counters(ah); 2219 ath5k_hw_update_mib_counters(ah);
2236 ath5k_ani_mib_intr(ah); 2220 ath5k_ani_mib_intr(ah);
2237 } 2221 }
2238 if (status & AR5K_INT_GPIO) 2222 if (status & AR5K_INT_GPIO)
2239 tasklet_schedule(&sc->rf_kill.toggleq); 2223 tasklet_schedule(&ah->rf_kill.toggleq);
2240 2224
2241 } 2225 }
2242 2226
@@ -2245,11 +2229,11 @@ ath5k_intr(int irq, void *dev_id)
2245 2229
2246 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0); 2230 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0);
2247 2231
2248 if (sc->rx_pending || sc->tx_pending) 2232 if (ah->rx_pending || ah->tx_pending)
2249 ath5k_set_current_imask(sc); 2233 ath5k_set_current_imask(ah);
2250 2234
2251 if (unlikely(!counter)) 2235 if (unlikely(!counter))
2252 ATH5K_WARN(sc, "too many interrupts, giving up for now\n"); 2236 ATH5K_WARN(ah, "too many interrupts, giving up for now\n");
2253 2237
2254 ath5k_intr_calibration_poll(ah); 2238 ath5k_intr_calibration_poll(ah);
2255 2239
@@ -2263,28 +2247,27 @@ ath5k_intr(int irq, void *dev_id)
2263static void 2247static void
2264ath5k_tasklet_calibrate(unsigned long data) 2248ath5k_tasklet_calibrate(unsigned long data)
2265{ 2249{
2266 struct ath5k_softc *sc = (void *)data; 2250 struct ath5k_hw *ah = (void *)data;
2267 struct ath5k_hw *ah = sc->ah;
2268 2251
2269 /* Only full calibration for now */ 2252 /* Only full calibration for now */
2270 ah->ah_cal_mask |= AR5K_CALIBRATION_FULL; 2253 ah->ah_cal_mask |= AR5K_CALIBRATION_FULL;
2271 2254
2272 ATH5K_DBG(sc, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", 2255 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n",
2273 ieee80211_frequency_to_channel(sc->curchan->center_freq), 2256 ieee80211_frequency_to_channel(ah->curchan->center_freq),
2274 sc->curchan->hw_value); 2257 ah->curchan->hw_value);
2275 2258
2276 if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) { 2259 if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) {
2277 /* 2260 /*
2278 * Rfgain is out of bounds, reset the chip 2261 * Rfgain is out of bounds, reset the chip
2279 * to load new gain values. 2262 * to load new gain values.
2280 */ 2263 */
2281 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "calibration, resetting\n"); 2264 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "calibration, resetting\n");
2282 ieee80211_queue_work(sc->hw, &sc->reset_work); 2265 ieee80211_queue_work(ah->hw, &ah->reset_work);
2283 } 2266 }
2284 if (ath5k_hw_phy_calibrate(ah, sc->curchan)) 2267 if (ath5k_hw_phy_calibrate(ah, ah->curchan))
2285 ATH5K_ERR(sc, "calibration of channel %u failed\n", 2268 ATH5K_ERR(ah, "calibration of channel %u failed\n",
2286 ieee80211_frequency_to_channel( 2269 ieee80211_frequency_to_channel(
2287 sc->curchan->center_freq)); 2270 ah->curchan->center_freq));
2288 2271
2289 /* Noise floor calibration interrupts rx/tx path while I/Q calibration 2272 /* Noise floor calibration interrupts rx/tx path while I/Q calibration
2290 * doesn't. 2273 * doesn't.
@@ -2303,8 +2286,7 @@ ath5k_tasklet_calibrate(unsigned long data)
2303static void 2286static void
2304ath5k_tasklet_ani(unsigned long data) 2287ath5k_tasklet_ani(unsigned long data)
2305{ 2288{
2306 struct ath5k_softc *sc = (void *)data; 2289 struct ath5k_hw *ah = (void *)data;
2307 struct ath5k_hw *ah = sc->ah;
2308 2290
2309 ah->ah_cal_mask |= AR5K_CALIBRATION_ANI; 2291 ah->ah_cal_mask |= AR5K_CALIBRATION_ANI;
2310 ath5k_ani_calibration(ah); 2292 ath5k_ani_calibration(ah);
@@ -2315,21 +2297,21 @@ ath5k_tasklet_ani(unsigned long data)
2315static void 2297static void
2316ath5k_tx_complete_poll_work(struct work_struct *work) 2298ath5k_tx_complete_poll_work(struct work_struct *work)
2317{ 2299{
2318 struct ath5k_softc *sc = container_of(work, struct ath5k_softc, 2300 struct ath5k_hw *ah = container_of(work, struct ath5k_hw,
2319 tx_complete_work.work); 2301 tx_complete_work.work);
2320 struct ath5k_txq *txq; 2302 struct ath5k_txq *txq;
2321 int i; 2303 int i;
2322 bool needreset = false; 2304 bool needreset = false;
2323 2305
2324 mutex_lock(&sc->lock); 2306 mutex_lock(&ah->lock);
2325 2307
2326 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 2308 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
2327 if (sc->txqs[i].setup) { 2309 if (ah->txqs[i].setup) {
2328 txq = &sc->txqs[i]; 2310 txq = &ah->txqs[i];
2329 spin_lock_bh(&txq->lock); 2311 spin_lock_bh(&txq->lock);
2330 if (txq->txq_len > 1) { 2312 if (txq->txq_len > 1) {
2331 if (txq->txq_poll_mark) { 2313 if (txq->txq_poll_mark) {
2332 ATH5K_DBG(sc, ATH5K_DEBUG_XMIT, 2314 ATH5K_DBG(ah, ATH5K_DEBUG_XMIT,
2333 "TX queue stuck %d\n", 2315 "TX queue stuck %d\n",
2334 txq->qnum); 2316 txq->qnum);
2335 needreset = true; 2317 needreset = true;
@@ -2345,14 +2327,14 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2345 } 2327 }
2346 2328
2347 if (needreset) { 2329 if (needreset) {
2348 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2330 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2349 "TX queues stuck, resetting\n"); 2331 "TX queues stuck, resetting\n");
2350 ath5k_reset(sc, NULL, true); 2332 ath5k_reset(ah, NULL, true);
2351 } 2333 }
2352 2334
2353 mutex_unlock(&sc->lock); 2335 mutex_unlock(&ah->lock);
2354 2336
2355 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2337 ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work,
2356 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2338 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2357} 2339}
2358 2340
@@ -2362,15 +2344,15 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2362\*************************/ 2344\*************************/
2363 2345
2364int __devinit 2346int __devinit
2365ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops) 2347ath5k_init_softc(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)
2366{ 2348{
2367 struct ieee80211_hw *hw = sc->hw; 2349 struct ieee80211_hw *hw = ah->hw;
2368 struct ath_common *common; 2350 struct ath_common *common;
2369 int ret; 2351 int ret;
2370 int csz; 2352 int csz;
2371 2353
2372 /* Initialize driver private data */ 2354 /* Initialize driver private data */
2373 SET_IEEE80211_DEV(hw, sc->dev); 2355 SET_IEEE80211_DEV(hw, ah->dev);
2374 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 2356 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2375 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 2357 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
2376 IEEE80211_HW_SIGNAL_DBM | 2358 IEEE80211_HW_SIGNAL_DBM |
@@ -2393,39 +2375,29 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2393 * Mark the device as detached to avoid processing 2375 * Mark the device as detached to avoid processing
2394 * interrupts until setup is complete. 2376 * interrupts until setup is complete.
2395 */ 2377 */
2396 __set_bit(ATH_STAT_INVALID, sc->status); 2378 __set_bit(ATH_STAT_INVALID, ah->status);
2397 2379
2398 sc->opmode = NL80211_IFTYPE_STATION; 2380 ah->opmode = NL80211_IFTYPE_STATION;
2399 sc->bintval = 1000; 2381 ah->bintval = 1000;
2400 mutex_init(&sc->lock); 2382 mutex_init(&ah->lock);
2401 spin_lock_init(&sc->rxbuflock); 2383 spin_lock_init(&ah->rxbuflock);
2402 spin_lock_init(&sc->txbuflock); 2384 spin_lock_init(&ah->txbuflock);
2403 spin_lock_init(&sc->block); 2385 spin_lock_init(&ah->block);
2404 spin_lock_init(&sc->irqlock); 2386 spin_lock_init(&ah->irqlock);
2405 2387
2406 /* Setup interrupt handler */ 2388 /* Setup interrupt handler */
2407 ret = request_irq(sc->irq, ath5k_intr, IRQF_SHARED, "ath", sc); 2389 ret = request_irq(ah->irq, ath5k_intr, IRQF_SHARED, "ath", ah);
2408 if (ret) { 2390 if (ret) {
2409 ATH5K_ERR(sc, "request_irq failed\n"); 2391 ATH5K_ERR(ah, "request_irq failed\n");
2410 goto err; 2392 goto err;
2411 } 2393 }
2412 2394
2413 /* If we passed the test, malloc an ath5k_hw struct */ 2395 common = ath5k_hw_common(ah);
2414 sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
2415 if (!sc->ah) {
2416 ret = -ENOMEM;
2417 ATH5K_ERR(sc, "out of memory\n");
2418 goto err_irq;
2419 }
2420
2421 sc->ah->ah_sc = sc;
2422 sc->ah->ah_iobase = sc->iobase;
2423 common = ath5k_hw_common(sc->ah);
2424 common->ops = &ath5k_common_ops; 2396 common->ops = &ath5k_common_ops;
2425 common->bus_ops = bus_ops; 2397 common->bus_ops = bus_ops;
2426 common->ah = sc->ah; 2398 common->ah = ah;
2427 common->hw = hw; 2399 common->hw = hw;
2428 common->priv = sc; 2400 common->priv = ah;
2429 common->clockrate = 40; 2401 common->clockrate = 40;
2430 2402
2431 /* 2403 /*
@@ -2438,12 +2410,12 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2438 spin_lock_init(&common->cc_lock); 2410 spin_lock_init(&common->cc_lock);
2439 2411
2440 /* Initialize device */ 2412 /* Initialize device */
2441 ret = ath5k_hw_init(sc); 2413 ret = ath5k_hw_init(ah);
2442 if (ret) 2414 if (ret)
2443 goto err_free_ah; 2415 goto err_irq;
2444 2416
2445 /* set up multi-rate retry capabilities */ 2417 /* set up multi-rate retry capabilities */
2446 if (sc->ah->ah_version == AR5K_AR5212) { 2418 if (ah->ah_version == AR5K_AR5212) {
2447 hw->max_rates = 4; 2419 hw->max_rates = 4;
2448 hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT, 2420 hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT,
2449 AR5K_INIT_RETRY_LONG); 2421 AR5K_INIT_RETRY_LONG);
@@ -2456,77 +2428,74 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2456 if (ret) 2428 if (ret)
2457 goto err_ah; 2429 goto err_ah;
2458 2430
2459 ATH5K_INFO(sc, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n", 2431 ATH5K_INFO(ah, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n",
2460 ath5k_chip_name(AR5K_VERSION_MAC, sc->ah->ah_mac_srev), 2432 ath5k_chip_name(AR5K_VERSION_MAC, ah->ah_mac_srev),
2461 sc->ah->ah_mac_srev, 2433 ah->ah_mac_srev,
2462 sc->ah->ah_phy_revision); 2434 ah->ah_phy_revision);
2463 2435
2464 if (!sc->ah->ah_single_chip) { 2436 if (!ah->ah_single_chip) {
2465 /* Single chip radio (!RF5111) */ 2437 /* Single chip radio (!RF5111) */
2466 if (sc->ah->ah_radio_5ghz_revision && 2438 if (ah->ah_radio_5ghz_revision &&
2467 !sc->ah->ah_radio_2ghz_revision) { 2439 !ah->ah_radio_2ghz_revision) {
2468 /* No 5GHz support -> report 2GHz radio */ 2440 /* No 5GHz support -> report 2GHz radio */
2469 if (!test_bit(AR5K_MODE_11A, 2441 if (!test_bit(AR5K_MODE_11A,
2470 sc->ah->ah_capabilities.cap_mode)) { 2442 ah->ah_capabilities.cap_mode)) {
2471 ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n", 2443 ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n",
2472 ath5k_chip_name(AR5K_VERSION_RAD, 2444 ath5k_chip_name(AR5K_VERSION_RAD,
2473 sc->ah->ah_radio_5ghz_revision), 2445 ah->ah_radio_5ghz_revision),
2474 sc->ah->ah_radio_5ghz_revision); 2446 ah->ah_radio_5ghz_revision);
2475 /* No 2GHz support (5110 and some 2447 /* No 2GHz support (5110 and some
2476 * 5GHz only cards) -> report 5GHz radio */ 2448 * 5GHz only cards) -> report 5GHz radio */
2477 } else if (!test_bit(AR5K_MODE_11B, 2449 } else if (!test_bit(AR5K_MODE_11B,
2478 sc->ah->ah_capabilities.cap_mode)) { 2450 ah->ah_capabilities.cap_mode)) {
2479 ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n", 2451 ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n",
2480 ath5k_chip_name(AR5K_VERSION_RAD, 2452 ath5k_chip_name(AR5K_VERSION_RAD,
2481 sc->ah->ah_radio_5ghz_revision), 2453 ah->ah_radio_5ghz_revision),
2482 sc->ah->ah_radio_5ghz_revision); 2454 ah->ah_radio_5ghz_revision);
2483 /* Multiband radio */ 2455 /* Multiband radio */
2484 } else { 2456 } else {
2485 ATH5K_INFO(sc, "RF%s multiband radio found" 2457 ATH5K_INFO(ah, "RF%s multiband radio found"
2486 " (0x%x)\n", 2458 " (0x%x)\n",
2487 ath5k_chip_name(AR5K_VERSION_RAD, 2459 ath5k_chip_name(AR5K_VERSION_RAD,
2488 sc->ah->ah_radio_5ghz_revision), 2460 ah->ah_radio_5ghz_revision),
2489 sc->ah->ah_radio_5ghz_revision); 2461 ah->ah_radio_5ghz_revision);
2490 } 2462 }
2491 } 2463 }
2492 /* Multi chip radio (RF5111 - RF2111) -> 2464 /* Multi chip radio (RF5111 - RF2111) ->
2493 * report both 2GHz/5GHz radios */ 2465 * report both 2GHz/5GHz radios */
2494 else if (sc->ah->ah_radio_5ghz_revision && 2466 else if (ah->ah_radio_5ghz_revision &&
2495 sc->ah->ah_radio_2ghz_revision) { 2467 ah->ah_radio_2ghz_revision) {
2496 ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n", 2468 ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n",
2497 ath5k_chip_name(AR5K_VERSION_RAD, 2469 ath5k_chip_name(AR5K_VERSION_RAD,
2498 sc->ah->ah_radio_5ghz_revision), 2470 ah->ah_radio_5ghz_revision),
2499 sc->ah->ah_radio_5ghz_revision); 2471 ah->ah_radio_5ghz_revision);
2500 ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n", 2472 ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n",
2501 ath5k_chip_name(AR5K_VERSION_RAD, 2473 ath5k_chip_name(AR5K_VERSION_RAD,
2502 sc->ah->ah_radio_2ghz_revision), 2474 ah->ah_radio_2ghz_revision),
2503 sc->ah->ah_radio_2ghz_revision); 2475 ah->ah_radio_2ghz_revision);
2504 } 2476 }
2505 } 2477 }
2506 2478
2507 ath5k_debug_init_device(sc); 2479 ath5k_debug_init_device(ah);
2508 2480
2509 /* ready to process interrupts */ 2481 /* ready to process interrupts */
2510 __clear_bit(ATH_STAT_INVALID, sc->status); 2482 __clear_bit(ATH_STAT_INVALID, ah->status);
2511 2483
2512 return 0; 2484 return 0;
2513err_ah: 2485err_ah:
2514 ath5k_hw_deinit(sc->ah); 2486 ath5k_hw_deinit(ah);
2515err_free_ah:
2516 kfree(sc->ah);
2517err_irq: 2487err_irq:
2518 free_irq(sc->irq, sc); 2488 free_irq(ah->irq, ah);
2519err: 2489err:
2520 return ret; 2490 return ret;
2521} 2491}
2522 2492
2523static int 2493static int
2524ath5k_stop_locked(struct ath5k_softc *sc) 2494ath5k_stop_locked(struct ath5k_hw *ah)
2525{ 2495{
2526 struct ath5k_hw *ah = sc->ah;
2527 2496
2528 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "invalid %u\n", 2497 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "invalid %u\n",
2529 test_bit(ATH_STAT_INVALID, sc->status)); 2498 test_bit(ATH_STAT_INVALID, ah->status));
2530 2499
2531 /* 2500 /*
2532 * Shutdown the hardware and driver: 2501 * Shutdown the hardware and driver:
@@ -2543,37 +2512,36 @@ ath5k_stop_locked(struct ath5k_softc *sc)
2543 * Note that some of this work is not possible if the 2512 * Note that some of this work is not possible if the
2544 * hardware is gone (invalid). 2513 * hardware is gone (invalid).
2545 */ 2514 */
2546 ieee80211_stop_queues(sc->hw); 2515 ieee80211_stop_queues(ah->hw);
2547 2516
2548 if (!test_bit(ATH_STAT_INVALID, sc->status)) { 2517 if (!test_bit(ATH_STAT_INVALID, ah->status)) {
2549 ath5k_led_off(sc); 2518 ath5k_led_off(ah);
2550 ath5k_hw_set_imr(ah, 0); 2519 ath5k_hw_set_imr(ah, 0);
2551 synchronize_irq(sc->irq); 2520 synchronize_irq(ah->irq);
2552 ath5k_rx_stop(sc); 2521 ath5k_rx_stop(ah);
2553 ath5k_hw_dma_stop(ah); 2522 ath5k_hw_dma_stop(ah);
2554 ath5k_drain_tx_buffs(sc); 2523 ath5k_drain_tx_buffs(ah);
2555 ath5k_hw_phy_disable(ah); 2524 ath5k_hw_phy_disable(ah);
2556 } 2525 }
2557 2526
2558 return 0; 2527 return 0;
2559} 2528}
2560 2529
2561int 2530int ath5k_start(struct ieee80211_hw *hw)
2562ath5k_init_hw(struct ath5k_softc *sc)
2563{ 2531{
2564 struct ath5k_hw *ah = sc->ah; 2532 struct ath5k_hw *ah = hw->priv;
2565 struct ath_common *common = ath5k_hw_common(ah); 2533 struct ath_common *common = ath5k_hw_common(ah);
2566 int ret, i; 2534 int ret, i;
2567 2535
2568 mutex_lock(&sc->lock); 2536 mutex_lock(&ah->lock);
2569 2537
2570 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "mode %d\n", sc->opmode); 2538 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "mode %d\n", ah->opmode);
2571 2539
2572 /* 2540 /*
2573 * Stop anything previously setup. This is safe 2541 * Stop anything previously setup. This is safe
2574 * no matter this is the first time through or not. 2542 * no matter this is the first time through or not.
2575 */ 2543 */
2576 ath5k_stop_locked(sc); 2544 ath5k_stop_locked(ah);
2577 2545
2578 /* 2546 /*
2579 * The basic interface to setting the hardware in a good 2547 * The basic interface to setting the hardware in a good
@@ -2582,12 +2550,12 @@ ath5k_init_hw(struct ath5k_softc *sc)
2582 * be followed by initialization of the appropriate bits 2550 * be followed by initialization of the appropriate bits
2583 * and then setup of the interrupt mask. 2551 * and then setup of the interrupt mask.
2584 */ 2552 */
2585 sc->curchan = sc->hw->conf.channel; 2553 ah->curchan = ah->hw->conf.channel;
2586 sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL | 2554 ah->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL |
2587 AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL | 2555 AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL |
2588 AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB; 2556 AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB;
2589 2557
2590 ret = ath5k_reset(sc, NULL, false); 2558 ret = ath5k_reset(ah, NULL, false);
2591 if (ret) 2559 if (ret)
2592 goto done; 2560 goto done;
2593 2561
@@ -2604,29 +2572,29 @@ ath5k_init_hw(struct ath5k_softc *sc)
2604 * rate */ 2572 * rate */
2605 ah->ah_ack_bitrate_high = true; 2573 ah->ah_ack_bitrate_high = true;
2606 2574
2607 for (i = 0; i < ARRAY_SIZE(sc->bslot); i++) 2575 for (i = 0; i < ARRAY_SIZE(ah->bslot); i++)
2608 sc->bslot[i] = NULL; 2576 ah->bslot[i] = NULL;
2609 2577
2610 ret = 0; 2578 ret = 0;
2611done: 2579done:
2612 mmiowb(); 2580 mmiowb();
2613 mutex_unlock(&sc->lock); 2581 mutex_unlock(&ah->lock);
2614 2582
2615 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2583 ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work,
2616 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2584 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2617 2585
2618 return ret; 2586 return ret;
2619} 2587}
2620 2588
2621static void ath5k_stop_tasklets(struct ath5k_softc *sc) 2589static void ath5k_stop_tasklets(struct ath5k_hw *ah)
2622{ 2590{
2623 sc->rx_pending = false; 2591 ah->rx_pending = false;
2624 sc->tx_pending = false; 2592 ah->tx_pending = false;
2625 tasklet_kill(&sc->rxtq); 2593 tasklet_kill(&ah->rxtq);
2626 tasklet_kill(&sc->txtq); 2594 tasklet_kill(&ah->txtq);
2627 tasklet_kill(&sc->calib); 2595 tasklet_kill(&ah->calib);
2628 tasklet_kill(&sc->beacontq); 2596 tasklet_kill(&ah->beacontq);
2629 tasklet_kill(&sc->ani_tasklet); 2597 tasklet_kill(&ah->ani_tasklet);
2630} 2598}
2631 2599
2632/* 2600/*
@@ -2635,14 +2603,14 @@ static void ath5k_stop_tasklets(struct ath5k_softc *sc)
2635 * if another thread does a system call and the thread doing the 2603 * if another thread does a system call and the thread doing the
2636 * stop is preempted). 2604 * stop is preempted).
2637 */ 2605 */
2638int 2606void ath5k_stop(struct ieee80211_hw *hw)
2639ath5k_stop_hw(struct ath5k_softc *sc)
2640{ 2607{
2608 struct ath5k_hw *ah = hw->priv;
2641 int ret; 2609 int ret;
2642 2610
2643 mutex_lock(&sc->lock); 2611 mutex_lock(&ah->lock);
2644 ret = ath5k_stop_locked(sc); 2612 ret = ath5k_stop_locked(ah);
2645 if (ret == 0 && !test_bit(ATH_STAT_INVALID, sc->status)) { 2613 if (ret == 0 && !test_bit(ATH_STAT_INVALID, ah->status)) {
2646 /* 2614 /*
2647 * Don't set the card in full sleep mode! 2615 * Don't set the card in full sleep mode!
2648 * 2616 *
@@ -2663,69 +2631,66 @@ ath5k_stop_hw(struct ath5k_softc *sc)
2663 * and Sam's HAL do anyway). Instead Perform a full reset 2631 * and Sam's HAL do anyway). Instead Perform a full reset
2664 * on the device (same as initial state after attach) and 2632 * on the device (same as initial state after attach) and
2665 * leave it idle (keep MAC/BB on warm reset) */ 2633 * leave it idle (keep MAC/BB on warm reset) */
2666 ret = ath5k_hw_on_hold(sc->ah); 2634 ret = ath5k_hw_on_hold(ah);
2667 2635
2668 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2636 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2669 "putting device to sleep\n"); 2637 "putting device to sleep\n");
2670 } 2638 }
2671 2639
2672 mmiowb(); 2640 mmiowb();
2673 mutex_unlock(&sc->lock); 2641 mutex_unlock(&ah->lock);
2674
2675 ath5k_stop_tasklets(sc);
2676 2642
2677 cancel_delayed_work_sync(&sc->tx_complete_work); 2643 ath5k_stop_tasklets(ah);
2678 2644
2679 ath5k_rfkill_hw_stop(sc->ah); 2645 cancel_delayed_work_sync(&ah->tx_complete_work);
2680 2646
2681 return ret; 2647 ath5k_rfkill_hw_stop(ah);
2682} 2648}
2683 2649
2684/* 2650/*
2685 * Reset the hardware. If chan is not NULL, then also pause rx/tx 2651 * Reset the hardware. If chan is not NULL, then also pause rx/tx
2686 * and change to the given channel. 2652 * and change to the given channel.
2687 * 2653 *
2688 * This should be called with sc->lock. 2654 * This should be called with ah->lock.
2689 */ 2655 */
2690static int 2656static int
2691ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, 2657ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
2692 bool skip_pcu) 2658 bool skip_pcu)
2693{ 2659{
2694 struct ath5k_hw *ah = sc->ah;
2695 struct ath_common *common = ath5k_hw_common(ah); 2660 struct ath_common *common = ath5k_hw_common(ah);
2696 int ret, ani_mode; 2661 int ret, ani_mode;
2697 bool fast; 2662 bool fast;
2698 2663
2699 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "resetting\n"); 2664 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "resetting\n");
2700 2665
2701 ath5k_hw_set_imr(ah, 0); 2666 ath5k_hw_set_imr(ah, 0);
2702 synchronize_irq(sc->irq); 2667 synchronize_irq(ah->irq);
2703 ath5k_stop_tasklets(sc); 2668 ath5k_stop_tasklets(ah);
2704 2669
2705 /* Save ani mode and disable ANI during 2670 /* Save ani mode and disable ANI during
2706 * reset. If we don't we might get false 2671 * reset. If we don't we might get false
2707 * PHY error interrupts. */ 2672 * PHY error interrupts. */
2708 ani_mode = ah->ah_sc->ani_state.ani_mode; 2673 ani_mode = ah->ani_state.ani_mode;
2709 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF); 2674 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF);
2710 2675
2711 /* We are going to empty hw queues 2676 /* We are going to empty hw queues
2712 * so we should also free any remaining 2677 * so we should also free any remaining
2713 * tx buffers */ 2678 * tx buffers */
2714 ath5k_drain_tx_buffs(sc); 2679 ath5k_drain_tx_buffs(ah);
2715 if (chan) 2680 if (chan)
2716 sc->curchan = chan; 2681 ah->curchan = chan;
2717 2682
2718 fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0; 2683 fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0;
2719 2684
2720 ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, fast, skip_pcu); 2685 ret = ath5k_hw_reset(ah, ah->opmode, ah->curchan, fast, skip_pcu);
2721 if (ret) { 2686 if (ret) {
2722 ATH5K_ERR(sc, "can't reset hardware (%d)\n", ret); 2687 ATH5K_ERR(ah, "can't reset hardware (%d)\n", ret);
2723 goto err; 2688 goto err;
2724 } 2689 }
2725 2690
2726 ret = ath5k_rx_start(sc); 2691 ret = ath5k_rx_start(ah);
2727 if (ret) { 2692 if (ret) {
2728 ATH5K_ERR(sc, "can't start recv logic\n"); 2693 ATH5K_ERR(ah, "can't start recv logic\n");
2729 goto err; 2694 goto err;
2730 } 2695 }
2731 2696
@@ -2737,7 +2702,7 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
2737 ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8); 2702 ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8);
2738 2703
2739 /* clear survey data and cycle counters */ 2704 /* clear survey data and cycle counters */
2740 memset(&sc->survey, 0, sizeof(sc->survey)); 2705 memset(&ah->survey, 0, sizeof(ah->survey));
2741 spin_lock_bh(&common->cc_lock); 2706 spin_lock_bh(&common->cc_lock);
2742 ath_hw_cycle_counters_update(common); 2707 ath_hw_cycle_counters_update(common);
2743 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 2708 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
@@ -2753,12 +2718,12 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
2753 * 2718 *
2754 * XXX needed? 2719 * XXX needed?
2755 */ 2720 */
2756/* ath5k_chan_change(sc, c); */ 2721/* ath5k_chan_change(ah, c); */
2757 2722
2758 ath5k_beacon_config(sc); 2723 ath5k_beacon_config(ah);
2759 /* intrs are enabled by ath5k_beacon_config */ 2724 /* intrs are enabled by ath5k_beacon_config */
2760 2725
2761 ieee80211_wake_queues(sc->hw); 2726 ieee80211_wake_queues(ah->hw);
2762 2727
2763 return 0; 2728 return 0;
2764err: 2729err:
@@ -2767,20 +2732,19 @@ err:
2767 2732
2768static void ath5k_reset_work(struct work_struct *work) 2733static void ath5k_reset_work(struct work_struct *work)
2769{ 2734{
2770 struct ath5k_softc *sc = container_of(work, struct ath5k_softc, 2735 struct ath5k_hw *ah = container_of(work, struct ath5k_hw,
2771 reset_work); 2736 reset_work);
2772 2737
2773 mutex_lock(&sc->lock); 2738 mutex_lock(&ah->lock);
2774 ath5k_reset(sc, NULL, true); 2739 ath5k_reset(ah, NULL, true);
2775 mutex_unlock(&sc->lock); 2740 mutex_unlock(&ah->lock);
2776} 2741}
2777 2742
2778static int __devinit 2743static int __devinit
2779ath5k_init(struct ieee80211_hw *hw) 2744ath5k_init(struct ieee80211_hw *hw)
2780{ 2745{
2781 2746
2782 struct ath5k_softc *sc = hw->priv; 2747 struct ath5k_hw *ah = hw->priv;
2783 struct ath5k_hw *ah = sc->ah;
2784 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah); 2748 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
2785 struct ath5k_txq *txq; 2749 struct ath5k_txq *txq;
2786 u8 mac[ETH_ALEN] = {}; 2750 u8 mac[ETH_ALEN] = {};
@@ -2799,7 +2763,7 @@ ath5k_init(struct ieee80211_hw *hw)
2799 if (ret < 0) 2763 if (ret < 0)
2800 goto err; 2764 goto err;
2801 if (ret > 0) 2765 if (ret > 0)
2802 __set_bit(ATH_STAT_MRRETRY, sc->status); 2766 __set_bit(ATH_STAT_MRRETRY, ah->status);
2803 2767
2804 /* 2768 /*
2805 * Collect the channel list. The 802.11 layer 2769 * Collect the channel list. The 802.11 layer
@@ -2809,16 +2773,16 @@ ath5k_init(struct ieee80211_hw *hw)
2809 */ 2773 */
2810 ret = ath5k_setup_bands(hw); 2774 ret = ath5k_setup_bands(hw);
2811 if (ret) { 2775 if (ret) {
2812 ATH5K_ERR(sc, "can't get channels\n"); 2776 ATH5K_ERR(ah, "can't get channels\n");
2813 goto err; 2777 goto err;
2814 } 2778 }
2815 2779
2816 /* 2780 /*
2817 * Allocate tx+rx descriptors and populate the lists. 2781 * Allocate tx+rx descriptors and populate the lists.
2818 */ 2782 */
2819 ret = ath5k_desc_alloc(sc); 2783 ret = ath5k_desc_alloc(ah);
2820 if (ret) { 2784 if (ret) {
2821 ATH5K_ERR(sc, "can't allocate descriptors\n"); 2785 ATH5K_ERR(ah, "can't allocate descriptors\n");
2822 goto err; 2786 goto err;
2823 } 2787 }
2824 2788
@@ -2830,14 +2794,14 @@ ath5k_init(struct ieee80211_hw *hw)
2830 */ 2794 */
2831 ret = ath5k_beaconq_setup(ah); 2795 ret = ath5k_beaconq_setup(ah);
2832 if (ret < 0) { 2796 if (ret < 0) {
2833 ATH5K_ERR(sc, "can't setup a beacon xmit queue\n"); 2797 ATH5K_ERR(ah, "can't setup a beacon xmit queue\n");
2834 goto err_desc; 2798 goto err_desc;
2835 } 2799 }
2836 sc->bhalq = ret; 2800 ah->bhalq = ret;
2837 sc->cabq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_CAB, 0); 2801 ah->cabq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_CAB, 0);
2838 if (IS_ERR(sc->cabq)) { 2802 if (IS_ERR(ah->cabq)) {
2839 ATH5K_ERR(sc, "can't setup cab queue\n"); 2803 ATH5K_ERR(ah, "can't setup cab queue\n");
2840 ret = PTR_ERR(sc->cabq); 2804 ret = PTR_ERR(ah->cabq);
2841 goto err_bhal; 2805 goto err_bhal;
2842 } 2806 }
2843 2807
@@ -2846,97 +2810,97 @@ ath5k_init(struct ieee80211_hw *hw)
2846 if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) { 2810 if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) {
2847 /* This order matches mac80211's queue priority, so we can 2811 /* This order matches mac80211's queue priority, so we can
2848 * directly use the mac80211 queue number without any mapping */ 2812 * directly use the mac80211 queue number without any mapping */
2849 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO); 2813 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO);
2850 if (IS_ERR(txq)) { 2814 if (IS_ERR(txq)) {
2851 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2815 ATH5K_ERR(ah, "can't setup xmit queue\n");
2852 ret = PTR_ERR(txq); 2816 ret = PTR_ERR(txq);
2853 goto err_queues; 2817 goto err_queues;
2854 } 2818 }
2855 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI); 2819 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI);
2856 if (IS_ERR(txq)) { 2820 if (IS_ERR(txq)) {
2857 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2821 ATH5K_ERR(ah, "can't setup xmit queue\n");
2858 ret = PTR_ERR(txq); 2822 ret = PTR_ERR(txq);
2859 goto err_queues; 2823 goto err_queues;
2860 } 2824 }
2861 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); 2825 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
2862 if (IS_ERR(txq)) { 2826 if (IS_ERR(txq)) {
2863 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2827 ATH5K_ERR(ah, "can't setup xmit queue\n");
2864 ret = PTR_ERR(txq); 2828 ret = PTR_ERR(txq);
2865 goto err_queues; 2829 goto err_queues;
2866 } 2830 }
2867 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK); 2831 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK);
2868 if (IS_ERR(txq)) { 2832 if (IS_ERR(txq)) {
2869 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2833 ATH5K_ERR(ah, "can't setup xmit queue\n");
2870 ret = PTR_ERR(txq); 2834 ret = PTR_ERR(txq);
2871 goto err_queues; 2835 goto err_queues;
2872 } 2836 }
2873 hw->queues = 4; 2837 hw->queues = 4;
2874 } else { 2838 } else {
2875 /* older hardware (5210) can only support one data queue */ 2839 /* older hardware (5210) can only support one data queue */
2876 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); 2840 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
2877 if (IS_ERR(txq)) { 2841 if (IS_ERR(txq)) {
2878 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2842 ATH5K_ERR(ah, "can't setup xmit queue\n");
2879 ret = PTR_ERR(txq); 2843 ret = PTR_ERR(txq);
2880 goto err_queues; 2844 goto err_queues;
2881 } 2845 }
2882 hw->queues = 1; 2846 hw->queues = 1;
2883 } 2847 }
2884 2848
2885 tasklet_init(&sc->rxtq, ath5k_tasklet_rx, (unsigned long)sc); 2849 tasklet_init(&ah->rxtq, ath5k_tasklet_rx, (unsigned long)ah);
2886 tasklet_init(&sc->txtq, ath5k_tasklet_tx, (unsigned long)sc); 2850 tasklet_init(&ah->txtq, ath5k_tasklet_tx, (unsigned long)ah);
2887 tasklet_init(&sc->calib, ath5k_tasklet_calibrate, (unsigned long)sc); 2851 tasklet_init(&ah->calib, ath5k_tasklet_calibrate, (unsigned long)ah);
2888 tasklet_init(&sc->beacontq, ath5k_tasklet_beacon, (unsigned long)sc); 2852 tasklet_init(&ah->beacontq, ath5k_tasklet_beacon, (unsigned long)ah);
2889 tasklet_init(&sc->ani_tasklet, ath5k_tasklet_ani, (unsigned long)sc); 2853 tasklet_init(&ah->ani_tasklet, ath5k_tasklet_ani, (unsigned long)ah);
2890 2854
2891 INIT_WORK(&sc->reset_work, ath5k_reset_work); 2855 INIT_WORK(&ah->reset_work, ath5k_reset_work);
2892 INIT_DELAYED_WORK(&sc->tx_complete_work, ath5k_tx_complete_poll_work); 2856 INIT_DELAYED_WORK(&ah->tx_complete_work, ath5k_tx_complete_poll_work);
2893 2857
2894 ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac); 2858 ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac);
2895 if (ret) { 2859 if (ret) {
2896 ATH5K_ERR(sc, "unable to read address from EEPROM\n"); 2860 ATH5K_ERR(ah, "unable to read address from EEPROM\n");
2897 goto err_queues; 2861 goto err_queues;
2898 } 2862 }
2899 2863
2900 SET_IEEE80211_PERM_ADDR(hw, mac); 2864 SET_IEEE80211_PERM_ADDR(hw, mac);
2901 memcpy(&sc->lladdr, mac, ETH_ALEN); 2865 memcpy(&ah->lladdr, mac, ETH_ALEN);
2902 /* All MAC address bits matter for ACKs */ 2866 /* All MAC address bits matter for ACKs */
2903 ath5k_update_bssid_mask_and_opmode(sc, NULL); 2867 ath5k_update_bssid_mask_and_opmode(ah, NULL);
2904 2868
2905 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; 2869 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain;
2906 ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier); 2870 ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier);
2907 if (ret) { 2871 if (ret) {
2908 ATH5K_ERR(sc, "can't initialize regulatory system\n"); 2872 ATH5K_ERR(ah, "can't initialize regulatory system\n");
2909 goto err_queues; 2873 goto err_queues;
2910 } 2874 }
2911 2875
2912 ret = ieee80211_register_hw(hw); 2876 ret = ieee80211_register_hw(hw);
2913 if (ret) { 2877 if (ret) {
2914 ATH5K_ERR(sc, "can't register ieee80211 hw\n"); 2878 ATH5K_ERR(ah, "can't register ieee80211 hw\n");
2915 goto err_queues; 2879 goto err_queues;
2916 } 2880 }
2917 2881
2918 if (!ath_is_world_regd(regulatory)) 2882 if (!ath_is_world_regd(regulatory))
2919 regulatory_hint(hw->wiphy, regulatory->alpha2); 2883 regulatory_hint(hw->wiphy, regulatory->alpha2);
2920 2884
2921 ath5k_init_leds(sc); 2885 ath5k_init_leds(ah);
2922 2886
2923 ath5k_sysfs_register(sc); 2887 ath5k_sysfs_register(ah);
2924 2888
2925 return 0; 2889 return 0;
2926err_queues: 2890err_queues:
2927 ath5k_txq_release(sc); 2891 ath5k_txq_release(ah);
2928err_bhal: 2892err_bhal:
2929 ath5k_hw_release_tx_queue(ah, sc->bhalq); 2893 ath5k_hw_release_tx_queue(ah, ah->bhalq);
2930err_desc: 2894err_desc:
2931 ath5k_desc_free(sc); 2895 ath5k_desc_free(ah);
2932err: 2896err:
2933 return ret; 2897 return ret;
2934} 2898}
2935 2899
2936void 2900void
2937ath5k_deinit_softc(struct ath5k_softc *sc) 2901ath5k_deinit_softc(struct ath5k_hw *ah)
2938{ 2902{
2939 struct ieee80211_hw *hw = sc->hw; 2903 struct ieee80211_hw *hw = ah->hw;
2940 2904
2941 /* 2905 /*
2942 * NB: the order of these is important: 2906 * NB: the order of these is important:
@@ -2952,24 +2916,23 @@ ath5k_deinit_softc(struct ath5k_softc *sc)
2952 * Other than that, it's straightforward... 2916 * Other than that, it's straightforward...
2953 */ 2917 */
2954 ieee80211_unregister_hw(hw); 2918 ieee80211_unregister_hw(hw);
2955 ath5k_desc_free(sc); 2919 ath5k_desc_free(ah);
2956 ath5k_txq_release(sc); 2920 ath5k_txq_release(ah);
2957 ath5k_hw_release_tx_queue(sc->ah, sc->bhalq); 2921 ath5k_hw_release_tx_queue(ah, ah->bhalq);
2958 ath5k_unregister_leds(sc); 2922 ath5k_unregister_leds(ah);
2959 2923
2960 ath5k_sysfs_unregister(sc); 2924 ath5k_sysfs_unregister(ah);
2961 /* 2925 /*
2962 * NB: can't reclaim these until after ieee80211_ifdetach 2926 * NB: can't reclaim these until after ieee80211_ifdetach
2963 * returns because we'll get called back to reclaim node 2927 * returns because we'll get called back to reclaim node
2964 * state and potentially want to use them. 2928 * state and potentially want to use them.
2965 */ 2929 */
2966 ath5k_hw_deinit(sc->ah); 2930 ath5k_hw_deinit(ah);
2967 kfree(sc->ah); 2931 free_irq(ah->irq, ah);
2968 free_irq(sc->irq, sc);
2969} 2932}
2970 2933
2971bool 2934bool
2972ath5k_any_vif_assoc(struct ath5k_softc *sc) 2935ath5k_any_vif_assoc(struct ath5k_hw *ah)
2973{ 2936{
2974 struct ath5k_vif_iter_data iter_data; 2937 struct ath5k_vif_iter_data iter_data;
2975 iter_data.hw_macaddr = NULL; 2938 iter_data.hw_macaddr = NULL;
@@ -2977,7 +2940,7 @@ ath5k_any_vif_assoc(struct ath5k_softc *sc)
2977 iter_data.need_set_hw_addr = false; 2940 iter_data.need_set_hw_addr = false;
2978 iter_data.found_active = true; 2941 iter_data.found_active = true;
2979 2942
2980 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 2943 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
2981 &iter_data); 2944 &iter_data);
2982 return iter_data.any_assoc; 2945 return iter_data.any_assoc;
2983} 2946}
@@ -2985,8 +2948,7 @@ ath5k_any_vif_assoc(struct ath5k_softc *sc)
2985void 2948void
2986ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable) 2949ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)
2987{ 2950{
2988 struct ath5k_softc *sc = hw->priv; 2951 struct ath5k_hw *ah = hw->priv;
2989 struct ath5k_hw *ah = sc->ah;
2990 u32 rfilt; 2952 u32 rfilt;
2991 rfilt = ath5k_hw_get_rx_filter(ah); 2953 rfilt = ath5k_hw_get_rx_filter(ah);
2992 if (enable) 2954 if (enable)
@@ -2994,5 +2956,5 @@ ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)
2994 else 2956 else
2995 rfilt &= ~AR5K_RX_FILTER_BEACON; 2957 rfilt &= ~AR5K_RX_FILTER_BEACON;
2996 ath5k_hw_set_rx_filter(ah, rfilt); 2958 ath5k_hw_set_rx_filter(ah, rfilt);
2997 sc->filter_flags = rfilt; 2959 ah->filter_flags = rfilt;
2998} 2960}
diff --git a/drivers/net/wireless/ath/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h
index 0a98777b9373..a81f28d5bddc 100644
--- a/drivers/net/wireless/ath/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -45,23 +45,13 @@
45#include <linux/list.h> 45#include <linux/list.h>
46#include <linux/wireless.h> 46#include <linux/wireless.h>
47#include <linux/if_ether.h> 47#include <linux/if_ether.h>
48#include <linux/leds.h>
49#include <linux/rfkill.h> 48#include <linux/rfkill.h>
50#include <linux/workqueue.h> 49#include <linux/workqueue.h>
51 50
52#include "ath5k.h" 51#include "ath5k.h"
53#include "debug.h"
54#include "ani.h"
55
56#include "../regd.h" 52#include "../regd.h"
57#include "../ath.h" 53#include "../ath.h"
58 54
59#define ATH_RXBUF 40 /* number of RX buffers */
60#define ATH_TXBUF 200 /* number of TX buffers */
61#define ATH_BCBUF 4 /* number of beacon buffers */
62#define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
63#define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
64
65struct ath5k_buf { 55struct ath5k_buf {
66 struct list_head list; 56 struct list_head list;
67 struct ath5k_desc *desc; /* virtual addr of desc */ 57 struct ath5k_desc *desc; /* virtual addr of desc */
@@ -70,94 +60,6 @@ struct ath5k_buf {
70 dma_addr_t skbaddr;/* physical addr of skb data */ 60 dma_addr_t skbaddr;/* physical addr of skb data */
71}; 61};
72 62
73/*
74 * Data transmit queue state. One of these exists for each
75 * hardware transmit queue. Packets sent to us from above
76 * are assigned to queues based on their priority. Not all
77 * devices support a complete set of hardware transmit queues.
78 * For those devices the array sc_ac2q will map multiple
79 * priorities to fewer hardware queues (typically all to one
80 * hardware queue).
81 */
82struct ath5k_txq {
83 unsigned int qnum; /* hardware q number */
84 u32 *link; /* link ptr in last TX desc */
85 struct list_head q; /* transmit queue */
86 spinlock_t lock; /* lock on q and link */
87 bool setup;
88 int txq_len; /* number of queued buffers */
89 int txq_max; /* max allowed num of queued buffers */
90 bool txq_poll_mark;
91 unsigned int txq_stuck; /* informational counter */
92};
93
94#define ATH5K_LED_MAX_NAME_LEN 31
95
96/*
97 * State for LED triggers
98 */
99struct ath5k_led {
100 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
101 struct ath5k_softc *sc; /* driver state */
102 struct led_classdev led_dev; /* led classdev */
103};
104
105/* Rfkill */
106struct ath5k_rfkill {
107 /* GPIO PIN for rfkill */
108 u16 gpio;
109 /* polarity of rfkill GPIO PIN */
110 bool polarity;
111 /* RFKILL toggle tasklet */
112 struct tasklet_struct toggleq;
113};
114
115/* statistics */
116struct ath5k_statistics {
117 /* antenna use */
118 unsigned int antenna_rx[5]; /* frames count per antenna RX */
119 unsigned int antenna_tx[5]; /* frames count per antenna TX */
120
121 /* frame errors */
122 unsigned int rx_all_count; /* all RX frames, including errors */
123 unsigned int tx_all_count; /* all TX frames, including errors */
124 unsigned int rx_bytes_count; /* all RX bytes, including errored pkts
125 * and the MAC headers for each packet
126 */
127 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts
128 * and the MAC headers and padding for
129 * each packet.
130 */
131 unsigned int rxerr_crc;
132 unsigned int rxerr_phy;
133 unsigned int rxerr_phy_code[32];
134 unsigned int rxerr_fifo;
135 unsigned int rxerr_decrypt;
136 unsigned int rxerr_mic;
137 unsigned int rxerr_proc;
138 unsigned int rxerr_jumbo;
139 unsigned int txerr_retry;
140 unsigned int txerr_fifo;
141 unsigned int txerr_filt;
142
143 /* MIB counters */
144 unsigned int ack_fail;
145 unsigned int rts_fail;
146 unsigned int rts_ok;
147 unsigned int fcs_error;
148 unsigned int beacons;
149
150 unsigned int mib_intr;
151 unsigned int rxorn_intr;
152 unsigned int rxeol_intr;
153};
154
155#if CHAN_DEBUG
156#define ATH_CHAN_MAX (26 + 26 + 26 + 200 + 200)
157#else
158#define ATH_CHAN_MAX (14 + 14 + 14 + 252 + 20)
159#endif
160
161struct ath5k_vif { 63struct ath5k_vif {
162 bool assoc; /* are we associated or not */ 64 bool assoc; /* are we associated or not */
163 enum nl80211_iftype opmode; 65 enum nl80211_iftype opmode;
@@ -166,104 +68,6 @@ struct ath5k_vif {
166 u8 lladdr[ETH_ALEN]; 68 u8 lladdr[ETH_ALEN];
167}; 69};
168 70
169/* Software Carrier, keeps track of the driver state
170 * associated with an instance of a device */
171struct ath5k_softc {
172 struct pci_dev *pdev;
173 struct device *dev; /* for dma mapping */
174 int irq;
175 u16 devid;
176 void __iomem *iobase; /* address of the device */
177 struct mutex lock; /* dev-level lock */
178 struct ieee80211_hw *hw; /* IEEE 802.11 common */
179 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
180 struct ieee80211_channel channels[ATH_CHAN_MAX];
181 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
182 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
183 enum nl80211_iftype opmode;
184 struct ath5k_hw *ah; /* Atheros HW */
185
186#ifdef CONFIG_ATH5K_DEBUG
187 struct ath5k_dbg_info debug; /* debug info */
188#endif /* CONFIG_ATH5K_DEBUG */
189
190 struct ath5k_buf *bufptr; /* allocated buffer ptr */
191 struct ath5k_desc *desc; /* TX/RX descriptors */
192 dma_addr_t desc_daddr; /* DMA (physical) address */
193 size_t desc_len; /* size of TX/RX descriptors */
194
195 DECLARE_BITMAP(status, 6);
196#define ATH_STAT_INVALID 0 /* disable hardware accesses */
197#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
198#define ATH_STAT_PROMISC 2
199#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
200#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
201#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
202
203 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
204 struct ieee80211_channel *curchan; /* current h/w channel */
205
206 u16 nvifs;
207
208 enum ath5k_int imask; /* interrupt mask copy */
209
210 spinlock_t irqlock;
211 bool rx_pending; /* rx tasklet pending */
212 bool tx_pending; /* tx tasklet pending */
213
214 u8 lladdr[ETH_ALEN];
215 u8 bssidmask[ETH_ALEN];
216
217 unsigned int led_pin, /* GPIO pin for driving LED */
218 led_on; /* pin setting for LED on */
219
220 struct work_struct reset_work; /* deferred chip reset */
221
222 unsigned int rxbufsize; /* rx size based on mtu */
223 struct list_head rxbuf; /* receive buffer */
224 spinlock_t rxbuflock;
225 u32 *rxlink; /* link ptr in last RX desc */
226 struct tasklet_struct rxtq; /* rx intr tasklet */
227 struct ath5k_led rx_led; /* rx led */
228
229 struct list_head txbuf; /* transmit buffer */
230 spinlock_t txbuflock;
231 unsigned int txbuf_len; /* buf count in txbuf list */
232 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
233 struct tasklet_struct txtq; /* tx intr tasklet */
234 struct ath5k_led tx_led; /* tx led */
235
236 struct ath5k_rfkill rf_kill;
237
238 struct tasklet_struct calib; /* calibration tasklet */
239
240 spinlock_t block; /* protects beacon */
241 struct tasklet_struct beacontq; /* beacon intr tasklet */
242 struct list_head bcbuf; /* beacon buffer */
243 struct ieee80211_vif *bslot[ATH_BCBUF];
244 u16 num_ap_vifs;
245 u16 num_adhoc_vifs;
246 unsigned int bhalq, /* SW q for outgoing beacons */
247 bmisscount, /* missed beacon transmits */
248 bintval, /* beacon interval in TU */
249 bsent;
250 unsigned int nexttbtt; /* next beacon time in TU */
251 struct ath5k_txq *cabq; /* content after beacon */
252
253 int power_level; /* Requested tx power in dBm */
254 bool assoc; /* associate state */
255 bool enable_beacon; /* true if beacons are on */
256
257 struct ath5k_statistics stats;
258
259 struct ath5k_ani_state ani_state;
260 struct tasklet_struct ani_tasklet; /* ANI calibration */
261
262 struct delayed_work tx_complete_work;
263
264 struct survey_info survey; /* collected survey info */
265};
266
267struct ath5k_vif_iter_data { 71struct ath5k_vif_iter_data {
268 const u8 *hw_macaddr; 72 const u8 *hw_macaddr;
269 u8 mask[ETH_ALEN]; 73 u8 mask[ETH_ALEN];
@@ -277,9 +81,10 @@ struct ath5k_vif_iter_data {
277void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif); 81void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif);
278 82
279 83
280#define ath5k_hw_hasbssidmask(_ah) \ 84/* Check whether BSSID mask is supported */
281 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0) 85#define ath5k_hw_hasbssidmask(_ah) (ah->ah_version == AR5K_AR5212)
282#define ath5k_hw_hasveol(_ah) \ 86
283 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) 87/* Check whether virtual EOL is supported */
88#define ath5k_hw_hasveol(_ah) (ah->ah_version != AR5K_AR5210)
284 89
285#endif 90#endif
diff --git a/drivers/net/wireless/ath/ath5k/caps.c b/drivers/net/wireless/ath/ath5k/caps.c
index c752982aec05..eefe670e28a7 100644
--- a/drivers/net/wireless/ath/ath5k/caps.c
+++ b/drivers/net/wireless/ath/ath5k/caps.c
@@ -112,51 +112,6 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah)
112 return 0; 112 return 0;
113} 113}
114 114
115/* Main function used by the driver part to check caps */
116int ath5k_hw_get_capability(struct ath5k_hw *ah,
117 enum ath5k_capability_type cap_type,
118 u32 capability, u32 *result)
119{
120 switch (cap_type) {
121 case AR5K_CAP_NUM_TXQUEUES:
122 if (result) {
123 if (ah->ah_version == AR5K_AR5210)
124 *result = AR5K_NUM_TX_QUEUES_NOQCU;
125 else
126 *result = AR5K_NUM_TX_QUEUES;
127 goto yes;
128 }
129 case AR5K_CAP_VEOL:
130 goto yes;
131 case AR5K_CAP_COMPRESSION:
132 if (ah->ah_version == AR5K_AR5212)
133 goto yes;
134 else
135 goto no;
136 case AR5K_CAP_BURST:
137 goto yes;
138 case AR5K_CAP_TPC:
139 goto yes;
140 case AR5K_CAP_BSSIDMASK:
141 if (ah->ah_version == AR5K_AR5212)
142 goto yes;
143 else
144 goto no;
145 case AR5K_CAP_XR:
146 if (ah->ah_version == AR5K_AR5212)
147 goto yes;
148 else
149 goto no;
150 default:
151 goto no;
152 }
153
154no:
155 return -EINVAL;
156yes:
157 return 0;
158}
159
160/* 115/*
161 * TODO: Following functions should be part of a new function 116 * TODO: Following functions should be part of a new function
162 * set_capability 117 * set_capability
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c
index 4edca7072d53..ccca724de173 100644
--- a/drivers/net/wireless/ath/ath5k/debug.c
+++ b/drivers/net/wireless/ath/ath5k/debug.c
@@ -157,10 +157,10 @@ static void *reg_next(struct seq_file *seq, void *p, loff_t *pos)
157 157
158static int reg_show(struct seq_file *seq, void *p) 158static int reg_show(struct seq_file *seq, void *p)
159{ 159{
160 struct ath5k_softc *sc = seq->private; 160 struct ath5k_hw *ah = seq->private;
161 struct reg *r = p; 161 struct reg *r = p;
162 seq_printf(seq, "%-25s0x%08x\n", r->name, 162 seq_printf(seq, "%-25s0x%08x\n", r->name,
163 ath5k_hw_reg_read(sc->ah, r->addr)); 163 ath5k_hw_reg_read(ah, r->addr));
164 return 0; 164 return 0;
165} 165}
166 166
@@ -197,42 +197,41 @@ static const struct file_operations fops_registers = {
197static ssize_t read_file_beacon(struct file *file, char __user *user_buf, 197static ssize_t read_file_beacon(struct file *file, char __user *user_buf,
198 size_t count, loff_t *ppos) 198 size_t count, loff_t *ppos)
199{ 199{
200 struct ath5k_softc *sc = file->private_data; 200 struct ath5k_hw *ah = file->private_data;
201 struct ath5k_hw *ah = sc->ah;
202 char buf[500]; 201 char buf[500];
203 unsigned int len = 0; 202 unsigned int len = 0;
204 unsigned int v; 203 unsigned int v;
205 u64 tsf; 204 u64 tsf;
206 205
207 v = ath5k_hw_reg_read(sc->ah, AR5K_BEACON); 206 v = ath5k_hw_reg_read(ah, AR5K_BEACON);
208 len += snprintf(buf + len, sizeof(buf) - len, 207 len += snprintf(buf + len, sizeof(buf) - len,
209 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n", 208 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n",
210 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD, 209 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD,
211 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S); 210 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S);
212 211
213 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n", 212 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n",
214 "AR5K_LAST_TSTP", ath5k_hw_reg_read(sc->ah, AR5K_LAST_TSTP)); 213 "AR5K_LAST_TSTP", ath5k_hw_reg_read(ah, AR5K_LAST_TSTP));
215 214
216 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n", 215 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n",
217 "AR5K_BEACON_CNT", ath5k_hw_reg_read(sc->ah, AR5K_BEACON_CNT)); 216 "AR5K_BEACON_CNT", ath5k_hw_reg_read(ah, AR5K_BEACON_CNT));
218 217
219 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER0); 218 v = ath5k_hw_reg_read(ah, AR5K_TIMER0);
220 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 219 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
221 "AR5K_TIMER0 (TBTT)", v, v); 220 "AR5K_TIMER0 (TBTT)", v, v);
222 221
223 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER1); 222 v = ath5k_hw_reg_read(ah, AR5K_TIMER1);
224 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 223 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
225 "AR5K_TIMER1 (DMA)", v, v >> 3); 224 "AR5K_TIMER1 (DMA)", v, v >> 3);
226 225
227 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER2); 226 v = ath5k_hw_reg_read(ah, AR5K_TIMER2);
228 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 227 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
229 "AR5K_TIMER2 (SWBA)", v, v >> 3); 228 "AR5K_TIMER2 (SWBA)", v, v >> 3);
230 229
231 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER3); 230 v = ath5k_hw_reg_read(ah, AR5K_TIMER3);
232 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 231 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
233 "AR5K_TIMER3 (ATIM)", v, v); 232 "AR5K_TIMER3 (ATIM)", v, v);
234 233
235 tsf = ath5k_hw_get_tsf64(sc->ah); 234 tsf = ath5k_hw_get_tsf64(ah);
236 len += snprintf(buf + len, sizeof(buf) - len, 235 len += snprintf(buf + len, sizeof(buf) - len,
237 "TSF\t\t0x%016llx\tTU: %08x\n", 236 "TSF\t\t0x%016llx\tTU: %08x\n",
238 (unsigned long long)tsf, TSF_TO_TU(tsf)); 237 (unsigned long long)tsf, TSF_TO_TU(tsf));
@@ -247,8 +246,7 @@ static ssize_t write_file_beacon(struct file *file,
247 const char __user *userbuf, 246 const char __user *userbuf,
248 size_t count, loff_t *ppos) 247 size_t count, loff_t *ppos)
249{ 248{
250 struct ath5k_softc *sc = file->private_data; 249 struct ath5k_hw *ah = file->private_data;
251 struct ath5k_hw *ah = sc->ah;
252 char buf[20]; 250 char buf[20];
253 251
254 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 252 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
@@ -279,9 +277,9 @@ static ssize_t write_file_reset(struct file *file,
279 const char __user *userbuf, 277 const char __user *userbuf,
280 size_t count, loff_t *ppos) 278 size_t count, loff_t *ppos)
281{ 279{
282 struct ath5k_softc *sc = file->private_data; 280 struct ath5k_hw *ah = file->private_data;
283 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "debug file triggered reset\n"); 281 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "debug file triggered reset\n");
284 ieee80211_queue_work(sc->hw, &sc->reset_work); 282 ieee80211_queue_work(ah->hw, &ah->reset_work);
285 return count; 283 return count;
286} 284}
287 285
@@ -318,23 +316,23 @@ static const struct {
318static ssize_t read_file_debug(struct file *file, char __user *user_buf, 316static ssize_t read_file_debug(struct file *file, char __user *user_buf,
319 size_t count, loff_t *ppos) 317 size_t count, loff_t *ppos)
320{ 318{
321 struct ath5k_softc *sc = file->private_data; 319 struct ath5k_hw *ah = file->private_data;
322 char buf[700]; 320 char buf[700];
323 unsigned int len = 0; 321 unsigned int len = 0;
324 unsigned int i; 322 unsigned int i;
325 323
326 len += snprintf(buf + len, sizeof(buf) - len, 324 len += snprintf(buf + len, sizeof(buf) - len,
327 "DEBUG LEVEL: 0x%08x\n\n", sc->debug.level); 325 "DEBUG LEVEL: 0x%08x\n\n", ah->debug.level);
328 326
329 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) { 327 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) {
330 len += snprintf(buf + len, sizeof(buf) - len, 328 len += snprintf(buf + len, sizeof(buf) - len,
331 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 329 "%10s %c 0x%08x - %s\n", dbg_info[i].name,
332 sc->debug.level & dbg_info[i].level ? '+' : ' ', 330 ah->debug.level & dbg_info[i].level ? '+' : ' ',
333 dbg_info[i].level, dbg_info[i].desc); 331 dbg_info[i].level, dbg_info[i].desc);
334 } 332 }
335 len += snprintf(buf + len, sizeof(buf) - len, 333 len += snprintf(buf + len, sizeof(buf) - len,
336 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 334 "%10s %c 0x%08x - %s\n", dbg_info[i].name,
337 sc->debug.level == dbg_info[i].level ? '+' : ' ', 335 ah->debug.level == dbg_info[i].level ? '+' : ' ',
338 dbg_info[i].level, dbg_info[i].desc); 336 dbg_info[i].level, dbg_info[i].desc);
339 337
340 if (len > sizeof(buf)) 338 if (len > sizeof(buf))
@@ -347,7 +345,7 @@ static ssize_t write_file_debug(struct file *file,
347 const char __user *userbuf, 345 const char __user *userbuf,
348 size_t count, loff_t *ppos) 346 size_t count, loff_t *ppos)
349{ 347{
350 struct ath5k_softc *sc = file->private_data; 348 struct ath5k_hw *ah = file->private_data;
351 unsigned int i; 349 unsigned int i;
352 char buf[20]; 350 char buf[20];
353 351
@@ -357,7 +355,7 @@ static ssize_t write_file_debug(struct file *file,
357 for (i = 0; i < ARRAY_SIZE(dbg_info); i++) { 355 for (i = 0; i < ARRAY_SIZE(dbg_info); i++) {
358 if (strncmp(buf, dbg_info[i].name, 356 if (strncmp(buf, dbg_info[i].name,
359 strlen(dbg_info[i].name)) == 0) { 357 strlen(dbg_info[i].name)) == 0) {
360 sc->debug.level ^= dbg_info[i].level; /* toggle bit */ 358 ah->debug.level ^= dbg_info[i].level; /* toggle bit */
361 break; 359 break;
362 } 360 }
363 } 361 }
@@ -378,33 +376,33 @@ static const struct file_operations fops_debug = {
378static ssize_t read_file_antenna(struct file *file, char __user *user_buf, 376static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
379 size_t count, loff_t *ppos) 377 size_t count, loff_t *ppos)
380{ 378{
381 struct ath5k_softc *sc = file->private_data; 379 struct ath5k_hw *ah = file->private_data;
382 char buf[700]; 380 char buf[700];
383 unsigned int len = 0; 381 unsigned int len = 0;
384 unsigned int i; 382 unsigned int i;
385 unsigned int v; 383 unsigned int v;
386 384
387 len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n", 385 len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n",
388 sc->ah->ah_ant_mode); 386 ah->ah_ant_mode);
389 len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n", 387 len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n",
390 sc->ah->ah_def_ant); 388 ah->ah_def_ant);
391 len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n", 389 len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n",
392 sc->ah->ah_tx_ant); 390 ah->ah_tx_ant);
393 391
394 len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n"); 392 len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n");
395 for (i = 1; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) { 393 for (i = 1; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
396 len += snprintf(buf + len, sizeof(buf) - len, 394 len += snprintf(buf + len, sizeof(buf) - len,
397 "[antenna %d]\t%d\t%d\n", 395 "[antenna %d]\t%d\t%d\n",
398 i, sc->stats.antenna_rx[i], sc->stats.antenna_tx[i]); 396 i, ah->stats.antenna_rx[i], ah->stats.antenna_tx[i]);
399 } 397 }
400 len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n", 398 len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n",
401 sc->stats.antenna_rx[0], sc->stats.antenna_tx[0]); 399 ah->stats.antenna_rx[0], ah->stats.antenna_tx[0]);
402 400
403 v = ath5k_hw_reg_read(sc->ah, AR5K_DEFAULT_ANTENNA); 401 v = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA);
404 len += snprintf(buf + len, sizeof(buf) - len, 402 len += snprintf(buf + len, sizeof(buf) - len,
405 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v); 403 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v);
406 404
407 v = ath5k_hw_reg_read(sc->ah, AR5K_STA_ID1); 405 v = ath5k_hw_reg_read(ah, AR5K_STA_ID1);
408 len += snprintf(buf + len, sizeof(buf) - len, 406 len += snprintf(buf + len, sizeof(buf) - len,
409 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n", 407 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n",
410 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0); 408 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0);
@@ -418,25 +416,25 @@ static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
418 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n", 416 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n",
419 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0); 417 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0);
420 418
421 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_AGCCTL); 419 v = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL);
422 len += snprintf(buf + len, sizeof(buf) - len, 420 len += snprintf(buf + len, sizeof(buf) - len,
423 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n", 421 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n",
424 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0); 422 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0);
425 423
426 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_RESTART); 424 v = ath5k_hw_reg_read(ah, AR5K_PHY_RESTART);
427 len += snprintf(buf + len, sizeof(buf) - len, 425 len += snprintf(buf + len, sizeof(buf) - len,
428 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n", 426 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n",
429 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S); 427 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S);
430 428
431 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_FAST_ANT_DIV); 429 v = ath5k_hw_reg_read(ah, AR5K_PHY_FAST_ANT_DIV);
432 len += snprintf(buf + len, sizeof(buf) - len, 430 len += snprintf(buf + len, sizeof(buf) - len,
433 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n", 431 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n",
434 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); 432 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0);
435 433
436 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_0); 434 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_0);
437 len += snprintf(buf + len, sizeof(buf) - len, 435 len += snprintf(buf + len, sizeof(buf) - len,
438 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v); 436 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v);
439 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_1); 437 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_1);
440 len += snprintf(buf + len, sizeof(buf) - len, 438 len += snprintf(buf + len, sizeof(buf) - len,
441 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v); 439 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v);
442 440
@@ -450,7 +448,7 @@ static ssize_t write_file_antenna(struct file *file,
450 const char __user *userbuf, 448 const char __user *userbuf,
451 size_t count, loff_t *ppos) 449 size_t count, loff_t *ppos)
452{ 450{
453 struct ath5k_softc *sc = file->private_data; 451 struct ath5k_hw *ah = file->private_data;
454 unsigned int i; 452 unsigned int i;
455 char buf[20]; 453 char buf[20];
456 454
@@ -458,18 +456,18 @@ static ssize_t write_file_antenna(struct file *file,
458 return -EFAULT; 456 return -EFAULT;
459 457
460 if (strncmp(buf, "diversity", 9) == 0) { 458 if (strncmp(buf, "diversity", 9) == 0) {
461 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); 459 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
462 printk(KERN_INFO "ath5k debug: enable diversity\n"); 460 printk(KERN_INFO "ath5k debug: enable diversity\n");
463 } else if (strncmp(buf, "fixed-a", 7) == 0) { 461 } else if (strncmp(buf, "fixed-a", 7) == 0) {
464 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); 462 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);
465 printk(KERN_INFO "ath5k debugfs: fixed antenna A\n"); 463 printk(KERN_INFO "ath5k debugfs: fixed antenna A\n");
466 } else if (strncmp(buf, "fixed-b", 7) == 0) { 464 } else if (strncmp(buf, "fixed-b", 7) == 0) {
467 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); 465 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);
468 printk(KERN_INFO "ath5k debug: fixed antenna B\n"); 466 printk(KERN_INFO "ath5k debug: fixed antenna B\n");
469 } else if (strncmp(buf, "clear", 5) == 0) { 467 } else if (strncmp(buf, "clear", 5) == 0) {
470 for (i = 0; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) { 468 for (i = 0; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
471 sc->stats.antenna_rx[i] = 0; 469 ah->stats.antenna_rx[i] = 0;
472 sc->stats.antenna_tx[i] = 0; 470 ah->stats.antenna_tx[i] = 0;
473 } 471 }
474 printk(KERN_INFO "ath5k debug: cleared antenna stats\n"); 472 printk(KERN_INFO "ath5k debug: cleared antenna stats\n");
475 } 473 }
@@ -489,13 +487,13 @@ static const struct file_operations fops_antenna = {
489static ssize_t read_file_misc(struct file *file, char __user *user_buf, 487static ssize_t read_file_misc(struct file *file, char __user *user_buf,
490 size_t count, loff_t *ppos) 488 size_t count, loff_t *ppos)
491{ 489{
492 struct ath5k_softc *sc = file->private_data; 490 struct ath5k_hw *ah = file->private_data;
493 char buf[700]; 491 char buf[700];
494 unsigned int len = 0; 492 unsigned int len = 0;
495 u32 filt = ath5k_hw_get_rx_filter(sc->ah); 493 u32 filt = ath5k_hw_get_rx_filter(ah);
496 494
497 len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n", 495 len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n",
498 sc->bssidmask); 496 ah->bssidmask);
499 len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ", 497 len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ",
500 filt); 498 filt);
501 if (filt & AR5K_RX_FILTER_UCAST) 499 if (filt & AR5K_RX_FILTER_UCAST)
@@ -524,7 +522,7 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
524 len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211"); 522 len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211");
525 523
526 len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n", 524 len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n",
527 ath_opmode_to_string(sc->opmode), sc->opmode); 525 ath_opmode_to_string(ah->opmode), ah->opmode);
528 526
529 if (len > sizeof(buf)) 527 if (len > sizeof(buf))
530 len = sizeof(buf); 528 len = sizeof(buf);
@@ -544,8 +542,8 @@ static const struct file_operations fops_misc = {
544static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf, 542static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf,
545 size_t count, loff_t *ppos) 543 size_t count, loff_t *ppos)
546{ 544{
547 struct ath5k_softc *sc = file->private_data; 545 struct ath5k_hw *ah = file->private_data;
548 struct ath5k_statistics *st = &sc->stats; 546 struct ath5k_statistics *st = &ah->stats;
549 char buf[700]; 547 char buf[700];
550 unsigned int len = 0; 548 unsigned int len = 0;
551 int i; 549 int i;
@@ -621,8 +619,8 @@ static ssize_t write_file_frameerrors(struct file *file,
621 const char __user *userbuf, 619 const char __user *userbuf,
622 size_t count, loff_t *ppos) 620 size_t count, loff_t *ppos)
623{ 621{
624 struct ath5k_softc *sc = file->private_data; 622 struct ath5k_hw *ah = file->private_data;
625 struct ath5k_statistics *st = &sc->stats; 623 struct ath5k_statistics *st = &ah->stats;
626 char buf[20]; 624 char buf[20];
627 625
628 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 626 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
@@ -660,16 +658,16 @@ static const struct file_operations fops_frameerrors = {
660static ssize_t read_file_ani(struct file *file, char __user *user_buf, 658static ssize_t read_file_ani(struct file *file, char __user *user_buf,
661 size_t count, loff_t *ppos) 659 size_t count, loff_t *ppos)
662{ 660{
663 struct ath5k_softc *sc = file->private_data; 661 struct ath5k_hw *ah = file->private_data;
664 struct ath5k_statistics *st = &sc->stats; 662 struct ath5k_statistics *st = &ah->stats;
665 struct ath5k_ani_state *as = &sc->ani_state; 663 struct ath5k_ani_state *as = &ah->ani_state;
666 664
667 char buf[700]; 665 char buf[700];
668 unsigned int len = 0; 666 unsigned int len = 0;
669 667
670 len += snprintf(buf + len, sizeof(buf) - len, 668 len += snprintf(buf + len, sizeof(buf) - len,
671 "HW has PHY error counters:\t%s\n", 669 "HW has PHY error counters:\t%s\n",
672 sc->ah->ah_capabilities.cap_has_phyerr_counters ? 670 ah->ah_capabilities.cap_has_phyerr_counters ?
673 "yes" : "no"); 671 "yes" : "no");
674 len += snprintf(buf + len, sizeof(buf) - len, 672 len += snprintf(buf + len, sizeof(buf) - len,
675 "HW max spur immunity level:\t%d\n", 673 "HW max spur immunity level:\t%d\n",
@@ -718,7 +716,7 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
718 st->mib_intr); 716 st->mib_intr);
719 len += snprintf(buf + len, sizeof(buf) - len, 717 len += snprintf(buf + len, sizeof(buf) - len,
720 "beacon RSSI average:\t%d\n", 718 "beacon RSSI average:\t%d\n",
721 (int)ewma_read(&sc->ah->ah_beacon_rssi_avg)); 719 (int)ewma_read(&ah->ah_beacon_rssi_avg));
722 720
723#define CC_PRINT(_struct, _field) \ 721#define CC_PRINT(_struct, _field) \
724 _struct._field, \ 722 _struct._field, \
@@ -750,14 +748,14 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
750 as->sum_cck_errors); 748 as->sum_cck_errors);
751 len += snprintf(buf + len, sizeof(buf) - len, 749 len += snprintf(buf + len, sizeof(buf) - len,
752 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n", 750 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n",
753 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT1), 751 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1),
754 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 752 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
755 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT1))); 753 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1)));
756 len += snprintf(buf + len, sizeof(buf) - len, 754 len += snprintf(buf + len, sizeof(buf) - len,
757 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n", 755 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n",
758 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT2), 756 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2),
759 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 757 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
760 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT2))); 758 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2)));
761 759
762 if (len > sizeof(buf)) 760 if (len > sizeof(buf))
763 len = sizeof(buf); 761 len = sizeof(buf);
@@ -769,42 +767,42 @@ static ssize_t write_file_ani(struct file *file,
769 const char __user *userbuf, 767 const char __user *userbuf,
770 size_t count, loff_t *ppos) 768 size_t count, loff_t *ppos)
771{ 769{
772 struct ath5k_softc *sc = file->private_data; 770 struct ath5k_hw *ah = file->private_data;
773 char buf[20]; 771 char buf[20];
774 772
775 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 773 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
776 return -EFAULT; 774 return -EFAULT;
777 775
778 if (strncmp(buf, "sens-low", 8) == 0) { 776 if (strncmp(buf, "sens-low", 8) == 0) {
779 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_MANUAL_HIGH); 777 ath5k_ani_init(ah, ATH5K_ANI_MODE_MANUAL_HIGH);
780 } else if (strncmp(buf, "sens-high", 9) == 0) { 778 } else if (strncmp(buf, "sens-high", 9) == 0) {
781 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_MANUAL_LOW); 779 ath5k_ani_init(ah, ATH5K_ANI_MODE_MANUAL_LOW);
782 } else if (strncmp(buf, "ani-off", 7) == 0) { 780 } else if (strncmp(buf, "ani-off", 7) == 0) {
783 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_OFF); 781 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF);
784 } else if (strncmp(buf, "ani-on", 6) == 0) { 782 } else if (strncmp(buf, "ani-on", 6) == 0) {
785 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_AUTO); 783 ath5k_ani_init(ah, ATH5K_ANI_MODE_AUTO);
786 } else if (strncmp(buf, "noise-low", 9) == 0) { 784 } else if (strncmp(buf, "noise-low", 9) == 0) {
787 ath5k_ani_set_noise_immunity_level(sc->ah, 0); 785 ath5k_ani_set_noise_immunity_level(ah, 0);
788 } else if (strncmp(buf, "noise-high", 10) == 0) { 786 } else if (strncmp(buf, "noise-high", 10) == 0) {
789 ath5k_ani_set_noise_immunity_level(sc->ah, 787 ath5k_ani_set_noise_immunity_level(ah,
790 ATH5K_ANI_MAX_NOISE_IMM_LVL); 788 ATH5K_ANI_MAX_NOISE_IMM_LVL);
791 } else if (strncmp(buf, "spur-low", 8) == 0) { 789 } else if (strncmp(buf, "spur-low", 8) == 0) {
792 ath5k_ani_set_spur_immunity_level(sc->ah, 0); 790 ath5k_ani_set_spur_immunity_level(ah, 0);
793 } else if (strncmp(buf, "spur-high", 9) == 0) { 791 } else if (strncmp(buf, "spur-high", 9) == 0) {
794 ath5k_ani_set_spur_immunity_level(sc->ah, 792 ath5k_ani_set_spur_immunity_level(ah,
795 sc->ani_state.max_spur_level); 793 ah->ani_state.max_spur_level);
796 } else if (strncmp(buf, "fir-low", 7) == 0) { 794 } else if (strncmp(buf, "fir-low", 7) == 0) {
797 ath5k_ani_set_firstep_level(sc->ah, 0); 795 ath5k_ani_set_firstep_level(ah, 0);
798 } else if (strncmp(buf, "fir-high", 8) == 0) { 796 } else if (strncmp(buf, "fir-high", 8) == 0) {
799 ath5k_ani_set_firstep_level(sc->ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 797 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
800 } else if (strncmp(buf, "ofdm-off", 8) == 0) { 798 } else if (strncmp(buf, "ofdm-off", 8) == 0) {
801 ath5k_ani_set_ofdm_weak_signal_detection(sc->ah, false); 799 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
802 } else if (strncmp(buf, "ofdm-on", 7) == 0) { 800 } else if (strncmp(buf, "ofdm-on", 7) == 0) {
803 ath5k_ani_set_ofdm_weak_signal_detection(sc->ah, true); 801 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
804 } else if (strncmp(buf, "cck-off", 7) == 0) { 802 } else if (strncmp(buf, "cck-off", 7) == 0) {
805 ath5k_ani_set_cck_weak_signal_detection(sc->ah, false); 803 ath5k_ani_set_cck_weak_signal_detection(ah, false);
806 } else if (strncmp(buf, "cck-on", 6) == 0) { 804 } else if (strncmp(buf, "cck-on", 6) == 0) {
807 ath5k_ani_set_cck_weak_signal_detection(sc->ah, true); 805 ath5k_ani_set_cck_weak_signal_detection(ah, true);
808 } 806 }
809 return count; 807 return count;
810} 808}
@@ -823,7 +821,7 @@ static const struct file_operations fops_ani = {
823static ssize_t read_file_queue(struct file *file, char __user *user_buf, 821static ssize_t read_file_queue(struct file *file, char __user *user_buf,
824 size_t count, loff_t *ppos) 822 size_t count, loff_t *ppos)
825{ 823{
826 struct ath5k_softc *sc = file->private_data; 824 struct ath5k_hw *ah = file->private_data;
827 char buf[700]; 825 char buf[700];
828 unsigned int len = 0; 826 unsigned int len = 0;
829 827
@@ -832,10 +830,10 @@ static ssize_t read_file_queue(struct file *file, char __user *user_buf,
832 int i, n; 830 int i, n;
833 831
834 len += snprintf(buf + len, sizeof(buf) - len, 832 len += snprintf(buf + len, sizeof(buf) - len,
835 "available txbuffers: %d\n", sc->txbuf_len); 833 "available txbuffers: %d\n", ah->txbuf_len);
836 834
837 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 835 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
838 txq = &sc->txqs[i]; 836 txq = &ah->txqs[i];
839 837
840 len += snprintf(buf + len, sizeof(buf) - len, 838 len += snprintf(buf + len, sizeof(buf) - len,
841 "%02d: %ssetup\n", i, txq->setup ? "" : "not "); 839 "%02d: %ssetup\n", i, txq->setup ? "" : "not ");
@@ -865,16 +863,16 @@ static ssize_t write_file_queue(struct file *file,
865 const char __user *userbuf, 863 const char __user *userbuf,
866 size_t count, loff_t *ppos) 864 size_t count, loff_t *ppos)
867{ 865{
868 struct ath5k_softc *sc = file->private_data; 866 struct ath5k_hw *ah = file->private_data;
869 char buf[20]; 867 char buf[20];
870 868
871 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 869 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
872 return -EFAULT; 870 return -EFAULT;
873 871
874 if (strncmp(buf, "start", 5) == 0) 872 if (strncmp(buf, "start", 5) == 0)
875 ieee80211_wake_queues(sc->hw); 873 ieee80211_wake_queues(ah->hw);
876 else if (strncmp(buf, "stop", 4) == 0) 874 else if (strncmp(buf, "stop", 4) == 0)
877 ieee80211_stop_queues(sc->hw); 875 ieee80211_stop_queues(ah->hw);
878 876
879 return count; 877 return count;
880} 878}
@@ -890,57 +888,57 @@ static const struct file_operations fops_queue = {
890 888
891 889
892void 890void
893ath5k_debug_init_device(struct ath5k_softc *sc) 891ath5k_debug_init_device(struct ath5k_hw *ah)
894{ 892{
895 struct dentry *phydir; 893 struct dentry *phydir;
896 894
897 sc->debug.level = ath5k_debug; 895 ah->debug.level = ath5k_debug;
898 896
899 phydir = debugfs_create_dir("ath5k", sc->hw->wiphy->debugfsdir); 897 phydir = debugfs_create_dir("ath5k", ah->hw->wiphy->debugfsdir);
900 if (!phydir) 898 if (!phydir)
901 return; 899 return;
902 900
903 debugfs_create_file("debug", S_IWUSR | S_IRUSR, phydir, sc, 901 debugfs_create_file("debug", S_IWUSR | S_IRUSR, phydir, ah,
904 &fops_debug); 902 &fops_debug);
905 903
906 debugfs_create_file("registers", S_IRUSR, phydir, sc, &fops_registers); 904 debugfs_create_file("registers", S_IRUSR, phydir, ah, &fops_registers);
907 905
908 debugfs_create_file("beacon", S_IWUSR | S_IRUSR, phydir, sc, 906 debugfs_create_file("beacon", S_IWUSR | S_IRUSR, phydir, ah,
909 &fops_beacon); 907 &fops_beacon);
910 908
911 debugfs_create_file("reset", S_IWUSR, phydir, sc, &fops_reset); 909 debugfs_create_file("reset", S_IWUSR, phydir, ah, &fops_reset);
912 910
913 debugfs_create_file("antenna", S_IWUSR | S_IRUSR, phydir, sc, 911 debugfs_create_file("antenna", S_IWUSR | S_IRUSR, phydir, ah,
914 &fops_antenna); 912 &fops_antenna);
915 913
916 debugfs_create_file("misc", S_IRUSR, phydir, sc, &fops_misc); 914 debugfs_create_file("misc", S_IRUSR, phydir, ah, &fops_misc);
917 915
918 debugfs_create_file("frameerrors", S_IWUSR | S_IRUSR, phydir, sc, 916 debugfs_create_file("frameerrors", S_IWUSR | S_IRUSR, phydir, ah,
919 &fops_frameerrors); 917 &fops_frameerrors);
920 918
921 debugfs_create_file("ani", S_IWUSR | S_IRUSR, phydir, sc, &fops_ani); 919 debugfs_create_file("ani", S_IWUSR | S_IRUSR, phydir, ah, &fops_ani);
922 920
923 debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, sc, 921 debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, ah,
924 &fops_queue); 922 &fops_queue);
925 923
926 debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir, 924 debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir,
927 &sc->ah->ah_use_32khz_clock); 925 &ah->ah_use_32khz_clock);
928} 926}
929 927
930/* functions used in other places */ 928/* functions used in other places */
931 929
932void 930void
933ath5k_debug_dump_bands(struct ath5k_softc *sc) 931ath5k_debug_dump_bands(struct ath5k_hw *ah)
934{ 932{
935 unsigned int b, i; 933 unsigned int b, i;
936 934
937 if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPBANDS))) 935 if (likely(!(ah->debug.level & ATH5K_DEBUG_DUMPBANDS)))
938 return; 936 return;
939 937
940 BUG_ON(!sc->sbands); 938 BUG_ON(!ah->sbands);
941 939
942 for (b = 0; b < IEEE80211_NUM_BANDS; b++) { 940 for (b = 0; b < IEEE80211_NUM_BANDS; b++) {
943 struct ieee80211_supported_band *band = &sc->sbands[b]; 941 struct ieee80211_supported_band *band = &ah->sbands[b];
944 char bname[6]; 942 char bname[6];
945 switch (band->band) { 943 switch (band->band) {
946 case IEEE80211_BAND_2GHZ: 944 case IEEE80211_BAND_2GHZ:
@@ -990,41 +988,41 @@ ath5k_debug_printrxbuf(struct ath5k_buf *bf, int done,
990} 988}
991 989
992void 990void
993ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) 991ath5k_debug_printrxbuffs(struct ath5k_hw *ah)
994{ 992{
995 struct ath5k_desc *ds; 993 struct ath5k_desc *ds;
996 struct ath5k_buf *bf; 994 struct ath5k_buf *bf;
997 struct ath5k_rx_status rs = {}; 995 struct ath5k_rx_status rs = {};
998 int status; 996 int status;
999 997
1000 if (likely(!(sc->debug.level & ATH5K_DEBUG_DESC))) 998 if (likely(!(ah->debug.level & ATH5K_DEBUG_DESC)))
1001 return; 999 return;
1002 1000
1003 printk(KERN_DEBUG "rxdp %x, rxlink %p\n", 1001 printk(KERN_DEBUG "rxdp %x, rxlink %p\n",
1004 ath5k_hw_get_rxdp(ah), sc->rxlink); 1002 ath5k_hw_get_rxdp(ah), ah->rxlink);
1005 1003
1006 spin_lock_bh(&sc->rxbuflock); 1004 spin_lock_bh(&ah->rxbuflock);
1007 list_for_each_entry(bf, &sc->rxbuf, list) { 1005 list_for_each_entry(bf, &ah->rxbuf, list) {
1008 ds = bf->desc; 1006 ds = bf->desc;
1009 status = ah->ah_proc_rx_desc(ah, ds, &rs); 1007 status = ah->ah_proc_rx_desc(ah, ds, &rs);
1010 if (!status) 1008 if (!status)
1011 ath5k_debug_printrxbuf(bf, status == 0, &rs); 1009 ath5k_debug_printrxbuf(bf, status == 0, &rs);
1012 } 1010 }
1013 spin_unlock_bh(&sc->rxbuflock); 1011 spin_unlock_bh(&ah->rxbuflock);
1014} 1012}
1015 1013
1016void 1014void
1017ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) 1015ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf)
1018{ 1016{
1019 struct ath5k_desc *ds = bf->desc; 1017 struct ath5k_desc *ds = bf->desc;
1020 struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212; 1018 struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212;
1021 struct ath5k_tx_status ts = {}; 1019 struct ath5k_tx_status ts = {};
1022 int done; 1020 int done;
1023 1021
1024 if (likely(!(sc->debug.level & ATH5K_DEBUG_DESC))) 1022 if (likely(!(ah->debug.level & ATH5K_DEBUG_DESC)))
1025 return; 1023 return;
1026 1024
1027 done = sc->ah->ah_proc_tx_desc(sc->ah, bf->desc, &ts); 1025 done = ah->ah_proc_tx_desc(ah, bf->desc, &ts);
1028 1026
1029 printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x " 1027 printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x "
1030 "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link, 1028 "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link,
diff --git a/drivers/net/wireless/ath/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h
index 193dd2d4ea3c..7f37df3125fd 100644
--- a/drivers/net/wireless/ath/ath5k/debug.h
+++ b/drivers/net/wireless/ath/ath5k/debug.h
@@ -61,7 +61,6 @@
61#ifndef _ATH5K_DEBUG_H 61#ifndef _ATH5K_DEBUG_H
62#define _ATH5K_DEBUG_H 62#define _ATH5K_DEBUG_H
63 63
64struct ath5k_softc;
65struct ath5k_hw; 64struct ath5k_hw;
66struct sk_buff; 65struct sk_buff;
67struct ath5k_buf; 66struct ath5k_buf;
@@ -127,39 +126,39 @@ enum ath5k_debug_level {
127 } while (0) 126 } while (0)
128 127
129void 128void
130ath5k_debug_init_device(struct ath5k_softc *sc); 129ath5k_debug_init_device(struct ath5k_hw *ah);
131 130
132void 131void
133ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah); 132ath5k_debug_printrxbuffs(struct ath5k_hw *ah);
134 133
135void 134void
136ath5k_debug_dump_bands(struct ath5k_softc *sc); 135ath5k_debug_dump_bands(struct ath5k_hw *ah);
137 136
138void 137void
139ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf); 138ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf);
140 139
141#else /* no debugging */ 140#else /* no debugging */
142 141
143#include <linux/compiler.h> 142#include <linux/compiler.h>
144 143
145static inline void __attribute__ ((format (printf, 3, 4))) 144static inline void __attribute__ ((format (printf, 3, 4)))
146ATH5K_DBG(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) {} 145ATH5K_DBG(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...) {}
147 146
148static inline void __attribute__ ((format (printf, 3, 4))) 147static inline void __attribute__ ((format (printf, 3, 4)))
149ATH5K_DBG_UNLIMIT(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) 148ATH5K_DBG_UNLIMIT(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...)
150{} 149{}
151 150
152static inline void 151static inline void
153ath5k_debug_init_device(struct ath5k_softc *sc) {} 152ath5k_debug_init_device(struct ath5k_hw *ah) {}
154 153
155static inline void 154static inline void
156ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) {} 155ath5k_debug_printrxbuffs(struct ath5k_hw *ah) {}
157 156
158static inline void 157static inline void
159ath5k_debug_dump_bands(struct ath5k_softc *sc) {} 158ath5k_debug_dump_bands(struct ath5k_hw *ah) {}
160 159
161static inline void 160static inline void
162ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) {} 161ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf) {}
163 162
164#endif /* ifdef CONFIG_ATH5K_DEBUG */ 163#endif /* ifdef CONFIG_ATH5K_DEBUG */
165 164
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c
index f82383b3ed30..846535f59efc 100644
--- a/drivers/net/wireless/ath/ath5k/desc.c
+++ b/drivers/net/wireless/ath/ath5k/desc.c
@@ -55,12 +55,12 @@ ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
55 * noise on the channel, so it is important to avoid this. 55 * noise on the channel, so it is important to avoid this.
56 */ 56 */
57 if (unlikely(tx_tries0 == 0)) { 57 if (unlikely(tx_tries0 == 0)) {
58 ATH5K_ERR(ah->ah_sc, "zero retries\n"); 58 ATH5K_ERR(ah, "zero retries\n");
59 WARN_ON(1); 59 WARN_ON(1);
60 return -EINVAL; 60 return -EINVAL;
61 } 61 }
62 if (unlikely(tx_rate0 == 0)) { 62 if (unlikely(tx_rate0 == 0)) {
63 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 63 ATH5K_ERR(ah, "zero rate\n");
64 WARN_ON(1); 64 WARN_ON(1);
65 return -EINVAL; 65 return -EINVAL;
66 } 66 }
@@ -203,12 +203,12 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah,
203 * noise on the channel, so it is important to avoid this. 203 * noise on the channel, so it is important to avoid this.
204 */ 204 */
205 if (unlikely(tx_tries0 == 0)) { 205 if (unlikely(tx_tries0 == 0)) {
206 ATH5K_ERR(ah->ah_sc, "zero retries\n"); 206 ATH5K_ERR(ah, "zero retries\n");
207 WARN_ON(1); 207 WARN_ON(1);
208 return -EINVAL; 208 return -EINVAL;
209 } 209 }
210 if (unlikely(tx_rate0 == 0)) { 210 if (unlikely(tx_rate0 == 0)) {
211 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 211 ATH5K_ERR(ah, "zero rate\n");
212 WARN_ON(1); 212 WARN_ON(1);
213 return -EINVAL; 213 return -EINVAL;
214 } 214 }
@@ -316,7 +316,7 @@ ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
316 if (unlikely((tx_rate1 == 0 && tx_tries1 != 0) || 316 if (unlikely((tx_rate1 == 0 && tx_tries1 != 0) ||
317 (tx_rate2 == 0 && tx_tries2 != 0) || 317 (tx_rate2 == 0 && tx_tries2 != 0) ||
318 (tx_rate3 == 0 && tx_tries3 != 0))) { 318 (tx_rate3 == 0 && tx_tries3 != 0))) {
319 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 319 ATH5K_ERR(ah, "zero rate\n");
320 WARN_ON(1); 320 WARN_ON(1);
321 return -EINVAL; 321 return -EINVAL;
322 } 322 }
diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c
index b788ecfbdaf6..0d5d4033f12a 100644
--- a/drivers/net/wireless/ath/ath5k/dma.c
+++ b/drivers/net/wireless/ath/ath5k/dma.c
@@ -73,7 +73,7 @@ static int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah)
73 udelay(100); 73 udelay(100);
74 74
75 if (!i) 75 if (!i)
76 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 76 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
77 "failed to stop RX DMA !\n"); 77 "failed to stop RX DMA !\n");
78 78
79 return i ? 0 : -EBUSY; 79 return i ? 0 : -EBUSY;
@@ -100,7 +100,7 @@ u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah)
100int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) 100int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr)
101{ 101{
102 if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) { 102 if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) {
103 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 103 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
104 "tried to set RXDP while rx was active !\n"); 104 "tried to set RXDP while rx was active !\n");
105 return -EIO; 105 return -EIO;
106 } 106 }
@@ -243,7 +243,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
243 udelay(100); 243 udelay(100);
244 244
245 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue)) 245 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
246 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 246 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
247 "queue %i didn't stop !\n", queue); 247 "queue %i didn't stop !\n", queue);
248 248
249 /* Check for pending frames */ 249 /* Check for pending frames */
@@ -295,7 +295,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
295 AR5K_DIAG_SW_CHANNEL_IDLE_HIGH); 295 AR5K_DIAG_SW_CHANNEL_IDLE_HIGH);
296 296
297 if (pending) 297 if (pending)
298 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 298 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
299 "quiet mechanism didn't work q:%i !\n", 299 "quiet mechanism didn't work q:%i !\n",
300 queue); 300 queue);
301 } 301 }
@@ -309,7 +309,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
309 /* Clear register */ 309 /* Clear register */
310 ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); 310 ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD);
311 if (pending) { 311 if (pending) {
312 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 312 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
313 "tx dma didn't stop (q:%i, frm:%i) !\n", 313 "tx dma didn't stop (q:%i, frm:%i) !\n",
314 queue, pending); 314 queue, pending);
315 return -EBUSY; 315 return -EBUSY;
@@ -333,7 +333,7 @@ int ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue)
333 int ret; 333 int ret;
334 ret = ath5k_hw_stop_tx_dma(ah, queue); 334 ret = ath5k_hw_stop_tx_dma(ah, queue);
335 if (ret) { 335 if (ret) {
336 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 336 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
337 "beacon queue didn't stop !\n"); 337 "beacon queue didn't stop !\n");
338 return -EIO; 338 return -EIO;
339 } 339 }
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index d9e605e37007..9068b9165265 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -105,7 +105,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
105 * big still, waiting on a better value. 105 * big still, waiting on a better value.
106 */ 106 */
107 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) { 107 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
108 ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: " 108 ATH5K_ERR(ah, "Invalid max custom EEPROM size: "
109 "%d (0x%04x) max expected: %d (0x%04x)\n", 109 "%d (0x%04x) max expected: %d (0x%04x)\n",
110 eep_max, eep_max, 110 eep_max, eep_max,
111 3 * AR5K_EEPROM_INFO_MAX, 111 3 * AR5K_EEPROM_INFO_MAX,
@@ -119,7 +119,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
119 cksum ^= val; 119 cksum ^= val;
120 } 120 }
121 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 121 if (cksum != AR5K_EEPROM_INFO_CKSUM) {
122 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM " 122 ATH5K_ERR(ah, "Invalid EEPROM "
123 "checksum: 0x%04x eep_max: 0x%04x (%s)\n", 123 "checksum: 0x%04x eep_max: 0x%04x (%s)\n",
124 cksum, eep_max, 124 cksum, eep_max,
125 eep_max == AR5K_EEPROM_INFO_MAX ? 125 eep_max == AR5K_EEPROM_INFO_MAX ?
diff --git a/drivers/net/wireless/ath/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c
index 855d1af3e710..5ab607f40e0e 100644
--- a/drivers/net/wireless/ath/ath5k/initvals.c
+++ b/drivers/net/wireless/ath/ath5k/initvals.c
@@ -1542,7 +1542,7 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool skip_pcu)
1542 1542
1543 /* AR5K_MODE_11B */ 1543 /* AR5K_MODE_11B */
1544 if (mode > 2) { 1544 if (mode > 2) {
1545 ATH5K_ERR(ah->ah_sc, 1545 ATH5K_ERR(ah,
1546 "unsupported channel mode: %d\n", mode); 1546 "unsupported channel mode: %d\n", mode);
1547 return -EINVAL; 1547 return -EINVAL;
1548 } 1548 }
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index 127bfbd35172..8c17a00f7dad 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -86,26 +86,26 @@ static DEFINE_PCI_DEVICE_TABLE(ath5k_led_devices) = {
86 { } 86 { }
87}; 87};
88 88
89void ath5k_led_enable(struct ath5k_softc *sc) 89void ath5k_led_enable(struct ath5k_hw *ah)
90{ 90{
91 if (test_bit(ATH_STAT_LEDSOFT, sc->status)) { 91 if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
92 ath5k_hw_set_gpio_output(sc->ah, sc->led_pin); 92 ath5k_hw_set_gpio_output(ah, ah->led_pin);
93 ath5k_led_off(sc); 93 ath5k_led_off(ah);
94 } 94 }
95} 95}
96 96
97static void ath5k_led_on(struct ath5k_softc *sc) 97static void ath5k_led_on(struct ath5k_hw *ah)
98{ 98{
99 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 99 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
100 return; 100 return;
101 ath5k_hw_set_gpio(sc->ah, sc->led_pin, sc->led_on); 101 ath5k_hw_set_gpio(ah, ah->led_pin, ah->led_on);
102} 102}
103 103
104void ath5k_led_off(struct ath5k_softc *sc) 104void ath5k_led_off(struct ath5k_hw *ah)
105{ 105{
106 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 106 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
107 return; 107 return;
108 ath5k_hw_set_gpio(sc->ah, sc->led_pin, !sc->led_on); 108 ath5k_hw_set_gpio(ah, ah->led_pin, !ah->led_on);
109} 109}
110 110
111static void 111static void
@@ -116,27 +116,27 @@ ath5k_led_brightness_set(struct led_classdev *led_dev,
116 led_dev); 116 led_dev);
117 117
118 if (brightness == LED_OFF) 118 if (brightness == LED_OFF)
119 ath5k_led_off(led->sc); 119 ath5k_led_off(led->ah);
120 else 120 else
121 ath5k_led_on(led->sc); 121 ath5k_led_on(led->ah);
122} 122}
123 123
124static int 124static int
125ath5k_register_led(struct ath5k_softc *sc, struct ath5k_led *led, 125ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led,
126 const char *name, char *trigger) 126 const char *name, char *trigger)
127{ 127{
128 int err; 128 int err;
129 129
130 led->sc = sc; 130 led->ah = ah;
131 strncpy(led->name, name, sizeof(led->name)); 131 strncpy(led->name, name, sizeof(led->name));
132 led->led_dev.name = led->name; 132 led->led_dev.name = led->name;
133 led->led_dev.default_trigger = trigger; 133 led->led_dev.default_trigger = trigger;
134 led->led_dev.brightness_set = ath5k_led_brightness_set; 134 led->led_dev.brightness_set = ath5k_led_brightness_set;
135 135
136 err = led_classdev_register(sc->dev, &led->led_dev); 136 err = led_classdev_register(ah->dev, &led->led_dev);
137 if (err) { 137 if (err) {
138 ATH5K_WARN(sc, "could not register LED %s\n", name); 138 ATH5K_WARN(ah, "could not register LED %s\n", name);
139 led->sc = NULL; 139 led->ah = NULL;
140 } 140 }
141 return err; 141 return err;
142} 142}
@@ -144,30 +144,30 @@ ath5k_register_led(struct ath5k_softc *sc, struct ath5k_led *led,
144static void 144static void
145ath5k_unregister_led(struct ath5k_led *led) 145ath5k_unregister_led(struct ath5k_led *led)
146{ 146{
147 if (!led->sc) 147 if (!led->ah)
148 return; 148 return;
149 led_classdev_unregister(&led->led_dev); 149 led_classdev_unregister(&led->led_dev);
150 ath5k_led_off(led->sc); 150 ath5k_led_off(led->ah);
151 led->sc = NULL; 151 led->ah = NULL;
152} 152}
153 153
154void ath5k_unregister_leds(struct ath5k_softc *sc) 154void ath5k_unregister_leds(struct ath5k_hw *ah)
155{ 155{
156 ath5k_unregister_led(&sc->rx_led); 156 ath5k_unregister_led(&ah->rx_led);
157 ath5k_unregister_led(&sc->tx_led); 157 ath5k_unregister_led(&ah->tx_led);
158} 158}
159 159
160int __devinit ath5k_init_leds(struct ath5k_softc *sc) 160int __devinit ath5k_init_leds(struct ath5k_hw *ah)
161{ 161{
162 int ret = 0; 162 int ret = 0;
163 struct ieee80211_hw *hw = sc->hw; 163 struct ieee80211_hw *hw = ah->hw;
164#ifndef CONFIG_ATHEROS_AR231X 164#ifndef CONFIG_ATHEROS_AR231X
165 struct pci_dev *pdev = sc->pdev; 165 struct pci_dev *pdev = ah->pdev;
166#endif 166#endif
167 char name[ATH5K_LED_MAX_NAME_LEN + 1]; 167 char name[ATH5K_LED_MAX_NAME_LEN + 1];
168 const struct pci_device_id *match; 168 const struct pci_device_id *match;
169 169
170 if (!sc->pdev) 170 if (!ah->pdev)
171 return 0; 171 return 0;
172 172
173#ifdef CONFIG_ATHEROS_AR231X 173#ifdef CONFIG_ATHEROS_AR231X
@@ -176,24 +176,24 @@ int __devinit ath5k_init_leds(struct ath5k_softc *sc)
176 match = pci_match_id(&ath5k_led_devices[0], pdev); 176 match = pci_match_id(&ath5k_led_devices[0], pdev);
177#endif 177#endif
178 if (match) { 178 if (match) {
179 __set_bit(ATH_STAT_LEDSOFT, sc->status); 179 __set_bit(ATH_STAT_LEDSOFT, ah->status);
180 sc->led_pin = ATH_PIN(match->driver_data); 180 ah->led_pin = ATH_PIN(match->driver_data);
181 sc->led_on = ATH_POLARITY(match->driver_data); 181 ah->led_on = ATH_POLARITY(match->driver_data);
182 } 182 }
183 183
184 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 184 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
185 goto out; 185 goto out;
186 186
187 ath5k_led_enable(sc); 187 ath5k_led_enable(ah);
188 188
189 snprintf(name, sizeof(name), "ath5k-%s::rx", wiphy_name(hw->wiphy)); 189 snprintf(name, sizeof(name), "ath5k-%s::rx", wiphy_name(hw->wiphy));
190 ret = ath5k_register_led(sc, &sc->rx_led, name, 190 ret = ath5k_register_led(ah, &ah->rx_led, name,
191 ieee80211_get_rx_led_name(hw)); 191 ieee80211_get_rx_led_name(hw));
192 if (ret) 192 if (ret)
193 goto out; 193 goto out;
194 194
195 snprintf(name, sizeof(name), "ath5k-%s::tx", wiphy_name(hw->wiphy)); 195 snprintf(name, sizeof(name), "ath5k-%s::tx", wiphy_name(hw->wiphy));
196 ret = ath5k_register_led(sc, &sc->tx_led, name, 196 ret = ath5k_register_led(ah, &ah->tx_led, name,
197 ieee80211_get_tx_led_name(hw)); 197 ieee80211_get_tx_led_name(hw));
198out: 198out:
199 return ret; 199 return ret;
diff --git a/drivers/net/wireless/ath/ath5k/mac80211-ops.c b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
index 0d5ab3428be5..2a715ca0c5e4 100644
--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
@@ -53,44 +53,30 @@
53static void 53static void
54ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 54ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
55{ 55{
56 struct ath5k_softc *sc = hw->priv; 56 struct ath5k_hw *ah = hw->priv;
57 u16 qnum = skb_get_queue_mapping(skb); 57 u16 qnum = skb_get_queue_mapping(skb);
58 58
59 if (WARN_ON(qnum >= sc->ah->ah_capabilities.cap_queues.q_tx_num)) { 59 if (WARN_ON(qnum >= ah->ah_capabilities.cap_queues.q_tx_num)) {
60 dev_kfree_skb_any(skb); 60 dev_kfree_skb_any(skb);
61 return; 61 return;
62 } 62 }
63 63
64 ath5k_tx_queue(hw, skb, &sc->txqs[qnum]); 64 ath5k_tx_queue(hw, skb, &ah->txqs[qnum]);
65}
66
67
68static int
69ath5k_start(struct ieee80211_hw *hw)
70{
71 return ath5k_init_hw(hw->priv);
72}
73
74
75static void
76ath5k_stop(struct ieee80211_hw *hw)
77{
78 ath5k_stop_hw(hw->priv);
79} 65}
80 66
81 67
82static int 68static int
83ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 69ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
84{ 70{
85 struct ath5k_softc *sc = hw->priv; 71 struct ath5k_hw *ah = hw->priv;
86 int ret; 72 int ret;
87 struct ath5k_vif *avf = (void *)vif->drv_priv; 73 struct ath5k_vif *avf = (void *)vif->drv_priv;
88 74
89 mutex_lock(&sc->lock); 75 mutex_lock(&ah->lock);
90 76
91 if ((vif->type == NL80211_IFTYPE_AP || 77 if ((vif->type == NL80211_IFTYPE_AP ||
92 vif->type == NL80211_IFTYPE_ADHOC) 78 vif->type == NL80211_IFTYPE_ADHOC)
93 && (sc->num_ap_vifs + sc->num_adhoc_vifs) >= ATH_BCBUF) { 79 && (ah->num_ap_vifs + ah->num_adhoc_vifs) >= ATH_BCBUF) {
94 ret = -ELNRNG; 80 ret = -ELNRNG;
95 goto end; 81 goto end;
96 } 82 }
@@ -100,9 +86,9 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
100 * We would need to operate the HW in ad-hoc mode to allow TSF updates 86 * We would need to operate the HW in ad-hoc mode to allow TSF updates
101 * for the IBSS, but this breaks with additional AP or STA interfaces 87 * for the IBSS, but this breaks with additional AP or STA interfaces
102 * at the moment. */ 88 * at the moment. */
103 if (sc->num_adhoc_vifs || 89 if (ah->num_adhoc_vifs ||
104 (sc->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) { 90 (ah->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) {
105 ATH5K_ERR(sc, "Only one single ad-hoc interface is allowed.\n"); 91 ATH5K_ERR(ah, "Only one single ad-hoc interface is allowed.\n");
106 ret = -ELNRNG; 92 ret = -ELNRNG;
107 goto end; 93 goto end;
108 } 94 }
@@ -119,8 +105,8 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
119 goto end; 105 goto end;
120 } 106 }
121 107
122 sc->nvifs++; 108 ah->nvifs++;
123 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "add interface mode %d\n", avf->opmode); 109 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "add interface mode %d\n", avf->opmode);
124 110
125 /* Assign the vap/adhoc to a beacon xmit slot. */ 111 /* Assign the vap/adhoc to a beacon xmit slot. */
126 if ((avf->opmode == NL80211_IFTYPE_AP) || 112 if ((avf->opmode == NL80211_IFTYPE_AP) ||
@@ -128,38 +114,38 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
128 (avf->opmode == NL80211_IFTYPE_MESH_POINT)) { 114 (avf->opmode == NL80211_IFTYPE_MESH_POINT)) {
129 int slot; 115 int slot;
130 116
131 WARN_ON(list_empty(&sc->bcbuf)); 117 WARN_ON(list_empty(&ah->bcbuf));
132 avf->bbuf = list_first_entry(&sc->bcbuf, struct ath5k_buf, 118 avf->bbuf = list_first_entry(&ah->bcbuf, struct ath5k_buf,
133 list); 119 list);
134 list_del(&avf->bbuf->list); 120 list_del(&avf->bbuf->list);
135 121
136 avf->bslot = 0; 122 avf->bslot = 0;
137 for (slot = 0; slot < ATH_BCBUF; slot++) { 123 for (slot = 0; slot < ATH_BCBUF; slot++) {
138 if (!sc->bslot[slot]) { 124 if (!ah->bslot[slot]) {
139 avf->bslot = slot; 125 avf->bslot = slot;
140 break; 126 break;
141 } 127 }
142 } 128 }
143 BUG_ON(sc->bslot[avf->bslot] != NULL); 129 BUG_ON(ah->bslot[avf->bslot] != NULL);
144 sc->bslot[avf->bslot] = vif; 130 ah->bslot[avf->bslot] = vif;
145 if (avf->opmode == NL80211_IFTYPE_AP) 131 if (avf->opmode == NL80211_IFTYPE_AP)
146 sc->num_ap_vifs++; 132 ah->num_ap_vifs++;
147 else if (avf->opmode == NL80211_IFTYPE_ADHOC) 133 else if (avf->opmode == NL80211_IFTYPE_ADHOC)
148 sc->num_adhoc_vifs++; 134 ah->num_adhoc_vifs++;
149 } 135 }
150 136
151 /* Any MAC address is fine, all others are included through the 137 /* Any MAC address is fine, all others are included through the
152 * filter. 138 * filter.
153 */ 139 */
154 memcpy(&sc->lladdr, vif->addr, ETH_ALEN); 140 memcpy(&ah->lladdr, vif->addr, ETH_ALEN);
155 ath5k_hw_set_lladdr(sc->ah, vif->addr); 141 ath5k_hw_set_lladdr(ah, vif->addr);
156 142
157 memcpy(&avf->lladdr, vif->addr, ETH_ALEN); 143 memcpy(&avf->lladdr, vif->addr, ETH_ALEN);
158 144
159 ath5k_update_bssid_mask_and_opmode(sc, vif); 145 ath5k_update_bssid_mask_and_opmode(ah, vif);
160 ret = 0; 146 ret = 0;
161end: 147end:
162 mutex_unlock(&sc->lock); 148 mutex_unlock(&ah->lock);
163 return ret; 149 return ret;
164} 150}
165 151
@@ -168,31 +154,31 @@ static void
168ath5k_remove_interface(struct ieee80211_hw *hw, 154ath5k_remove_interface(struct ieee80211_hw *hw,
169 struct ieee80211_vif *vif) 155 struct ieee80211_vif *vif)
170{ 156{
171 struct ath5k_softc *sc = hw->priv; 157 struct ath5k_hw *ah = hw->priv;
172 struct ath5k_vif *avf = (void *)vif->drv_priv; 158 struct ath5k_vif *avf = (void *)vif->drv_priv;
173 unsigned int i; 159 unsigned int i;
174 160
175 mutex_lock(&sc->lock); 161 mutex_lock(&ah->lock);
176 sc->nvifs--; 162 ah->nvifs--;
177 163
178 if (avf->bbuf) { 164 if (avf->bbuf) {
179 ath5k_txbuf_free_skb(sc, avf->bbuf); 165 ath5k_txbuf_free_skb(ah, avf->bbuf);
180 list_add_tail(&avf->bbuf->list, &sc->bcbuf); 166 list_add_tail(&avf->bbuf->list, &ah->bcbuf);
181 for (i = 0; i < ATH_BCBUF; i++) { 167 for (i = 0; i < ATH_BCBUF; i++) {
182 if (sc->bslot[i] == vif) { 168 if (ah->bslot[i] == vif) {
183 sc->bslot[i] = NULL; 169 ah->bslot[i] = NULL;
184 break; 170 break;
185 } 171 }
186 } 172 }
187 avf->bbuf = NULL; 173 avf->bbuf = NULL;
188 } 174 }
189 if (avf->opmode == NL80211_IFTYPE_AP) 175 if (avf->opmode == NL80211_IFTYPE_AP)
190 sc->num_ap_vifs--; 176 ah->num_ap_vifs--;
191 else if (avf->opmode == NL80211_IFTYPE_ADHOC) 177 else if (avf->opmode == NL80211_IFTYPE_ADHOC)
192 sc->num_adhoc_vifs--; 178 ah->num_adhoc_vifs--;
193 179
194 ath5k_update_bssid_mask_and_opmode(sc, NULL); 180 ath5k_update_bssid_mask_and_opmode(ah, NULL);
195 mutex_unlock(&sc->lock); 181 mutex_unlock(&ah->lock);
196} 182}
197 183
198 184
@@ -202,23 +188,22 @@ ath5k_remove_interface(struct ieee80211_hw *hw,
202static int 188static int
203ath5k_config(struct ieee80211_hw *hw, u32 changed) 189ath5k_config(struct ieee80211_hw *hw, u32 changed)
204{ 190{
205 struct ath5k_softc *sc = hw->priv; 191 struct ath5k_hw *ah = hw->priv;
206 struct ath5k_hw *ah = sc->ah;
207 struct ieee80211_conf *conf = &hw->conf; 192 struct ieee80211_conf *conf = &hw->conf;
208 int ret = 0; 193 int ret = 0;
209 int i; 194 int i;
210 195
211 mutex_lock(&sc->lock); 196 mutex_lock(&ah->lock);
212 197
213 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 198 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
214 ret = ath5k_chan_set(sc, conf->channel); 199 ret = ath5k_chan_set(ah, conf->channel);
215 if (ret < 0) 200 if (ret < 0)
216 goto unlock; 201 goto unlock;
217 } 202 }
218 203
219 if ((changed & IEEE80211_CONF_CHANGE_POWER) && 204 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
220 (sc->power_level != conf->power_level)) { 205 (ah->power_level != conf->power_level)) {
221 sc->power_level = conf->power_level; 206 ah->power_level = conf->power_level;
222 207
223 /* Half dB steps */ 208 /* Half dB steps */
224 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2)); 209 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
@@ -252,7 +237,7 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
252 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode); 237 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode);
253 238
254unlock: 239unlock:
255 mutex_unlock(&sc->lock); 240 mutex_unlock(&ah->lock);
256 return ret; 241 return ret;
257} 242}
258 243
@@ -262,12 +247,11 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
262 struct ieee80211_bss_conf *bss_conf, u32 changes) 247 struct ieee80211_bss_conf *bss_conf, u32 changes)
263{ 248{
264 struct ath5k_vif *avf = (void *)vif->drv_priv; 249 struct ath5k_vif *avf = (void *)vif->drv_priv;
265 struct ath5k_softc *sc = hw->priv; 250 struct ath5k_hw *ah = hw->priv;
266 struct ath5k_hw *ah = sc->ah;
267 struct ath_common *common = ath5k_hw_common(ah); 251 struct ath_common *common = ath5k_hw_common(ah);
268 unsigned long flags; 252 unsigned long flags;
269 253
270 mutex_lock(&sc->lock); 254 mutex_lock(&ah->lock);
271 255
272 if (changes & BSS_CHANGED_BSSID) { 256 if (changes & BSS_CHANGED_BSSID) {
273 /* Cache for later use during resets */ 257 /* Cache for later use during resets */
@@ -278,7 +262,7 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
278 } 262 }
279 263
280 if (changes & BSS_CHANGED_BEACON_INT) 264 if (changes & BSS_CHANGED_BEACON_INT)
281 sc->bintval = bss_conf->beacon_int; 265 ah->bintval = bss_conf->beacon_int;
282 266
283 if (changes & BSS_CHANGED_ERP_SLOT) { 267 if (changes & BSS_CHANGED_ERP_SLOT) {
284 int slot_time; 268 int slot_time;
@@ -292,16 +276,16 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
292 if (changes & BSS_CHANGED_ASSOC) { 276 if (changes & BSS_CHANGED_ASSOC) {
293 avf->assoc = bss_conf->assoc; 277 avf->assoc = bss_conf->assoc;
294 if (bss_conf->assoc) 278 if (bss_conf->assoc)
295 sc->assoc = bss_conf->assoc; 279 ah->assoc = bss_conf->assoc;
296 else 280 else
297 sc->assoc = ath5k_any_vif_assoc(sc); 281 ah->assoc = ath5k_any_vif_assoc(ah);
298 282
299 if (sc->opmode == NL80211_IFTYPE_STATION) 283 if (ah->opmode == NL80211_IFTYPE_STATION)
300 ath5k_set_beacon_filter(hw, sc->assoc); 284 ath5k_set_beacon_filter(hw, ah->assoc);
301 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 285 ath5k_hw_set_ledstate(ah, ah->assoc ?
302 AR5K_LED_ASSOC : AR5K_LED_INIT); 286 AR5K_LED_ASSOC : AR5K_LED_INIT);
303 if (bss_conf->assoc) { 287 if (bss_conf->assoc) {
304 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, 288 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
305 "Bss Info ASSOC %d, bssid: %pM\n", 289 "Bss Info ASSOC %d, bssid: %pM\n",
306 bss_conf->aid, common->curbssid); 290 bss_conf->aid, common->curbssid);
307 common->curaid = bss_conf->aid; 291 common->curaid = bss_conf->aid;
@@ -311,19 +295,19 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
311 } 295 }
312 296
313 if (changes & BSS_CHANGED_BEACON) { 297 if (changes & BSS_CHANGED_BEACON) {
314 spin_lock_irqsave(&sc->block, flags); 298 spin_lock_irqsave(&ah->block, flags);
315 ath5k_beacon_update(hw, vif); 299 ath5k_beacon_update(hw, vif);
316 spin_unlock_irqrestore(&sc->block, flags); 300 spin_unlock_irqrestore(&ah->block, flags);
317 } 301 }
318 302
319 if (changes & BSS_CHANGED_BEACON_ENABLED) 303 if (changes & BSS_CHANGED_BEACON_ENABLED)
320 sc->enable_beacon = bss_conf->enable_beacon; 304 ah->enable_beacon = bss_conf->enable_beacon;
321 305
322 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED | 306 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED |
323 BSS_CHANGED_BEACON_INT)) 307 BSS_CHANGED_BEACON_INT))
324 ath5k_beacon_config(sc); 308 ath5k_beacon_config(ah);
325 309
326 mutex_unlock(&sc->lock); 310 mutex_unlock(&ah->lock);
327} 311}
328 312
329 313
@@ -384,12 +368,11 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
384 FIF_PLCPFAIL | FIF_CONTROL | FIF_OTHER_BSS | \ 368 FIF_PLCPFAIL | FIF_CONTROL | FIF_OTHER_BSS | \
385 FIF_BCN_PRBRESP_PROMISC) 369 FIF_BCN_PRBRESP_PROMISC)
386 370
387 struct ath5k_softc *sc = hw->priv; 371 struct ath5k_hw *ah = hw->priv;
388 struct ath5k_hw *ah = sc->ah;
389 u32 mfilt[2], rfilt; 372 u32 mfilt[2], rfilt;
390 struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */ 373 struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */
391 374
392 mutex_lock(&sc->lock); 375 mutex_lock(&ah->lock);
393 376
394 mfilt[0] = multicast; 377 mfilt[0] = multicast;
395 mfilt[1] = multicast >> 32; 378 mfilt[1] = multicast >> 32;
@@ -407,12 +390,12 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
407 390
408 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { 391 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
409 if (*new_flags & FIF_PROMISC_IN_BSS) 392 if (*new_flags & FIF_PROMISC_IN_BSS)
410 __set_bit(ATH_STAT_PROMISC, sc->status); 393 __set_bit(ATH_STAT_PROMISC, ah->status);
411 else 394 else
412 __clear_bit(ATH_STAT_PROMISC, sc->status); 395 __clear_bit(ATH_STAT_PROMISC, ah->status);
413 } 396 }
414 397
415 if (test_bit(ATH_STAT_PROMISC, sc->status)) 398 if (test_bit(ATH_STAT_PROMISC, ah->status))
416 rfilt |= AR5K_RX_FILTER_PROM; 399 rfilt |= AR5K_RX_FILTER_PROM;
417 400
418 /* Note, AR5K_RX_FILTER_MCAST is already enabled */ 401 /* Note, AR5K_RX_FILTER_MCAST is already enabled */
@@ -427,7 +410,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
427 410
428 /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons 411 /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons
429 * and probes for any BSSID */ 412 * and probes for any BSSID */
430 if ((*new_flags & FIF_BCN_PRBRESP_PROMISC) || (sc->nvifs > 1)) 413 if ((*new_flags & FIF_BCN_PRBRESP_PROMISC) || (ah->nvifs > 1))
431 rfilt |= AR5K_RX_FILTER_BEACON; 414 rfilt |= AR5K_RX_FILTER_BEACON;
432 415
433 /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not 416 /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not
@@ -442,7 +425,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
442 425
443 /* XXX move these to mac80211, and add a beacon IFF flag to mac80211 */ 426 /* XXX move these to mac80211, and add a beacon IFF flag to mac80211 */
444 427
445 switch (sc->opmode) { 428 switch (ah->opmode) {
446 case NL80211_IFTYPE_MESH_POINT: 429 case NL80211_IFTYPE_MESH_POINT:
447 rfilt |= AR5K_RX_FILTER_CONTROL | 430 rfilt |= AR5K_RX_FILTER_CONTROL |
448 AR5K_RX_FILTER_BEACON | 431 AR5K_RX_FILTER_BEACON |
@@ -455,7 +438,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
455 AR5K_RX_FILTER_BEACON; 438 AR5K_RX_FILTER_BEACON;
456 break; 439 break;
457 case NL80211_IFTYPE_STATION: 440 case NL80211_IFTYPE_STATION:
458 if (sc->assoc) 441 if (ah->assoc)
459 rfilt |= AR5K_RX_FILTER_BEACON; 442 rfilt |= AR5K_RX_FILTER_BEACON;
460 default: 443 default:
461 break; 444 break;
@@ -464,7 +447,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
464 iter_data.hw_macaddr = NULL; 447 iter_data.hw_macaddr = NULL;
465 iter_data.n_stas = 0; 448 iter_data.n_stas = 0;
466 iter_data.need_set_hw_addr = false; 449 iter_data.need_set_hw_addr = false;
467 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 450 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
468 &iter_data); 451 &iter_data);
469 452
470 /* Set up RX Filter */ 453 /* Set up RX Filter */
@@ -483,9 +466,9 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
483 ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]); 466 ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
484 /* Set the cached hw filter flags, this will later actually 467 /* Set the cached hw filter flags, this will later actually
485 * be set in HW */ 468 * be set in HW */
486 sc->filter_flags = rfilt; 469 ah->filter_flags = rfilt;
487 470
488 mutex_unlock(&sc->lock); 471 mutex_unlock(&ah->lock);
489} 472}
490 473
491 474
@@ -494,8 +477,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
494 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 477 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
495 struct ieee80211_key_conf *key) 478 struct ieee80211_key_conf *key)
496{ 479{
497 struct ath5k_softc *sc = hw->priv; 480 struct ath5k_hw *ah = hw->priv;
498 struct ath5k_hw *ah = sc->ah;
499 struct ath_common *common = ath5k_hw_common(ah); 481 struct ath_common *common = ath5k_hw_common(ah);
500 int ret = 0; 482 int ret = 0;
501 483
@@ -516,7 +498,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
516 return -EINVAL; 498 return -EINVAL;
517 } 499 }
518 500
519 mutex_lock(&sc->lock); 501 mutex_lock(&ah->lock);
520 502
521 switch (cmd) { 503 switch (cmd) {
522 case SET_KEY: 504 case SET_KEY:
@@ -540,7 +522,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
540 } 522 }
541 523
542 mmiowb(); 524 mmiowb();
543 mutex_unlock(&sc->lock); 525 mutex_unlock(&ah->lock);
544 return ret; 526 return ret;
545} 527}
546 528
@@ -548,17 +530,17 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
548static void 530static void
549ath5k_sw_scan_start(struct ieee80211_hw *hw) 531ath5k_sw_scan_start(struct ieee80211_hw *hw)
550{ 532{
551 struct ath5k_softc *sc = hw->priv; 533 struct ath5k_hw *ah = hw->priv;
552 if (!sc->assoc) 534 if (!ah->assoc)
553 ath5k_hw_set_ledstate(sc->ah, AR5K_LED_SCAN); 535 ath5k_hw_set_ledstate(ah, AR5K_LED_SCAN);
554} 536}
555 537
556 538
557static void 539static void
558ath5k_sw_scan_complete(struct ieee80211_hw *hw) 540ath5k_sw_scan_complete(struct ieee80211_hw *hw)
559{ 541{
560 struct ath5k_softc *sc = hw->priv; 542 struct ath5k_hw *ah = hw->priv;
561 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 543 ath5k_hw_set_ledstate(ah, ah->assoc ?
562 AR5K_LED_ASSOC : AR5K_LED_INIT); 544 AR5K_LED_ASSOC : AR5K_LED_INIT);
563} 545}
564 546
@@ -567,15 +549,15 @@ static int
567ath5k_get_stats(struct ieee80211_hw *hw, 549ath5k_get_stats(struct ieee80211_hw *hw,
568 struct ieee80211_low_level_stats *stats) 550 struct ieee80211_low_level_stats *stats)
569{ 551{
570 struct ath5k_softc *sc = hw->priv; 552 struct ath5k_hw *ah = hw->priv;
571 553
572 /* Force update */ 554 /* Force update */
573 ath5k_hw_update_mib_counters(sc->ah); 555 ath5k_hw_update_mib_counters(ah);
574 556
575 stats->dot11ACKFailureCount = sc->stats.ack_fail; 557 stats->dot11ACKFailureCount = ah->stats.ack_fail;
576 stats->dot11RTSFailureCount = sc->stats.rts_fail; 558 stats->dot11RTSFailureCount = ah->stats.rts_fail;
577 stats->dot11RTSSuccessCount = sc->stats.rts_ok; 559 stats->dot11RTSSuccessCount = ah->stats.rts_ok;
578 stats->dot11FCSErrorCount = sc->stats.fcs_error; 560 stats->dot11FCSErrorCount = ah->stats.fcs_error;
579 561
580 return 0; 562 return 0;
581} 563}
@@ -585,15 +567,14 @@ static int
585ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue, 567ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
586 const struct ieee80211_tx_queue_params *params) 568 const struct ieee80211_tx_queue_params *params)
587{ 569{
588 struct ath5k_softc *sc = hw->priv; 570 struct ath5k_hw *ah = hw->priv;
589 struct ath5k_hw *ah = sc->ah;
590 struct ath5k_txq_info qi; 571 struct ath5k_txq_info qi;
591 int ret = 0; 572 int ret = 0;
592 573
593 if (queue >= ah->ah_capabilities.cap_queues.q_tx_num) 574 if (queue >= ah->ah_capabilities.cap_queues.q_tx_num)
594 return 0; 575 return 0;
595 576
596 mutex_lock(&sc->lock); 577 mutex_lock(&ah->lock);
597 578
598 ath5k_hw_get_tx_queueprops(ah, queue, &qi); 579 ath5k_hw_get_tx_queueprops(ah, queue, &qi);
599 580
@@ -602,20 +583,20 @@ ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
602 qi.tqi_cw_max = params->cw_max; 583 qi.tqi_cw_max = params->cw_max;
603 qi.tqi_burst_time = params->txop; 584 qi.tqi_burst_time = params->txop;
604 585
605 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, 586 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
606 "Configure tx [queue %d], " 587 "Configure tx [queue %d], "
607 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 588 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
608 queue, params->aifs, params->cw_min, 589 queue, params->aifs, params->cw_min,
609 params->cw_max, params->txop); 590 params->cw_max, params->txop);
610 591
611 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) { 592 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) {
612 ATH5K_ERR(sc, 593 ATH5K_ERR(ah,
613 "Unable to update hardware queue %u!\n", queue); 594 "Unable to update hardware queue %u!\n", queue);
614 ret = -EIO; 595 ret = -EIO;
615 } else 596 } else
616 ath5k_hw_reset_tx_queue(ah, queue); 597 ath5k_hw_reset_tx_queue(ah, queue);
617 598
618 mutex_unlock(&sc->lock); 599 mutex_unlock(&ah->lock);
619 600
620 return ret; 601 return ret;
621} 602}
@@ -624,43 +605,43 @@ ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
624static u64 605static u64
625ath5k_get_tsf(struct ieee80211_hw *hw) 606ath5k_get_tsf(struct ieee80211_hw *hw)
626{ 607{
627 struct ath5k_softc *sc = hw->priv; 608 struct ath5k_hw *ah = hw->priv;
628 609
629 return ath5k_hw_get_tsf64(sc->ah); 610 return ath5k_hw_get_tsf64(ah);
630} 611}
631 612
632 613
633static void 614static void
634ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf) 615ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
635{ 616{
636 struct ath5k_softc *sc = hw->priv; 617 struct ath5k_hw *ah = hw->priv;
637 618
638 ath5k_hw_set_tsf64(sc->ah, tsf); 619 ath5k_hw_set_tsf64(ah, tsf);
639} 620}
640 621
641 622
642static void 623static void
643ath5k_reset_tsf(struct ieee80211_hw *hw) 624ath5k_reset_tsf(struct ieee80211_hw *hw)
644{ 625{
645 struct ath5k_softc *sc = hw->priv; 626 struct ath5k_hw *ah = hw->priv;
646 627
647 /* 628 /*
648 * in IBSS mode we need to update the beacon timers too. 629 * in IBSS mode we need to update the beacon timers too.
649 * this will also reset the TSF if we call it with 0 630 * this will also reset the TSF if we call it with 0
650 */ 631 */
651 if (sc->opmode == NL80211_IFTYPE_ADHOC) 632 if (ah->opmode == NL80211_IFTYPE_ADHOC)
652 ath5k_beacon_update_timers(sc, 0); 633 ath5k_beacon_update_timers(ah, 0);
653 else 634 else
654 ath5k_hw_reset_tsf(sc->ah); 635 ath5k_hw_reset_tsf(ah);
655} 636}
656 637
657 638
658static int 639static int
659ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey) 640ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
660{ 641{
661 struct ath5k_softc *sc = hw->priv; 642 struct ath5k_hw *ah = hw->priv;
662 struct ieee80211_conf *conf = &hw->conf; 643 struct ieee80211_conf *conf = &hw->conf;
663 struct ath_common *common = ath5k_hw_common(sc->ah); 644 struct ath_common *common = ath5k_hw_common(ah);
664 struct ath_cycle_counters *cc = &common->cc_survey; 645 struct ath_cycle_counters *cc = &common->cc_survey;
665 unsigned int div = common->clockrate * 1000; 646 unsigned int div = common->clockrate * 1000;
666 647
@@ -670,18 +651,18 @@ ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
670 spin_lock_bh(&common->cc_lock); 651 spin_lock_bh(&common->cc_lock);
671 ath_hw_cycle_counters_update(common); 652 ath_hw_cycle_counters_update(common);
672 if (cc->cycles > 0) { 653 if (cc->cycles > 0) {
673 sc->survey.channel_time += cc->cycles / div; 654 ah->survey.channel_time += cc->cycles / div;
674 sc->survey.channel_time_busy += cc->rx_busy / div; 655 ah->survey.channel_time_busy += cc->rx_busy / div;
675 sc->survey.channel_time_rx += cc->rx_frame / div; 656 ah->survey.channel_time_rx += cc->rx_frame / div;
676 sc->survey.channel_time_tx += cc->tx_frame / div; 657 ah->survey.channel_time_tx += cc->tx_frame / div;
677 } 658 }
678 memset(cc, 0, sizeof(*cc)); 659 memset(cc, 0, sizeof(*cc));
679 spin_unlock_bh(&common->cc_lock); 660 spin_unlock_bh(&common->cc_lock);
680 661
681 memcpy(survey, &sc->survey, sizeof(*survey)); 662 memcpy(survey, &ah->survey, sizeof(*survey));
682 663
683 survey->channel = conf->channel; 664 survey->channel = conf->channel;
684 survey->noise = sc->ah->ah_noise_floor; 665 survey->noise = ah->ah_noise_floor;
685 survey->filled = SURVEY_INFO_NOISE_DBM | 666 survey->filled = SURVEY_INFO_NOISE_DBM |
686 SURVEY_INFO_CHANNEL_TIME | 667 SURVEY_INFO_CHANNEL_TIME |
687 SURVEY_INFO_CHANNEL_TIME_BUSY | 668 SURVEY_INFO_CHANNEL_TIME_BUSY |
@@ -705,25 +686,25 @@ ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
705static void 686static void
706ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 687ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
707{ 688{
708 struct ath5k_softc *sc = hw->priv; 689 struct ath5k_hw *ah = hw->priv;
709 690
710 mutex_lock(&sc->lock); 691 mutex_lock(&ah->lock);
711 ath5k_hw_set_coverage_class(sc->ah, coverage_class); 692 ath5k_hw_set_coverage_class(ah, coverage_class);
712 mutex_unlock(&sc->lock); 693 mutex_unlock(&ah->lock);
713} 694}
714 695
715 696
716static int 697static int
717ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 698ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
718{ 699{
719 struct ath5k_softc *sc = hw->priv; 700 struct ath5k_hw *ah = hw->priv;
720 701
721 if (tx_ant == 1 && rx_ant == 1) 702 if (tx_ant == 1 && rx_ant == 1)
722 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); 703 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);
723 else if (tx_ant == 2 && rx_ant == 2) 704 else if (tx_ant == 2 && rx_ant == 2)
724 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); 705 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);
725 else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3) 706 else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3)
726 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); 707 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
727 else 708 else
728 return -EINVAL; 709 return -EINVAL;
729 return 0; 710 return 0;
@@ -733,9 +714,9 @@ ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
733static int 714static int
734ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 715ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
735{ 716{
736 struct ath5k_softc *sc = hw->priv; 717 struct ath5k_hw *ah = hw->priv;
737 718
738 switch (sc->ah->ah_ant_mode) { 719 switch (ah->ah_ant_mode) {
739 case AR5K_ANTMODE_FIXED_A: 720 case AR5K_ANTMODE_FIXED_A:
740 *tx_ant = 1; *rx_ant = 1; break; 721 *tx_ant = 1; *rx_ant = 1; break;
741 case AR5K_ANTMODE_FIXED_B: 722 case AR5K_ANTMODE_FIXED_B:
@@ -750,9 +731,9 @@ ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
750static void ath5k_get_ringparam(struct ieee80211_hw *hw, 731static void ath5k_get_ringparam(struct ieee80211_hw *hw,
751 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max) 732 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max)
752{ 733{
753 struct ath5k_softc *sc = hw->priv; 734 struct ath5k_hw *ah = hw->priv;
754 735
755 *tx = sc->txqs[AR5K_TX_QUEUE_ID_DATA_MIN].txq_max; 736 *tx = ah->txqs[AR5K_TX_QUEUE_ID_DATA_MIN].txq_max;
756 737
757 *tx_max = ATH5K_TXQ_LEN_MAX; 738 *tx_max = ATH5K_TXQ_LEN_MAX;
758 *rx = *rx_max = ATH_RXBUF; 739 *rx = *rx_max = ATH_RXBUF;
@@ -761,7 +742,7 @@ static void ath5k_get_ringparam(struct ieee80211_hw *hw,
761 742
762static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx) 743static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx)
763{ 744{
764 struct ath5k_softc *sc = hw->priv; 745 struct ath5k_hw *ah = hw->priv;
765 u16 qnum; 746 u16 qnum;
766 747
767 /* only support setting tx ring size for now */ 748 /* only support setting tx ring size for now */
@@ -772,16 +753,16 @@ static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx)
772 if (!tx || tx > ATH5K_TXQ_LEN_MAX) 753 if (!tx || tx > ATH5K_TXQ_LEN_MAX)
773 return -EINVAL; 754 return -EINVAL;
774 755
775 for (qnum = 0; qnum < ARRAY_SIZE(sc->txqs); qnum++) { 756 for (qnum = 0; qnum < ARRAY_SIZE(ah->txqs); qnum++) {
776 if (!sc->txqs[qnum].setup) 757 if (!ah->txqs[qnum].setup)
777 continue; 758 continue;
778 if (sc->txqs[qnum].qnum < AR5K_TX_QUEUE_ID_DATA_MIN || 759 if (ah->txqs[qnum].qnum < AR5K_TX_QUEUE_ID_DATA_MIN ||
779 sc->txqs[qnum].qnum > AR5K_TX_QUEUE_ID_DATA_MAX) 760 ah->txqs[qnum].qnum > AR5K_TX_QUEUE_ID_DATA_MAX)
780 continue; 761 continue;
781 762
782 sc->txqs[qnum].txq_max = tx; 763 ah->txqs[qnum].txq_max = tx;
783 if (sc->txqs[qnum].txq_len >= sc->txqs[qnum].txq_max) 764 if (ah->txqs[qnum].txq_len >= ah->txqs[qnum].txq_max)
784 ieee80211_stop_queue(hw, sc->txqs[qnum].qnum); 765 ieee80211_stop_queue(hw, ah->txqs[qnum].qnum);
785 } 766 }
786 767
787 return 0; 768 return 0;
diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c
index aac5b7831948..eaf79b49341e 100644
--- a/drivers/net/wireless/ath/ath5k/pci.c
+++ b/drivers/net/wireless/ath/ath5k/pci.c
@@ -51,10 +51,10 @@ MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table);
51/* return bus cachesize in 4B word units */ 51/* return bus cachesize in 4B word units */
52static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz) 52static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz)
53{ 53{
54 struct ath5k_softc *sc = (struct ath5k_softc *) common->priv; 54 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv;
55 u8 u8tmp; 55 u8 u8tmp;
56 56
57 pci_read_config_byte(sc->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); 57 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp);
58 *csz = (int)u8tmp; 58 *csz = (int)u8tmp;
59 59
60 /* 60 /*
@@ -156,7 +156,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
156 const struct pci_device_id *id) 156 const struct pci_device_id *id)
157{ 157{
158 void __iomem *mem; 158 void __iomem *mem;
159 struct ath5k_softc *sc; 159 struct ath5k_hw *ah;
160 struct ieee80211_hw *hw; 160 struct ieee80211_hw *hw;
161 int ret; 161 int ret;
162 u8 csz; 162 u8 csz;
@@ -243,7 +243,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
243 * Allocate hw (mac80211 main struct) 243 * Allocate hw (mac80211 main struct)
244 * and hw->priv (driver private data) 244 * and hw->priv (driver private data)
245 */ 245 */
246 hw = ieee80211_alloc_hw(sizeof(*sc), &ath5k_hw_ops); 246 hw = ieee80211_alloc_hw(sizeof(*ah), &ath5k_hw_ops);
247 if (hw == NULL) { 247 if (hw == NULL) {
248 dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n"); 248 dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n");
249 ret = -ENOMEM; 249 ret = -ENOMEM;
@@ -252,16 +252,16 @@ ath5k_pci_probe(struct pci_dev *pdev,
252 252
253 dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy)); 253 dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy));
254 254
255 sc = hw->priv; 255 ah = hw->priv;
256 sc->hw = hw; 256 ah->hw = hw;
257 sc->pdev = pdev; 257 ah->pdev = pdev;
258 sc->dev = &pdev->dev; 258 ah->dev = &pdev->dev;
259 sc->irq = pdev->irq; 259 ah->irq = pdev->irq;
260 sc->devid = id->device; 260 ah->devid = id->device;
261 sc->iobase = mem; /* So we can unmap it on detach */ 261 ah->iobase = mem; /* So we can unmap it on detach */
262 262
263 /* Initialize */ 263 /* Initialize */
264 ret = ath5k_init_softc(sc, &ath_pci_bus_ops); 264 ret = ath5k_init_softc(ah, &ath_pci_bus_ops);
265 if (ret) 265 if (ret)
266 goto err_free; 266 goto err_free;
267 267
@@ -285,10 +285,10 @@ static void __devexit
285ath5k_pci_remove(struct pci_dev *pdev) 285ath5k_pci_remove(struct pci_dev *pdev)
286{ 286{
287 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 287 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
288 struct ath5k_softc *sc = hw->priv; 288 struct ath5k_hw *ah = hw->priv;
289 289
290 ath5k_deinit_softc(sc); 290 ath5k_deinit_softc(ah);
291 pci_iounmap(pdev, sc->iobase); 291 pci_iounmap(pdev, ah->iobase);
292 pci_release_region(pdev, 0); 292 pci_release_region(pdev, 0);
293 pci_disable_device(pdev); 293 pci_disable_device(pdev);
294 ieee80211_free_hw(hw); 294 ieee80211_free_hw(hw);
@@ -299,9 +299,9 @@ static int ath5k_pci_suspend(struct device *dev)
299{ 299{
300 struct pci_dev *pdev = to_pci_dev(dev); 300 struct pci_dev *pdev = to_pci_dev(dev);
301 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 301 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
302 struct ath5k_softc *sc = hw->priv; 302 struct ath5k_hw *ah = hw->priv;
303 303
304 ath5k_led_off(sc); 304 ath5k_led_off(ah);
305 return 0; 305 return 0;
306} 306}
307 307
@@ -309,7 +309,7 @@ static int ath5k_pci_resume(struct device *dev)
309{ 309{
310 struct pci_dev *pdev = to_pci_dev(dev); 310 struct pci_dev *pdev = to_pci_dev(dev);
311 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 311 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
312 struct ath5k_softc *sc = hw->priv; 312 struct ath5k_hw *ah = hw->priv;
313 313
314 /* 314 /*
315 * Suspend/Resume resets the PCI configuration space, so we have to 315 * Suspend/Resume resets the PCI configuration space, so we have to
@@ -318,7 +318,7 @@ static int ath5k_pci_resume(struct device *dev)
318 */ 318 */
319 pci_write_config_byte(pdev, 0x41, 0); 319 pci_write_config_byte(pdev, 0x41, 0);
320 320
321 ath5k_led_enable(sc); 321 ath5k_led_enable(ah);
322 return 0; 322 return 0;
323} 323}
324 324
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 618ee54d5fe5..067313845060 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -77,14 +77,13 @@ static const unsigned int ack_rates_high[] =
77int ath5k_hw_get_frame_duration(struct ath5k_hw *ah, 77int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
78 int len, struct ieee80211_rate *rate, bool shortpre) 78 int len, struct ieee80211_rate *rate, bool shortpre)
79{ 79{
80 struct ath5k_softc *sc = ah->ah_sc;
81 int sifs, preamble, plcp_bits, sym_time; 80 int sifs, preamble, plcp_bits, sym_time;
82 int bitrate, bits, symbols, symbol_bits; 81 int bitrate, bits, symbols, symbol_bits;
83 int dur; 82 int dur;
84 83
85 /* Fallback */ 84 /* Fallback */
86 if (!ah->ah_bwmode) { 85 if (!ah->ah_bwmode) {
87 __le16 raw_dur = ieee80211_generic_frame_duration(sc->hw, 86 __le16 raw_dur = ieee80211_generic_frame_duration(ah->hw,
88 NULL, len, rate); 87 NULL, len, rate);
89 88
90 /* subtract difference between long and short preamble */ 89 /* subtract difference between long and short preamble */
@@ -205,7 +204,7 @@ unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
205 */ 204 */
206void ath5k_hw_update_mib_counters(struct ath5k_hw *ah) 205void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
207{ 206{
208 struct ath5k_statistics *stats = &ah->ah_sc->stats; 207 struct ath5k_statistics *stats = &ah->stats;
209 208
210 /* Read-And-Clear */ 209 /* Read-And-Clear */
211 stats->ack_fail += ath5k_hw_reg_read(ah, AR5K_ACK_FAIL); 210 stats->ack_fail += ath5k_hw_reg_read(ah, AR5K_ACK_FAIL);
@@ -240,25 +239,24 @@ void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
240 */ 239 */
241static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah) 240static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
242{ 241{
243 struct ath5k_softc *sc = ah->ah_sc;
244 struct ieee80211_rate *rate; 242 struct ieee80211_rate *rate;
245 unsigned int i; 243 unsigned int i;
246 /* 802.11g covers both OFDM and CCK */ 244 /* 802.11g covers both OFDM and CCK */
247 u8 band = IEEE80211_BAND_2GHZ; 245 u8 band = IEEE80211_BAND_2GHZ;
248 246
249 /* Write rate duration table */ 247 /* Write rate duration table */
250 for (i = 0; i < sc->sbands[band].n_bitrates; i++) { 248 for (i = 0; i < ah->sbands[band].n_bitrates; i++) {
251 u32 reg; 249 u32 reg;
252 u16 tx_time; 250 u16 tx_time;
253 251
254 if (ah->ah_ack_bitrate_high) 252 if (ah->ah_ack_bitrate_high)
255 rate = &sc->sbands[band].bitrates[ack_rates_high[i]]; 253 rate = &ah->sbands[band].bitrates[ack_rates_high[i]];
256 /* CCK -> 1Mb */ 254 /* CCK -> 1Mb */
257 else if (i < 4) 255 else if (i < 4)
258 rate = &sc->sbands[band].bitrates[0]; 256 rate = &ah->sbands[band].bitrates[0];
259 /* OFDM -> 6Mb */ 257 /* OFDM -> 6Mb */
260 else 258 else
261 rate = &sc->sbands[band].bitrates[4]; 259 rate = &ah->sbands[band].bitrates[4];
262 260
263 /* Set ACK timeout */ 261 /* Set ACK timeout */
264 reg = AR5K_RATE_DUR(rate->hw_value); 262 reg = AR5K_RATE_DUR(rate->hw_value);
@@ -586,7 +584,7 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
586 /* 584 /*
587 * Set the additional timers by mode 585 * Set the additional timers by mode
588 */ 586 */
589 switch (ah->ah_sc->opmode) { 587 switch (ah->opmode) {
590 case NL80211_IFTYPE_MONITOR: 588 case NL80211_IFTYPE_MONITOR:
591 case NL80211_IFTYPE_STATION: 589 case NL80211_IFTYPE_STATION:
592 /* In STA mode timer1 is used as next wakeup 590 /* In STA mode timer1 is used as next wakeup
@@ -623,8 +621,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
623 * Set the beacon register and enable all timers. 621 * Set the beacon register and enable all timers.
624 */ 622 */
625 /* When in AP or Mesh Point mode zero timer0 to start TSF */ 623 /* When in AP or Mesh Point mode zero timer0 to start TSF */
626 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP || 624 if (ah->opmode == NL80211_IFTYPE_AP ||
627 ah->ah_sc->opmode == NL80211_IFTYPE_MESH_POINT) 625 ah->opmode == NL80211_IFTYPE_MESH_POINT)
628 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0); 626 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
629 627
630 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0); 628 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
@@ -814,7 +812,7 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
814 struct ath_common *common = ath5k_hw_common(ah); 812 struct ath_common *common = ath5k_hw_common(ah);
815 u32 pcu_reg, beacon_reg, low_id, high_id; 813 u32 pcu_reg, beacon_reg, low_id, high_id;
816 814
817 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_MODE, "mode %d\n", op_mode); 815 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode %d\n", op_mode);
818 816
819 /* Preserve rest settings */ 817 /* Preserve rest settings */
820 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000; 818 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
@@ -890,7 +888,7 @@ void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
890 * XXX: rethink this after new mode changes to 888 * XXX: rethink this after new mode changes to
891 * mac80211 are integrated */ 889 * mac80211 are integrated */
892 if (ah->ah_version == AR5K_AR5212 && 890 if (ah->ah_version == AR5K_AR5212 &&
893 ah->ah_sc->nvifs) 891 ah->nvifs)
894 ath5k_hw_write_rate_duration(ah); 892 ath5k_hw_write_rate_duration(ah);
895 893
896 /* Set RSSI/BRSSI thresholds 894 /* Set RSSI/BRSSI thresholds
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index dd2b417729ba..81e465e70175 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <asm/unaligned.h>
25 26
26#include "ath5k.h" 27#include "ath5k.h"
27#include "reg.h" 28#include "reg.h"
@@ -561,7 +562,7 @@ static s8 ath5k_hw_rf_gainf_adjust(struct ath5k_hw *ah)
561 } 562 }
562 563
563done: 564done:
564 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 565 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
565 "ret %d, gain step %u, current gain %u, target gain %u\n", 566 "ret %d, gain step %u, current gain %u, target gain %u\n",
566 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current, 567 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current,
567 ah->ah_gain.g_target); 568 ah->ah_gain.g_target);
@@ -773,7 +774,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
773 ah->ah_rf_banks = kmalloc(sizeof(u32) * ah->ah_rf_banks_size, 774 ah->ah_rf_banks = kmalloc(sizeof(u32) * ah->ah_rf_banks_size,
774 GFP_KERNEL); 775 GFP_KERNEL);
775 if (ah->ah_rf_banks == NULL) { 776 if (ah->ah_rf_banks == NULL) {
776 ATH5K_ERR(ah->ah_sc, "out of memory\n"); 777 ATH5K_ERR(ah, "out of memory\n");
777 return -ENOMEM; 778 return -ENOMEM;
778 } 779 }
779 } 780 }
@@ -783,7 +784,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
783 784
784 for (i = 0; i < ah->ah_rf_banks_size; i++) { 785 for (i = 0; i < ah->ah_rf_banks_size; i++) {
785 if (ini_rfb[i].rfb_bank >= AR5K_MAX_RF_BANKS) { 786 if (ini_rfb[i].rfb_bank >= AR5K_MAX_RF_BANKS) {
786 ATH5K_ERR(ah->ah_sc, "invalid bank\n"); 787 ATH5K_ERR(ah, "invalid bank\n");
787 return -EINVAL; 788 return -EINVAL;
788 } 789 }
789 790
@@ -1268,7 +1269,7 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
1268 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok() 1269 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok()
1269 * of the band by that */ 1270 * of the band by that */
1270 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) { 1271 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) {
1271 ATH5K_ERR(ah->ah_sc, 1272 ATH5K_ERR(ah,
1272 "channel frequency (%u MHz) out of supported " 1273 "channel frequency (%u MHz) out of supported "
1273 "band range\n", 1274 "band range\n",
1274 channel->center_freq); 1275 channel->center_freq);
@@ -1356,7 +1357,7 @@ static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
1356 } 1357 }
1357 } 1358 }
1358 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) { 1359 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {
1359 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1360 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1360 "cal %d:%d\n", i, sort[i]); 1361 "cal %d:%d\n", i, sort[i]);
1361 } 1362 }
1362 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2]; 1363 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2];
@@ -1382,7 +1383,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1382 1383
1383 /* keep last value if calibration hasn't completed */ 1384 /* keep last value if calibration hasn't completed */
1384 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) { 1385 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) {
1385 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1386 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1386 "NF did not complete in calibration window\n"); 1387 "NF did not complete in calibration window\n");
1387 1388
1388 return; 1389 return;
@@ -1395,7 +1396,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1395 threshold = ee->ee_noise_floor_thr[ee_mode]; 1396 threshold = ee->ee_noise_floor_thr[ee_mode];
1396 1397
1397 if (nf > threshold) { 1398 if (nf > threshold) {
1398 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1399 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1399 "noise floor failure detected; " 1400 "noise floor failure detected; "
1400 "read %d, threshold %d\n", 1401 "read %d, threshold %d\n",
1401 nf, threshold); 1402 nf, threshold);
@@ -1432,7 +1433,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1432 1433
1433 ah->ah_noise_floor = nf; 1434 ah->ah_noise_floor = nf;
1434 1435
1435 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1436 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1436 "noise floor calibrated: %d\n", nf); 1437 "noise floor calibrated: %d\n", nf);
1437} 1438}
1438 1439
@@ -1520,7 +1521,7 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
1520 ath5k_hw_reg_write(ah, phy_sat, AR5K_PHY_ADCSAT); 1521 ath5k_hw_reg_write(ah, phy_sat, AR5K_PHY_ADCSAT);
1521 1522
1522 if (ret) { 1523 if (ret) {
1523 ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", 1524 ATH5K_ERR(ah, "calibration timeout (%uMHz)\n",
1524 channel->center_freq); 1525 channel->center_freq);
1525 return ret; 1526 return ret;
1526 } 1527 }
@@ -1555,7 +1556,7 @@ ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah)
1555 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); 1556 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR);
1556 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); 1557 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I);
1557 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); 1558 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q);
1558 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1559 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_CALIBRATE,
1559 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr); 1560 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr);
1560 if (i_pwr && q_pwr) 1561 if (i_pwr && q_pwr)
1561 break; 1562 break;
@@ -1581,7 +1582,7 @@ ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah)
1581 q_coff = (i_pwr / q_coffd) - 128; 1582 q_coff = (i_pwr / q_coffd) - 128;
1582 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ 1583 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1583 1584
1584 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1585 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_CALIBRATE,
1585 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)", 1586 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)",
1586 i_coff, q_coff, i_coffd, q_coffd); 1587 i_coff, q_coff, i_coffd, q_coffd);
1587 1588
@@ -1966,7 +1967,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1966 1967
1967 ee_mode = ath5k_eeprom_mode_from_channel(channel); 1968 ee_mode = ath5k_eeprom_mode_from_channel(channel);
1968 if (ee_mode < 0) { 1969 if (ee_mode < 0) {
1969 ATH5K_ERR(ah->ah_sc, 1970 ATH5K_ERR(ah,
1970 "invalid channel: %d\n", channel->center_freq); 1971 "invalid channel: %d\n", channel->center_freq);
1971 return; 1972 return;
1972 } 1973 }
@@ -2794,12 +2795,8 @@ ath5k_write_pwr_to_pdadc_table(struct ath5k_hw *ah, u8 ee_mode)
2794 * Write TX power values 2795 * Write TX power values
2795 */ 2796 */
2796 for (i = 0; i < (AR5K_EEPROM_POWER_TABLE_SIZE / 2); i++) { 2797 for (i = 0; i < (AR5K_EEPROM_POWER_TABLE_SIZE / 2); i++) {
2797 ath5k_hw_reg_write(ah, 2798 u32 val = get_unaligned_le32(&pdadc_out[4 * i]);
2798 ((pdadc_out[4 * i + 0] & 0xff) << 0) | 2799 ath5k_hw_reg_write(ah, val, AR5K_PHY_PDADC_TXPOWER(i));
2799 ((pdadc_out[4 * i + 1] & 0xff) << 8) |
2800 ((pdadc_out[4 * i + 2] & 0xff) << 16) |
2801 ((pdadc_out[4 * i + 3] & 0xff) << 24),
2802 AR5K_PHY_PDADC_TXPOWER(i));
2803 } 2800 }
2804} 2801}
2805 2802
@@ -3122,13 +3119,13 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3122 int ret; 3119 int ret;
3123 3120
3124 if (txpower > AR5K_TUNE_MAX_TXPOWER) { 3121 if (txpower > AR5K_TUNE_MAX_TXPOWER) {
3125 ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); 3122 ATH5K_ERR(ah, "invalid tx power: %u\n", txpower);
3126 return -EINVAL; 3123 return -EINVAL;
3127 } 3124 }
3128 3125
3129 ee_mode = ath5k_eeprom_mode_from_channel(channel); 3126 ee_mode = ath5k_eeprom_mode_from_channel(channel);
3130 if (ee_mode < 0) { 3127 if (ee_mode < 0) {
3131 ATH5K_ERR(ah->ah_sc, 3128 ATH5K_ERR(ah,
3132 "invalid channel: %d\n", channel->center_freq); 3129 "invalid channel: %d\n", channel->center_freq);
3133 return -EINVAL; 3130 return -EINVAL;
3134 } 3131 }
@@ -3229,7 +3226,7 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3229 3226
3230int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower) 3227int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower)
3231{ 3228{
3232 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_TXPOWER, 3229 ATH5K_DBG(ah, ATH5K_DEBUG_TXPOWER,
3233 "changing txpower to %d\n", txpower); 3230 "changing txpower to %d\n", txpower);
3234 3231
3235 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower); 3232 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower);
@@ -3440,7 +3437,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3440 * during ath5k_phy_calibrate) */ 3437 * during ath5k_phy_calibrate) */
3441 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, 3438 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,
3442 AR5K_PHY_AGCCTL_CAL, 0, false)) { 3439 AR5K_PHY_AGCCTL_CAL, 0, false)) {
3443 ATH5K_ERR(ah->ah_sc, "gain calibration timeout (%uMHz)\n", 3440 ATH5K_ERR(ah, "gain calibration timeout (%uMHz)\n",
3444 channel->center_freq); 3441 channel->center_freq);
3445 } 3442 }
3446 3443
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index b18c5021aac3..65f10398999e 100644
--- a/drivers/net/wireless/ath/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -187,7 +187,7 @@ int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type,
187 break; 187 break;
188 case AR5K_TX_QUEUE_XR_DATA: 188 case AR5K_TX_QUEUE_XR_DATA:
189 if (ah->ah_version != AR5K_AR5212) 189 if (ah->ah_version != AR5K_AR5212)
190 ATH5K_ERR(ah->ah_sc, 190 ATH5K_ERR(ah,
191 "XR data queues only supported in" 191 "XR data queues only supported in"
192 " 5212!\n"); 192 " 5212!\n");
193 queue = AR5K_TX_QUEUE_ID_XR_DATA; 193 queue = AR5K_TX_QUEUE_ID_XR_DATA;
@@ -510,7 +510,6 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
510int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) 510int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
511{ 511{
512 struct ieee80211_channel *channel = ah->ah_current_channel; 512 struct ieee80211_channel *channel = ah->ah_current_channel;
513 struct ath5k_softc *sc = ah->ah_sc;
514 struct ieee80211_rate *rate; 513 struct ieee80211_rate *rate;
515 u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock; 514 u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock;
516 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time); 515 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time);
@@ -546,9 +545,9 @@ int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
546 * Also we have different lowest rate for 802.11a 545 * Also we have different lowest rate for 802.11a
547 */ 546 */
548 if (channel->hw_value & CHANNEL_5GHZ) 547 if (channel->hw_value & CHANNEL_5GHZ)
549 rate = &sc->sbands[IEEE80211_BAND_5GHZ].bitrates[0]; 548 rate = &ah->sbands[IEEE80211_BAND_5GHZ].bitrates[0];
550 else 549 else
551 rate = &sc->sbands[IEEE80211_BAND_2GHZ].bitrates[0]; 550 rate = &ah->sbands[IEEE80211_BAND_2GHZ].bitrates[0];
552 551
553 ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false); 552 ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false);
554 553
@@ -622,7 +621,7 @@ int ath5k_hw_init_queues(struct ath5k_hw *ah)
622 for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) { 621 for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) {
623 ret = ath5k_hw_reset_tx_queue(ah, i); 622 ret = ath5k_hw_reset_tx_queue(ah, i);
624 if (ret) { 623 if (ret) {
625 ATH5K_ERR(ah->ah_sc, 624 ATH5K_ERR(ah,
626 "failed to reset TX queue #%d\n", i); 625 "failed to reset TX queue #%d\n", i);
627 return ret; 626 return ret;
628 } 627 }
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 9f9c2ad3ca66..0686c5d8d56e 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -390,7 +390,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
390 u32 val = 0; 390 u32 val = 0;
391 391
392 /* ah->ah_mac_srev is not available at this point yet */ 392 /* ah->ah_mac_srev is not available at this point yet */
393 if (ah->ah_sc->devid >= AR5K_SREV_AR2315_R6) { 393 if (ah->devid >= AR5K_SREV_AR2315_R6) {
394 reg = (u32 __iomem *) AR5K_AR2315_RESET; 394 reg = (u32 __iomem *) AR5K_AR2315_RESET;
395 if (mask & AR5K_RESET_CTL_PCU) 395 if (mask & AR5K_RESET_CTL_PCU)
396 val |= AR5K_AR2315_RESET_WMAC; 396 val |= AR5K_AR2315_RESET_WMAC;
@@ -398,7 +398,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
398 val |= AR5K_AR2315_RESET_BB_WARM; 398 val |= AR5K_AR2315_RESET_BB_WARM;
399 } else { 399 } else {
400 reg = (u32 __iomem *) AR5K_AR5312_RESET; 400 reg = (u32 __iomem *) AR5K_AR5312_RESET;
401 if (to_platform_device(ah->ah_sc->dev)->id == 0) { 401 if (to_platform_device(ah->dev)->id == 0) {
402 if (mask & AR5K_RESET_CTL_PCU) 402 if (mask & AR5K_RESET_CTL_PCU)
403 val |= AR5K_AR5312_RESET_WMAC0; 403 val |= AR5K_AR5312_RESET_WMAC0;
404 if (mask & AR5K_RESET_CTL_BASEBAND) 404 if (mask & AR5K_RESET_CTL_BASEBAND)
@@ -530,7 +530,7 @@ commit:
530 */ 530 */
531int ath5k_hw_on_hold(struct ath5k_hw *ah) 531int ath5k_hw_on_hold(struct ath5k_hw *ah)
532{ 532{
533 struct pci_dev *pdev = ah->ah_sc->pdev; 533 struct pci_dev *pdev = ah->pdev;
534 u32 bus_flags; 534 u32 bus_flags;
535 int ret; 535 int ret;
536 536
@@ -540,7 +540,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
540 /* Make sure device is awake */ 540 /* Make sure device is awake */
541 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 541 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
542 if (ret) { 542 if (ret) {
543 ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); 543 ATH5K_ERR(ah, "failed to wakeup the MAC Chip\n");
544 return ret; 544 return ret;
545 } 545 }
546 546
@@ -565,14 +565,14 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
565 } 565 }
566 566
567 if (ret) { 567 if (ret) {
568 ATH5K_ERR(ah->ah_sc, "failed to put device on warm reset\n"); 568 ATH5K_ERR(ah, "failed to put device on warm reset\n");
569 return -EIO; 569 return -EIO;
570 } 570 }
571 571
572 /* ...wakeup again!*/ 572 /* ...wakeup again!*/
573 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 573 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
574 if (ret) { 574 if (ret) {
575 ATH5K_ERR(ah->ah_sc, "failed to put device on hold\n"); 575 ATH5K_ERR(ah, "failed to put device on hold\n");
576 return ret; 576 return ret;
577 } 577 }
578 578
@@ -584,7 +584,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
584 */ 584 */
585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) 585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
586{ 586{
587 struct pci_dev *pdev = ah->ah_sc->pdev; 587 struct pci_dev *pdev = ah->pdev;
588 u32 turbo, mode, clock, bus_flags; 588 u32 turbo, mode, clock, bus_flags;
589 int ret; 589 int ret;
590 590
@@ -596,7 +596,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
596 /* Wakeup the device */ 596 /* Wakeup the device */
597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
598 if (ret) { 598 if (ret) {
599 ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); 599 ATH5K_ERR(ah, "failed to wakeup the MAC Chip\n");
600 return ret; 600 return ret;
601 } 601 }
602 } 602 }
@@ -626,14 +626,14 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
626 } 626 }
627 627
628 if (ret) { 628 if (ret) {
629 ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n"); 629 ATH5K_ERR(ah, "failed to reset the MAC Chip\n");
630 return -EIO; 630 return -EIO;
631 } 631 }
632 632
633 /* ...wakeup again!...*/ 633 /* ...wakeup again!...*/
634 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 634 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
635 if (ret) { 635 if (ret) {
636 ATH5K_ERR(ah->ah_sc, "failed to resume the MAC Chip\n"); 636 ATH5K_ERR(ah, "failed to resume the MAC Chip\n");
637 return ret; 637 return ret;
638 } 638 }
639 639
@@ -646,7 +646,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
646 ret = ath5k_hw_nic_reset(ah, 0); 646 ret = ath5k_hw_nic_reset(ah, 0);
647 647
648 if (ret) { 648 if (ret) {
649 ATH5K_ERR(ah->ah_sc, "failed to warm reset the MAC Chip\n"); 649 ATH5K_ERR(ah, "failed to warm reset the MAC Chip\n");
650 return -EIO; 650 return -EIO;
651 } 651 }
652 652
@@ -687,7 +687,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
687 else 687 else
688 mode |= AR5K_PHY_MODE_MOD_DYN; 688 mode |= AR5K_PHY_MODE_MOD_DYN;
689 } else { 689 } else {
690 ATH5K_ERR(ah->ah_sc, 690 ATH5K_ERR(ah,
691 "invalid radio modulation mode\n"); 691 "invalid radio modulation mode\n");
692 return -EINVAL; 692 return -EINVAL;
693 } 693 }
@@ -703,12 +703,12 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
703 if (flags & CHANNEL_OFDM) 703 if (flags & CHANNEL_OFDM)
704 mode |= AR5K_PHY_MODE_MOD_OFDM; 704 mode |= AR5K_PHY_MODE_MOD_OFDM;
705 else { 705 else {
706 ATH5K_ERR(ah->ah_sc, 706 ATH5K_ERR(ah,
707 "invalid radio modulation mode\n"); 707 "invalid radio modulation mode\n");
708 return -EINVAL; 708 return -EINVAL;
709 } 709 }
710 } else { 710 } else {
711 ATH5K_ERR(ah->ah_sc, "invalid radio frequency mode\n"); 711 ATH5K_ERR(ah, "invalid radio frequency mode\n");
712 return -EINVAL; 712 return -EINVAL;
713 } 713 }
714 714
@@ -1076,7 +1076,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1076 /* RF Bus grant won't work if we have pending 1076 /* RF Bus grant won't work if we have pending
1077 * frames */ 1077 * frames */
1078 if (ret && fast) { 1078 if (ret && fast) {
1079 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1079 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1080 "DMA didn't stop, falling back to normal reset\n"); 1080 "DMA didn't stop, falling back to normal reset\n");
1081 fast = 0; 1081 fast = 0;
1082 /* Non fatal, just continue with 1082 /* Non fatal, just continue with
@@ -1091,7 +1091,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1091 case CHANNEL_G: 1091 case CHANNEL_G:
1092 1092
1093 if (ah->ah_version <= AR5K_AR5211) { 1093 if (ah->ah_version <= AR5K_AR5211) {
1094 ATH5K_ERR(ah->ah_sc, 1094 ATH5K_ERR(ah,
1095 "G mode not available on 5210/5211"); 1095 "G mode not available on 5210/5211");
1096 return -EINVAL; 1096 return -EINVAL;
1097 } 1097 }
@@ -1101,7 +1101,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1101 case CHANNEL_B: 1101 case CHANNEL_B:
1102 1102
1103 if (ah->ah_version < AR5K_AR5211) { 1103 if (ah->ah_version < AR5K_AR5211) {
1104 ATH5K_ERR(ah->ah_sc, 1104 ATH5K_ERR(ah,
1105 "B mode not available on 5210"); 1105 "B mode not available on 5210");
1106 return -EINVAL; 1106 return -EINVAL;
1107 } 1107 }
@@ -1110,14 +1110,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1110 break; 1110 break;
1111 case CHANNEL_XR: 1111 case CHANNEL_XR:
1112 if (ah->ah_version == AR5K_AR5211) { 1112 if (ah->ah_version == AR5K_AR5211) {
1113 ATH5K_ERR(ah->ah_sc, 1113 ATH5K_ERR(ah,
1114 "XR mode not available on 5211"); 1114 "XR mode not available on 5211");
1115 return -EINVAL; 1115 return -EINVAL;
1116 } 1116 }
1117 mode = AR5K_MODE_XR; 1117 mode = AR5K_MODE_XR;
1118 break; 1118 break;
1119 default: 1119 default:
1120 ATH5K_ERR(ah->ah_sc, 1120 ATH5K_ERR(ah,
1121 "invalid channel: %d\n", channel->center_freq); 1121 "invalid channel: %d\n", channel->center_freq);
1122 return -EINVAL; 1122 return -EINVAL;
1123 } 1123 }
@@ -1129,13 +1129,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1129 if (fast) { 1129 if (fast) {
1130 ret = ath5k_hw_phy_init(ah, channel, mode, true); 1130 ret = ath5k_hw_phy_init(ah, channel, mode, true);
1131 if (ret) { 1131 if (ret) {
1132 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1132 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1133 "fast chan change failed, falling back to normal reset\n"); 1133 "fast chan change failed, falling back to normal reset\n");
1134 /* Non fatal, can happen eg. 1134 /* Non fatal, can happen eg.
1135 * on mode change */ 1135 * on mode change */
1136 ret = 0; 1136 ret = 0;
1137 } else { 1137 } else {
1138 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1138 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1139 "fast chan change successful\n"); 1139 "fast chan change successful\n");
1140 return 0; 1140 return 0;
1141 } 1141 }
@@ -1268,7 +1268,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1268 */ 1268 */
1269 ret = ath5k_hw_phy_init(ah, channel, mode, false); 1269 ret = ath5k_hw_phy_init(ah, channel, mode, false);
1270 if (ret) { 1270 if (ret) {
1271 ATH5K_ERR(ah->ah_sc, 1271 ATH5K_ERR(ah,
1272 "failed to initialize PHY (%i) !\n", ret); 1272 "failed to initialize PHY (%i) !\n", ret);
1273 return ret; 1273 return ret;
1274 } 1274 }
diff --git a/drivers/net/wireless/ath/ath5k/rfkill.c b/drivers/net/wireless/ath/ath5k/rfkill.c
index 41a877b73fce..945fc9f21e76 100644
--- a/drivers/net/wireless/ath/ath5k/rfkill.c
+++ b/drivers/net/wireless/ath/ath5k/rfkill.c
@@ -36,86 +36,81 @@
36#include "base.h" 36#include "base.h"
37 37
38 38
39static inline void ath5k_rfkill_disable(struct ath5k_softc *sc) 39static inline void ath5k_rfkill_disable(struct ath5k_hw *ah)
40{ 40{
41 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n", 41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 sc->rf_kill.gpio, sc->rf_kill.polarity); 42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio); 43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, !sc->rf_kill.polarity); 44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
45} 45}
46 46
47 47
48static inline void ath5k_rfkill_enable(struct ath5k_softc *sc) 48static inline void ath5k_rfkill_enable(struct ath5k_hw *ah)
49{ 49{
50 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n", 50 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n",
51 sc->rf_kill.gpio, sc->rf_kill.polarity); 51 ah->rf_kill.gpio, ah->rf_kill.polarity);
52 ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio); 52 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
53 ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, sc->rf_kill.polarity); 53 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, ah->rf_kill.polarity);
54} 54}
55 55
56static inline void ath5k_rfkill_set_intr(struct ath5k_softc *sc, bool enable) 56static inline void ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable)
57{ 57{
58 struct ath5k_hw *ah = sc->ah;
59 u32 curval; 58 u32 curval;
60 59
61 ath5k_hw_set_gpio_input(ah, sc->rf_kill.gpio); 60 ath5k_hw_set_gpio_input(ah, ah->rf_kill.gpio);
62 curval = ath5k_hw_get_gpio(ah, sc->rf_kill.gpio); 61 curval = ath5k_hw_get_gpio(ah, ah->rf_kill.gpio);
63 ath5k_hw_set_gpio_intr(ah, sc->rf_kill.gpio, enable ? 62 ath5k_hw_set_gpio_intr(ah, ah->rf_kill.gpio, enable ?
64 !!curval : !curval); 63 !!curval : !curval);
65} 64}
66 65
67static bool 66static bool
68ath5k_is_rfkill_set(struct ath5k_softc *sc) 67ath5k_is_rfkill_set(struct ath5k_hw *ah)
69{ 68{
70 /* configuring GPIO for input for some reason disables rfkill */ 69 /* configuring GPIO for input for some reason disables rfkill */
71 /*ath5k_hw_set_gpio_input(sc->ah, sc->rf_kill.gpio);*/ 70 /*ath5k_hw_set_gpio_input(ah, ah->rf_kill.gpio);*/
72 return ath5k_hw_get_gpio(sc->ah, sc->rf_kill.gpio) == 71 return ath5k_hw_get_gpio(ah, ah->rf_kill.gpio) ==
73 sc->rf_kill.polarity; 72 ah->rf_kill.polarity;
74} 73}
75 74
76static void 75static void
77ath5k_tasklet_rfkill_toggle(unsigned long data) 76ath5k_tasklet_rfkill_toggle(unsigned long data)
78{ 77{
79 struct ath5k_softc *sc = (void *)data; 78 struct ath5k_hw *ah = (void *)data;
80 bool blocked; 79 bool blocked;
81 80
82 blocked = ath5k_is_rfkill_set(sc); 81 blocked = ath5k_is_rfkill_set(ah);
83 wiphy_rfkill_set_hw_state(sc->hw->wiphy, blocked); 82 wiphy_rfkill_set_hw_state(ah->hw->wiphy, blocked);
84} 83}
85 84
86 85
87void 86void
88ath5k_rfkill_hw_start(struct ath5k_hw *ah) 87ath5k_rfkill_hw_start(struct ath5k_hw *ah)
89{ 88{
90 struct ath5k_softc *sc = ah->ah_sc;
91
92 /* read rfkill GPIO configuration from EEPROM header */ 89 /* read rfkill GPIO configuration from EEPROM header */
93 sc->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin; 90 ah->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin;
94 sc->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol; 91 ah->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol;
95 92
96 tasklet_init(&sc->rf_kill.toggleq, ath5k_tasklet_rfkill_toggle, 93 tasklet_init(&ah->rf_kill.toggleq, ath5k_tasklet_rfkill_toggle,
97 (unsigned long)sc); 94 (unsigned long)ah);
98 95
99 ath5k_rfkill_disable(sc); 96 ath5k_rfkill_disable(ah);
100 97
101 /* enable interrupt for rfkill switch */ 98 /* enable interrupt for rfkill switch */
102 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header)) 99 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
103 ath5k_rfkill_set_intr(sc, true); 100 ath5k_rfkill_set_intr(ah, true);
104} 101}
105 102
106 103
107void 104void
108ath5k_rfkill_hw_stop(struct ath5k_hw *ah) 105ath5k_rfkill_hw_stop(struct ath5k_hw *ah)
109{ 106{
110 struct ath5k_softc *sc = ah->ah_sc;
111
112 /* disable interrupt for rfkill switch */ 107 /* disable interrupt for rfkill switch */
113 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header)) 108 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
114 ath5k_rfkill_set_intr(sc, false); 109 ath5k_rfkill_set_intr(ah, false);
115 110
116 tasklet_kill(&sc->rf_kill.toggleq); 111 tasklet_kill(&ah->rf_kill.toggleq);
117 112
118 /* enable RFKILL when stopping HW so Wifi LED is turned off */ 113 /* enable RFKILL when stopping HW so Wifi LED is turned off */
119 ath5k_rfkill_enable(sc); 114 ath5k_rfkill_enable(ah);
120} 115}
121 116
diff --git a/drivers/net/wireless/ath/ath5k/sysfs.c b/drivers/net/wireless/ath/ath5k/sysfs.c
index d8ad0e45e1c4..0244a36ba958 100644
--- a/drivers/net/wireless/ath/ath5k/sysfs.c
+++ b/drivers/net/wireless/ath/ath5k/sysfs.c
@@ -11,7 +11,7 @@ static ssize_t ath5k_attr_show_##name(struct device *dev, \
11 char *buf) \ 11 char *buf) \
12{ \ 12{ \
13 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 13 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
14 struct ath5k_softc *sc = hw->priv; \ 14 struct ath5k_hw *ah = hw->priv; \
15 return snprintf(buf, PAGE_SIZE, "%d\n", get); \ 15 return snprintf(buf, PAGE_SIZE, "%d\n", get); \
16} \ 16} \
17 \ 17 \
@@ -20,13 +20,13 @@ static ssize_t ath5k_attr_store_##name(struct device *dev, \
20 const char *buf, size_t count) \ 20 const char *buf, size_t count) \
21{ \ 21{ \
22 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 22 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
23 struct ath5k_softc *sc = hw->priv; \ 23 struct ath5k_hw *ah = hw->priv; \
24 int val, ret; \ 24 int val, ret; \
25 \ 25 \
26 ret = kstrtoint(buf, 10, &val); \ 26 ret = kstrtoint(buf, 10, &val); \
27 if (ret < 0) \ 27 if (ret < 0) \
28 return ret; \ 28 return ret; \
29 set(sc->ah, val); \ 29 set(ah, val); \
30 return count; \ 30 return count; \
31} \ 31} \
32static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \ 32static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \
@@ -38,25 +38,25 @@ static ssize_t ath5k_attr_show_##name(struct device *dev, \
38 char *buf) \ 38 char *buf) \
39{ \ 39{ \
40 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 40 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
41 struct ath5k_softc *sc = hw->priv; \ 41 struct ath5k_hw *ah = hw->priv; \
42 return snprintf(buf, PAGE_SIZE, "%d\n", get); \ 42 return snprintf(buf, PAGE_SIZE, "%d\n", get); \
43} \ 43} \
44static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL) 44static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL)
45 45
46/*** ANI ***/ 46/*** ANI ***/
47 47
48SIMPLE_SHOW_STORE(ani_mode, sc->ani_state.ani_mode, ath5k_ani_init); 48SIMPLE_SHOW_STORE(ani_mode, ah->ani_state.ani_mode, ath5k_ani_init);
49SIMPLE_SHOW_STORE(noise_immunity_level, sc->ani_state.noise_imm_level, 49SIMPLE_SHOW_STORE(noise_immunity_level, ah->ani_state.noise_imm_level,
50 ath5k_ani_set_noise_immunity_level); 50 ath5k_ani_set_noise_immunity_level);
51SIMPLE_SHOW_STORE(spur_level, sc->ani_state.spur_level, 51SIMPLE_SHOW_STORE(spur_level, ah->ani_state.spur_level,
52 ath5k_ani_set_spur_immunity_level); 52 ath5k_ani_set_spur_immunity_level);
53SIMPLE_SHOW_STORE(firstep_level, sc->ani_state.firstep_level, 53SIMPLE_SHOW_STORE(firstep_level, ah->ani_state.firstep_level,
54 ath5k_ani_set_firstep_level); 54 ath5k_ani_set_firstep_level);
55SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, sc->ani_state.ofdm_weak_sig, 55SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, ah->ani_state.ofdm_weak_sig,
56 ath5k_ani_set_ofdm_weak_signal_detection); 56 ath5k_ani_set_ofdm_weak_signal_detection);
57SIMPLE_SHOW_STORE(cck_weak_signal_detection, sc->ani_state.cck_weak_sig, 57SIMPLE_SHOW_STORE(cck_weak_signal_detection, ah->ani_state.cck_weak_sig,
58 ath5k_ani_set_cck_weak_signal_detection); 58 ath5k_ani_set_cck_weak_signal_detection);
59SIMPLE_SHOW(spur_level_max, sc->ani_state.max_spur_level); 59SIMPLE_SHOW(spur_level_max, ah->ani_state.max_spur_level);
60 60
61static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev, 61static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev,
62 struct device_attribute *attr, 62 struct device_attribute *attr,
@@ -98,14 +98,14 @@ static struct attribute_group ath5k_attribute_group_ani = {
98/*** register / unregister ***/ 98/*** register / unregister ***/
99 99
100int 100int
101ath5k_sysfs_register(struct ath5k_softc *sc) 101ath5k_sysfs_register(struct ath5k_hw *ah)
102{ 102{
103 struct device *dev = sc->dev; 103 struct device *dev = ah->dev;
104 int err; 104 int err;
105 105
106 err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani); 106 err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani);
107 if (err) { 107 if (err) {
108 ATH5K_ERR(sc, "failed to create sysfs group\n"); 108 ATH5K_ERR(ah, "failed to create sysfs group\n");
109 return err; 109 return err;
110 } 110 }
111 111
@@ -113,9 +113,9 @@ ath5k_sysfs_register(struct ath5k_softc *sc)
113} 113}
114 114
115void 115void
116ath5k_sysfs_unregister(struct ath5k_softc *sc) 116ath5k_sysfs_unregister(struct ath5k_hw *ah)
117{ 117{
118 struct device *dev = sc->dev; 118 struct device *dev = ah->dev;
119 119
120 sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani); 120 sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani);
121} 121}
diff --git a/drivers/net/wireless/ath/ath5k/trace.h b/drivers/net/wireless/ath/ath5k/trace.h
index 235e0768ce1d..c741c871f4e9 100644
--- a/drivers/net/wireless/ath/ath5k/trace.h
+++ b/drivers/net/wireless/ath/ath5k/trace.h
@@ -16,10 +16,10 @@ struct sk_buff;
16#define TRACE_SYSTEM ath5k 16#define TRACE_SYSTEM ath5k
17 17
18TRACE_EVENT(ath5k_rx, 18TRACE_EVENT(ath5k_rx,
19 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb), 19 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb),
20 TP_ARGS(priv, skb), 20 TP_ARGS(priv, skb),
21 TP_STRUCT__entry( 21 TP_STRUCT__entry(
22 __field(struct ath5k_softc *, priv) 22 __field(struct ath5k_hw *, priv)
23 __field(unsigned long, skbaddr) 23 __field(unsigned long, skbaddr)
24 __dynamic_array(u8, frame, skb->len) 24 __dynamic_array(u8, frame, skb->len)
25 ), 25 ),
@@ -34,13 +34,13 @@ TRACE_EVENT(ath5k_rx,
34); 34);
35 35
36TRACE_EVENT(ath5k_tx, 36TRACE_EVENT(ath5k_tx,
37 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, 37 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb,
38 struct ath5k_txq *q), 38 struct ath5k_txq *q),
39 39
40 TP_ARGS(priv, skb, q), 40 TP_ARGS(priv, skb, q),
41 41
42 TP_STRUCT__entry( 42 TP_STRUCT__entry(
43 __field(struct ath5k_softc *, priv) 43 __field(struct ath5k_hw *, priv)
44 __field(unsigned long, skbaddr) 44 __field(unsigned long, skbaddr)
45 __field(u8, qnum) 45 __field(u8, qnum)
46 __dynamic_array(u8, frame, skb->len) 46 __dynamic_array(u8, frame, skb->len)
@@ -60,13 +60,13 @@ TRACE_EVENT(ath5k_tx,
60); 60);
61 61
62TRACE_EVENT(ath5k_tx_complete, 62TRACE_EVENT(ath5k_tx_complete,
63 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, 63 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb,
64 struct ath5k_txq *q, struct ath5k_tx_status *ts), 64 struct ath5k_txq *q, struct ath5k_tx_status *ts),
65 65
66 TP_ARGS(priv, skb, q, ts), 66 TP_ARGS(priv, skb, q, ts),
67 67
68 TP_STRUCT__entry( 68 TP_STRUCT__entry(
69 __field(struct ath5k_softc *, priv) 69 __field(struct ath5k_hw *, priv)
70 __field(unsigned long, skbaddr) 70 __field(unsigned long, skbaddr)
71 __field(u8, qnum) 71 __field(u8, qnum)
72 __field(u8, ts_status) 72 __field(u8, ts_status)
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-26 17:52:45 -0400