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path: root/drivers/net/wireless/ath/ath5k/reset.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/reset.c')
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c64
1 files changed, 12 insertions, 52 deletions
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 307f80e83f94..498aa28ea9e6 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -201,8 +201,6 @@ static int ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val)
201 int ret; 201 int ret;
202 u32 mask = val ? val : ~0U; 202 u32 mask = val ? val : ~0U;
203 203
204 ATH5K_TRACE(ah->ah_sc);
205
206 /* Read-and-clear RX Descriptor Pointer*/ 204 /* Read-and-clear RX Descriptor Pointer*/
207 ath5k_hw_reg_read(ah, AR5K_RXDP); 205 ath5k_hw_reg_read(ah, AR5K_RXDP);
208 206
@@ -246,7 +244,6 @@ static int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode,
246 unsigned int i; 244 unsigned int i;
247 u32 staid, data; 245 u32 staid, data;
248 246
249 ATH5K_TRACE(ah->ah_sc);
250 staid = ath5k_hw_reg_read(ah, AR5K_STA_ID1); 247 staid = ath5k_hw_reg_read(ah, AR5K_STA_ID1);
251 248
252 switch (mode) { 249 switch (mode) {
@@ -393,8 +390,6 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
393 mode = 0; 390 mode = 0;
394 clock = 0; 391 clock = 0;
395 392
396 ATH5K_TRACE(ah->ah_sc);
397
398 /* Wakeup the device */ 393 /* Wakeup the device */
399 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 394 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
400 if (ret) { 395 if (ret) {
@@ -734,7 +729,7 @@ static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah,
734} 729}
735 730
736static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, 731static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
737 struct ieee80211_channel *channel, u8 *ant, u8 ee_mode) 732 struct ieee80211_channel *channel, u8 ee_mode)
738{ 733{
739 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 734 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
740 s16 cck_ofdm_pwr_delta; 735 s16 cck_ofdm_pwr_delta;
@@ -768,17 +763,9 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
768 ee->ee_cck_ofdm_gain_delta; 763 ee->ee_cck_ofdm_gain_delta;
769 } 764 }
770 765
771 /* Set antenna idle switch table */ 766 /* XXX: necessary here? is called from ath5k_hw_set_antenna_mode()
772 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_ANT_CTL, 767 * too */
773 AR5K_PHY_ANT_CTL_SWTABLE_IDLE, 768 ath5k_hw_set_antenna_switch(ah, ee_mode);
774 (ah->ah_ant_ctl[ee_mode][0] |
775 AR5K_PHY_ANT_CTL_TXRX_EN));
776
777 /* Set antenna switch tables */
778 ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[0]],
779 AR5K_PHY_ANT_SWITCH_TABLE_0);
780 ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[1]],
781 AR5K_PHY_ANT_SWITCH_TABLE_1);
782 769
783 /* Noise floor threshold */ 770 /* Noise floor threshold */
784 ath5k_hw_reg_write(ah, 771 ath5k_hw_reg_write(ah,
@@ -855,7 +842,6 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
855 AR5K_PHY_NF_THRESH62, 842 AR5K_PHY_NF_THRESH62,
856 ee->ee_thr_62[ee_mode]); 843 ee->ee_thr_62[ee_mode]);
857 844
858
859 /* False detect backoff for channels 845 /* False detect backoff for channels
860 * that have spur noise. Write the new 846 * that have spur noise. Write the new
861 * cyclic power RSSI threshold. */ 847 * cyclic power RSSI threshold. */
@@ -891,14 +877,11 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
891 struct ieee80211_channel *channel, bool change_channel) 877 struct ieee80211_channel *channel, bool change_channel)
892{ 878{
893 struct ath_common *common = ath5k_hw_common(ah); 879 struct ath_common *common = ath5k_hw_common(ah);
894 u32 s_seq[10], s_ant, s_led[3], staid1_flags, tsf_up, tsf_lo; 880 u32 s_seq[10], s_led[3], staid1_flags, tsf_up, tsf_lo;
895 u32 phy_tst1; 881 u32 phy_tst1;
896 u8 mode, freq, ee_mode, ant[2]; 882 u8 mode, freq, ee_mode;
897 int i, ret; 883 int i, ret;
898 884
899 ATH5K_TRACE(ah->ah_sc);
900
901 s_ant = 0;
902 ee_mode = 0; 885 ee_mode = 0;
903 staid1_flags = 0; 886 staid1_flags = 0;
904 tsf_up = 0; 887 tsf_up = 0;
@@ -995,9 +978,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
995 } 978 }
996 } 979 }
997 980
998 /* Save default antenna */
999 s_ant = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA);
1000
1001 if (ah->ah_version == AR5K_AR5212) { 981 if (ah->ah_version == AR5K_AR5212) {
1002 /* Restore normal 32/40MHz clock operation 982 /* Restore normal 32/40MHz clock operation
1003 * to avoid register access delay on certain 983 * to avoid register access delay on certain
@@ -1094,22 +1074,17 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1094 /* Write OFDM timings on 5212*/ 1074 /* Write OFDM timings on 5212*/
1095 if (ah->ah_version == AR5K_AR5212 && 1075 if (ah->ah_version == AR5K_AR5212 &&
1096 channel->hw_value & CHANNEL_OFDM) { 1076 channel->hw_value & CHANNEL_OFDM) {
1097 struct ath5k_eeprom_info *ee =
1098 &ah->ah_capabilities.cap_eeprom;
1099 1077
1100 ret = ath5k_hw_write_ofdm_timings(ah, channel); 1078 ret = ath5k_hw_write_ofdm_timings(ah, channel);
1101 if (ret) 1079 if (ret)
1102 return ret; 1080 return ret;
1103 1081
1104 /* Note: According to docs we can have a newer 1082 /* Spur info is available only from EEPROM versions
1105 * EEPROM on old hardware, so we need to verify 1083 * bigger than 5.3 but but the EEPOM routines will use
1106 * that our hardware is new enough to have spur 1084 * static values for older versions */
1107 * mitigation registers (delta phase etc) */ 1085 if (ah->ah_mac_srev >= AR5K_SREV_AR5424)
1108 if (ah->ah_mac_srev >= AR5K_SREV_AR5424 ||
1109 (ah->ah_mac_srev >= AR5K_SREV_AR5424 &&
1110 ee->ee_version >= AR5K_EEPROM_VERSION_5_3))
1111 ath5k_hw_set_spur_mitigation_filter(ah, 1086 ath5k_hw_set_spur_mitigation_filter(ah,
1112 channel); 1087 channel);
1113 } 1088 }
1114 1089
1115 /*Enable/disable 802.11b mode on 5111 1090 /*Enable/disable 802.11b mode on 5111
@@ -1123,21 +1098,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1123 AR5K_TXCFG_B_MODE); 1098 AR5K_TXCFG_B_MODE);
1124 } 1099 }
1125 1100
1126 /*
1127 * In case a fixed antenna was set as default
1128 * use the same switch table twice.
1129 */
1130 if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_A)
1131 ant[0] = ant[1] = AR5K_ANT_SWTABLE_A;
1132 else if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_B)
1133 ant[0] = ant[1] = AR5K_ANT_SWTABLE_B;
1134 else {
1135 ant[0] = AR5K_ANT_SWTABLE_A;
1136 ant[1] = AR5K_ANT_SWTABLE_B;
1137 }
1138
1139 /* Commit values from EEPROM */ 1101 /* Commit values from EEPROM */
1140 ath5k_hw_commit_eeprom_settings(ah, channel, ant, ee_mode); 1102 ath5k_hw_commit_eeprom_settings(ah, channel, ee_mode);
1141 1103
1142 } else { 1104 } else {
1143 /* 1105 /*
@@ -1175,8 +1137,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1175 ath5k_hw_reg_write(ah, tsf_lo, AR5K_TSF_L32); 1137 ath5k_hw_reg_write(ah, tsf_lo, AR5K_TSF_L32);
1176 } 1138 }
1177 } 1139 }
1178
1179 ath5k_hw_reg_write(ah, s_ant, AR5K_DEFAULT_ANTENNA);
1180 } 1140 }
1181 1141
1182 /* Ledstate */ 1142 /* Ledstate */