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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/reg.h')
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index e1c9abd8c879..d12b827033c1 100644
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -132,8 +132,8 @@
132 * As i can see in ar5k_ar5210_tx_start Reyk uses some of the values of BCR 132 * As i can see in ar5k_ar5210_tx_start Reyk uses some of the values of BCR
133 * for this register, so i guess TQ1V,TQ1FV and BDMAE have the same meaning 133 * for this register, so i guess TQ1V,TQ1FV and BDMAE have the same meaning
134 * here and SNP/SNAP means "snapshot" (so this register gets synced with BCR). 134 * here and SNP/SNAP means "snapshot" (so this register gets synced with BCR).
135 * So SNAPPEDBCRVALID sould also stand for "snapped BCR -values- valid", so i 135 * So SNAPPEDBCRVALID should also stand for "snapped BCR -values- valid", so i
136 * renamed it to SNAPSHOTSVALID to make more sense. I realy have no idea what 136 * renamed it to SNAPSHOTSVALID to make more sense. I really have no idea what
137 * else can it be. I also renamed SNPBCMD to SNPADHOC to match BCR. 137 * else can it be. I also renamed SNPBCMD to SNPADHOC to match BCR.
138 */ 138 */
139#define AR5K_BSR 0x002c /* Register Address */ 139#define AR5K_BSR 0x002c /* Register Address */
@@ -283,7 +283,7 @@
283 */ 283 */
284#define AR5K_ISR 0x001c /* Register Address [5210] */ 284#define AR5K_ISR 0x001c /* Register Address [5210] */
285#define AR5K_PISR 0x0080 /* Register Address [5211+] */ 285#define AR5K_PISR 0x0080 /* Register Address [5211+] */
286#define AR5K_ISR_RXOK 0x00000001 /* Frame successfuly recieved */ 286#define AR5K_ISR_RXOK 0x00000001 /* Frame successfuly received */
287#define AR5K_ISR_RXDESC 0x00000002 /* RX descriptor request */ 287#define AR5K_ISR_RXDESC 0x00000002 /* RX descriptor request */
288#define AR5K_ISR_RXERR 0x00000004 /* Receive error */ 288#define AR5K_ISR_RXERR 0x00000004 /* Receive error */
289#define AR5K_ISR_RXNOFRM 0x00000008 /* No frame received (receive timeout) */ 289#define AR5K_ISR_RXNOFRM 0x00000008 /* No frame received (receive timeout) */
@@ -372,12 +372,12 @@
372/* 372/*
373 * Interrupt Mask Registers 373 * Interrupt Mask Registers
374 * 374 *
375 * As whith ISRs 5210 has one IMR (AR5K_IMR) and 5211/5212 has one primary 375 * As with ISRs 5210 has one IMR (AR5K_IMR) and 5211/5212 has one primary
376 * (AR5K_PIMR) and 4 secondary IMRs (AR5K_SIMRx). Note that ISR/IMR flags match. 376 * (AR5K_PIMR) and 4 secondary IMRs (AR5K_SIMRx). Note that ISR/IMR flags match.
377 */ 377 */
378#define AR5K_IMR 0x0020 /* Register Address [5210] */ 378#define AR5K_IMR 0x0020 /* Register Address [5210] */
379#define AR5K_PIMR 0x00a0 /* Register Address [5211+] */ 379#define AR5K_PIMR 0x00a0 /* Register Address [5211+] */
380#define AR5K_IMR_RXOK 0x00000001 /* Frame successfuly recieved*/ 380#define AR5K_IMR_RXOK 0x00000001 /* Frame successfuly received*/
381#define AR5K_IMR_RXDESC 0x00000002 /* RX descriptor request*/ 381#define AR5K_IMR_RXDESC 0x00000002 /* RX descriptor request*/
382#define AR5K_IMR_RXERR 0x00000004 /* Receive error*/ 382#define AR5K_IMR_RXERR 0x00000004 /* Receive error*/
383#define AR5K_IMR_RXNOFRM 0x00000008 /* No frame received (receive timeout)*/ 383#define AR5K_IMR_RXNOFRM 0x00000008 /* No frame received (receive timeout)*/
@@ -895,7 +895,7 @@
895#define AR5K_PCICFG_SL_INTEN 0x00000800 /* Enable interrupts when asleep */ 895#define AR5K_PCICFG_SL_INTEN 0x00000800 /* Enable interrupts when asleep */
896#define AR5K_PCICFG_LED_BCTL 0x00001000 /* Led blink (?) [5210] */ 896#define AR5K_PCICFG_LED_BCTL 0x00001000 /* Led blink (?) [5210] */
897#define AR5K_PCICFG_RETRY_FIX 0x00001000 /* Enable pci core retry fix */ 897#define AR5K_PCICFG_RETRY_FIX 0x00001000 /* Enable pci core retry fix */
898#define AR5K_PCICFG_SL_INPEN 0x00002000 /* Sleep even whith pending interrupts*/ 898#define AR5K_PCICFG_SL_INPEN 0x00002000 /* Sleep even with pending interrupts*/
899#define AR5K_PCICFG_SPWR_DN 0x00010000 /* Mask for power status */ 899#define AR5K_PCICFG_SPWR_DN 0x00010000 /* Mask for power status */
900#define AR5K_PCICFG_LEDMODE 0x000e0000 /* Ledmode [5211+] */ 900#define AR5K_PCICFG_LEDMODE 0x000e0000 /* Ledmode [5211+] */
901#define AR5K_PCICFG_LEDMODE_PROP 0x00000000 /* Blink on standard traffic [5211+] */ 901#define AR5K_PCICFG_LEDMODE_PROP 0x00000000 /* Blink on standard traffic [5211+] */