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path: root/drivers/net/wireless/ath/ath5k/phy.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/phy.c')
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c77
1 files changed, 17 insertions, 60 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 68e2bccd90d3..1b81c4778800 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -20,8 +20,6 @@
20 * 20 *
21 */ 21 */
22 22
23#define _ATH5K_PHY
24
25#include <linux/delay.h> 23#include <linux/delay.h>
26#include <linux/slab.h> 24#include <linux/slab.h>
27 25
@@ -982,7 +980,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
982 return -EINVAL; 980 return -EINVAL;
983 981
984 data0 = ath5k_hw_bitswap((data0 << 2) & 0xff, 8); 982 data0 = ath5k_hw_bitswap((data0 << 2) & 0xff, 8);
985 } else if ((c - (c % 5)) != 2 || c > 5435) { 983 } else if ((c % 5) != 2 || c > 5435) {
986 if (!(c % 20) && c >= 5120) { 984 if (!(c % 20) && c >= 5120) {
987 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); 985 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8);
988 data2 = ath5k_hw_bitswap(3, 2); 986 data2 = ath5k_hw_bitswap(3, 2);
@@ -995,7 +993,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
995 } else 993 } else
996 return -EINVAL; 994 return -EINVAL;
997 } else { 995 } else {
998 data0 = ath5k_hw_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8); 996 data0 = ath5k_hw_bitswap((10 * (c - 2 - 4800)) / 25 + 1, 8);
999 data2 = ath5k_hw_bitswap(0, 2); 997 data2 = ath5k_hw_bitswap(0, 2);
1000 } 998 }
1001 999
@@ -1023,7 +1021,7 @@ static int ath5k_hw_rf2425_channel(struct ath5k_hw *ah,
1023 data0 = ath5k_hw_bitswap((c - 2272), 8); 1021 data0 = ath5k_hw_bitswap((c - 2272), 8);
1024 data2 = 0; 1022 data2 = 0;
1025 /* ? 5GHz ? */ 1023 /* ? 5GHz ? */
1026 } else if ((c - (c % 5)) != 2 || c > 5435) { 1024 } else if ((c % 5) != 2 || c > 5435) {
1027 if (!(c % 20) && c < 5120) 1025 if (!(c % 20) && c < 5120)
1028 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); 1026 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8);
1029 else if (!(c % 10)) 1027 else if (!(c % 10))
@@ -1034,7 +1032,7 @@ static int ath5k_hw_rf2425_channel(struct ath5k_hw *ah,
1034 return -EINVAL; 1032 return -EINVAL;
1035 data2 = ath5k_hw_bitswap(1, 2); 1033 data2 = ath5k_hw_bitswap(1, 2);
1036 } else { 1034 } else {
1037 data0 = ath5k_hw_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8); 1035 data0 = ath5k_hw_bitswap((10 * (c - 2 - 4800)) / 25 + 1, 8);
1038 data2 = ath5k_hw_bitswap(0, 2); 1036 data2 = ath5k_hw_bitswap(0, 2);
1039 } 1037 }
1040 1038
@@ -1105,28 +1103,6 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel)
1105 PHY calibration 1103 PHY calibration
1106\*****************/ 1104\*****************/
1107 1105
1108void
1109ath5k_hw_calibration_poll(struct ath5k_hw *ah)
1110{
1111 /* Calibration interval in jiffies */
1112 unsigned long cal_intval;
1113
1114 cal_intval = msecs_to_jiffies(ah->ah_cal_intval * 1000);
1115
1116 /* Initialize timestamp if needed */
1117 if (!ah->ah_cal_tstamp)
1118 ah->ah_cal_tstamp = jiffies;
1119
1120 /* For now we always do full calibration
1121 * Mark software interrupt mask and fire software
1122 * interrupt (bit gets auto-cleared) */
1123 if (time_is_before_eq_jiffies(ah->ah_cal_tstamp + cal_intval)) {
1124 ah->ah_cal_tstamp = jiffies;
1125 ah->ah_swi_mask = AR5K_SWI_FULL_CALIBRATION;
1126 AR5K_REG_ENABLE_BITS(ah, AR5K_CR, AR5K_CR_SWI);
1127 }
1128}
1129
1130static int sign_extend(int val, const int nbits) 1106static int sign_extend(int val, const int nbits)
1131{ 1107{
1132 int order = BIT(nbits-1); 1108 int order = BIT(nbits-1);
@@ -1191,7 +1167,7 @@ static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
1191 * The median of the values in the history is then loaded into the 1167 * The median of the values in the history is then loaded into the
1192 * hardware for its own use for RSSI and CCA measurements. 1168 * hardware for its own use for RSSI and CCA measurements.
1193 */ 1169 */
1194void ath5k_hw_update_noise_floor(struct ath5k_hw *ah) 1170static void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1195{ 1171{
1196 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 1172 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
1197 u32 val; 1173 u32 val;
@@ -1400,7 +1376,11 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
1400 } 1376 }
1401 1377
1402 i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7; 1378 i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7;
1403 q_coffd = q_pwr >> 7; 1379
1380 if (ah->ah_version == AR5K_AR5211)
1381 q_coffd = q_pwr >> 6;
1382 else
1383 q_coffd = q_pwr >> 7;
1404 1384
1405 /* protect against divide by 0 and loss of sign bits */ 1385 /* protect against divide by 0 and loss of sign bits */
1406 if (i_coffd == 0 || q_coffd < 2) 1386 if (i_coffd == 0 || q_coffd < 2)
@@ -1409,7 +1389,10 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
1409 i_coff = (-iq_corr) / i_coffd; 1389 i_coff = (-iq_corr) / i_coffd;
1410 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */ 1390 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */
1411 1391
1412 q_coff = (i_pwr / q_coffd) - 128; 1392 if (ah->ah_version == AR5K_AR5211)
1393 q_coff = (i_pwr / q_coffd) - 64;
1394 else
1395 q_coff = (i_pwr / q_coffd) - 128;
1413 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ 1396 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1414 1397
1415 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1398 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
@@ -1769,7 +1752,7 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
1769* Antenna control * 1752* Antenna control *
1770\*****************/ 1753\*****************/
1771 1754
1772void /*TODO:Boundary check*/ 1755static void /*TODO:Boundary check*/
1773ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant) 1756ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant)
1774{ 1757{
1775 ATH5K_TRACE(ah->ah_sc); 1758 ATH5K_TRACE(ah->ah_sc);
@@ -1778,16 +1761,6 @@ ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant)
1778 ath5k_hw_reg_write(ah, ant & 0x7, AR5K_DEFAULT_ANTENNA); 1761 ath5k_hw_reg_write(ah, ant & 0x7, AR5K_DEFAULT_ANTENNA);
1779} 1762}
1780 1763
1781unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah)
1782{
1783 ATH5K_TRACE(ah->ah_sc);
1784
1785 if (ah->ah_version != AR5K_AR5210)
1786 return ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA) & 0x7;
1787
1788 return false; /*XXX: What do we return for 5210 ?*/
1789}
1790
1791/* 1764/*
1792 * Enable/disable fast rx antenna diversity 1765 * Enable/disable fast rx antenna diversity
1793 */ 1766 */
@@ -1931,6 +1904,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1931 1904
1932 ah->ah_tx_ant = tx_ant; 1905 ah->ah_tx_ant = tx_ant;
1933 ah->ah_ant_mode = ant_mode; 1906 ah->ah_ant_mode = ant_mode;
1907 ah->ah_def_ant = def_ant;
1934 1908
1935 sta_id1 |= use_def_for_tx ? AR5K_STA_ID1_DEFAULT_ANTENNA : 0; 1909 sta_id1 |= use_def_for_tx ? AR5K_STA_ID1_DEFAULT_ANTENNA : 0;
1936 sta_id1 |= update_def_on_tx ? AR5K_STA_ID1_DESC_ANTENNA : 0; 1910 sta_id1 |= update_def_on_tx ? AR5K_STA_ID1_DESC_ANTENNA : 0;
@@ -2171,8 +2145,6 @@ ath5k_get_chan_pcal_surrounding_piers(struct ath5k_hw *ah,
2171done: 2145done:
2172 *pcinfo_l = &pcinfo[idx_l]; 2146 *pcinfo_l = &pcinfo[idx_l];
2173 *pcinfo_r = &pcinfo[idx_r]; 2147 *pcinfo_r = &pcinfo[idx_r];
2174
2175 return;
2176} 2148}
2177 2149
2178/* 2150/*
@@ -2441,19 +2413,6 @@ ath5k_combine_linear_pcdac_curves(struct ath5k_hw *ah, s16* table_min,
2441 pcdac_tmp = pcdac_high_pwr; 2413 pcdac_tmp = pcdac_high_pwr;
2442 2414
2443 edge_flag = 0x40; 2415 edge_flag = 0x40;
2444#if 0
2445 /* If both min and max power limits are in lower
2446 * power curve's range, only use the low power curve.
2447 * TODO: min/max levels are related to target
2448 * power values requested from driver/user
2449 * XXX: Is this really needed ? */
2450 if (min_pwr < table_max[1] &&
2451 max_pwr < table_max[1]) {
2452 edge_flag = 0;
2453 pcdac_tmp = pcdac_low_pwr;
2454 max_pwr_idx = (table_max[1] - table_min[1])/2;
2455 }
2456#endif
2457 } else { 2416 } else {
2458 pcdac_low_pwr = ah->ah_txpower.tmpL[1]; /* Zeroed */ 2417 pcdac_low_pwr = ah->ah_txpower.tmpL[1]; /* Zeroed */
2459 pcdac_high_pwr = ah->ah_txpower.tmpL[0]; 2418 pcdac_high_pwr = ah->ah_txpower.tmpL[0];
@@ -2600,7 +2559,7 @@ ath5k_combine_pwr_to_pdadc_curves(struct ath5k_hw *ah,
2600 max_idx = (pdadc_n < table_size) ? pdadc_n : table_size; 2559 max_idx = (pdadc_n < table_size) ? pdadc_n : table_size;
2601 2560
2602 /* Fill pdadc_out table */ 2561 /* Fill pdadc_out table */
2603 while (pdadc_0 < max_idx) 2562 while (pdadc_0 < max_idx && pdadc_i < 128)
2604 pdadc_out[pdadc_i++] = pdadc_tmp[pdadc_0++]; 2563 pdadc_out[pdadc_i++] = pdadc_tmp[pdadc_0++];
2605 2564
2606 /* Need to extrapolate above this pdgain? */ 2565 /* Need to extrapolate above this pdgain? */
@@ -3144,5 +3103,3 @@ int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower)
3144 3103
3145 return ath5k_hw_txpower(ah, channel, ee_mode, txpower); 3104 return ath5k_hw_txpower(ah, channel, ee_mode, txpower);
3146} 3105}
3147
3148#undef _ATH5K_PHY