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path: root/drivers/net/wireless/ath/ath5k/phy.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/phy.c')
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c37
1 files changed, 9 insertions, 28 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 3ee74c839768..3ce9afba1d88 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -980,7 +980,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
980 return -EINVAL; 980 return -EINVAL;
981 981
982 data0 = ath5k_hw_bitswap((data0 << 2) & 0xff, 8); 982 data0 = ath5k_hw_bitswap((data0 << 2) & 0xff, 8);
983 } else if ((c - (c % 5)) != 2 || c > 5435) { 983 } else if ((c % 5) != 2 || c > 5435) {
984 if (!(c % 20) && c >= 5120) { 984 if (!(c % 20) && c >= 5120) {
985 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); 985 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8);
986 data2 = ath5k_hw_bitswap(3, 2); 986 data2 = ath5k_hw_bitswap(3, 2);
@@ -993,7 +993,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
993 } else 993 } else
994 return -EINVAL; 994 return -EINVAL;
995 } else { 995 } else {
996 data0 = ath5k_hw_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8); 996 data0 = ath5k_hw_bitswap((10 * (c - 2 - 4800)) / 25 + 1, 8);
997 data2 = ath5k_hw_bitswap(0, 2); 997 data2 = ath5k_hw_bitswap(0, 2);
998 } 998 }
999 999
@@ -1021,7 +1021,7 @@ static int ath5k_hw_rf2425_channel(struct ath5k_hw *ah,
1021 data0 = ath5k_hw_bitswap((c - 2272), 8); 1021 data0 = ath5k_hw_bitswap((c - 2272), 8);
1022 data2 = 0; 1022 data2 = 0;
1023 /* ? 5GHz ? */ 1023 /* ? 5GHz ? */
1024 } else if ((c - (c % 5)) != 2 || c > 5435) { 1024 } else if ((c % 5) != 2 || c > 5435) {
1025 if (!(c % 20) && c < 5120) 1025 if (!(c % 20) && c < 5120)
1026 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); 1026 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8);
1027 else if (!(c % 10)) 1027 else if (!(c % 10))
@@ -1032,7 +1032,7 @@ static int ath5k_hw_rf2425_channel(struct ath5k_hw *ah,
1032 return -EINVAL; 1032 return -EINVAL;
1033 data2 = ath5k_hw_bitswap(1, 2); 1033 data2 = ath5k_hw_bitswap(1, 2);
1034 } else { 1034 } else {
1035 data0 = ath5k_hw_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8); 1035 data0 = ath5k_hw_bitswap((10 * (c - 2 - 4800)) / 25 + 1, 8);
1036 data2 = ath5k_hw_bitswap(0, 2); 1036 data2 = ath5k_hw_bitswap(0, 2);
1037 } 1037 }
1038 1038
@@ -1103,28 +1103,6 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel)
1103 PHY calibration 1103 PHY calibration
1104\*****************/ 1104\*****************/
1105 1105
1106void
1107ath5k_hw_calibration_poll(struct ath5k_hw *ah)
1108{
1109 /* Calibration interval in jiffies */
1110 unsigned long cal_intval;
1111
1112 cal_intval = msecs_to_jiffies(ah->ah_cal_intval * 1000);
1113
1114 /* Initialize timestamp if needed */
1115 if (!ah->ah_cal_tstamp)
1116 ah->ah_cal_tstamp = jiffies;
1117
1118 /* For now we always do full calibration
1119 * Mark software interrupt mask and fire software
1120 * interrupt (bit gets auto-cleared) */
1121 if (time_is_before_eq_jiffies(ah->ah_cal_tstamp + cal_intval)) {
1122 ah->ah_cal_tstamp = jiffies;
1123 ah->ah_swi_mask = AR5K_SWI_FULL_CALIBRATION;
1124 AR5K_REG_ENABLE_BITS(ah, AR5K_CR, AR5K_CR_SWI);
1125 }
1126}
1127
1128static int sign_extend(int val, const int nbits) 1106static int sign_extend(int val, const int nbits)
1129{ 1107{
1130 int order = BIT(nbits-1); 1108 int order = BIT(nbits-1);
@@ -1411,7 +1389,10 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
1411 i_coff = (-iq_corr) / i_coffd; 1389 i_coff = (-iq_corr) / i_coffd;
1412 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */ 1390 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */
1413 1391
1414 q_coff = (i_pwr / q_coffd) - 128; 1392 if (ah->ah_version == AR5K_AR5211)
1393 q_coff = (i_pwr / q_coffd) - 64;
1394 else
1395 q_coff = (i_pwr / q_coffd) - 128;
1415 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ 1396 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1416 1397
1417 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1398 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
@@ -2580,7 +2561,7 @@ ath5k_combine_pwr_to_pdadc_curves(struct ath5k_hw *ah,
2580 max_idx = (pdadc_n < table_size) ? pdadc_n : table_size; 2561 max_idx = (pdadc_n < table_size) ? pdadc_n : table_size;
2581 2562
2582 /* Fill pdadc_out table */ 2563 /* Fill pdadc_out table */
2583 while (pdadc_0 < max_idx) 2564 while (pdadc_0 < max_idx && pdadc_i < 128)
2584 pdadc_out[pdadc_i++] = pdadc_tmp[pdadc_0++]; 2565 pdadc_out[pdadc_i++] = pdadc_tmp[pdadc_0++];
2585 2566
2586 /* Need to extrapolate above this pdgain? */ 2567 /* Need to extrapolate above this pdgain? */