diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/eeprom.c')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/eeprom.c | 24 |
1 files changed, 8 insertions, 16 deletions
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index 80e625608bac..b6561f785c6e 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c | |||
@@ -72,7 +72,6 @@ static int | |||
72 | ath5k_eeprom_init_header(struct ath5k_hw *ah) | 72 | ath5k_eeprom_init_header(struct ath5k_hw *ah) |
73 | { | 73 | { |
74 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 74 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
75 | int ret; | ||
76 | u16 val; | 75 | u16 val; |
77 | u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; | 76 | u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; |
78 | 77 | ||
@@ -192,7 +191,7 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset, | |||
192 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 191 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
193 | u32 o = *offset; | 192 | u32 o = *offset; |
194 | u16 val; | 193 | u16 val; |
195 | int ret, i = 0; | 194 | int i = 0; |
196 | 195 | ||
197 | AR5K_EEPROM_READ(o++, val); | 196 | AR5K_EEPROM_READ(o++, val); |
198 | ee->ee_switch_settling[mode] = (val >> 8) & 0x7f; | 197 | ee->ee_switch_settling[mode] = (val >> 8) & 0x7f; |
@@ -252,7 +251,6 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset, | |||
252 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 251 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
253 | u32 o = *offset; | 252 | u32 o = *offset; |
254 | u16 val; | 253 | u16 val; |
255 | int ret; | ||
256 | 254 | ||
257 | ee->ee_n_piers[mode] = 0; | 255 | ee->ee_n_piers[mode] = 0; |
258 | AR5K_EEPROM_READ(o++, val); | 256 | AR5K_EEPROM_READ(o++, val); |
@@ -515,7 +513,6 @@ ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max, | |||
515 | int o = *offset; | 513 | int o = *offset; |
516 | int i = 0; | 514 | int i = 0; |
517 | u8 freq1, freq2; | 515 | u8 freq1, freq2; |
518 | int ret; | ||
519 | u16 val; | 516 | u16 val; |
520 | 517 | ||
521 | ee->ee_n_piers[mode] = 0; | 518 | ee->ee_n_piers[mode] = 0; |
@@ -551,7 +548,7 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset) | |||
551 | { | 548 | { |
552 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 549 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
553 | struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a; | 550 | struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a; |
554 | int i, ret; | 551 | int i; |
555 | u16 val; | 552 | u16 val; |
556 | u8 mask; | 553 | u8 mask; |
557 | 554 | ||
@@ -970,7 +967,6 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode) | |||
970 | u32 offset; | 967 | u32 offset; |
971 | u8 i, c; | 968 | u8 i, c; |
972 | u16 val; | 969 | u16 val; |
973 | int ret; | ||
974 | u8 pd_gains = 0; | 970 | u8 pd_gains = 0; |
975 | 971 | ||
976 | /* Count how many curves we have and | 972 | /* Count how many curves we have and |
@@ -1228,7 +1224,7 @@ ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode) | |||
1228 | struct ath5k_chan_pcal_info *chinfo; | 1224 | struct ath5k_chan_pcal_info *chinfo; |
1229 | u8 *pdgain_idx = ee->ee_pdc_to_idx[mode]; | 1225 | u8 *pdgain_idx = ee->ee_pdc_to_idx[mode]; |
1230 | u32 offset; | 1226 | u32 offset; |
1231 | int idx, i, ret; | 1227 | int idx, i; |
1232 | u16 val; | 1228 | u16 val; |
1233 | u8 pd_gains = 0; | 1229 | u8 pd_gains = 0; |
1234 | 1230 | ||
@@ -1419,7 +1415,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode) | |||
1419 | u8 *rate_target_pwr_num; | 1415 | u8 *rate_target_pwr_num; |
1420 | u32 offset; | 1416 | u32 offset; |
1421 | u16 val; | 1417 | u16 val; |
1422 | int ret, i; | 1418 | int i; |
1423 | 1419 | ||
1424 | offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1); | 1420 | offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1); |
1425 | rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode]; | 1421 | rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode]; |
@@ -1593,7 +1589,7 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah) | |||
1593 | struct ath5k_edge_power *rep; | 1589 | struct ath5k_edge_power *rep; |
1594 | unsigned int fmask, pmask; | 1590 | unsigned int fmask, pmask; |
1595 | unsigned int ctl_mode; | 1591 | unsigned int ctl_mode; |
1596 | int ret, i, j; | 1592 | int i, j; |
1597 | u32 offset; | 1593 | u32 offset; |
1598 | u16 val; | 1594 | u16 val; |
1599 | 1595 | ||
@@ -1733,16 +1729,12 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) | |||
1733 | u8 mac_d[ETH_ALEN] = {}; | 1729 | u8 mac_d[ETH_ALEN] = {}; |
1734 | u32 total, offset; | 1730 | u32 total, offset; |
1735 | u16 data; | 1731 | u16 data; |
1736 | int octet, ret; | 1732 | int octet; |
1737 | 1733 | ||
1738 | ret = ath5k_hw_nvram_read(ah, 0x20, &data); | 1734 | AR5K_EEPROM_READ(0x20, data); |
1739 | if (ret) | ||
1740 | return ret; | ||
1741 | 1735 | ||
1742 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { | 1736 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { |
1743 | ret = ath5k_hw_nvram_read(ah, offset, &data); | 1737 | AR5K_EEPROM_READ(offset, data); |
1744 | if (ret) | ||
1745 | return ret; | ||
1746 | 1738 | ||
1747 | total += data; | 1739 | total += data; |
1748 | mac_d[octet + 1] = data & 0xff; | 1740 | mac_d[octet + 1] = data & 0xff; |