diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/eeprom.c')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/eeprom.c | 73 |
1 files changed, 53 insertions, 20 deletions
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index c0fb3b09ba45..c56b494d417a 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c | |||
@@ -156,6 +156,17 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah) | |||
156 | ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7; | 156 | ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7; |
157 | } | 157 | } |
158 | 158 | ||
159 | AR5K_EEPROM_READ(AR5K_EEPROM_IS_HB63, val); | ||
160 | |||
161 | if ((ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4)) && val) | ||
162 | ee->ee_is_hb63 = true; | ||
163 | else | ||
164 | ee->ee_is_hb63 = false; | ||
165 | |||
166 | AR5K_EEPROM_READ(AR5K_EEPROM_RFKILL, val); | ||
167 | ee->ee_rfkill_pin = (u8) AR5K_REG_MS(val, AR5K_EEPROM_RFKILL_GPIO_SEL); | ||
168 | ee->ee_rfkill_pol = val & AR5K_EEPROM_RFKILL_POLARITY ? true : false; | ||
169 | |||
159 | return 0; | 170 | return 0; |
160 | } | 171 | } |
161 | 172 | ||
@@ -197,16 +208,16 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset, | |||
197 | ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f; | 208 | ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f; |
198 | ee->ee_ant_control[mode][i++] = val & 0x3f; | 209 | ee->ee_ant_control[mode][i++] = val & 0x3f; |
199 | 210 | ||
200 | /* Get antenna modes */ | 211 | /* Get antenna switch tables */ |
201 | ah->ah_antenna[mode][0] = | 212 | ah->ah_ant_ctl[mode][AR5K_ANT_CTL] = |
202 | (ee->ee_ant_control[mode][0] << 4); | 213 | (ee->ee_ant_control[mode][0] << 4); |
203 | ah->ah_antenna[mode][AR5K_ANT_FIXED_A] = | 214 | ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_A] = |
204 | ee->ee_ant_control[mode][1] | | 215 | ee->ee_ant_control[mode][1] | |
205 | (ee->ee_ant_control[mode][2] << 6) | | 216 | (ee->ee_ant_control[mode][2] << 6) | |
206 | (ee->ee_ant_control[mode][3] << 12) | | 217 | (ee->ee_ant_control[mode][3] << 12) | |
207 | (ee->ee_ant_control[mode][4] << 18) | | 218 | (ee->ee_ant_control[mode][4] << 18) | |
208 | (ee->ee_ant_control[mode][5] << 24); | 219 | (ee->ee_ant_control[mode][5] << 24); |
209 | ah->ah_antenna[mode][AR5K_ANT_FIXED_B] = | 220 | ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_B] = |
210 | ee->ee_ant_control[mode][6] | | 221 | ee->ee_ant_control[mode][6] | |
211 | (ee->ee_ant_control[mode][7] << 6) | | 222 | (ee->ee_ant_control[mode][7] << 6) | |
212 | (ee->ee_ant_control[mode][8] << 12) | | 223 | (ee->ee_ant_control[mode][8] << 12) | |
@@ -640,9 +651,9 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset) | |||
640 | static inline void | 651 | static inline void |
641 | ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp) | 652 | ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp) |
642 | { | 653 | { |
643 | const static u16 intercepts3[] = | 654 | static const u16 intercepts3[] = |
644 | { 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100 }; | 655 | { 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100 }; |
645 | const static u16 intercepts3_2[] = | 656 | static const u16 intercepts3_2[] = |
646 | { 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 }; | 657 | { 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 }; |
647 | const u16 *ip; | 658 | const u16 *ip; |
648 | int i; | 659 | int i; |
@@ -1694,9 +1705,40 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah) | |||
1694 | return 0; | 1705 | return 0; |
1695 | } | 1706 | } |
1696 | 1707 | ||
1708 | static int | ||
1709 | ath5k_eeprom_read_spur_chans(struct ath5k_hw *ah) | ||
1710 | { | ||
1711 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | ||
1712 | u32 offset; | ||
1713 | u16 val; | ||
1714 | int ret = 0, i; | ||
1715 | |||
1716 | offset = AR5K_EEPROM_CTL(ee->ee_version) + | ||
1717 | AR5K_EEPROM_N_CTLS(ee->ee_version); | ||
1718 | |||
1719 | if (ee->ee_version < AR5K_EEPROM_VERSION_5_3) { | ||
1720 | /* No spur info for 5GHz */ | ||
1721 | ee->ee_spur_chans[0][0] = AR5K_EEPROM_NO_SPUR; | ||
1722 | /* 2 channels for 2GHz (2464/2420) */ | ||
1723 | ee->ee_spur_chans[0][1] = AR5K_EEPROM_5413_SPUR_CHAN_1; | ||
1724 | ee->ee_spur_chans[1][1] = AR5K_EEPROM_5413_SPUR_CHAN_2; | ||
1725 | ee->ee_spur_chans[2][1] = AR5K_EEPROM_NO_SPUR; | ||
1726 | } else if (ee->ee_version >= AR5K_EEPROM_VERSION_5_3) { | ||
1727 | for (i = 0; i < AR5K_EEPROM_N_SPUR_CHANS; i++) { | ||
1728 | AR5K_EEPROM_READ(offset, val); | ||
1729 | ee->ee_spur_chans[i][0] = val; | ||
1730 | AR5K_EEPROM_READ(offset + AR5K_EEPROM_N_SPUR_CHANS, | ||
1731 | val); | ||
1732 | ee->ee_spur_chans[i][1] = val; | ||
1733 | offset++; | ||
1734 | } | ||
1735 | } | ||
1736 | |||
1737 | return ret; | ||
1738 | } | ||
1697 | 1739 | ||
1698 | /* | 1740 | /* |
1699 | * Initialize eeprom power tables | 1741 | * Initialize eeprom data structure |
1700 | */ | 1742 | */ |
1701 | int | 1743 | int |
1702 | ath5k_eeprom_init(struct ath5k_hw *ah) | 1744 | ath5k_eeprom_init(struct ath5k_hw *ah) |
@@ -1719,6 +1761,10 @@ ath5k_eeprom_init(struct ath5k_hw *ah) | |||
1719 | if (err < 0) | 1761 | if (err < 0) |
1720 | return err; | 1762 | return err; |
1721 | 1763 | ||
1764 | err = ath5k_eeprom_read_spur_chans(ah); | ||
1765 | if (err < 0) | ||
1766 | return err; | ||
1767 | |||
1722 | return 0; | 1768 | return 0; |
1723 | } | 1769 | } |
1724 | 1770 | ||
@@ -1754,16 +1800,3 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) | |||
1754 | 1800 | ||
1755 | return 0; | 1801 | return 0; |
1756 | } | 1802 | } |
1757 | |||
1758 | bool ath5k_eeprom_is_hb63(struct ath5k_hw *ah) | ||
1759 | { | ||
1760 | u16 data; | ||
1761 | |||
1762 | ath5k_hw_eeprom_read(ah, AR5K_EEPROM_IS_HB63, &data); | ||
1763 | |||
1764 | if ((ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4)) && data) | ||
1765 | return true; | ||
1766 | else | ||
1767 | return false; | ||
1768 | } | ||
1769 | |||