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path: root/drivers/net/wireless/ath/ath5k/eeprom.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/eeprom.c')
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c46
1 files changed, 24 insertions, 22 deletions
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index 392771f93759..d9e605e37007 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -223,14 +223,14 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset,
223 ah->ah_ant_ctl[mode][AR5K_ANT_CTL] = 223 ah->ah_ant_ctl[mode][AR5K_ANT_CTL] =
224 (ee->ee_ant_control[mode][0] << 4); 224 (ee->ee_ant_control[mode][0] << 4);
225 ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_A] = 225 ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_A] =
226 ee->ee_ant_control[mode][1] | 226 ee->ee_ant_control[mode][1] |
227 (ee->ee_ant_control[mode][2] << 6) | 227 (ee->ee_ant_control[mode][2] << 6) |
228 (ee->ee_ant_control[mode][3] << 12) | 228 (ee->ee_ant_control[mode][3] << 12) |
229 (ee->ee_ant_control[mode][4] << 18) | 229 (ee->ee_ant_control[mode][4] << 18) |
230 (ee->ee_ant_control[mode][5] << 24); 230 (ee->ee_ant_control[mode][5] << 24);
231 ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_B] = 231 ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_B] =
232 ee->ee_ant_control[mode][6] | 232 ee->ee_ant_control[mode][6] |
233 (ee->ee_ant_control[mode][7] << 6) | 233 (ee->ee_ant_control[mode][7] << 6) |
234 (ee->ee_ant_control[mode][8] << 12) | 234 (ee->ee_ant_control[mode][8] << 12) |
235 (ee->ee_ant_control[mode][9] << 18) | 235 (ee->ee_ant_control[mode][9] << 18) |
236 (ee->ee_ant_control[mode][10] << 24); 236 (ee->ee_ant_control[mode][10] << 24);
@@ -255,7 +255,7 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
255 ee->ee_n_piers[mode] = 0; 255 ee->ee_n_piers[mode] = 0;
256 AR5K_EEPROM_READ(o++, val); 256 AR5K_EEPROM_READ(o++, val);
257 ee->ee_adc_desired_size[mode] = (s8)((val >> 8) & 0xff); 257 ee->ee_adc_desired_size[mode] = (s8)((val >> 8) & 0xff);
258 switch(mode) { 258 switch (mode) {
259 case AR5K_EEPROM_MODE_11A: 259 case AR5K_EEPROM_MODE_11A:
260 ee->ee_ob[mode][3] = (val >> 5) & 0x7; 260 ee->ee_ob[mode][3] = (val >> 5) & 0x7;
261 ee->ee_db[mode][3] = (val >> 2) & 0x7; 261 ee->ee_db[mode][3] = (val >> 2) & 0x7;
@@ -349,7 +349,7 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
349 /* Note: >= v5 have bg freq piers on another location 349 /* Note: >= v5 have bg freq piers on another location
350 * so these freq piers are ignored for >= v5 (should be 0xff 350 * so these freq piers are ignored for >= v5 (should be 0xff
351 * anyway) */ 351 * anyway) */
352 switch(mode) { 352 switch (mode) {
353 case AR5K_EEPROM_MODE_11A: 353 case AR5K_EEPROM_MODE_11A:
354 if (ah->ah_ee_version < AR5K_EEPROM_VERSION_4_1) 354 if (ah->ah_ee_version < AR5K_EEPROM_VERSION_4_1)
355 break; 355 break;
@@ -422,7 +422,7 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
422 if (ee->ee_version < AR5K_EEPROM_VERSION_5_0) 422 if (ee->ee_version < AR5K_EEPROM_VERSION_5_0)
423 goto done; 423 goto done;
424 424
425 switch (mode){ 425 switch (mode) {
426 case AR5K_EEPROM_MODE_11A: 426 case AR5K_EEPROM_MODE_11A:
427 ee->ee_switch_settling_turbo[mode] = (val >> 6) & 0x7f; 427 ee->ee_switch_settling_turbo[mode] = (val >> 6) & 0x7f;
428 428
@@ -436,7 +436,7 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
436 ee->ee_adc_desired_size_turbo[mode] |= (val & 0x1) << 7; 436 ee->ee_adc_desired_size_turbo[mode] |= (val & 0x1) << 7;
437 ee->ee_pga_desired_size_turbo[mode] = (val >> 1) & 0xff; 437 ee->ee_pga_desired_size_turbo[mode] = (val >> 1) & 0xff;
438 438
439 if (AR5K_EEPROM_EEMAP(ee->ee_misc0) >=2) 439 if (AR5K_EEPROM_EEMAP(ee->ee_misc0) >= 2)
440 ee->ee_pd_gain_overlap = (val >> 9) & 0xf; 440 ee->ee_pd_gain_overlap = (val >> 9) & 0xf;
441 break; 441 break;
442 case AR5K_EEPROM_MODE_11G: 442 case AR5K_EEPROM_MODE_11G:
@@ -516,7 +516,7 @@ ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max,
516 u16 val; 516 u16 val;
517 517
518 ee->ee_n_piers[mode] = 0; 518 ee->ee_n_piers[mode] = 0;
519 while(i < max) { 519 while (i < max) {
520 AR5K_EEPROM_READ(o++, val); 520 AR5K_EEPROM_READ(o++, val);
521 521
522 freq1 = val & 0xff; 522 freq1 = val & 0xff;
@@ -602,7 +602,7 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
602 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 602 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
603 struct ath5k_chan_pcal_info *pcal; 603 struct ath5k_chan_pcal_info *pcal;
604 604
605 switch(mode) { 605 switch (mode) {
606 case AR5K_EEPROM_MODE_11B: 606 case AR5K_EEPROM_MODE_11B:
607 pcal = ee->ee_pwr_cal_b; 607 pcal = ee->ee_pwr_cal_b;
608 break; 608 break;
@@ -634,7 +634,7 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
634/* Used to match PCDAC steps with power values on RF5111 chips 634/* Used to match PCDAC steps with power values on RF5111 chips
635 * (eeprom versions < 4). For RF5111 we have 11 pre-defined PCDAC 635 * (eeprom versions < 4). For RF5111 we have 11 pre-defined PCDAC
636 * steps that match with the power values we read from eeprom. On 636 * steps that match with the power values we read from eeprom. On
637 * older eeprom versions (< 3.2) these steps are equaly spaced at 637 * older eeprom versions (< 3.2) these steps are equally spaced at
638 * 10% of the pcdac curve -until the curve reaches its maximum- 638 * 10% of the pcdac curve -until the curve reaches its maximum-
639 * (11 steps from 0 to 100%) but on newer eeprom versions (>= 3.2) 639 * (11 steps from 0 to 100%) but on newer eeprom versions (>= 3.2)
640 * these 11 steps are spaced in a different way. This function returns 640 * these 11 steps are spaced in a different way. This function returns
@@ -644,10 +644,12 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
644static inline void 644static inline void
645ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp) 645ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp)
646{ 646{
647 static const u16 intercepts3[] = 647 static const u16 intercepts3[] = {
648 { 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100 }; 648 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100
649 static const u16 intercepts3_2[] = 649 };
650 { 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 }; 650 static const u16 intercepts3_2[] = {
651 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100
652 };
651 const u16 *ip; 653 const u16 *ip;
652 int i; 654 int i;
653 655
@@ -762,7 +764,7 @@ ath5k_eeprom_convert_pcal_info_5111(struct ath5k_hw *ah, int mode,
762 764
763 /* Fill raw dataset 765 /* Fill raw dataset
764 * (convert power to 0.25dB units 766 * (convert power to 0.25dB units
765 * for RF5112 combatibility) */ 767 * for RF5112 compatibility) */
766 for (point = 0; point < pd->pd_points; point++) { 768 for (point = 0; point < pd->pd_points; point++) {
767 769
768 /* Absolute values */ 770 /* Absolute values */
@@ -796,7 +798,7 @@ ath5k_eeprom_read_pcal_info_5111(struct ath5k_hw *ah, int mode)
796 u16 val; 798 u16 val;
797 799
798 offset = AR5K_EEPROM_GROUPS_START(ee->ee_version); 800 offset = AR5K_EEPROM_GROUPS_START(ee->ee_version);
799 switch(mode) { 801 switch (mode) {
800 case AR5K_EEPROM_MODE_11A: 802 case AR5K_EEPROM_MODE_11A:
801 if (!AR5K_EEPROM_HDR_11A(ee->ee_header)) 803 if (!AR5K_EEPROM_HDR_11A(ee->ee_header))
802 return 0; 804 return 0;
@@ -882,7 +884,7 @@ ath5k_eeprom_read_pcal_info_5111(struct ath5k_hw *ah, int mode)
882 * Read power calibration for RF5112 chips 884 * Read power calibration for RF5112 chips
883 * 885 *
884 * For RF5112 we have 4 XPD -eXternal Power Detector- curves 886 * For RF5112 we have 4 XPD -eXternal Power Detector- curves
885 * for each calibrated channel on 0, -6, -12 and -18dbm but we only 887 * for each calibrated channel on 0, -6, -12 and -18dBm but we only
886 * use the higher (3) and the lower (0) curves. Each curve has 0.5dB 888 * use the higher (3) and the lower (0) curves. Each curve has 0.5dB
887 * power steps on x axis and PCDAC steps on y axis and looks like a 889 * power steps on x axis and PCDAC steps on y axis and looks like a
888 * linear function. To recreate the curve and pass the power values 890 * linear function. To recreate the curve and pass the power values
@@ -1163,7 +1165,7 @@ ath5k_cal_data_offset_2413(struct ath5k_eeprom_info *ee, int mode)
1163{ 1165{
1164 u32 offset = AR5K_EEPROM_CAL_DATA_START(ee->ee_misc4); 1166 u32 offset = AR5K_EEPROM_CAL_DATA_START(ee->ee_misc4);
1165 1167
1166 switch(mode) { 1168 switch (mode) {
1167 case AR5K_EEPROM_MODE_11G: 1169 case AR5K_EEPROM_MODE_11G:
1168 if (AR5K_EEPROM_HDR_11B(ee->ee_header)) 1170 if (AR5K_EEPROM_HDR_11B(ee->ee_header))
1169 offset += ath5k_pdgains_size_2413(ee, 1171 offset += ath5k_pdgains_size_2413(ee,
@@ -1239,7 +1241,7 @@ ath5k_eeprom_convert_pcal_info_2413(struct ath5k_hw *ah, int mode,
1239 1241
1240 /* Fill raw dataset 1242 /* Fill raw dataset
1241 * convert all pwr levels to 1243 * convert all pwr levels to
1242 * quarter dB for RF5112 combatibility */ 1244 * quarter dB for RF5112 compatibility */
1243 pd->pd_step[0] = pcinfo->pddac_i[pdg]; 1245 pd->pd_step[0] = pcinfo->pddac_i[pdg];
1244 pd->pd_pwr[0] = 4 * pcinfo->pwr_i[pdg]; 1246 pd->pd_pwr[0] = 4 * pcinfo->pwr_i[pdg];
1245 1247
@@ -1620,8 +1622,8 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah)
1620 offset += AR5K_EEPROM_GROUPS_START(ee->ee_version); 1622 offset += AR5K_EEPROM_GROUPS_START(ee->ee_version);
1621 1623
1622 rep = ee->ee_ctl_pwr; 1624 rep = ee->ee_ctl_pwr;
1623 for(i = 0; i < ee->ee_ctls; i++) { 1625 for (i = 0; i < ee->ee_ctls; i++) {
1624 switch(ee->ee_ctl[i] & AR5K_CTL_MODE_M) { 1626 switch (ee->ee_ctl[i] & AR5K_CTL_MODE_M) {
1625 case AR5K_CTL_11A: 1627 case AR5K_CTL_11A:
1626 case AR5K_CTL_TURBO: 1628 case AR5K_CTL_TURBO:
1627 ctl_mode = AR5K_EEPROM_MODE_11A; 1629 ctl_mode = AR5K_EEPROM_MODE_11A;