diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/ath5k.h')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/ath5k.h | 257 |
1 files changed, 95 insertions, 162 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index ac67f02e26d8..1d7491c85460 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h | |||
@@ -202,7 +202,6 @@ | |||
202 | #define AR5K_TUNE_MAX_TXPOWER 63 | 202 | #define AR5K_TUNE_MAX_TXPOWER 63 |
203 | #define AR5K_TUNE_DEFAULT_TXPOWER 25 | 203 | #define AR5K_TUNE_DEFAULT_TXPOWER 25 |
204 | #define AR5K_TUNE_TPC_TXPOWER false | 204 | #define AR5K_TUNE_TPC_TXPOWER false |
205 | #define AR5K_TUNE_HWTXTRIES 4 | ||
206 | 205 | ||
207 | #define AR5K_INIT_CARR_SENSE_EN 1 | 206 | #define AR5K_INIT_CARR_SENSE_EN 1 |
208 | 207 | ||
@@ -614,28 +613,6 @@ struct ath5k_rx_status { | |||
614 | #define AR5K_BEACON_ENA 0x00800000 /*enable beacon xmit*/ | 613 | #define AR5K_BEACON_ENA 0x00800000 /*enable beacon xmit*/ |
615 | #define AR5K_BEACON_RESET_TSF 0x01000000 /*force a TSF reset*/ | 614 | #define AR5K_BEACON_RESET_TSF 0x01000000 /*force a TSF reset*/ |
616 | 615 | ||
617 | #if 0 | ||
618 | /** | ||
619 | * struct ath5k_beacon_state - Per-station beacon timer state. | ||
620 | * @bs_interval: in TU's, can also include the above flags | ||
621 | * @bs_cfp_max_duration: if non-zero hw is setup to coexist with a | ||
622 | * Point Coordination Function capable AP | ||
623 | */ | ||
624 | struct ath5k_beacon_state { | ||
625 | u32 bs_next_beacon; | ||
626 | u32 bs_next_dtim; | ||
627 | u32 bs_interval; | ||
628 | u8 bs_dtim_period; | ||
629 | u8 bs_cfp_period; | ||
630 | u16 bs_cfp_max_duration; | ||
631 | u16 bs_cfp_du_remain; | ||
632 | u16 bs_tim_offset; | ||
633 | u16 bs_sleep_duration; | ||
634 | u16 bs_bmiss_threshold; | ||
635 | u32 bs_cfp_next; | ||
636 | }; | ||
637 | #endif | ||
638 | |||
639 | 616 | ||
640 | /* | 617 | /* |
641 | * TSF to TU conversion: | 618 | * TSF to TU conversion: |
@@ -1028,7 +1005,6 @@ struct ath5k_nfcal_hist | |||
1028 | 1005 | ||
1029 | /* TODO: Clean up and merge with ath5k_softc */ | 1006 | /* TODO: Clean up and merge with ath5k_softc */ |
1030 | struct ath5k_hw { | 1007 | struct ath5k_hw { |
1031 | u32 ah_magic; | ||
1032 | struct ath_common common; | 1008 | struct ath_common common; |
1033 | 1009 | ||
1034 | struct ath5k_softc *ah_sc; | 1010 | struct ath5k_softc *ah_sc; |
@@ -1036,7 +1012,6 @@ struct ath5k_hw { | |||
1036 | 1012 | ||
1037 | enum ath5k_int ah_imr; | 1013 | enum ath5k_int ah_imr; |
1038 | 1014 | ||
1039 | enum nl80211_iftype ah_op_mode; | ||
1040 | struct ieee80211_channel *ah_current_channel; | 1015 | struct ieee80211_channel *ah_current_channel; |
1041 | bool ah_turbo; | 1016 | bool ah_turbo; |
1042 | bool ah_calibration; | 1017 | bool ah_calibration; |
@@ -1049,7 +1024,6 @@ struct ath5k_hw { | |||
1049 | u32 ah_phy; | 1024 | u32 ah_phy; |
1050 | u32 ah_mac_srev; | 1025 | u32 ah_mac_srev; |
1051 | u16 ah_mac_version; | 1026 | u16 ah_mac_version; |
1052 | u16 ah_mac_revision; | ||
1053 | u16 ah_phy_revision; | 1027 | u16 ah_phy_revision; |
1054 | u16 ah_radio_5ghz_revision; | 1028 | u16 ah_radio_5ghz_revision; |
1055 | u16 ah_radio_2ghz_revision; | 1029 | u16 ah_radio_2ghz_revision; |
@@ -1071,8 +1045,6 @@ struct ath5k_hw { | |||
1071 | u8 ah_def_ant; | 1045 | u8 ah_def_ant; |
1072 | bool ah_software_retry; | 1046 | bool ah_software_retry; |
1073 | 1047 | ||
1074 | int ah_gpio_npins; | ||
1075 | |||
1076 | struct ath5k_capabilities ah_capabilities; | 1048 | struct ath5k_capabilities ah_capabilities; |
1077 | 1049 | ||
1078 | struct ath5k_txq_info ah_txq[AR5K_NUM_TX_QUEUES]; | 1050 | struct ath5k_txq_info ah_txq[AR5K_NUM_TX_QUEUES]; |
@@ -1141,9 +1113,9 @@ struct ath5k_hw { | |||
1141 | int (*ah_setup_rx_desc)(struct ath5k_hw *ah, struct ath5k_desc *desc, | 1113 | int (*ah_setup_rx_desc)(struct ath5k_hw *ah, struct ath5k_desc *desc, |
1142 | u32 size, unsigned int flags); | 1114 | u32 size, unsigned int flags); |
1143 | int (*ah_setup_tx_desc)(struct ath5k_hw *, struct ath5k_desc *, | 1115 | int (*ah_setup_tx_desc)(struct ath5k_hw *, struct ath5k_desc *, |
1144 | unsigned int, unsigned int, enum ath5k_pkt_type, unsigned int, | 1116 | unsigned int, unsigned int, int, enum ath5k_pkt_type, |
1145 | unsigned int, unsigned int, unsigned int, unsigned int, | 1117 | unsigned int, unsigned int, unsigned int, unsigned int, |
1146 | unsigned int, unsigned int, unsigned int); | 1118 | unsigned int, unsigned int, unsigned int, unsigned int); |
1147 | int (*ah_setup_mrr_tx_desc)(struct ath5k_hw *, struct ath5k_desc *, | 1119 | int (*ah_setup_mrr_tx_desc)(struct ath5k_hw *, struct ath5k_desc *, |
1148 | unsigned int, unsigned int, unsigned int, unsigned int, | 1120 | unsigned int, unsigned int, unsigned int, unsigned int, |
1149 | unsigned int, unsigned int); | 1121 | unsigned int, unsigned int); |
@@ -1158,158 +1130,147 @@ struct ath5k_hw { | |||
1158 | */ | 1130 | */ |
1159 | 1131 | ||
1160 | /* Attach/Detach Functions */ | 1132 | /* Attach/Detach Functions */ |
1161 | extern int ath5k_hw_attach(struct ath5k_softc *sc); | 1133 | int ath5k_hw_attach(struct ath5k_softc *sc); |
1162 | extern void ath5k_hw_detach(struct ath5k_hw *ah); | 1134 | void ath5k_hw_detach(struct ath5k_hw *ah); |
1163 | 1135 | ||
1164 | /* LED functions */ | 1136 | /* LED functions */ |
1165 | extern int ath5k_init_leds(struct ath5k_softc *sc); | 1137 | int ath5k_init_leds(struct ath5k_softc *sc); |
1166 | extern void ath5k_led_enable(struct ath5k_softc *sc); | 1138 | void ath5k_led_enable(struct ath5k_softc *sc); |
1167 | extern void ath5k_led_off(struct ath5k_softc *sc); | 1139 | void ath5k_led_off(struct ath5k_softc *sc); |
1168 | extern void ath5k_unregister_leds(struct ath5k_softc *sc); | 1140 | void ath5k_unregister_leds(struct ath5k_softc *sc); |
1169 | 1141 | ||
1170 | /* Reset Functions */ | 1142 | /* Reset Functions */ |
1171 | extern int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial); | 1143 | int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial); |
1172 | extern int ath5k_hw_on_hold(struct ath5k_hw *ah); | 1144 | int ath5k_hw_on_hold(struct ath5k_hw *ah); |
1173 | extern int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, struct ieee80211_channel *channel, bool change_channel); | 1145 | int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, |
1146 | struct ieee80211_channel *channel, bool change_channel); | ||
1147 | int ath5k_hw_register_timeout(struct ath5k_hw *ah, u32 reg, u32 flag, u32 val, | ||
1148 | bool is_set); | ||
1174 | /* Power management functions */ | 1149 | /* Power management functions */ |
1175 | extern int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration); | ||
1176 | 1150 | ||
1177 | /* DMA Related Functions */ | 1151 | /* DMA Related Functions */ |
1178 | extern void ath5k_hw_start_rx_dma(struct ath5k_hw *ah); | 1152 | void ath5k_hw_start_rx_dma(struct ath5k_hw *ah); |
1179 | extern int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah); | 1153 | int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah); |
1180 | extern u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah); | 1154 | u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah); |
1181 | extern void ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr); | 1155 | void ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr); |
1182 | extern int ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue); | 1156 | int ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue); |
1183 | extern int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue); | 1157 | int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue); |
1184 | extern u32 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue); | 1158 | u32 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue); |
1185 | extern int ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, | 1159 | int ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, |
1186 | u32 phys_addr); | 1160 | u32 phys_addr); |
1187 | extern int ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase); | 1161 | int ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase); |
1188 | /* Interrupt handling */ | 1162 | /* Interrupt handling */ |
1189 | extern bool ath5k_hw_is_intr_pending(struct ath5k_hw *ah); | 1163 | bool ath5k_hw_is_intr_pending(struct ath5k_hw *ah); |
1190 | extern int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask); | 1164 | int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask); |
1191 | extern enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum | 1165 | enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask); |
1192 | ath5k_int new_mask); | 1166 | void ath5k_hw_update_mib_counters(struct ath5k_hw *ah, |
1193 | extern void ath5k_hw_update_mib_counters(struct ath5k_hw *ah, struct ieee80211_low_level_stats *stats); | 1167 | struct ieee80211_low_level_stats *stats); |
1194 | 1168 | ||
1195 | /* EEPROM access functions */ | 1169 | /* EEPROM access functions */ |
1196 | extern int ath5k_eeprom_init(struct ath5k_hw *ah); | 1170 | int ath5k_eeprom_init(struct ath5k_hw *ah); |
1197 | extern void ath5k_eeprom_detach(struct ath5k_hw *ah); | 1171 | void ath5k_eeprom_detach(struct ath5k_hw *ah); |
1198 | extern int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac); | 1172 | int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac); |
1199 | extern bool ath5k_eeprom_is_hb63(struct ath5k_hw *ah); | ||
1200 | 1173 | ||
1201 | /* Protocol Control Unit Functions */ | 1174 | /* Protocol Control Unit Functions */ |
1202 | extern int ath5k_hw_set_opmode(struct ath5k_hw *ah); | 1175 | extern int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype opmode); |
1203 | extern void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class); | 1176 | void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class); |
1204 | /* BSSID Functions */ | 1177 | /* BSSID Functions */ |
1205 | extern int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac); | 1178 | int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac); |
1206 | extern void ath5k_hw_set_associd(struct ath5k_hw *ah); | 1179 | void ath5k_hw_set_associd(struct ath5k_hw *ah); |
1207 | extern void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask); | 1180 | void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask); |
1208 | /* Receive start/stop functions */ | 1181 | /* Receive start/stop functions */ |
1209 | extern void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah); | 1182 | void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah); |
1210 | extern void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah); | 1183 | void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah); |
1211 | /* RX Filter functions */ | 1184 | /* RX Filter functions */ |
1212 | extern void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1); | 1185 | void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1); |
1213 | extern int ath5k_hw_set_mcast_filter_idx(struct ath5k_hw *ah, u32 index); | 1186 | u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah); |
1214 | extern int ath5k_hw_clear_mcast_filter_idx(struct ath5k_hw *ah, u32 index); | 1187 | void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter); |
1215 | extern u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah); | ||
1216 | extern void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter); | ||
1217 | /* Beacon control functions */ | 1188 | /* Beacon control functions */ |
1218 | extern u32 ath5k_hw_get_tsf32(struct ath5k_hw *ah); | 1189 | u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah); |
1219 | extern u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah); | 1190 | void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64); |
1220 | extern void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64); | 1191 | void ath5k_hw_reset_tsf(struct ath5k_hw *ah); |
1221 | extern void ath5k_hw_reset_tsf(struct ath5k_hw *ah); | 1192 | void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval); |
1222 | extern void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval); | ||
1223 | #if 0 | ||
1224 | extern int ath5k_hw_set_beacon_timers(struct ath5k_hw *ah, const struct ath5k_beacon_state *state); | ||
1225 | extern void ath5k_hw_reset_beacon(struct ath5k_hw *ah); | ||
1226 | extern int ath5k_hw_beaconq_finish(struct ath5k_hw *ah, unsigned long phys_addr); | ||
1227 | #endif | ||
1228 | /* ACK bit rate */ | 1193 | /* ACK bit rate */ |
1229 | void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, bool high); | 1194 | void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, bool high); |
1230 | /* ACK/CTS Timeouts */ | ||
1231 | extern int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout); | ||
1232 | extern unsigned int ath5k_hw_get_ack_timeout(struct ath5k_hw *ah); | ||
1233 | extern int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout); | ||
1234 | extern unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah); | ||
1235 | /* Clock rate related functions */ | 1195 | /* Clock rate related functions */ |
1236 | unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec); | 1196 | unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec); |
1237 | unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock); | 1197 | unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock); |
1238 | unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah); | 1198 | unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah); |
1239 | /* Key table (WEP) functions */ | 1199 | /* Key table (WEP) functions */ |
1240 | extern int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry); | 1200 | int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry); |
1241 | extern int ath5k_hw_is_key_valid(struct ath5k_hw *ah, u16 entry); | 1201 | int ath5k_hw_set_key(struct ath5k_hw *ah, u16 entry, |
1242 | extern int ath5k_hw_set_key(struct ath5k_hw *ah, u16 entry, const struct ieee80211_key_conf *key, const u8 *mac); | 1202 | const struct ieee80211_key_conf *key, const u8 *mac); |
1243 | extern int ath5k_hw_set_key_lladdr(struct ath5k_hw *ah, u16 entry, const u8 *mac); | 1203 | int ath5k_hw_set_key_lladdr(struct ath5k_hw *ah, u16 entry, const u8 *mac); |
1244 | 1204 | ||
1245 | /* Queue Control Unit, DFS Control Unit Functions */ | 1205 | /* Queue Control Unit, DFS Control Unit Functions */ |
1246 | extern int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, struct ath5k_txq_info *queue_info); | 1206 | int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, |
1247 | extern int ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, | 1207 | struct ath5k_txq_info *queue_info); |
1248 | const struct ath5k_txq_info *queue_info); | 1208 | int ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, |
1249 | extern int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, | 1209 | const struct ath5k_txq_info *queue_info); |
1250 | enum ath5k_tx_queue queue_type, | 1210 | int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, |
1251 | struct ath5k_txq_info *queue_info); | 1211 | enum ath5k_tx_queue queue_type, |
1252 | extern u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue); | 1212 | struct ath5k_txq_info *queue_info); |
1253 | extern void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue); | 1213 | u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue); |
1254 | extern int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue); | 1214 | void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue); |
1255 | extern unsigned int ath5k_hw_get_slot_time(struct ath5k_hw *ah); | 1215 | int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue); |
1256 | extern int ath5k_hw_set_slot_time(struct ath5k_hw *ah, unsigned int slot_time); | 1216 | int ath5k_hw_set_slot_time(struct ath5k_hw *ah, unsigned int slot_time); |
1257 | 1217 | ||
1258 | /* Hardware Descriptor Functions */ | 1218 | /* Hardware Descriptor Functions */ |
1259 | extern int ath5k_hw_init_desc_functions(struct ath5k_hw *ah); | 1219 | int ath5k_hw_init_desc_functions(struct ath5k_hw *ah); |
1260 | 1220 | ||
1261 | /* GPIO Functions */ | 1221 | /* GPIO Functions */ |
1262 | extern void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state); | 1222 | void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state); |
1263 | extern int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio); | 1223 | int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio); |
1264 | extern int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio); | 1224 | int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio); |
1265 | extern u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio); | 1225 | u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio); |
1266 | extern int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val); | 1226 | int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val); |
1267 | extern void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level); | 1227 | void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, |
1228 | u32 interrupt_level); | ||
1268 | 1229 | ||
1269 | /* rfkill Functions */ | 1230 | /* rfkill Functions */ |
1270 | extern void ath5k_rfkill_hw_start(struct ath5k_hw *ah); | 1231 | void ath5k_rfkill_hw_start(struct ath5k_hw *ah); |
1271 | extern void ath5k_rfkill_hw_stop(struct ath5k_hw *ah); | 1232 | void ath5k_rfkill_hw_stop(struct ath5k_hw *ah); |
1272 | 1233 | ||
1273 | /* Misc functions */ | 1234 | /* Misc functions */ |
1274 | int ath5k_hw_set_capabilities(struct ath5k_hw *ah); | 1235 | int ath5k_hw_set_capabilities(struct ath5k_hw *ah); |
1275 | extern int ath5k_hw_get_capability(struct ath5k_hw *ah, enum ath5k_capability_type cap_type, u32 capability, u32 *result); | 1236 | int ath5k_hw_get_capability(struct ath5k_hw *ah, |
1276 | extern int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id); | 1237 | enum ath5k_capability_type cap_type, u32 capability, |
1277 | extern int ath5k_hw_disable_pspoll(struct ath5k_hw *ah); | 1238 | u32 *result); |
1239 | int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, u16 assoc_id); | ||
1240 | int ath5k_hw_disable_pspoll(struct ath5k_hw *ah); | ||
1278 | 1241 | ||
1279 | /* Initial register settings functions */ | 1242 | /* Initial register settings functions */ |
1280 | extern int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel); | 1243 | int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel); |
1281 | 1244 | ||
1282 | /* Initialize RF */ | 1245 | /* Initialize RF */ |
1283 | extern int ath5k_hw_rfregs_init(struct ath5k_hw *ah, | 1246 | int ath5k_hw_rfregs_init(struct ath5k_hw *ah, |
1284 | struct ieee80211_channel *channel, | 1247 | struct ieee80211_channel *channel, |
1285 | unsigned int mode); | 1248 | unsigned int mode); |
1286 | extern int ath5k_hw_rfgain_init(struct ath5k_hw *ah, unsigned int freq); | 1249 | int ath5k_hw_rfgain_init(struct ath5k_hw *ah, unsigned int freq); |
1287 | extern enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah); | 1250 | enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah); |
1288 | extern int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah); | 1251 | int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah); |
1289 | /* PHY/RF channel functions */ | 1252 | /* PHY/RF channel functions */ |
1290 | extern bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags); | 1253 | bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags); |
1291 | extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel); | 1254 | int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel); |
1292 | /* PHY calibration */ | 1255 | /* PHY calibration */ |
1293 | void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah); | 1256 | void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah); |
1294 | extern int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct ieee80211_channel *channel); | 1257 | int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, |
1295 | extern int ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq); | 1258 | struct ieee80211_channel *channel); |
1296 | extern s16 ath5k_hw_get_noise_floor(struct ath5k_hw *ah); | 1259 | void ath5k_hw_calibration_poll(struct ath5k_hw *ah); |
1297 | extern void ath5k_hw_calibration_poll(struct ath5k_hw *ah); | ||
1298 | /* Spur mitigation */ | 1260 | /* Spur mitigation */ |
1299 | bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah, | 1261 | bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah, |
1300 | struct ieee80211_channel *channel); | 1262 | struct ieee80211_channel *channel); |
1301 | void ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah, | 1263 | void ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah, |
1302 | struct ieee80211_channel *channel); | 1264 | struct ieee80211_channel *channel); |
1303 | /* Misc PHY functions */ | 1265 | /* Misc PHY functions */ |
1304 | extern u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan); | 1266 | u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan); |
1305 | extern int ath5k_hw_phy_disable(struct ath5k_hw *ah); | 1267 | int ath5k_hw_phy_disable(struct ath5k_hw *ah); |
1306 | /* Antenna control */ | 1268 | /* Antenna control */ |
1307 | extern void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode); | 1269 | void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode); |
1308 | extern void ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant); | ||
1309 | extern unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah); | ||
1310 | /* TX power setup */ | 1270 | /* TX power setup */ |
1311 | extern int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, u8 ee_mode, u8 txpower); | 1271 | int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, |
1312 | extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower); | 1272 | u8 ee_mode, u8 txpower); |
1273 | int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower); | ||
1313 | 1274 | ||
1314 | /* | 1275 | /* |
1315 | * Functions used internaly | 1276 | * Functions used internaly |
@@ -1335,29 +1296,6 @@ static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg) | |||
1335 | iowrite32(val, ah->ah_iobase + reg); | 1296 | iowrite32(val, ah->ah_iobase + reg); |
1336 | } | 1297 | } |
1337 | 1298 | ||
1338 | #if defined(_ATH5K_RESET) || defined(_ATH5K_PHY) | ||
1339 | /* | ||
1340 | * Check if a register write has been completed | ||
1341 | */ | ||
1342 | static int ath5k_hw_register_timeout(struct ath5k_hw *ah, u32 reg, u32 flag, | ||
1343 | u32 val, bool is_set) | ||
1344 | { | ||
1345 | int i; | ||
1346 | u32 data; | ||
1347 | |||
1348 | for (i = AR5K_TUNE_REGISTER_TIMEOUT; i > 0; i--) { | ||
1349 | data = ath5k_hw_reg_read(ah, reg); | ||
1350 | if (is_set && (data & flag)) | ||
1351 | break; | ||
1352 | else if ((data & flag) == val) | ||
1353 | break; | ||
1354 | udelay(15); | ||
1355 | } | ||
1356 | |||
1357 | return (i <= 0) ? -EAGAIN : 0; | ||
1358 | } | ||
1359 | #endif | ||
1360 | |||
1361 | static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits) | 1299 | static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits) |
1362 | { | 1300 | { |
1363 | u32 retval = 0, bit, i; | 1301 | u32 retval = 0, bit, i; |
@@ -1370,9 +1308,4 @@ static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits) | |||
1370 | return retval; | 1308 | return retval; |
1371 | } | 1309 | } |
1372 | 1310 | ||
1373 | static inline int ath5k_pad_size(int hdrlen) | ||
1374 | { | ||
1375 | return (hdrlen < 24) ? 0 : hdrlen & 3; | ||
1376 | } | ||
1377 | |||
1378 | #endif | 1311 | #endif |