diff options
Diffstat (limited to 'drivers/net/wireless/ath/ar9170/mac.c')
| -rw-r--r-- | drivers/net/wireless/ath/ar9170/mac.c | 452 |
1 files changed, 452 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ar9170/mac.c b/drivers/net/wireless/ath/ar9170/mac.c new file mode 100644 index 000000000000..c8fa3073169f --- /dev/null +++ b/drivers/net/wireless/ath/ar9170/mac.c | |||
| @@ -0,0 +1,452 @@ | |||
| 1 | /* | ||
| 2 | * Atheros AR9170 driver | ||
| 3 | * | ||
| 4 | * MAC programming | ||
| 5 | * | ||
| 6 | * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License, or | ||
| 11 | * (at your option) any later version. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, | ||
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 16 | * GNU General Public License for more details. | ||
| 17 | * | ||
| 18 | * You should have received a copy of the GNU General Public License | ||
| 19 | * along with this program; see the file COPYING. If not, see | ||
| 20 | * http://www.gnu.org/licenses/. | ||
| 21 | * | ||
| 22 | * This file incorporates work covered by the following copyright and | ||
| 23 | * permission notice: | ||
| 24 | * Copyright (c) 2007-2008 Atheros Communications, Inc. | ||
| 25 | * | ||
| 26 | * Permission to use, copy, modify, and/or distribute this software for any | ||
| 27 | * purpose with or without fee is hereby granted, provided that the above | ||
| 28 | * copyright notice and this permission notice appear in all copies. | ||
| 29 | * | ||
| 30 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
| 31 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
| 32 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | ||
| 33 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
| 34 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | ||
| 35 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||
| 36 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||
| 37 | */ | ||
| 38 | #include "ar9170.h" | ||
| 39 | #include "cmd.h" | ||
| 40 | |||
| 41 | int ar9170_set_qos(struct ar9170 *ar) | ||
| 42 | { | ||
| 43 | ar9170_regwrite_begin(ar); | ||
| 44 | |||
| 45 | ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min | | ||
| 46 | (ar->edcf[0].cw_max << 16)); | ||
| 47 | ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min | | ||
| 48 | (ar->edcf[1].cw_max << 16)); | ||
| 49 | ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min | | ||
| 50 | (ar->edcf[2].cw_max << 16)); | ||
| 51 | ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min | | ||
| 52 | (ar->edcf[3].cw_max << 16)); | ||
| 53 | ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min | | ||
| 54 | (ar->edcf[4].cw_max << 16)); | ||
| 55 | |||
| 56 | ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS, | ||
| 57 | ((ar->edcf[0].aifs * 9 + 10)) | | ||
| 58 | ((ar->edcf[1].aifs * 9 + 10) << 12) | | ||
| 59 | ((ar->edcf[2].aifs * 9 + 10) << 24)); | ||
| 60 | ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS, | ||
| 61 | ((ar->edcf[2].aifs * 9 + 10) >> 8) | | ||
| 62 | ((ar->edcf[3].aifs * 9 + 10) << 4) | | ||
| 63 | ((ar->edcf[4].aifs * 9 + 10) << 16)); | ||
| 64 | |||
| 65 | ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP, | ||
| 66 | ar->edcf[0].txop | ar->edcf[1].txop << 16); | ||
| 67 | ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP, | ||
| 68 | ar->edcf[1].txop | ar->edcf[3].txop << 16); | ||
| 69 | |||
| 70 | ar9170_regwrite_finish(); | ||
| 71 | |||
| 72 | return ar9170_regwrite_result(); | ||
| 73 | } | ||
| 74 | |||
| 75 | int ar9170_init_mac(struct ar9170 *ar) | ||
| 76 | { | ||
| 77 | ar9170_regwrite_begin(ar); | ||
| 78 | |||
| 79 | ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40); | ||
| 80 | |||
| 81 | ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0); | ||
| 82 | |||
| 83 | /* enable MMIC */ | ||
| 84 | ar9170_regwrite(AR9170_MAC_REG_SNIFFER, | ||
| 85 | AR9170_MAC_REG_SNIFFER_DEFAULTS); | ||
| 86 | |||
| 87 | ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80); | ||
| 88 | |||
| 89 | ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70); | ||
| 90 | ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000); | ||
| 91 | ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10); | ||
| 92 | |||
| 93 | /* CF-END mode */ | ||
| 94 | ar9170_regwrite(0x1c3b2c, 0x19000000); | ||
| 95 | |||
| 96 | /* NAV protects ACK only (in TXOP) */ | ||
| 97 | ar9170_regwrite(0x1c3b38, 0x201); | ||
| 98 | |||
| 99 | /* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */ | ||
| 100 | /* OTUS set AM to 0x1 */ | ||
| 101 | ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170); | ||
| 102 | |||
| 103 | ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105); | ||
| 104 | |||
| 105 | /* AGG test code*/ | ||
| 106 | /* Aggregation MAX number and timeout */ | ||
| 107 | ar9170_regwrite(0x1c3b9c, 0x10000a); | ||
| 108 | |||
| 109 | ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER, | ||
| 110 | AR9170_MAC_REG_FTF_DEFAULTS); | ||
| 111 | |||
| 112 | /* Enable deaggregator, response in sniffer mode */ | ||
| 113 | ar9170_regwrite(0x1c3c40, 0x1 | 1<<30); | ||
| 114 | |||
| 115 | /* rate sets */ | ||
| 116 | ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f); | ||
| 117 | ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f); | ||
| 118 | ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb); | ||
| 119 | |||
| 120 | /* MIMO response control */ | ||
| 121 | ar9170_regwrite(0x1c3694, 0x4003C1E);/* bit 26~28 otus-AM */ | ||
| 122 | |||
| 123 | /* switch MAC to OTUS interface */ | ||
| 124 | ar9170_regwrite(0x1c3600, 0x3); | ||
| 125 | |||
| 126 | ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff); | ||
| 127 | |||
| 128 | /* set PHY register read timeout (??) */ | ||
| 129 | ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008); | ||
| 130 | |||
| 131 | /* Disable Rx TimeOut, workaround for BB. */ | ||
| 132 | ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0); | ||
| 133 | |||
| 134 | /* Set CPU clock frequency to 88/80MHz */ | ||
| 135 | ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL, | ||
| 136 | AR9170_PWR_CLK_AHB_80_88MHZ | | ||
| 137 | AR9170_PWR_CLK_DAC_160_INV_DLY); | ||
| 138 | |||
| 139 | /* Set WLAN DMA interrupt mode: generate int per packet */ | ||
| 140 | ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011); | ||
| 141 | |||
| 142 | ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT, | ||
| 143 | AR9170_MAC_FCS_FIFO_PROT); | ||
| 144 | |||
| 145 | /* Disables the CF_END frame, undocumented register */ | ||
| 146 | ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND, | ||
| 147 | 0x141E0F48); | ||
| 148 | |||
| 149 | ar9170_regwrite_finish(); | ||
| 150 | |||
| 151 | return ar9170_regwrite_result(); | ||
| 152 | } | ||
| 153 | |||
| 154 | static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac) | ||
| 155 | { | ||
| 156 | static const u8 zero[ETH_ALEN] = { 0 }; | ||
| 157 | |||
| 158 | if (!mac) | ||
| 159 | mac = zero; | ||
| 160 | |||
| 161 | ar9170_regwrite_begin(ar); | ||
| 162 | |||
| 163 | ar9170_regwrite(reg, | ||
| 164 | (mac[3] << 24) | (mac[2] << 16) | | ||
| 165 | (mac[1] << 8) | mac[0]); | ||
| 166 | |||
| 167 | ar9170_regwrite(reg + 4, (mac[5] << 8) | mac[4]); | ||
| 168 | |||
| 169 | ar9170_regwrite_finish(); | ||
| 170 | |||
| 171 | return ar9170_regwrite_result(); | ||
| 172 | } | ||
| 173 | |||
| 174 | int ar9170_update_multicast(struct ar9170 *ar) | ||
| 175 | { | ||
| 176 | int err; | ||
| 177 | |||
| 178 | ar9170_regwrite_begin(ar); | ||
| 179 | ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, | ||
| 180 | ar->want_mc_hash >> 32); | ||
| 181 | ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, | ||
| 182 | ar->want_mc_hash); | ||
| 183 | |||
| 184 | ar9170_regwrite_finish(); | ||
| 185 | err = ar9170_regwrite_result(); | ||
| 186 | |||
| 187 | if (err) | ||
| 188 | return err; | ||
| 189 | |||
| 190 | ar->cur_mc_hash = ar->want_mc_hash; | ||
| 191 | |||
| 192 | return 0; | ||
| 193 | } | ||
| 194 | |||
| 195 | int ar9170_update_frame_filter(struct ar9170 *ar) | ||
| 196 | { | ||
| 197 | int err; | ||
| 198 | |||
| 199 | err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER, | ||
| 200 | ar->want_filter); | ||
| 201 | |||
| 202 | if (err) | ||
| 203 | return err; | ||
| 204 | |||
| 205 | ar->cur_filter = ar->want_filter; | ||
| 206 | |||
| 207 | return 0; | ||
| 208 | } | ||
| 209 | |||
| 210 | static int ar9170_set_promiscouous(struct ar9170 *ar) | ||
| 211 | { | ||
| 212 | u32 encr_mode, sniffer; | ||
| 213 | int err; | ||
| 214 | |||
| 215 | err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer); | ||
| 216 | if (err) | ||
| 217 | return err; | ||
| 218 | |||
| 219 | err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode); | ||
| 220 | if (err) | ||
| 221 | return err; | ||
| 222 | |||
| 223 | if (ar->sniffer_enabled) { | ||
| 224 | sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC; | ||
| 225 | |||
| 226 | /* | ||
| 227 | * Rx decryption works in place. | ||
| 228 | * | ||
| 229 | * If we don't disable it, the hardware will render all | ||
| 230 | * encrypted frames which are encrypted with an unknown | ||
| 231 | * key useless. | ||
| 232 | */ | ||
| 233 | |||
| 234 | encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE; | ||
| 235 | ar->sniffer_enabled = true; | ||
| 236 | } else { | ||
| 237 | sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC; | ||
| 238 | |||
| 239 | if (ar->rx_software_decryption) | ||
| 240 | encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE; | ||
| 241 | else | ||
| 242 | encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE; | ||
| 243 | } | ||
| 244 | |||
| 245 | ar9170_regwrite_begin(ar); | ||
| 246 | ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode); | ||
| 247 | ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer); | ||
| 248 | ar9170_regwrite_finish(); | ||
| 249 | |||
| 250 | return ar9170_regwrite_result(); | ||
| 251 | } | ||
| 252 | |||
| 253 | int ar9170_set_operating_mode(struct ar9170 *ar) | ||
| 254 | { | ||
| 255 | u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS; | ||
| 256 | u8 *mac_addr, *bssid; | ||
| 257 | int err; | ||
| 258 | |||
| 259 | if (ar->vif) { | ||
| 260 | mac_addr = ar->mac_addr; | ||
| 261 | bssid = ar->bssid; | ||
| 262 | |||
| 263 | switch (ar->vif->type) { | ||
| 264 | case NL80211_IFTYPE_MESH_POINT: | ||
| 265 | case NL80211_IFTYPE_ADHOC: | ||
| 266 | pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS; | ||
| 267 | break; | ||
| 268 | /* case NL80211_IFTYPE_AP: | ||
| 269 | pm_mode |= AR9170_MAC_REG_POWERMGT_AP; | ||
| 270 | break;*/ | ||
| 271 | case NL80211_IFTYPE_WDS: | ||
| 272 | pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS; | ||
| 273 | break; | ||
| 274 | case NL80211_IFTYPE_MONITOR: | ||
| 275 | ar->sniffer_enabled = true; | ||
| 276 | ar->rx_software_decryption = true; | ||
| 277 | break; | ||
| 278 | default: | ||
| 279 | pm_mode |= AR9170_MAC_REG_POWERMGT_STA; | ||
| 280 | break; | ||
| 281 | } | ||
| 282 | } else { | ||
| 283 | mac_addr = NULL; | ||
| 284 | bssid = NULL; | ||
| 285 | } | ||
| 286 | |||
| 287 | err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr); | ||
| 288 | if (err) | ||
| 289 | return err; | ||
| 290 | |||
| 291 | err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid); | ||
| 292 | if (err) | ||
| 293 | return err; | ||
| 294 | |||
| 295 | err = ar9170_set_promiscouous(ar); | ||
| 296 | if (err) | ||
| 297 | return err; | ||
| 298 | |||
| 299 | ar9170_regwrite_begin(ar); | ||
| 300 | |||
| 301 | ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode); | ||
| 302 | ar9170_regwrite_finish(); | ||
| 303 | |||
| 304 | return ar9170_regwrite_result(); | ||
| 305 | } | ||
| 306 | |||
| 307 | int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry) | ||
| 308 | { | ||
| 309 | u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111); | ||
| 310 | |||
| 311 | return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp); | ||
| 312 | } | ||
| 313 | |||
| 314 | int ar9170_set_beacon_timers(struct ar9170 *ar) | ||
| 315 | { | ||
| 316 | u32 v = 0; | ||
| 317 | u32 pretbtt = 0; | ||
| 318 | |||
| 319 | v |= ar->hw->conf.beacon_int; | ||
| 320 | |||
| 321 | if (ar->vif) { | ||
| 322 | switch (ar->vif->type) { | ||
| 323 | case NL80211_IFTYPE_MESH_POINT: | ||
| 324 | case NL80211_IFTYPE_ADHOC: | ||
| 325 | v |= BIT(25); | ||
| 326 | break; | ||
| 327 | case NL80211_IFTYPE_AP: | ||
| 328 | v |= BIT(24); | ||
| 329 | pretbtt = (ar->hw->conf.beacon_int - 6) << 16; | ||
| 330 | break; | ||
| 331 | default: | ||
| 332 | break; | ||
| 333 | } | ||
| 334 | |||
| 335 | v |= ar->vif->bss_conf.dtim_period << 16; | ||
| 336 | } | ||
| 337 | |||
| 338 | ar9170_regwrite_begin(ar); | ||
| 339 | |||
| 340 | ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt); | ||
| 341 | ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v); | ||
| 342 | ar9170_regwrite_finish(); | ||
| 343 | return ar9170_regwrite_result(); | ||
| 344 | } | ||
| 345 | |||
| 346 | int ar9170_update_beacon(struct ar9170 *ar) | ||
| 347 | { | ||
| 348 | struct sk_buff *skb; | ||
| 349 | __le32 *data, *old = NULL; | ||
| 350 | u32 word; | ||
| 351 | int i; | ||
| 352 | |||
| 353 | skb = ieee80211_beacon_get(ar->hw, ar->vif); | ||
| 354 | if (!skb) | ||
| 355 | return -ENOMEM; | ||
| 356 | |||
| 357 | data = (__le32 *)skb->data; | ||
| 358 | if (ar->beacon) | ||
| 359 | old = (__le32 *)ar->beacon->data; | ||
| 360 | |||
| 361 | ar9170_regwrite_begin(ar); | ||
| 362 | for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) { | ||
| 363 | /* | ||
| 364 | * XXX: This accesses beyond skb data for up | ||
| 365 | * to the last 3 bytes!! | ||
| 366 | */ | ||
| 367 | |||
| 368 | if (old && (data[i] == old[i])) | ||
| 369 | continue; | ||
| 370 | |||
| 371 | word = le32_to_cpu(data[i]); | ||
| 372 | ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word); | ||
| 373 | } | ||
| 374 | |||
| 375 | /* XXX: use skb->cb info */ | ||
| 376 | if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ) | ||
| 377 | ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP, | ||
| 378 | ((skb->len + 4) << (3+16)) + 0x0400); | ||
| 379 | else | ||
| 380 | ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP, | ||
| 381 | ((skb->len + 4) << (3+16)) + 0x0400); | ||
| 382 | |||
| 383 | ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4); | ||
| 384 | ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS); | ||
| 385 | ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1); | ||
| 386 | |||
| 387 | ar9170_regwrite_finish(); | ||
| 388 | |||
| 389 | dev_kfree_skb(ar->beacon); | ||
| 390 | ar->beacon = skb; | ||
| 391 | |||
| 392 | return ar9170_regwrite_result(); | ||
| 393 | } | ||
| 394 | |||
| 395 | void ar9170_new_beacon(struct work_struct *work) | ||
| 396 | { | ||
| 397 | struct ar9170 *ar = container_of(work, struct ar9170, | ||
| 398 | beacon_work); | ||
| 399 | struct sk_buff *skb; | ||
| 400 | |||
| 401 | if (unlikely(!IS_STARTED(ar))) | ||
| 402 | return ; | ||
| 403 | |||
| 404 | mutex_lock(&ar->mutex); | ||
| 405 | |||
| 406 | if (!ar->vif) | ||
| 407 | goto out; | ||
| 408 | |||
| 409 | ar9170_update_beacon(ar); | ||
| 410 | |||
| 411 | rcu_read_lock(); | ||
| 412 | while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif))) | ||
| 413 | ar9170_op_tx(ar->hw, skb); | ||
| 414 | |||
| 415 | rcu_read_unlock(); | ||
| 416 | |||
| 417 | out: | ||
| 418 | mutex_unlock(&ar->mutex); | ||
| 419 | } | ||
| 420 | |||
| 421 | int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype, | ||
| 422 | u8 keyidx, u8 *keydata, int keylen) | ||
| 423 | { | ||
| 424 | __le32 vals[7]; | ||
| 425 | static const u8 bcast[ETH_ALEN] = | ||
| 426 | { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; | ||
| 427 | u8 dummy; | ||
| 428 | |||
| 429 | mac = mac ? : bcast; | ||
| 430 | |||
| 431 | vals[0] = cpu_to_le32((keyidx << 16) + id); | ||
| 432 | vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype); | ||
| 433 | vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 | | ||
| 434 | mac[3] << 8 | mac[2]); | ||
| 435 | memset(&vals[3], 0, 16); | ||
| 436 | if (keydata) | ||
| 437 | memcpy(&vals[3], keydata, keylen); | ||
| 438 | |||
| 439 | return ar->exec_cmd(ar, AR9170_CMD_EKEY, | ||
| 440 | sizeof(vals), (u8 *)vals, | ||
| 441 | 1, &dummy); | ||
| 442 | } | ||
| 443 | |||
| 444 | int ar9170_disable_key(struct ar9170 *ar, u8 id) | ||
| 445 | { | ||
| 446 | __le32 val = cpu_to_le32(id); | ||
| 447 | u8 dummy; | ||
| 448 | |||
| 449 | return ar->exec_cmd(ar, AR9170_CMD_EKEY, | ||
| 450 | sizeof(val), (u8 *)&val, | ||
| 451 | 1, &dummy); | ||
| 452 | } | ||
