1 files changed, 22 insertions, 57 deletions

diff --git a/drivers/net/vxge/vxge-traffic.c b/drivers/net/vxge/vxge-traffic.c
index 2c012f4ce465..6cc1dd79b40b 100644
--- a/drivers/net/vxge/vxge-traffic.c
+++ b/drivers/net/vxge/vxge-traffic.c
@@ -231,11 +231,8 @@ void vxge_hw_channel_msix_mask(struct __vxge_hw_channel *channel, int msix_id)
 {
 
         __vxge_hw_pio_mem_write32_upper(
-                (u32)vxge_bVALn(vxge_mBIT(channel->first_vp_id+(msix_id/4)),
-                        0, 32),
+                (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),
                 &channel->common_reg->set_msix_mask_vect[msix_id%4]);
-
-        return;
 }
 
 /**
@@ -252,11 +249,8 @@ vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channel, int msix_id)
 {
 
         __vxge_hw_pio_mem_write32_upper(
-                (u32)vxge_bVALn(vxge_mBIT(channel->first_vp_id+(msix_id/4)),
-                        0, 32),
+                (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),
                 &channel->common_reg->clear_msix_mask_vect[msix_id%4]);
-
-        return;
 }
 
 /**
@@ -331,8 +325,6 @@ void vxge_hw_device_intr_enable(struct __vxge_hw_device *hldev)
         val64 = readq(&hldev->common_reg->titan_general_int_status);
 
         vxge_hw_device_unmask_all(hldev);
-
-        return;
 }
 
 /**
@@ -364,8 +356,6 @@ void vxge_hw_device_intr_disable(struct __vxge_hw_device *hldev)
                 vxge_hw_vpath_intr_disable(
                         VXGE_HW_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i]));
         }
-
-        return;
 }
 
 /**
@@ -385,8 +375,6 @@ void vxge_hw_device_mask_all(struct __vxge_hw_device *hldev)
 
         __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32),
                                 &hldev->common_reg->titan_mask_all_int);
-
-        return;
 }
 
 /**
@@ -406,8 +394,6 @@ void vxge_hw_device_unmask_all(struct __vxge_hw_device *hldev)
 
         __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32),
                         &hldev->common_reg->titan_mask_all_int);
-
-        return;
 }
 
 /**
@@ -649,8 +635,6 @@ void vxge_hw_device_clear_tx_rx(struct __vxge_hw_device *hldev)
                                  hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX]),
                                 &hldev->common_reg->tim_int_status1);
         }
-
-        return;
 }
 
 /*
@@ -878,7 +862,7 @@ void vxge_hw_ring_rxd_post_post(struct __vxge_hw_ring *ring, void *rxdh)
 
         channel = &ring->channel;
 
-        rxdp->control_0 |= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;
+        rxdp->control_0 = VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;
 
         if (ring->stats->common_stats.usage_cnt > 0)
                 ring->stats->common_stats.usage_cnt--;
@@ -902,7 +886,7 @@ void vxge_hw_ring_rxd_post(struct __vxge_hw_ring *ring, void *rxdh)
         channel = &ring->channel;
 
         wmb();
-        rxdp->control_0 |= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;
+        rxdp->control_0 = VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;
 
         vxge_hw_channel_dtr_post(channel, rxdh);
 
@@ -966,6 +950,7 @@ enum vxge_hw_status vxge_hw_ring_rxd_next_completed(
         struct __vxge_hw_channel *channel;
         struct vxge_hw_ring_rxd_1 *rxdp;
         enum vxge_hw_status status = VXGE_HW_OK;
+        u64 control_0, own;
 
         channel = &ring->channel;
 
@@ -977,8 +962,12 @@ enum vxge_hw_status vxge_hw_ring_rxd_next_completed(
                 goto exit;
         }
 
+        control_0 = rxdp->control_0;
+        own = control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;
+        *t_code = (u8)VXGE_HW_RING_RXD_T_CODE_GET(control_0);
+
         /* check whether it is not the end */
-        if (!(rxdp->control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER)) {
+        if (!own || ((*t_code == VXGE_HW_RING_T_CODE_FRM_DROP) && own)) {
 
                 vxge_assert(((struct vxge_hw_ring_rxd_1 *)rxdp)->host_control !=
                                 0);
@@ -986,8 +975,6 @@ enum vxge_hw_status vxge_hw_ring_rxd_next_completed(
                 ++ring->cmpl_cnt;
                 vxge_hw_channel_dtr_complete(channel);
 
-                *t_code = (u8)VXGE_HW_RING_RXD_T_CODE_GET(rxdp->control_0);
-
                 vxge_assert(*t_code != VXGE_HW_RING_RXD_T_CODE_UNUSED);
 
                 ring->stats->common_stats.usage_cnt++;
@@ -1035,12 +1022,13 @@ enum vxge_hw_status vxge_hw_ring_handle_tcode(
          * such as unknown UPV6 header), Drop it !!!
          */
 
-        if (t_code == 0 || t_code == 5) {
+        if (t_code ==  VXGE_HW_RING_T_CODE_OK ||
+                t_code == VXGE_HW_RING_T_CODE_L3_PKT_ERR) {
                 status = VXGE_HW_OK;
                 goto exit;
         }
 
-        if (t_code > 0xF) {
+        if (t_code > VXGE_HW_RING_T_CODE_MULTI_ERR) {
                 status = VXGE_HW_ERR_INVALID_TCODE;
                 goto exit;
         }
@@ -2216,29 +2204,24 @@ exit:
  * This API will associate a given MSIX vector numbers with the four TIM
  * interrupts and alarm interrupt.
  */
-enum vxge_hw_status
+void
 vxge_hw_vpath_msix_set(struct __vxge_hw_vpath_handle *vp, int *tim_msix_id,
                        int alarm_msix_id)
 {
         u64 val64;
         struct __vxge_hw_virtualpath *vpath = vp->vpath;
         struct vxge_hw_vpath_reg __iomem *vp_reg = vpath->vp_reg;
-        u32 first_vp_id = vpath->hldev->first_vp_id;
+        u32 vp_id = vp->vpath->vp_id;
 
         val64 =  VXGE_HW_INTERRUPT_CFG0_GROUP0_MSIX_FOR_TXTI(
-                  (first_vp_id * 4) + tim_msix_id[0]) |
+                  (vp_id * 4) + tim_msix_id[0]) |
                  VXGE_HW_INTERRUPT_CFG0_GROUP1_MSIX_FOR_TXTI(
-                  (first_vp_id * 4) + tim_msix_id[1]) |
-                 VXGE_HW_INTERRUPT_CFG0_GROUP2_MSIX_FOR_TXTI(
-                        (first_vp_id * 4) + tim_msix_id[2]);
-
-                val64 |= VXGE_HW_INTERRUPT_CFG0_GROUP3_MSIX_FOR_TXTI(
-                        (first_vp_id * 4) + tim_msix_id[3]);
+                  (vp_id * 4) + tim_msix_id[1]);
 
         writeq(val64, &vp_reg->interrupt_cfg0);
 
         writeq(VXGE_HW_INTERRUPT_CFG2_ALARM_MAP_TO_MSG(
-                        (first_vp_id * 4) + alarm_msix_id),
+                        (vpath->hldev->first_vp_id * 4) + alarm_msix_id),
                         &vp_reg->interrupt_cfg2);
 
         if (vpath->hldev->config.intr_mode ==
@@ -2258,8 +2241,6 @@ vxge_hw_vpath_msix_set(struct __vxge_hw_vpath_handle *vp, int *tim_msix_id,
                                 VXGE_HW_ONE_SHOT_VECT3_EN_ONE_SHOT_VECT3_EN,
                                 0, 32), &vp_reg->one_shot_vect3_en);
         }
-
-        return VXGE_HW_OK;
 }
 
 /**
@@ -2279,11 +2260,8 @@ vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vp, int msix_id)
 {
         struct __vxge_hw_device *hldev = vp->vpath->hldev;
         __vxge_hw_pio_mem_write32_upper(
-                (u32) vxge_bVALn(vxge_mBIT(hldev->first_vp_id +
-                        (msix_id  / 4)), 0, 32),
+                (u32) vxge_bVALn(vxge_mBIT(msix_id  >> 2), 0, 32),
                 &hldev->common_reg->set_msix_mask_vect[msix_id % 4]);
-
-        return;
 }
 
 /**
@@ -2305,19 +2283,15 @@ vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id)
         if (hldev->config.intr_mode ==
                         VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) {
                 __vxge_hw_pio_mem_write32_upper(
-                        (u32)vxge_bVALn(vxge_mBIT(hldev->first_vp_id +
-                                (msix_id/4)), 0, 32),
+                        (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),
                                 &hldev->common_reg->
                                         clr_msix_one_shot_vec[msix_id%4]);
         } else {
                 __vxge_hw_pio_mem_write32_upper(
-                        (u32)vxge_bVALn(vxge_mBIT(hldev->first_vp_id +
-                                (msix_id/4)), 0, 32),
+                        (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),
                                 &hldev->common_reg->
                                         clear_msix_mask_vect[msix_id%4]);
         }
-
-        return;
 }
 
 /**
@@ -2337,11 +2311,8 @@ vxge_hw_vpath_msix_unmask(struct __vxge_hw_vpath_handle *vp, int msix_id)
 {
         struct __vxge_hw_device *hldev = vp->vpath->hldev;
         __vxge_hw_pio_mem_write32_upper(
-                        (u32)vxge_bVALn(vxge_mBIT(hldev->first_vp_id +
-                        (msix_id/4)), 0, 32),
+                        (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),
                         &hldev->common_reg->clear_msix_mask_vect[msix_id%4]);
-
-        return;
 }
 
 /**
@@ -2358,8 +2329,6 @@ vxge_hw_vpath_msix_mask_all(struct __vxge_hw_vpath_handle *vp)
         __vxge_hw_pio_mem_write32_upper(
                 (u32)vxge_bVALn(vxge_mBIT(vp->vpath->vp_id), 0, 32),
                 &vp->vpath->hldev->common_reg->set_msix_mask_all_vect);
-
-        return;
 }
 
 /**
@@ -2398,8 +2367,6 @@ void vxge_hw_vpath_inta_mask_tx_rx(struct __vxge_hw_vpath_handle *vp)
                         tim_int_mask1[VXGE_HW_VPATH_INTR_RX] | val64),
                         &hldev->common_reg->tim_int_mask1);
         }
-
-        return;
 }
 
 /**
@@ -2436,8 +2403,6 @@ void vxge_hw_vpath_inta_unmask_tx_rx(struct __vxge_hw_vpath_handle *vp)
                           tim_int_mask1[VXGE_HW_VPATH_INTR_RX])) & val64,
                         &hldev->common_reg->tim_int_mask1);
         }
-
-        return;
 }
 
 /**