diff options
Diffstat (limited to 'drivers/net/vxge/vxge-main.h')
-rw-r--r-- | drivers/net/vxge/vxge-main.h | 86 |
1 files changed, 57 insertions, 29 deletions
diff --git a/drivers/net/vxge/vxge-main.h b/drivers/net/vxge/vxge-main.h index de64536cb7d0..5746fedc356f 100644 --- a/drivers/net/vxge/vxge-main.h +++ b/drivers/net/vxge/vxge-main.h | |||
@@ -29,6 +29,9 @@ | |||
29 | 29 | ||
30 | #define PCI_DEVICE_ID_TITAN_WIN 0x5733 | 30 | #define PCI_DEVICE_ID_TITAN_WIN 0x5733 |
31 | #define PCI_DEVICE_ID_TITAN_UNI 0x5833 | 31 | #define PCI_DEVICE_ID_TITAN_UNI 0x5833 |
32 | #define VXGE_HW_TITAN1_PCI_REVISION 1 | ||
33 | #define VXGE_HW_TITAN1A_PCI_REVISION 2 | ||
34 | |||
32 | #define VXGE_USE_DEFAULT 0xffffffff | 35 | #define VXGE_USE_DEFAULT 0xffffffff |
33 | #define VXGE_HW_VPATH_MSIX_ACTIVE 4 | 36 | #define VXGE_HW_VPATH_MSIX_ACTIVE 4 |
34 | #define VXGE_ALARM_MSIX_ID 2 | 37 | #define VXGE_ALARM_MSIX_ID 2 |
@@ -53,11 +56,13 @@ | |||
53 | 56 | ||
54 | #define VXGE_TTI_BTIMER_VAL 250000 | 57 | #define VXGE_TTI_BTIMER_VAL 250000 |
55 | 58 | ||
56 | #define VXGE_TTI_LTIMER_VAL 1000 | 59 | #define VXGE_TTI_LTIMER_VAL 1000 |
57 | #define VXGE_TTI_RTIMER_VAL 0 | 60 | #define VXGE_T1A_TTI_LTIMER_VAL 80 |
58 | #define VXGE_RTI_BTIMER_VAL 250 | 61 | #define VXGE_TTI_RTIMER_VAL 0 |
59 | #define VXGE_RTI_LTIMER_VAL 100 | 62 | #define VXGE_T1A_TTI_RTIMER_VAL 400 |
60 | #define VXGE_RTI_RTIMER_VAL 0 | 63 | #define VXGE_RTI_BTIMER_VAL 250 |
64 | #define VXGE_RTI_LTIMER_VAL 100 | ||
65 | #define VXGE_RTI_RTIMER_VAL 0 | ||
61 | #define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH | 66 | #define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH |
62 | #define VXGE_ISR_POLLING_CNT 8 | 67 | #define VXGE_ISR_POLLING_CNT 8 |
63 | #define VXGE_MAX_CONFIG_DEV 0xFF | 68 | #define VXGE_MAX_CONFIG_DEV 0xFF |
@@ -76,14 +81,32 @@ | |||
76 | #define TTI_TX_UFC_B 40 | 81 | #define TTI_TX_UFC_B 40 |
77 | #define TTI_TX_UFC_C 60 | 82 | #define TTI_TX_UFC_C 60 |
78 | #define TTI_TX_UFC_D 100 | 83 | #define TTI_TX_UFC_D 100 |
84 | #define TTI_T1A_TX_UFC_A 30 | ||
85 | #define TTI_T1A_TX_UFC_B 80 | ||
86 | /* Slope - (max_mtu - min_mtu)/(max_mtu_ufc - min_mtu_ufc) */ | ||
87 | /* Slope - 93 */ | ||
88 | /* 60 - 9k Mtu, 140 - 1.5k mtu */ | ||
89 | #define TTI_T1A_TX_UFC_C(mtu) (60 + ((VXGE_HW_MAX_MTU - mtu) / 93)) | ||
90 | |||
91 | /* Slope - 37 */ | ||
92 | /* 100 - 9k Mtu, 300 - 1.5k mtu */ | ||
93 | #define TTI_T1A_TX_UFC_D(mtu) (100 + ((VXGE_HW_MAX_MTU - mtu) / 37)) | ||
94 | |||
95 | |||
96 | #define RTI_RX_URANGE_A 5 | ||
97 | #define RTI_RX_URANGE_B 15 | ||
98 | #define RTI_RX_URANGE_C 40 | ||
99 | #define RTI_T1A_RX_URANGE_A 1 | ||
100 | #define RTI_T1A_RX_URANGE_B 20 | ||
101 | #define RTI_T1A_RX_URANGE_C 50 | ||
102 | #define RTI_RX_UFC_A 1 | ||
103 | #define RTI_RX_UFC_B 5 | ||
104 | #define RTI_RX_UFC_C 10 | ||
105 | #define RTI_RX_UFC_D 15 | ||
106 | #define RTI_T1A_RX_UFC_B 20 | ||
107 | #define RTI_T1A_RX_UFC_C 50 | ||
108 | #define RTI_T1A_RX_UFC_D 60 | ||
79 | 109 | ||
80 | #define RTI_RX_URANGE_A 5 | ||
81 | #define RTI_RX_URANGE_B 15 | ||
82 | #define RTI_RX_URANGE_C 40 | ||
83 | #define RTI_RX_UFC_A 1 | ||
84 | #define RTI_RX_UFC_B 5 | ||
85 | #define RTI_RX_UFC_C 10 | ||
86 | #define RTI_RX_UFC_D 15 | ||
87 | 110 | ||
88 | /* Milli secs timer period */ | 111 | /* Milli secs timer period */ |
89 | #define VXGE_TIMER_DELAY 10000 | 112 | #define VXGE_TIMER_DELAY 10000 |
@@ -145,15 +168,15 @@ struct vxge_config { | |||
145 | 168 | ||
146 | int addr_learn_en; | 169 | int addr_learn_en; |
147 | 170 | ||
148 | int rth_steering; | 171 | u32 rth_steering:2, |
149 | int rth_algorithm; | 172 | rth_algorithm:2, |
150 | int rth_hash_type_tcpipv4; | 173 | rth_hash_type_tcpipv4:1, |
151 | int rth_hash_type_ipv4; | 174 | rth_hash_type_ipv4:1, |
152 | int rth_hash_type_tcpipv6; | 175 | rth_hash_type_tcpipv6:1, |
153 | int rth_hash_type_ipv6; | 176 | rth_hash_type_ipv6:1, |
154 | int rth_hash_type_tcpipv6ex; | 177 | rth_hash_type_tcpipv6ex:1, |
155 | int rth_hash_type_ipv6ex; | 178 | rth_hash_type_ipv6ex:1, |
156 | int rth_bkt_sz; | 179 | rth_bkt_sz:8; |
157 | int rth_jhash_golden_ratio; | 180 | int rth_jhash_golden_ratio; |
158 | int tx_steering_type; | 181 | int tx_steering_type; |
159 | int fifo_indicate_max_pkts; | 182 | int fifo_indicate_max_pkts; |
@@ -248,8 +271,9 @@ struct vxge_ring { | |||
248 | */ | 271 | */ |
249 | int driver_id; | 272 | int driver_id; |
250 | 273 | ||
251 | /* copy of the flag indicating whether rx_csum is to be used */ | 274 | /* copy of the flag indicating whether rx_csum is to be used */ |
252 | u32 rx_csum; | 275 | u32 rx_csum:1, |
276 | rx_hwts:1; | ||
253 | 277 | ||
254 | int pkts_processed; | 278 | int pkts_processed; |
255 | int budget; | 279 | int budget; |
@@ -281,8 +305,8 @@ struct vxge_vpath { | |||
281 | int is_configured; | 305 | int is_configured; |
282 | int is_open; | 306 | int is_open; |
283 | struct vxgedev *vdev; | 307 | struct vxgedev *vdev; |
284 | u8 (macaddr)[ETH_ALEN]; | 308 | u8 macaddr[ETH_ALEN]; |
285 | u8 (macmask)[ETH_ALEN]; | 309 | u8 macmask[ETH_ALEN]; |
286 | 310 | ||
287 | #define VXGE_MAX_LEARN_MAC_ADDR_CNT 2048 | 311 | #define VXGE_MAX_LEARN_MAC_ADDR_CNT 2048 |
288 | /* mac addresses currently programmed into NIC */ | 312 | /* mac addresses currently programmed into NIC */ |
@@ -327,7 +351,9 @@ struct vxgedev { | |||
327 | u16 all_multi_flg; | 351 | u16 all_multi_flg; |
328 | 352 | ||
329 | /* A flag indicating whether rx_csum is to be used or not. */ | 353 | /* A flag indicating whether rx_csum is to be used or not. */ |
330 | u32 rx_csum; | 354 | u32 rx_csum:1, |
355 | rx_hwts:1, | ||
356 | titan1:1; | ||
331 | 357 | ||
332 | struct vxge_msix_entry *vxge_entries; | 358 | struct vxge_msix_entry *vxge_entries; |
333 | struct msix_entry *entries; | 359 | struct msix_entry *entries; |
@@ -369,6 +395,7 @@ struct vxgedev { | |||
369 | u32 level_err; | 395 | u32 level_err; |
370 | u32 level_trace; | 396 | u32 level_trace; |
371 | char fw_version[VXGE_HW_FW_STRLEN]; | 397 | char fw_version[VXGE_HW_FW_STRLEN]; |
398 | struct work_struct reset_task; | ||
372 | }; | 399 | }; |
373 | 400 | ||
374 | struct vxge_rx_priv { | 401 | struct vxge_rx_priv { |
@@ -387,8 +414,6 @@ struct vxge_tx_priv { | |||
387 | static int p = val; \ | 414 | static int p = val; \ |
388 | module_param(p, int, 0) | 415 | module_param(p, int, 0) |
389 | 416 | ||
390 | #define vxge_os_bug(fmt...) { printk(fmt); BUG(); } | ||
391 | |||
392 | #define vxge_os_timer(timer, handle, arg, exp) do { \ | 417 | #define vxge_os_timer(timer, handle, arg, exp) do { \ |
393 | init_timer(&timer); \ | 418 | init_timer(&timer); \ |
394 | timer.function = handle; \ | 419 | timer.function = handle; \ |
@@ -396,7 +421,10 @@ struct vxge_tx_priv { | |||
396 | mod_timer(&timer, (jiffies + exp)); \ | 421 | mod_timer(&timer, (jiffies + exp)); \ |
397 | } while (0); | 422 | } while (0); |
398 | 423 | ||
399 | extern void vxge_initialize_ethtool_ops(struct net_device *ndev); | 424 | void vxge_initialize_ethtool_ops(struct net_device *ndev); |
425 | enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev); | ||
426 | int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override); | ||
427 | |||
400 | /** | 428 | /** |
401 | * #define VXGE_DEBUG_INIT: debug for initialization functions | 429 | * #define VXGE_DEBUG_INIT: debug for initialization functions |
402 | * #define VXGE_DEBUG_TX : debug transmit related functions | 430 | * #define VXGE_DEBUG_TX : debug transmit related functions |