diff options
Diffstat (limited to 'drivers/net/usb/r8152.c')
-rw-r--r-- | drivers/net/usb/r8152.c | 918 |
1 files changed, 780 insertions, 138 deletions
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c index 51073721e224..adb12f349a61 100644 --- a/drivers/net/usb/r8152.c +++ b/drivers/net/usb/r8152.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2013 Realtek Semiconductor Corp. All rights reserved. | 2 | * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or | 4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License | 5 | * modify it under the terms of the GNU General Public License |
@@ -7,7 +7,6 @@ | |||
7 | * | 7 | * |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/signal.h> | 10 | #include <linux/signal.h> |
12 | #include <linux/slab.h> | 11 | #include <linux/slab.h> |
13 | #include <linux/module.h> | 12 | #include <linux/module.h> |
@@ -24,9 +23,9 @@ | |||
24 | #include <linux/ipv6.h> | 23 | #include <linux/ipv6.h> |
25 | 24 | ||
26 | /* Version Information */ | 25 | /* Version Information */ |
27 | #define DRIVER_VERSION "v1.02.0 (2013/10/28)" | 26 | #define DRIVER_VERSION "v1.04.0 (2014/01/15)" |
28 | #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>" | 27 | #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>" |
29 | #define DRIVER_DESC "Realtek RTL8152 Based USB 2.0 Ethernet Adapters" | 28 | #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" |
30 | #define MODULENAME "r8152" | 29 | #define MODULENAME "r8152" |
31 | 30 | ||
32 | #define R8152_PHY_ID 32 | 31 | #define R8152_PHY_ID 32 |
@@ -39,15 +38,24 @@ | |||
39 | #define PLA_RXFIFO_CTRL2 0xc0a8 | 38 | #define PLA_RXFIFO_CTRL2 0xc0a8 |
40 | #define PLA_FMC 0xc0b4 | 39 | #define PLA_FMC 0xc0b4 |
41 | #define PLA_CFG_WOL 0xc0b6 | 40 | #define PLA_CFG_WOL 0xc0b6 |
41 | #define PLA_TEREDO_CFG 0xc0bc | ||
42 | #define PLA_MAR 0xcd00 | 42 | #define PLA_MAR 0xcd00 |
43 | #define PLA_BACKUP 0xd000 | ||
43 | #define PAL_BDC_CR 0xd1a0 | 44 | #define PAL_BDC_CR 0xd1a0 |
45 | #define PLA_TEREDO_TIMER 0xd2cc | ||
46 | #define PLA_REALWOW_TIMER 0xd2e8 | ||
44 | #define PLA_LEDSEL 0xdd90 | 47 | #define PLA_LEDSEL 0xdd90 |
45 | #define PLA_LED_FEATURE 0xdd92 | 48 | #define PLA_LED_FEATURE 0xdd92 |
46 | #define PLA_PHYAR 0xde00 | 49 | #define PLA_PHYAR 0xde00 |
50 | #define PLA_BOOT_CTRL 0xe004 | ||
47 | #define PLA_GPHY_INTR_IMR 0xe022 | 51 | #define PLA_GPHY_INTR_IMR 0xe022 |
48 | #define PLA_EEE_CR 0xe040 | 52 | #define PLA_EEE_CR 0xe040 |
49 | #define PLA_EEEP_CR 0xe080 | 53 | #define PLA_EEEP_CR 0xe080 |
50 | #define PLA_MAC_PWR_CTRL 0xe0c0 | 54 | #define PLA_MAC_PWR_CTRL 0xe0c0 |
55 | #define PLA_MAC_PWR_CTRL2 0xe0ca | ||
56 | #define PLA_MAC_PWR_CTRL3 0xe0cc | ||
57 | #define PLA_MAC_PWR_CTRL4 0xe0ce | ||
58 | #define PLA_WDT6_CTRL 0xe428 | ||
51 | #define PLA_TCR0 0xe610 | 59 | #define PLA_TCR0 0xe610 |
52 | #define PLA_TCR1 0xe612 | 60 | #define PLA_TCR1 0xe612 |
53 | #define PLA_TXFIFO_CTRL 0xe618 | 61 | #define PLA_TXFIFO_CTRL 0xe618 |
@@ -73,16 +81,25 @@ | |||
73 | #define PLA_BP_5 0xfc32 | 81 | #define PLA_BP_5 0xfc32 |
74 | #define PLA_BP_6 0xfc34 | 82 | #define PLA_BP_6 0xfc34 |
75 | #define PLA_BP_7 0xfc36 | 83 | #define PLA_BP_7 0xfc36 |
84 | #define PLA_BP_EN 0xfc38 | ||
76 | 85 | ||
86 | #define USB_U2P3_CTRL 0xb460 | ||
77 | #define USB_DEV_STAT 0xb808 | 87 | #define USB_DEV_STAT 0xb808 |
78 | #define USB_USB_CTRL 0xd406 | 88 | #define USB_USB_CTRL 0xd406 |
79 | #define USB_PHY_CTRL 0xd408 | 89 | #define USB_PHY_CTRL 0xd408 |
80 | #define USB_TX_AGG 0xd40a | 90 | #define USB_TX_AGG 0xd40a |
81 | #define USB_RX_BUF_TH 0xd40c | 91 | #define USB_RX_BUF_TH 0xd40c |
82 | #define USB_USB_TIMER 0xd428 | 92 | #define USB_USB_TIMER 0xd428 |
93 | #define USB_RX_EARLY_AGG 0xd42c | ||
83 | #define USB_PM_CTRL_STATUS 0xd432 | 94 | #define USB_PM_CTRL_STATUS 0xd432 |
84 | #define USB_TX_DMA 0xd434 | 95 | #define USB_TX_DMA 0xd434 |
96 | #define USB_TOLERANCE 0xd490 | ||
97 | #define USB_LPM_CTRL 0xd41a | ||
85 | #define USB_UPS_CTRL 0xd800 | 98 | #define USB_UPS_CTRL 0xd800 |
99 | #define USB_MISC_0 0xd81a | ||
100 | #define USB_POWER_CUT 0xd80a | ||
101 | #define USB_AFE_CTRL2 0xd824 | ||
102 | #define USB_WDT11_CTRL 0xe43c | ||
86 | #define USB_BP_BA 0xfc26 | 103 | #define USB_BP_BA 0xfc26 |
87 | #define USB_BP_0 0xfc28 | 104 | #define USB_BP_0 0xfc28 |
88 | #define USB_BP_1 0xfc2a | 105 | #define USB_BP_1 0xfc2a |
@@ -92,14 +109,30 @@ | |||
92 | #define USB_BP_5 0xfc32 | 109 | #define USB_BP_5 0xfc32 |
93 | #define USB_BP_6 0xfc34 | 110 | #define USB_BP_6 0xfc34 |
94 | #define USB_BP_7 0xfc36 | 111 | #define USB_BP_7 0xfc36 |
112 | #define USB_BP_EN 0xfc38 | ||
95 | 113 | ||
96 | /* OCP Registers */ | 114 | /* OCP Registers */ |
97 | #define OCP_ALDPS_CONFIG 0x2010 | 115 | #define OCP_ALDPS_CONFIG 0x2010 |
98 | #define OCP_EEE_CONFIG1 0x2080 | 116 | #define OCP_EEE_CONFIG1 0x2080 |
99 | #define OCP_EEE_CONFIG2 0x2092 | 117 | #define OCP_EEE_CONFIG2 0x2092 |
100 | #define OCP_EEE_CONFIG3 0x2094 | 118 | #define OCP_EEE_CONFIG3 0x2094 |
119 | #define OCP_BASE_MII 0xa400 | ||
101 | #define OCP_EEE_AR 0xa41a | 120 | #define OCP_EEE_AR 0xa41a |
102 | #define OCP_EEE_DATA 0xa41c | 121 | #define OCP_EEE_DATA 0xa41c |
122 | #define OCP_PHY_STATUS 0xa420 | ||
123 | #define OCP_POWER_CFG 0xa430 | ||
124 | #define OCP_EEE_CFG 0xa432 | ||
125 | #define OCP_SRAM_ADDR 0xa436 | ||
126 | #define OCP_SRAM_DATA 0xa438 | ||
127 | #define OCP_DOWN_SPEED 0xa442 | ||
128 | #define OCP_EEE_CFG2 0xa5d0 | ||
129 | #define OCP_ADC_CFG 0xbc06 | ||
130 | |||
131 | /* SRAM Register */ | ||
132 | #define SRAM_LPF_CFG 0x8012 | ||
133 | #define SRAM_10M_AMP1 0x8080 | ||
134 | #define SRAM_10M_AMP2 0x8082 | ||
135 | #define SRAM_IMPEDANCE 0x8084 | ||
103 | 136 | ||
104 | /* PLA_RCR */ | 137 | /* PLA_RCR */ |
105 | #define RCR_AAP 0x00000001 | 138 | #define RCR_AAP 0x00000001 |
@@ -116,14 +149,17 @@ | |||
116 | #define RXFIFO_THR2_FULL 0x00000060 | 149 | #define RXFIFO_THR2_FULL 0x00000060 |
117 | #define RXFIFO_THR2_HIGH 0x00000038 | 150 | #define RXFIFO_THR2_HIGH 0x00000038 |
118 | #define RXFIFO_THR2_OOB 0x0000004a | 151 | #define RXFIFO_THR2_OOB 0x0000004a |
152 | #define RXFIFO_THR2_NORMAL 0x00a0 | ||
119 | 153 | ||
120 | /* PLA_RXFIFO_CTRL2 */ | 154 | /* PLA_RXFIFO_CTRL2 */ |
121 | #define RXFIFO_THR3_FULL 0x00000078 | 155 | #define RXFIFO_THR3_FULL 0x00000078 |
122 | #define RXFIFO_THR3_HIGH 0x00000048 | 156 | #define RXFIFO_THR3_HIGH 0x00000048 |
123 | #define RXFIFO_THR3_OOB 0x0000005a | 157 | #define RXFIFO_THR3_OOB 0x0000005a |
158 | #define RXFIFO_THR3_NORMAL 0x0110 | ||
124 | 159 | ||
125 | /* PLA_TXFIFO_CTRL */ | 160 | /* PLA_TXFIFO_CTRL */ |
126 | #define TXFIFO_THR_NORMAL 0x00400008 | 161 | #define TXFIFO_THR_NORMAL 0x00400008 |
162 | #define TXFIFO_THR_NORMAL2 0x01000008 | ||
127 | 163 | ||
128 | /* PLA_FMC */ | 164 | /* PLA_FMC */ |
129 | #define FMC_FCR_MCU_EN 0x0001 | 165 | #define FMC_FCR_MCU_EN 0x0001 |
@@ -131,6 +167,9 @@ | |||
131 | /* PLA_EEEP_CR */ | 167 | /* PLA_EEEP_CR */ |
132 | #define EEEP_CR_EEEP_TX 0x0002 | 168 | #define EEEP_CR_EEEP_TX 0x0002 |
133 | 169 | ||
170 | /* PLA_WDT6_CTRL */ | ||
171 | #define WDT6_SET_MODE 0x0010 | ||
172 | |||
134 | /* PLA_TCR0 */ | 173 | /* PLA_TCR0 */ |
135 | #define TCR0_TX_EMPTY 0x0800 | 174 | #define TCR0_TX_EMPTY 0x0800 |
136 | #define TCR0_AUTO_FIFO 0x0080 | 175 | #define TCR0_AUTO_FIFO 0x0080 |
@@ -168,6 +207,12 @@ | |||
168 | /* PLA_CFG_WOL */ | 207 | /* PLA_CFG_WOL */ |
169 | #define MAGIC_EN 0x0001 | 208 | #define MAGIC_EN 0x0001 |
170 | 209 | ||
210 | /* PLA_TEREDO_CFG */ | ||
211 | #define TEREDO_SEL 0x8000 | ||
212 | #define TEREDO_WAKE_MASK 0x7f00 | ||
213 | #define TEREDO_RS_EVENT_MASK 0x00fe | ||
214 | #define OOB_TEREDO_EN 0x0001 | ||
215 | |||
171 | /* PAL_BDC_CR */ | 216 | /* PAL_BDC_CR */ |
172 | #define ALDPS_PROXY_MODE 0x0001 | 217 | #define ALDPS_PROXY_MODE 0x0001 |
173 | 218 | ||
@@ -185,6 +230,25 @@ | |||
185 | #define D3_CLK_GATED_EN 0x00004000 | 230 | #define D3_CLK_GATED_EN 0x00004000 |
186 | #define MCU_CLK_RATIO 0x07010f07 | 231 | #define MCU_CLK_RATIO 0x07010f07 |
187 | #define MCU_CLK_RATIO_MASK 0x0f0f0f0f | 232 | #define MCU_CLK_RATIO_MASK 0x0f0f0f0f |
233 | #define ALDPS_SPDWN_RATIO 0x0f87 | ||
234 | |||
235 | /* PLA_MAC_PWR_CTRL2 */ | ||
236 | #define EEE_SPDWN_RATIO 0x8007 | ||
237 | |||
238 | /* PLA_MAC_PWR_CTRL3 */ | ||
239 | #define PKT_AVAIL_SPDWN_EN 0x0100 | ||
240 | #define SUSPEND_SPDWN_EN 0x0004 | ||
241 | #define U1U2_SPDWN_EN 0x0002 | ||
242 | #define L1_SPDWN_EN 0x0001 | ||
243 | |||
244 | /* PLA_MAC_PWR_CTRL4 */ | ||
245 | #define PWRSAVE_SPDWN_EN 0x1000 | ||
246 | #define RXDV_SPDWN_EN 0x0800 | ||
247 | #define TX10MIDLE_EN 0x0100 | ||
248 | #define TP100_SPDWN_EN 0x0020 | ||
249 | #define TP500_SPDWN_EN 0x0010 | ||
250 | #define TP1000_SPDWN_EN 0x0008 | ||
251 | #define EEE_SPDWN_EN 0x0001 | ||
188 | 252 | ||
189 | /* PLA_GPHY_INTR_IMR */ | 253 | /* PLA_GPHY_INTR_IMR */ |
190 | #define GPHY_STS_MSK 0x0001 | 254 | #define GPHY_STS_MSK 0x0001 |
@@ -199,6 +263,9 @@ | |||
199 | #define EEE_RX_EN 0x0001 | 263 | #define EEE_RX_EN 0x0001 |
200 | #define EEE_TX_EN 0x0002 | 264 | #define EEE_TX_EN 0x0002 |
201 | 265 | ||
266 | /* PLA_BOOT_CTRL */ | ||
267 | #define AUTOLOAD_DONE 0x0002 | ||
268 | |||
202 | /* USB_DEV_STAT */ | 269 | /* USB_DEV_STAT */ |
203 | #define STAT_SPEED_MASK 0x0006 | 270 | #define STAT_SPEED_MASK 0x0006 |
204 | #define STAT_SPEED_HIGH 0x0000 | 271 | #define STAT_SPEED_HIGH 0x0000 |
@@ -208,7 +275,9 @@ | |||
208 | #define TX_AGG_MAX_THRESHOLD 0x03 | 275 | #define TX_AGG_MAX_THRESHOLD 0x03 |
209 | 276 | ||
210 | /* USB_RX_BUF_TH */ | 277 | /* USB_RX_BUF_TH */ |
211 | #define RX_BUF_THR 0x7a120180 | 278 | #define RX_THR_SUPPER 0x0c350180 |
279 | #define RX_THR_HIGH 0x7a120180 | ||
280 | #define RX_THR_SLOW 0xffff0180 | ||
212 | 281 | ||
213 | /* USB_TX_DMA */ | 282 | /* USB_TX_DMA */ |
214 | #define TEST_MODE_DISABLE 0x00000001 | 283 | #define TEST_MODE_DISABLE 0x00000001 |
@@ -218,17 +287,55 @@ | |||
218 | #define POWER_CUT 0x0100 | 287 | #define POWER_CUT 0x0100 |
219 | 288 | ||
220 | /* USB_PM_CTRL_STATUS */ | 289 | /* USB_PM_CTRL_STATUS */ |
221 | #define RWSUME_INDICATE 0x0001 | 290 | #define RESUME_INDICATE 0x0001 |
222 | 291 | ||
223 | /* USB_USB_CTRL */ | 292 | /* USB_USB_CTRL */ |
224 | #define RX_AGG_DISABLE 0x0010 | 293 | #define RX_AGG_DISABLE 0x0010 |
225 | 294 | ||
295 | /* USB_U2P3_CTRL */ | ||
296 | #define U2P3_ENABLE 0x0001 | ||
297 | |||
298 | /* USB_POWER_CUT */ | ||
299 | #define PWR_EN 0x0001 | ||
300 | #define PHASE2_EN 0x0008 | ||
301 | |||
302 | /* USB_MISC_0 */ | ||
303 | #define PCUT_STATUS 0x0001 | ||
304 | |||
305 | /* USB_RX_EARLY_AGG */ | ||
306 | #define EARLY_AGG_SUPPER 0x0e832981 | ||
307 | #define EARLY_AGG_HIGH 0x0e837a12 | ||
308 | #define EARLY_AGG_SLOW 0x0e83ffff | ||
309 | |||
310 | /* USB_WDT11_CTRL */ | ||
311 | #define TIMER11_EN 0x0001 | ||
312 | |||
313 | /* USB_LPM_CTRL */ | ||
314 | #define LPM_TIMER_MASK 0x0c | ||
315 | #define LPM_TIMER_500MS 0x04 /* 500 ms */ | ||
316 | #define LPM_TIMER_500US 0x0c /* 500 us */ | ||
317 | |||
318 | /* USB_AFE_CTRL2 */ | ||
319 | #define SEN_VAL_MASK 0xf800 | ||
320 | #define SEN_VAL_NORMAL 0xa000 | ||
321 | #define SEL_RXIDLE 0x0100 | ||
322 | |||
226 | /* OCP_ALDPS_CONFIG */ | 323 | /* OCP_ALDPS_CONFIG */ |
227 | #define ENPWRSAVE 0x8000 | 324 | #define ENPWRSAVE 0x8000 |
228 | #define ENPDNPS 0x0200 | 325 | #define ENPDNPS 0x0200 |
229 | #define LINKENA 0x0100 | 326 | #define LINKENA 0x0100 |
230 | #define DIS_SDSAVE 0x0010 | 327 | #define DIS_SDSAVE 0x0010 |
231 | 328 | ||
329 | /* OCP_PHY_STATUS */ | ||
330 | #define PHY_STAT_MASK 0x0007 | ||
331 | #define PHY_STAT_LAN_ON 3 | ||
332 | #define PHY_STAT_PWRDN 5 | ||
333 | |||
334 | /* OCP_POWER_CFG */ | ||
335 | #define EEE_CLKDIV_EN 0x8000 | ||
336 | #define EN_ALDPS 0x0004 | ||
337 | #define EN_10M_PLLOFF 0x0001 | ||
338 | |||
232 | /* OCP_EEE_CONFIG1 */ | 339 | /* OCP_EEE_CONFIG1 */ |
233 | #define RG_TXLPI_MSK_HFDUP 0x8000 | 340 | #define RG_TXLPI_MSK_HFDUP 0x8000 |
234 | #define RG_MATCLR_EN 0x4000 | 341 | #define RG_MATCLR_EN 0x4000 |
@@ -263,7 +370,36 @@ | |||
263 | #define EEE_ADDR 0x003C | 370 | #define EEE_ADDR 0x003C |
264 | #define EEE_DATA 0x0002 | 371 | #define EEE_DATA 0x0002 |
265 | 372 | ||
373 | /* OCP_EEE_CFG */ | ||
374 | #define CTAP_SHORT_EN 0x0040 | ||
375 | #define EEE10_EN 0x0010 | ||
376 | |||
377 | /* OCP_DOWN_SPEED */ | ||
378 | #define EN_10M_BGOFF 0x0080 | ||
379 | |||
380 | /* OCP_EEE_CFG2 */ | ||
381 | #define MY1000_EEE 0x0004 | ||
382 | #define MY100_EEE 0x0002 | ||
383 | |||
384 | /* OCP_ADC_CFG */ | ||
385 | #define CKADSEL_L 0x0100 | ||
386 | #define ADC_EN 0x0080 | ||
387 | #define EN_EMI_L 0x0040 | ||
388 | |||
389 | /* SRAM_LPF_CFG */ | ||
390 | #define LPF_AUTO_TUNE 0x8000 | ||
391 | |||
392 | /* SRAM_10M_AMP1 */ | ||
393 | #define GDAC_IB_UPALL 0x0008 | ||
394 | |||
395 | /* SRAM_10M_AMP2 */ | ||
396 | #define AMP_DN 0x0200 | ||
397 | |||
398 | /* SRAM_IMPEDANCE */ | ||
399 | #define RX_DRIVING_MASK 0x6000 | ||
400 | |||
266 | enum rtl_register_content { | 401 | enum rtl_register_content { |
402 | _1000bps = 0x10, | ||
267 | _100bps = 0x08, | 403 | _100bps = 0x08, |
268 | _10bps = 0x04, | 404 | _10bps = 0x04, |
269 | LINK_STATUS = 0x02, | 405 | LINK_STATUS = 0x02, |
@@ -273,6 +409,9 @@ enum rtl_register_content { | |||
273 | #define RTL8152_MAX_TX 10 | 409 | #define RTL8152_MAX_TX 10 |
274 | #define RTL8152_MAX_RX 10 | 410 | #define RTL8152_MAX_RX 10 |
275 | #define INTBUFSIZE 2 | 411 | #define INTBUFSIZE 2 |
412 | #define CRC_SIZE 4 | ||
413 | #define TX_ALIGN 4 | ||
414 | #define RX_ALIGN 8 | ||
276 | 415 | ||
277 | #define INTR_LINK 0x0004 | 416 | #define INTR_LINK 0x0004 |
278 | 417 | ||
@@ -302,6 +441,10 @@ enum rtl8152_flags { | |||
302 | /* Define these values to match your device */ | 441 | /* Define these values to match your device */ |
303 | #define VENDOR_ID_REALTEK 0x0bda | 442 | #define VENDOR_ID_REALTEK 0x0bda |
304 | #define PRODUCT_ID_RTL8152 0x8152 | 443 | #define PRODUCT_ID_RTL8152 0x8152 |
444 | #define PRODUCT_ID_RTL8153 0x8153 | ||
445 | |||
446 | #define VENDOR_ID_SAMSUNG 0x04e8 | ||
447 | #define PRODUCT_ID_SAMSUNG 0xa101 | ||
305 | 448 | ||
306 | #define MCU_TYPE_PLA 0x0100 | 449 | #define MCU_TYPE_PLA 0x0100 |
307 | #define MCU_TYPE_USB 0x0000 | 450 | #define MCU_TYPE_USB 0x0000 |
@@ -363,6 +506,15 @@ struct r8152 { | |||
363 | spinlock_t rx_lock, tx_lock; | 506 | spinlock_t rx_lock, tx_lock; |
364 | struct delayed_work schedule; | 507 | struct delayed_work schedule; |
365 | struct mii_if_info mii; | 508 | struct mii_if_info mii; |
509 | |||
510 | struct rtl_ops { | ||
511 | void (*init)(struct r8152 *); | ||
512 | int (*enable)(struct r8152 *); | ||
513 | void (*disable)(struct r8152 *); | ||
514 | void (*down)(struct r8152 *); | ||
515 | void (*unload)(struct r8152 *); | ||
516 | } rtl_ops; | ||
517 | |||
366 | int intr_interval; | 518 | int intr_interval; |
367 | u32 msg_enable; | 519 | u32 msg_enable; |
368 | u32 tx_qlen; | 520 | u32 tx_qlen; |
@@ -375,7 +527,11 @@ struct r8152 { | |||
375 | enum rtl_version { | 527 | enum rtl_version { |
376 | RTL_VER_UNKNOWN = 0, | 528 | RTL_VER_UNKNOWN = 0, |
377 | RTL_VER_01, | 529 | RTL_VER_01, |
378 | RTL_VER_02 | 530 | RTL_VER_02, |
531 | RTL_VER_03, | ||
532 | RTL_VER_04, | ||
533 | RTL_VER_05, | ||
534 | RTL_VER_MAX | ||
379 | }; | 535 | }; |
380 | 536 | ||
381 | /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). | 537 | /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
@@ -427,8 +583,8 @@ int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data) | |||
427 | static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size, | 583 | static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size, |
428 | void *data, u16 type) | 584 | void *data, u16 type) |
429 | { | 585 | { |
430 | u16 limit = 64; | 586 | u16 limit = 64; |
431 | int ret = 0; | 587 | int ret = 0; |
432 | 588 | ||
433 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) | 589 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
434 | return -ENODEV; | 590 | return -ENODEV; |
@@ -467,9 +623,9 @@ static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size, | |||
467 | static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen, | 623 | static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen, |
468 | u16 size, void *data, u16 type) | 624 | u16 size, void *data, u16 type) |
469 | { | 625 | { |
470 | int ret; | 626 | int ret; |
471 | u16 byteen_start, byteen_end, byen; | 627 | u16 byteen_start, byteen_end, byen; |
472 | u16 limit = 512; | 628 | u16 limit = 512; |
473 | 629 | ||
474 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) | 630 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
475 | return -ENODEV; | 631 | return -ENODEV; |
@@ -653,45 +809,54 @@ static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data) | |||
653 | generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type); | 809 | generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type); |
654 | } | 810 | } |
655 | 811 | ||
656 | static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value) | 812 | static u16 ocp_reg_read(struct r8152 *tp, u16 addr) |
657 | { | 813 | { |
658 | u32 ocp_data; | 814 | u16 ocp_base, ocp_index; |
659 | int i; | ||
660 | 815 | ||
661 | ocp_data = PHYAR_FLAG | ((reg_addr & 0x1f) << 16) | | 816 | ocp_base = addr & 0xf000; |
662 | (value & 0xffff); | 817 | if (ocp_base != tp->ocp_base) { |
818 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base); | ||
819 | tp->ocp_base = ocp_base; | ||
820 | } | ||
663 | 821 | ||
664 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data); | 822 | ocp_index = (addr & 0x0fff) | 0xb000; |
823 | return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index); | ||
824 | } | ||
665 | 825 | ||
666 | for (i = 20; i > 0; i--) { | 826 | static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data) |
667 | udelay(25); | 827 | { |
668 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR); | 828 | u16 ocp_base, ocp_index; |
669 | if (!(ocp_data & PHYAR_FLAG)) | 829 | |
670 | break; | 830 | ocp_base = addr & 0xf000; |
831 | if (ocp_base != tp->ocp_base) { | ||
832 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base); | ||
833 | tp->ocp_base = ocp_base; | ||
671 | } | 834 | } |
672 | udelay(20); | 835 | |
836 | ocp_index = (addr & 0x0fff) | 0xb000; | ||
837 | ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data); | ||
673 | } | 838 | } |
674 | 839 | ||
675 | static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr) | 840 | static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value) |
676 | { | 841 | { |
677 | u32 ocp_data; | 842 | ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value); |
678 | int i; | 843 | } |
679 | |||
680 | ocp_data = (reg_addr & 0x1f) << 16; | ||
681 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data); | ||
682 | 844 | ||
683 | for (i = 20; i > 0; i--) { | 845 | static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr) |
684 | udelay(25); | 846 | { |
685 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR); | 847 | return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2); |
686 | if (ocp_data & PHYAR_FLAG) | 848 | } |
687 | break; | ||
688 | } | ||
689 | udelay(20); | ||
690 | 849 | ||
691 | if (!(ocp_data & PHYAR_FLAG)) | 850 | static void sram_write(struct r8152 *tp, u16 addr, u16 data) |
692 | return -EAGAIN; | 851 | { |
852 | ocp_reg_write(tp, OCP_SRAM_ADDR, addr); | ||
853 | ocp_reg_write(tp, OCP_SRAM_DATA, data); | ||
854 | } | ||
693 | 855 | ||
694 | return (u16)(ocp_data & 0xffff); | 856 | static u16 sram_read(struct r8152 *tp, u16 addr) |
857 | { | ||
858 | ocp_reg_write(tp, OCP_SRAM_ADDR, addr); | ||
859 | return ocp_reg_read(tp, OCP_SRAM_DATA); | ||
695 | } | 860 | } |
696 | 861 | ||
697 | static int read_mii_word(struct net_device *netdev, int phy_id, int reg) | 862 | static int read_mii_word(struct net_device *netdev, int phy_id, int reg) |
@@ -715,20 +880,6 @@ void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val) | |||
715 | r8152_mdio_write(tp, reg, val); | 880 | r8152_mdio_write(tp, reg, val); |
716 | } | 881 | } |
717 | 882 | ||
718 | static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data) | ||
719 | { | ||
720 | u16 ocp_base, ocp_index; | ||
721 | |||
722 | ocp_base = addr & 0xf000; | ||
723 | if (ocp_base != tp->ocp_base) { | ||
724 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base); | ||
725 | tp->ocp_base = ocp_base; | ||
726 | } | ||
727 | |||
728 | ocp_index = (addr & 0x0fff) | 0xb000; | ||
729 | ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data); | ||
730 | } | ||
731 | |||
732 | static | 883 | static |
733 | int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags); | 884 | int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags); |
734 | 885 | ||
@@ -814,10 +965,12 @@ static void read_bulk_callback(struct urb *urb) | |||
814 | case -ENOENT: | 965 | case -ENOENT: |
815 | return; /* the urb is in unlink state */ | 966 | return; /* the urb is in unlink state */ |
816 | case -ETIME: | 967 | case -ETIME: |
817 | pr_warn_ratelimited("may be reset is needed?..\n"); | 968 | if (net_ratelimit()) |
969 | netdev_warn(netdev, "maybe reset is needed?\n"); | ||
818 | break; | 970 | break; |
819 | default: | 971 | default: |
820 | pr_warn_ratelimited("Rx status %d\n", status); | 972 | if (net_ratelimit()) |
973 | netdev_warn(netdev, "Rx status %d\n", status); | ||
821 | break; | 974 | break; |
822 | } | 975 | } |
823 | 976 | ||
@@ -850,7 +1003,8 @@ static void write_bulk_callback(struct urb *urb) | |||
850 | 1003 | ||
851 | stats = rtl8152_get_stats(tp->netdev); | 1004 | stats = rtl8152_get_stats(tp->netdev); |
852 | if (status) { | 1005 | if (status) { |
853 | pr_warn_ratelimited("Tx status %d\n", status); | 1006 | if (net_ratelimit()) |
1007 | netdev_warn(tp->netdev, "Tx status %d\n", status); | ||
854 | stats->tx_errors += agg->skb_num; | 1008 | stats->tx_errors += agg->skb_num; |
855 | } else { | 1009 | } else { |
856 | stats->tx_packets += agg->skb_num; | 1010 | stats->tx_packets += agg->skb_num; |
@@ -927,17 +1081,17 @@ resubmit: | |||
927 | netif_device_detach(tp->netdev); | 1081 | netif_device_detach(tp->netdev); |
928 | else if (res) | 1082 | else if (res) |
929 | netif_err(tp, intr, tp->netdev, | 1083 | netif_err(tp, intr, tp->netdev, |
930 | "can't resubmit intr, status %d\n", res); | 1084 | "can't resubmit intr, status %d\n", res); |
931 | } | 1085 | } |
932 | 1086 | ||
933 | static inline void *rx_agg_align(void *data) | 1087 | static inline void *rx_agg_align(void *data) |
934 | { | 1088 | { |
935 | return (void *)ALIGN((uintptr_t)data, 8); | 1089 | return (void *)ALIGN((uintptr_t)data, RX_ALIGN); |
936 | } | 1090 | } |
937 | 1091 | ||
938 | static inline void *tx_agg_align(void *data) | 1092 | static inline void *tx_agg_align(void *data) |
939 | { | 1093 | { |
940 | return (void *)ALIGN((uintptr_t)data, 4); | 1094 | return (void *)ALIGN((uintptr_t)data, TX_ALIGN); |
941 | } | 1095 | } |
942 | 1096 | ||
943 | static void free_all_mem(struct r8152 *tp) | 1097 | static void free_all_mem(struct r8152 *tp) |
@@ -945,40 +1099,28 @@ static void free_all_mem(struct r8152 *tp) | |||
945 | int i; | 1099 | int i; |
946 | 1100 | ||
947 | for (i = 0; i < RTL8152_MAX_RX; i++) { | 1101 | for (i = 0; i < RTL8152_MAX_RX; i++) { |
948 | if (tp->rx_info[i].urb) { | 1102 | usb_free_urb(tp->rx_info[i].urb); |
949 | usb_free_urb(tp->rx_info[i].urb); | 1103 | tp->rx_info[i].urb = NULL; |
950 | tp->rx_info[i].urb = NULL; | ||
951 | } | ||
952 | 1104 | ||
953 | if (tp->rx_info[i].buffer) { | 1105 | kfree(tp->rx_info[i].buffer); |
954 | kfree(tp->rx_info[i].buffer); | 1106 | tp->rx_info[i].buffer = NULL; |
955 | tp->rx_info[i].buffer = NULL; | 1107 | tp->rx_info[i].head = NULL; |
956 | tp->rx_info[i].head = NULL; | ||
957 | } | ||
958 | } | 1108 | } |
959 | 1109 | ||
960 | for (i = 0; i < RTL8152_MAX_TX; i++) { | 1110 | for (i = 0; i < RTL8152_MAX_TX; i++) { |
961 | if (tp->tx_info[i].urb) { | 1111 | usb_free_urb(tp->tx_info[i].urb); |
962 | usb_free_urb(tp->tx_info[i].urb); | 1112 | tp->tx_info[i].urb = NULL; |
963 | tp->tx_info[i].urb = NULL; | ||
964 | } | ||
965 | 1113 | ||
966 | if (tp->tx_info[i].buffer) { | 1114 | kfree(tp->tx_info[i].buffer); |
967 | kfree(tp->tx_info[i].buffer); | 1115 | tp->tx_info[i].buffer = NULL; |
968 | tp->tx_info[i].buffer = NULL; | 1116 | tp->tx_info[i].head = NULL; |
969 | tp->tx_info[i].head = NULL; | ||
970 | } | ||
971 | } | 1117 | } |
972 | 1118 | ||
973 | if (tp->intr_urb) { | 1119 | usb_free_urb(tp->intr_urb); |
974 | usb_free_urb(tp->intr_urb); | 1120 | tp->intr_urb = NULL; |
975 | tp->intr_urb = NULL; | ||
976 | } | ||
977 | 1121 | ||
978 | if (tp->intr_buff) { | 1122 | kfree(tp->intr_buff); |
979 | kfree(tp->intr_buff); | 1123 | tp->intr_buff = NULL; |
980 | tp->intr_buff = NULL; | ||
981 | } | ||
982 | } | 1124 | } |
983 | 1125 | ||
984 | static int alloc_all_mem(struct r8152 *tp) | 1126 | static int alloc_all_mem(struct r8152 *tp) |
@@ -1006,7 +1148,8 @@ static int alloc_all_mem(struct r8152 *tp) | |||
1006 | 1148 | ||
1007 | if (buf != rx_agg_align(buf)) { | 1149 | if (buf != rx_agg_align(buf)) { |
1008 | kfree(buf); | 1150 | kfree(buf); |
1009 | buf = kmalloc_node(rx_buf_sz + 8, GFP_KERNEL, node); | 1151 | buf = kmalloc_node(rx_buf_sz + RX_ALIGN, GFP_KERNEL, |
1152 | node); | ||
1010 | if (!buf) | 1153 | if (!buf) |
1011 | goto err1; | 1154 | goto err1; |
1012 | } | 1155 | } |
@@ -1031,7 +1174,8 @@ static int alloc_all_mem(struct r8152 *tp) | |||
1031 | 1174 | ||
1032 | if (buf != tx_agg_align(buf)) { | 1175 | if (buf != tx_agg_align(buf)) { |
1033 | kfree(buf); | 1176 | kfree(buf); |
1034 | buf = kmalloc_node(rx_buf_sz + 4, GFP_KERNEL, node); | 1177 | buf = kmalloc_node(rx_buf_sz + TX_ALIGN, GFP_KERNEL, |
1178 | node); | ||
1035 | if (!buf) | 1179 | if (!buf) |
1036 | goto err1; | 1180 | goto err1; |
1037 | } | 1181 | } |
@@ -1231,7 +1375,7 @@ static void rx_bottom(struct r8152 *tp) | |||
1231 | 1375 | ||
1232 | stats = rtl8152_get_stats(netdev); | 1376 | stats = rtl8152_get_stats(netdev); |
1233 | 1377 | ||
1234 | pkt_len -= 4; /* CRC */ | 1378 | pkt_len -= CRC_SIZE; |
1235 | rx_data += sizeof(struct rx_desc); | 1379 | rx_data += sizeof(struct rx_desc); |
1236 | 1380 | ||
1237 | skb = netdev_alloc_skb_ip_align(netdev, pkt_len); | 1381 | skb = netdev_alloc_skb_ip_align(netdev, pkt_len); |
@@ -1246,7 +1390,7 @@ static void rx_bottom(struct r8152 *tp) | |||
1246 | stats->rx_packets++; | 1390 | stats->rx_packets++; |
1247 | stats->rx_bytes += pkt_len; | 1391 | stats->rx_bytes += pkt_len; |
1248 | 1392 | ||
1249 | rx_data = rx_agg_align(rx_data + pkt_len + 4); | 1393 | rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE); |
1250 | rx_desc = (struct rx_desc *)rx_data; | 1394 | rx_desc = (struct rx_desc *)rx_data; |
1251 | len_used = (int)(rx_data - (u8 *)agg->head); | 1395 | len_used = (int)(rx_data - (u8 *)agg->head); |
1252 | len_used += sizeof(struct rx_desc); | 1396 | len_used += sizeof(struct rx_desc); |
@@ -1336,7 +1480,7 @@ static void rtl8152_tx_timeout(struct net_device *netdev) | |||
1336 | struct r8152 *tp = netdev_priv(netdev); | 1480 | struct r8152 *tp = netdev_priv(netdev); |
1337 | int i; | 1481 | int i; |
1338 | 1482 | ||
1339 | netif_warn(tp, tx_err, netdev, "Tx timeout.\n"); | 1483 | netif_warn(tp, tx_err, netdev, "Tx timeout\n"); |
1340 | for (i = 0; i < RTL8152_MAX_TX; i++) | 1484 | for (i = 0; i < RTL8152_MAX_TX; i++) |
1341 | usb_unlink_urb(tp->tx_info[i].urb); | 1485 | usb_unlink_urb(tp->tx_info[i].urb); |
1342 | } | 1486 | } |
@@ -1449,13 +1593,11 @@ static inline u8 rtl8152_get_speed(struct r8152 *tp) | |||
1449 | return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS); | 1593 | return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS); |
1450 | } | 1594 | } |
1451 | 1595 | ||
1452 | static int rtl8152_enable(struct r8152 *tp) | 1596 | static void rtl_set_eee_plus(struct r8152 *tp) |
1453 | { | 1597 | { |
1454 | u32 ocp_data; | 1598 | u32 ocp_data; |
1455 | int i, ret; | ||
1456 | u8 speed; | 1599 | u8 speed; |
1457 | 1600 | ||
1458 | set_tx_qlen(tp); | ||
1459 | speed = rtl8152_get_speed(tp); | 1601 | speed = rtl8152_get_speed(tp); |
1460 | if (speed & _10bps) { | 1602 | if (speed & _10bps) { |
1461 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); | 1603 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR); |
@@ -1466,6 +1608,12 @@ static int rtl8152_enable(struct r8152 *tp) | |||
1466 | ocp_data &= ~EEEP_CR_EEEP_TX; | 1608 | ocp_data &= ~EEEP_CR_EEEP_TX; |
1467 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); | 1609 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data); |
1468 | } | 1610 | } |
1611 | } | ||
1612 | |||
1613 | static int rtl_enable(struct r8152 *tp) | ||
1614 | { | ||
1615 | u32 ocp_data; | ||
1616 | int i, ret; | ||
1469 | 1617 | ||
1470 | r8152b_reset_packet_filter(tp); | 1618 | r8152b_reset_packet_filter(tp); |
1471 | 1619 | ||
@@ -1487,6 +1635,47 @@ static int rtl8152_enable(struct r8152 *tp) | |||
1487 | return ret; | 1635 | return ret; |
1488 | } | 1636 | } |
1489 | 1637 | ||
1638 | static int rtl8152_enable(struct r8152 *tp) | ||
1639 | { | ||
1640 | set_tx_qlen(tp); | ||
1641 | rtl_set_eee_plus(tp); | ||
1642 | |||
1643 | return rtl_enable(tp); | ||
1644 | } | ||
1645 | |||
1646 | static void r8153_set_rx_agg(struct r8152 *tp) | ||
1647 | { | ||
1648 | u8 speed; | ||
1649 | |||
1650 | speed = rtl8152_get_speed(tp); | ||
1651 | if (speed & _1000bps) { | ||
1652 | if (tp->udev->speed == USB_SPEED_SUPER) { | ||
1653 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, | ||
1654 | RX_THR_SUPPER); | ||
1655 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG, | ||
1656 | EARLY_AGG_SUPPER); | ||
1657 | } else { | ||
1658 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, | ||
1659 | RX_THR_HIGH); | ||
1660 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG, | ||
1661 | EARLY_AGG_HIGH); | ||
1662 | } | ||
1663 | } else { | ||
1664 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW); | ||
1665 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG, | ||
1666 | EARLY_AGG_SLOW); | ||
1667 | } | ||
1668 | } | ||
1669 | |||
1670 | static int rtl8153_enable(struct r8152 *tp) | ||
1671 | { | ||
1672 | set_tx_qlen(tp); | ||
1673 | rtl_set_eee_plus(tp); | ||
1674 | r8153_set_rx_agg(tp); | ||
1675 | |||
1676 | return rtl_enable(tp); | ||
1677 | } | ||
1678 | |||
1490 | static void rtl8152_disable(struct r8152 *tp) | 1679 | static void rtl8152_disable(struct r8152 *tp) |
1491 | { | 1680 | { |
1492 | struct net_device_stats *stats = rtl8152_get_stats(tp->netdev); | 1681 | struct net_device_stats *stats = rtl8152_get_stats(tp->netdev); |
@@ -1596,7 +1785,7 @@ static void r8152b_exit_oob(struct r8152 *tp) | |||
1596 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL); | 1785 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL); |
1597 | 1786 | ||
1598 | ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD); | 1787 | ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD); |
1599 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_BUF_THR); | 1788 | ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH); |
1600 | ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA, | 1789 | ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA, |
1601 | TEST_MODE_DISABLE | TX_SIZE_ADJUST1); | 1790 | TEST_MODE_DISABLE | TX_SIZE_ADJUST1); |
1602 | 1791 | ||
@@ -1613,8 +1802,8 @@ static void r8152b_exit_oob(struct r8152 *tp) | |||
1613 | 1802 | ||
1614 | static void r8152b_enter_oob(struct r8152 *tp) | 1803 | static void r8152b_enter_oob(struct r8152 *tp) |
1615 | { | 1804 | { |
1616 | u32 ocp_data; | 1805 | u32 ocp_data; |
1617 | int i; | 1806 | int i; |
1618 | 1807 | ||
1619 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | 1808 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); |
1620 | ocp_data &= ~NOW_IS_OOB; | 1809 | ocp_data &= ~NOW_IS_OOB; |
@@ -1685,15 +1874,269 @@ static inline void r8152b_enable_aldps(struct r8152 *tp) | |||
1685 | LINKENA | DIS_SDSAVE); | 1874 | LINKENA | DIS_SDSAVE); |
1686 | } | 1875 | } |
1687 | 1876 | ||
1877 | static void r8153_hw_phy_cfg(struct r8152 *tp) | ||
1878 | { | ||
1879 | u32 ocp_data; | ||
1880 | u16 data; | ||
1881 | |||
1882 | ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L); | ||
1883 | r8152_mdio_write(tp, MII_BMCR, BMCR_ANENABLE); | ||
1884 | |||
1885 | if (tp->version == RTL_VER_03) { | ||
1886 | data = ocp_reg_read(tp, OCP_EEE_CFG); | ||
1887 | data &= ~CTAP_SHORT_EN; | ||
1888 | ocp_reg_write(tp, OCP_EEE_CFG, data); | ||
1889 | } | ||
1890 | |||
1891 | data = ocp_reg_read(tp, OCP_POWER_CFG); | ||
1892 | data |= EEE_CLKDIV_EN; | ||
1893 | ocp_reg_write(tp, OCP_POWER_CFG, data); | ||
1894 | |||
1895 | data = ocp_reg_read(tp, OCP_DOWN_SPEED); | ||
1896 | data |= EN_10M_BGOFF; | ||
1897 | ocp_reg_write(tp, OCP_DOWN_SPEED, data); | ||
1898 | data = ocp_reg_read(tp, OCP_POWER_CFG); | ||
1899 | data |= EN_10M_PLLOFF; | ||
1900 | ocp_reg_write(tp, OCP_POWER_CFG, data); | ||
1901 | data = sram_read(tp, SRAM_IMPEDANCE); | ||
1902 | data &= ~RX_DRIVING_MASK; | ||
1903 | sram_write(tp, SRAM_IMPEDANCE, data); | ||
1904 | |||
1905 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); | ||
1906 | ocp_data |= PFM_PWM_SWITCH; | ||
1907 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); | ||
1908 | |||
1909 | data = sram_read(tp, SRAM_LPF_CFG); | ||
1910 | data |= LPF_AUTO_TUNE; | ||
1911 | sram_write(tp, SRAM_LPF_CFG, data); | ||
1912 | |||
1913 | data = sram_read(tp, SRAM_10M_AMP1); | ||
1914 | data |= GDAC_IB_UPALL; | ||
1915 | sram_write(tp, SRAM_10M_AMP1, data); | ||
1916 | data = sram_read(tp, SRAM_10M_AMP2); | ||
1917 | data |= AMP_DN; | ||
1918 | sram_write(tp, SRAM_10M_AMP2, data); | ||
1919 | } | ||
1920 | |||
1921 | static void r8153_u1u2en(struct r8152 *tp, int enable) | ||
1922 | { | ||
1923 | u8 u1u2[8]; | ||
1924 | |||
1925 | if (enable) | ||
1926 | memset(u1u2, 0xff, sizeof(u1u2)); | ||
1927 | else | ||
1928 | memset(u1u2, 0x00, sizeof(u1u2)); | ||
1929 | |||
1930 | usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2); | ||
1931 | } | ||
1932 | |||
1933 | static void r8153_u2p3en(struct r8152 *tp, int enable) | ||
1934 | { | ||
1935 | u32 ocp_data; | ||
1936 | |||
1937 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL); | ||
1938 | if (enable) | ||
1939 | ocp_data |= U2P3_ENABLE; | ||
1940 | else | ||
1941 | ocp_data &= ~U2P3_ENABLE; | ||
1942 | ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data); | ||
1943 | } | ||
1944 | |||
1945 | static void r8153_power_cut_en(struct r8152 *tp, int enable) | ||
1946 | { | ||
1947 | u32 ocp_data; | ||
1948 | |||
1949 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT); | ||
1950 | if (enable) | ||
1951 | ocp_data |= PWR_EN | PHASE2_EN; | ||
1952 | else | ||
1953 | ocp_data &= ~(PWR_EN | PHASE2_EN); | ||
1954 | ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); | ||
1955 | |||
1956 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); | ||
1957 | ocp_data &= ~PCUT_STATUS; | ||
1958 | ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); | ||
1959 | } | ||
1960 | |||
1961 | static void r8153_teredo_off(struct r8152 *tp) | ||
1962 | { | ||
1963 | u32 ocp_data; | ||
1964 | |||
1965 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG); | ||
1966 | ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN); | ||
1967 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data); | ||
1968 | |||
1969 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE); | ||
1970 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0); | ||
1971 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0); | ||
1972 | } | ||
1973 | |||
1974 | static void r8153_first_init(struct r8152 *tp) | ||
1975 | { | ||
1976 | u32 ocp_data; | ||
1977 | int i; | ||
1978 | |||
1979 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1); | ||
1980 | ocp_data |= RXDY_GATED_EN; | ||
1981 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data); | ||
1982 | |||
1983 | r8153_teredo_off(tp); | ||
1984 | |||
1985 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); | ||
1986 | ocp_data &= ~RCR_ACPT_ALL; | ||
1987 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); | ||
1988 | |||
1989 | r8153_hw_phy_cfg(tp); | ||
1990 | |||
1991 | rtl8152_nic_reset(tp); | ||
1992 | |||
1993 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
1994 | ocp_data &= ~NOW_IS_OOB; | ||
1995 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); | ||
1996 | |||
1997 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); | ||
1998 | ocp_data &= ~MCU_BORW_EN; | ||
1999 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); | ||
2000 | |||
2001 | for (i = 0; i < 1000; i++) { | ||
2002 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
2003 | if (ocp_data & LINK_LIST_READY) | ||
2004 | break; | ||
2005 | mdelay(1); | ||
2006 | } | ||
2007 | |||
2008 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); | ||
2009 | ocp_data |= RE_INIT_LL; | ||
2010 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); | ||
2011 | |||
2012 | for (i = 0; i < 1000; i++) { | ||
2013 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
2014 | if (ocp_data & LINK_LIST_READY) | ||
2015 | break; | ||
2016 | mdelay(1); | ||
2017 | } | ||
2018 | |||
2019 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); | ||
2020 | ocp_data &= ~CPCR_RX_VLAN; | ||
2021 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); | ||
2022 | |||
2023 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS); | ||
2024 | |||
2025 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0); | ||
2026 | ocp_data |= TCR0_AUTO_FIFO; | ||
2027 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data); | ||
2028 | |||
2029 | rtl8152_nic_reset(tp); | ||
2030 | |||
2031 | /* rx share fifo credit full threshold */ | ||
2032 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL); | ||
2033 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL); | ||
2034 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL); | ||
2035 | /* TX share fifo free credit full threshold */ | ||
2036 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2); | ||
2037 | |||
2038 | /* rx aggregation */ | ||
2039 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); | ||
2040 | ocp_data &= ~RX_AGG_DISABLE; | ||
2041 | ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); | ||
2042 | } | ||
2043 | |||
2044 | static void r8153_enter_oob(struct r8152 *tp) | ||
2045 | { | ||
2046 | u32 ocp_data; | ||
2047 | int i; | ||
2048 | |||
2049 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
2050 | ocp_data &= ~NOW_IS_OOB; | ||
2051 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); | ||
2052 | |||
2053 | rtl8152_disable(tp); | ||
2054 | |||
2055 | for (i = 0; i < 1000; i++) { | ||
2056 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
2057 | if (ocp_data & LINK_LIST_READY) | ||
2058 | break; | ||
2059 | mdelay(1); | ||
2060 | } | ||
2061 | |||
2062 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); | ||
2063 | ocp_data |= RE_INIT_LL; | ||
2064 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data); | ||
2065 | |||
2066 | for (i = 0; i < 1000; i++) { | ||
2067 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
2068 | if (ocp_data & LINK_LIST_READY) | ||
2069 | break; | ||
2070 | mdelay(1); | ||
2071 | } | ||
2072 | |||
2073 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS); | ||
2074 | |||
2075 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL); | ||
2076 | ocp_data |= MAGIC_EN; | ||
2077 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data); | ||
2078 | |||
2079 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG); | ||
2080 | ocp_data &= ~TEREDO_WAKE_MASK; | ||
2081 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data); | ||
2082 | |||
2083 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR); | ||
2084 | ocp_data |= CPCR_RX_VLAN; | ||
2085 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data); | ||
2086 | |||
2087 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR); | ||
2088 | ocp_data |= ALDPS_PROXY_MODE; | ||
2089 | ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data); | ||
2090 | |||
2091 | ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); | ||
2092 | ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB; | ||
2093 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); | ||
2094 | |||
2095 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5, LAN_WAKE_EN); | ||
2096 | |||
2097 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1); | ||
2098 | ocp_data &= ~RXDY_GATED_EN; | ||
2099 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data); | ||
2100 | |||
2101 | ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR); | ||
2102 | ocp_data |= RCR_APM | RCR_AM | RCR_AB; | ||
2103 | ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data); | ||
2104 | } | ||
2105 | |||
2106 | static void r8153_disable_aldps(struct r8152 *tp) | ||
2107 | { | ||
2108 | u16 data; | ||
2109 | |||
2110 | data = ocp_reg_read(tp, OCP_POWER_CFG); | ||
2111 | data &= ~EN_ALDPS; | ||
2112 | ocp_reg_write(tp, OCP_POWER_CFG, data); | ||
2113 | msleep(20); | ||
2114 | } | ||
2115 | |||
2116 | static void r8153_enable_aldps(struct r8152 *tp) | ||
2117 | { | ||
2118 | u16 data; | ||
2119 | |||
2120 | data = ocp_reg_read(tp, OCP_POWER_CFG); | ||
2121 | data |= EN_ALDPS; | ||
2122 | ocp_reg_write(tp, OCP_POWER_CFG, data); | ||
2123 | } | ||
2124 | |||
1688 | static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) | 2125 | static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) |
1689 | { | 2126 | { |
1690 | u16 bmcr, anar; | 2127 | u16 bmcr, anar, gbcr; |
1691 | int ret = 0; | 2128 | int ret = 0; |
1692 | 2129 | ||
1693 | cancel_delayed_work_sync(&tp->schedule); | 2130 | cancel_delayed_work_sync(&tp->schedule); |
1694 | anar = r8152_mdio_read(tp, MII_ADVERTISE); | 2131 | anar = r8152_mdio_read(tp, MII_ADVERTISE); |
1695 | anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | | 2132 | anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | |
1696 | ADVERTISE_100HALF | ADVERTISE_100FULL); | 2133 | ADVERTISE_100HALF | ADVERTISE_100FULL); |
2134 | if (tp->mii.supports_gmii) { | ||
2135 | gbcr = r8152_mdio_read(tp, MII_CTRL1000); | ||
2136 | gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); | ||
2137 | } else { | ||
2138 | gbcr = 0; | ||
2139 | } | ||
1697 | 2140 | ||
1698 | if (autoneg == AUTONEG_DISABLE) { | 2141 | if (autoneg == AUTONEG_DISABLE) { |
1699 | if (speed == SPEED_10) { | 2142 | if (speed == SPEED_10) { |
@@ -1702,6 +2145,9 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) | |||
1702 | } else if (speed == SPEED_100) { | 2145 | } else if (speed == SPEED_100) { |
1703 | bmcr = BMCR_SPEED100; | 2146 | bmcr = BMCR_SPEED100; |
1704 | anar |= ADVERTISE_100HALF | ADVERTISE_100FULL; | 2147 | anar |= ADVERTISE_100HALF | ADVERTISE_100FULL; |
2148 | } else if (speed == SPEED_1000 && tp->mii.supports_gmii) { | ||
2149 | bmcr = BMCR_SPEED1000; | ||
2150 | gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; | ||
1705 | } else { | 2151 | } else { |
1706 | ret = -EINVAL; | 2152 | ret = -EINVAL; |
1707 | goto out; | 2153 | goto out; |
@@ -1723,6 +2169,16 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) | |||
1723 | anar |= ADVERTISE_10HALF; | 2169 | anar |= ADVERTISE_10HALF; |
1724 | anar |= ADVERTISE_100HALF; | 2170 | anar |= ADVERTISE_100HALF; |
1725 | } | 2171 | } |
2172 | } else if (speed == SPEED_1000 && tp->mii.supports_gmii) { | ||
2173 | if (duplex == DUPLEX_FULL) { | ||
2174 | anar |= ADVERTISE_10HALF | ADVERTISE_10FULL; | ||
2175 | anar |= ADVERTISE_100HALF | ADVERTISE_100FULL; | ||
2176 | gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; | ||
2177 | } else { | ||
2178 | anar |= ADVERTISE_10HALF; | ||
2179 | anar |= ADVERTISE_100HALF; | ||
2180 | gbcr |= ADVERTISE_1000HALF; | ||
2181 | } | ||
1726 | } else { | 2182 | } else { |
1727 | ret = -EINVAL; | 2183 | ret = -EINVAL; |
1728 | goto out; | 2184 | goto out; |
@@ -1731,6 +2187,9 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) | |||
1731 | bmcr = BMCR_ANENABLE | BMCR_ANRESTART; | 2187 | bmcr = BMCR_ANENABLE | BMCR_ANRESTART; |
1732 | } | 2188 | } |
1733 | 2189 | ||
2190 | if (tp->mii.supports_gmii) | ||
2191 | r8152_mdio_write(tp, MII_CTRL1000, gbcr); | ||
2192 | |||
1734 | r8152_mdio_write(tp, MII_ADVERTISE, anar); | 2193 | r8152_mdio_write(tp, MII_ADVERTISE, anar); |
1735 | r8152_mdio_write(tp, MII_BMCR, bmcr); | 2194 | r8152_mdio_write(tp, MII_BMCR, bmcr); |
1736 | 2195 | ||
@@ -1752,6 +2211,15 @@ static void rtl8152_down(struct r8152 *tp) | |||
1752 | r8152b_enable_aldps(tp); | 2211 | r8152b_enable_aldps(tp); |
1753 | } | 2212 | } |
1754 | 2213 | ||
2214 | static void rtl8153_down(struct r8152 *tp) | ||
2215 | { | ||
2216 | r8153_u1u2en(tp, 0); | ||
2217 | r8153_power_cut_en(tp, 0); | ||
2218 | r8153_disable_aldps(tp); | ||
2219 | r8153_enter_oob(tp); | ||
2220 | r8153_enable_aldps(tp); | ||
2221 | } | ||
2222 | |||
1755 | static void set_carrier(struct r8152 *tp) | 2223 | static void set_carrier(struct r8152 *tp) |
1756 | { | 2224 | { |
1757 | struct net_device *netdev = tp->netdev; | 2225 | struct net_device *netdev = tp->netdev; |
@@ -1762,7 +2230,7 @@ static void set_carrier(struct r8152 *tp) | |||
1762 | 2230 | ||
1763 | if (speed & LINK_STATUS) { | 2231 | if (speed & LINK_STATUS) { |
1764 | if (!(tp->speed & LINK_STATUS)) { | 2232 | if (!(tp->speed & LINK_STATUS)) { |
1765 | rtl8152_enable(tp); | 2233 | tp->rtl_ops.enable(tp); |
1766 | set_bit(RTL8152_SET_RX_MODE, &tp->flags); | 2234 | set_bit(RTL8152_SET_RX_MODE, &tp->flags); |
1767 | netif_carrier_on(netdev); | 2235 | netif_carrier_on(netdev); |
1768 | } | 2236 | } |
@@ -1770,7 +2238,7 @@ static void set_carrier(struct r8152 *tp) | |||
1770 | if (tp->speed & LINK_STATUS) { | 2238 | if (tp->speed & LINK_STATUS) { |
1771 | netif_carrier_off(netdev); | 2239 | netif_carrier_off(netdev); |
1772 | tasklet_disable(&tp->tl); | 2240 | tasklet_disable(&tp->tl); |
1773 | rtl8152_disable(tp); | 2241 | tp->rtl_ops.disable(tp); |
1774 | tasklet_enable(&tp->tl); | 2242 | tasklet_enable(&tp->tl); |
1775 | } | 2243 | } |
1776 | } | 2244 | } |
@@ -1802,20 +2270,21 @@ static int rtl8152_open(struct net_device *netdev) | |||
1802 | struct r8152 *tp = netdev_priv(netdev); | 2270 | struct r8152 *tp = netdev_priv(netdev); |
1803 | int res = 0; | 2271 | int res = 0; |
1804 | 2272 | ||
2273 | rtl8152_set_speed(tp, AUTONEG_ENABLE, | ||
2274 | tp->mii.supports_gmii ? SPEED_1000 : SPEED_100, | ||
2275 | DUPLEX_FULL); | ||
2276 | tp->speed = 0; | ||
2277 | netif_carrier_off(netdev); | ||
2278 | netif_start_queue(netdev); | ||
2279 | set_bit(WORK_ENABLE, &tp->flags); | ||
1805 | res = usb_submit_urb(tp->intr_urb, GFP_KERNEL); | 2280 | res = usb_submit_urb(tp->intr_urb, GFP_KERNEL); |
1806 | if (res) { | 2281 | if (res) { |
1807 | if (res == -ENODEV) | 2282 | if (res == -ENODEV) |
1808 | netif_device_detach(tp->netdev); | 2283 | netif_device_detach(tp->netdev); |
1809 | netif_warn(tp, ifup, netdev, | 2284 | netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n", |
1810 | "intr_urb submit failed: %d\n", res); | 2285 | res); |
1811 | return res; | ||
1812 | } | 2286 | } |
1813 | 2287 | ||
1814 | rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL); | ||
1815 | tp->speed = 0; | ||
1816 | netif_carrier_off(netdev); | ||
1817 | netif_start_queue(netdev); | ||
1818 | set_bit(WORK_ENABLE, &tp->flags); | ||
1819 | 2288 | ||
1820 | return res; | 2289 | return res; |
1821 | } | 2290 | } |
@@ -1825,12 +2294,12 @@ static int rtl8152_close(struct net_device *netdev) | |||
1825 | struct r8152 *tp = netdev_priv(netdev); | 2294 | struct r8152 *tp = netdev_priv(netdev); |
1826 | int res = 0; | 2295 | int res = 0; |
1827 | 2296 | ||
1828 | usb_kill_urb(tp->intr_urb); | ||
1829 | clear_bit(WORK_ENABLE, &tp->flags); | 2297 | clear_bit(WORK_ENABLE, &tp->flags); |
2298 | usb_kill_urb(tp->intr_urb); | ||
1830 | cancel_delayed_work_sync(&tp->schedule); | 2299 | cancel_delayed_work_sync(&tp->schedule); |
1831 | netif_stop_queue(netdev); | 2300 | netif_stop_queue(netdev); |
1832 | tasklet_disable(&tp->tl); | 2301 | tasklet_disable(&tp->tl); |
1833 | rtl8152_disable(tp); | 2302 | tp->rtl_ops.disable(tp); |
1834 | tasklet_enable(&tp->tl); | 2303 | tasklet_enable(&tp->tl); |
1835 | 2304 | ||
1836 | return res; | 2305 | return res; |
@@ -1851,9 +2320,16 @@ static void rtl_clear_bp(struct r8152 *tp) | |||
1851 | ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0); | 2320 | ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0); |
1852 | } | 2321 | } |
1853 | 2322 | ||
2323 | static void r8153_clear_bp(struct r8152 *tp) | ||
2324 | { | ||
2325 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0); | ||
2326 | ocp_write_byte(tp, MCU_TYPE_USB, USB_BP_EN, 0); | ||
2327 | rtl_clear_bp(tp); | ||
2328 | } | ||
2329 | |||
1854 | static void r8152b_enable_eee(struct r8152 *tp) | 2330 | static void r8152b_enable_eee(struct r8152 *tp) |
1855 | { | 2331 | { |
1856 | u32 ocp_data; | 2332 | u32 ocp_data; |
1857 | 2333 | ||
1858 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR); | 2334 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR); |
1859 | ocp_data |= EEE_RX_EN | EEE_TX_EN; | 2335 | ocp_data |= EEE_RX_EN | EEE_TX_EN; |
@@ -1874,6 +2350,22 @@ static void r8152b_enable_eee(struct r8152 *tp) | |||
1874 | ocp_reg_write(tp, OCP_EEE_AR, 0x0000); | 2350 | ocp_reg_write(tp, OCP_EEE_AR, 0x0000); |
1875 | } | 2351 | } |
1876 | 2352 | ||
2353 | static void r8153_enable_eee(struct r8152 *tp) | ||
2354 | { | ||
2355 | u32 ocp_data; | ||
2356 | u16 data; | ||
2357 | |||
2358 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR); | ||
2359 | ocp_data |= EEE_RX_EN | EEE_TX_EN; | ||
2360 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data); | ||
2361 | data = ocp_reg_read(tp, OCP_EEE_CFG); | ||
2362 | data |= EEE10_EN; | ||
2363 | ocp_reg_write(tp, OCP_EEE_CFG, data); | ||
2364 | data = ocp_reg_read(tp, OCP_EEE_CFG2); | ||
2365 | data |= MY1000_EEE | MY100_EEE; | ||
2366 | ocp_reg_write(tp, OCP_EEE_CFG2, data); | ||
2367 | } | ||
2368 | |||
1877 | static void r8152b_enable_fc(struct r8152 *tp) | 2369 | static void r8152b_enable_fc(struct r8152 *tp) |
1878 | { | 2370 | { |
1879 | u16 anar; | 2371 | u16 anar; |
@@ -1909,7 +2401,7 @@ static void r8152b_init(struct r8152 *tp) | |||
1909 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); | 2401 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); |
1910 | 2402 | ||
1911 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS); | 2403 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS); |
1912 | ocp_data &= ~RWSUME_INDICATE; | 2404 | ocp_data &= ~RESUME_INDICATE; |
1913 | ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data); | 2405 | ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data); |
1914 | 2406 | ||
1915 | r8152b_exit_oob(tp); | 2407 | r8152b_exit_oob(tp); |
@@ -1943,6 +2435,75 @@ static void r8152b_init(struct r8152 *tp) | |||
1943 | ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); | 2435 | ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); |
1944 | } | 2436 | } |
1945 | 2437 | ||
2438 | static void r8153_init(struct r8152 *tp) | ||
2439 | { | ||
2440 | u32 ocp_data; | ||
2441 | int i; | ||
2442 | |||
2443 | r8153_u1u2en(tp, 0); | ||
2444 | |||
2445 | for (i = 0; i < 500; i++) { | ||
2446 | if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) & | ||
2447 | AUTOLOAD_DONE) | ||
2448 | break; | ||
2449 | msleep(20); | ||
2450 | } | ||
2451 | |||
2452 | for (i = 0; i < 500; i++) { | ||
2453 | ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK; | ||
2454 | if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN) | ||
2455 | break; | ||
2456 | msleep(20); | ||
2457 | } | ||
2458 | |||
2459 | r8153_u2p3en(tp, 0); | ||
2460 | |||
2461 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL); | ||
2462 | ocp_data &= ~TIMER11_EN; | ||
2463 | ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data); | ||
2464 | |||
2465 | r8153_clear_bp(tp); | ||
2466 | |||
2467 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE); | ||
2468 | ocp_data &= ~LED_MODE_MASK; | ||
2469 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data); | ||
2470 | |||
2471 | ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL); | ||
2472 | ocp_data &= ~LPM_TIMER_MASK; | ||
2473 | if (tp->udev->speed == USB_SPEED_SUPER) | ||
2474 | ocp_data |= LPM_TIMER_500US; | ||
2475 | else | ||
2476 | ocp_data |= LPM_TIMER_500MS; | ||
2477 | ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data); | ||
2478 | |||
2479 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2); | ||
2480 | ocp_data &= ~SEN_VAL_MASK; | ||
2481 | ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE; | ||
2482 | ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data); | ||
2483 | |||
2484 | r8153_power_cut_en(tp, 0); | ||
2485 | r8153_u1u2en(tp, 1); | ||
2486 | |||
2487 | r8153_first_init(tp); | ||
2488 | |||
2489 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO); | ||
2490 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO); | ||
2491 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, | ||
2492 | PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN | | ||
2493 | U1U2_SPDWN_EN | L1_SPDWN_EN); | ||
2494 | ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, | ||
2495 | PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN | | ||
2496 | TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN | | ||
2497 | EEE_SPDWN_EN); | ||
2498 | |||
2499 | r8153_enable_eee(tp); | ||
2500 | r8153_enable_aldps(tp); | ||
2501 | r8152b_enable_fc(tp); | ||
2502 | |||
2503 | r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | | ||
2504 | BMCR_ANRESTART); | ||
2505 | } | ||
2506 | |||
1946 | static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message) | 2507 | static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message) |
1947 | { | 2508 | { |
1948 | struct r8152 *tp = usb_get_intfdata(intf); | 2509 | struct r8152 *tp = usb_get_intfdata(intf); |
@@ -1956,7 +2517,7 @@ static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message) | |||
1956 | tasklet_disable(&tp->tl); | 2517 | tasklet_disable(&tp->tl); |
1957 | } | 2518 | } |
1958 | 2519 | ||
1959 | rtl8152_down(tp); | 2520 | tp->rtl_ops.down(tp); |
1960 | 2521 | ||
1961 | return 0; | 2522 | return 0; |
1962 | } | 2523 | } |
@@ -1965,10 +2526,12 @@ static int rtl8152_resume(struct usb_interface *intf) | |||
1965 | { | 2526 | { |
1966 | struct r8152 *tp = usb_get_intfdata(intf); | 2527 | struct r8152 *tp = usb_get_intfdata(intf); |
1967 | 2528 | ||
1968 | r8152b_init(tp); | 2529 | tp->rtl_ops.init(tp); |
1969 | netif_device_attach(tp->netdev); | 2530 | netif_device_attach(tp->netdev); |
1970 | if (netif_running(tp->netdev)) { | 2531 | if (netif_running(tp->netdev)) { |
1971 | rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL); | 2532 | rtl8152_set_speed(tp, AUTONEG_ENABLE, |
2533 | tp->mii.supports_gmii ? SPEED_1000 : SPEED_100, | ||
2534 | DUPLEX_FULL); | ||
1972 | tp->speed = 0; | 2535 | tp->speed = 0; |
1973 | netif_carrier_off(tp->netdev); | 2536 | netif_carrier_off(tp->netdev); |
1974 | set_bit(WORK_ENABLE, &tp->flags); | 2537 | set_bit(WORK_ENABLE, &tp->flags); |
@@ -2072,6 +2635,18 @@ static void r8152b_get_version(struct r8152 *tp) | |||
2072 | case 0x4c10: | 2635 | case 0x4c10: |
2073 | tp->version = RTL_VER_02; | 2636 | tp->version = RTL_VER_02; |
2074 | break; | 2637 | break; |
2638 | case 0x5c00: | ||
2639 | tp->version = RTL_VER_03; | ||
2640 | tp->mii.supports_gmii = 1; | ||
2641 | break; | ||
2642 | case 0x5c10: | ||
2643 | tp->version = RTL_VER_04; | ||
2644 | tp->mii.supports_gmii = 1; | ||
2645 | break; | ||
2646 | case 0x5c20: | ||
2647 | tp->version = RTL_VER_05; | ||
2648 | tp->mii.supports_gmii = 1; | ||
2649 | break; | ||
2075 | default: | 2650 | default: |
2076 | netif_info(tp, probe, tp->netdev, | 2651 | netif_info(tp, probe, tp->netdev, |
2077 | "Unknown version 0x%04x\n", version); | 2652 | "Unknown version 0x%04x\n", version); |
@@ -2079,6 +2654,80 @@ static void r8152b_get_version(struct r8152 *tp) | |||
2079 | } | 2654 | } |
2080 | } | 2655 | } |
2081 | 2656 | ||
2657 | static void rtl8152_unload(struct r8152 *tp) | ||
2658 | { | ||
2659 | u32 ocp_data; | ||
2660 | |||
2661 | if (tp->version != RTL_VER_01) { | ||
2662 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL); | ||
2663 | ocp_data |= POWER_CUT; | ||
2664 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); | ||
2665 | } | ||
2666 | |||
2667 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS); | ||
2668 | ocp_data &= ~RESUME_INDICATE; | ||
2669 | ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data); | ||
2670 | } | ||
2671 | |||
2672 | static void rtl8153_unload(struct r8152 *tp) | ||
2673 | { | ||
2674 | r8153_power_cut_en(tp, 1); | ||
2675 | } | ||
2676 | |||
2677 | static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id) | ||
2678 | { | ||
2679 | struct rtl_ops *ops = &tp->rtl_ops; | ||
2680 | int ret = -ENODEV; | ||
2681 | |||
2682 | switch (id->idVendor) { | ||
2683 | case VENDOR_ID_REALTEK: | ||
2684 | switch (id->idProduct) { | ||
2685 | case PRODUCT_ID_RTL8152: | ||
2686 | ops->init = r8152b_init; | ||
2687 | ops->enable = rtl8152_enable; | ||
2688 | ops->disable = rtl8152_disable; | ||
2689 | ops->down = rtl8152_down; | ||
2690 | ops->unload = rtl8152_unload; | ||
2691 | ret = 0; | ||
2692 | break; | ||
2693 | case PRODUCT_ID_RTL8153: | ||
2694 | ops->init = r8153_init; | ||
2695 | ops->enable = rtl8153_enable; | ||
2696 | ops->disable = rtl8152_disable; | ||
2697 | ops->down = rtl8153_down; | ||
2698 | ops->unload = rtl8153_unload; | ||
2699 | ret = 0; | ||
2700 | break; | ||
2701 | default: | ||
2702 | break; | ||
2703 | } | ||
2704 | break; | ||
2705 | |||
2706 | case VENDOR_ID_SAMSUNG: | ||
2707 | switch (id->idProduct) { | ||
2708 | case PRODUCT_ID_SAMSUNG: | ||
2709 | ops->init = r8153_init; | ||
2710 | ops->enable = rtl8153_enable; | ||
2711 | ops->disable = rtl8152_disable; | ||
2712 | ops->down = rtl8153_down; | ||
2713 | ops->unload = rtl8153_unload; | ||
2714 | ret = 0; | ||
2715 | break; | ||
2716 | default: | ||
2717 | break; | ||
2718 | } | ||
2719 | break; | ||
2720 | |||
2721 | default: | ||
2722 | break; | ||
2723 | } | ||
2724 | |||
2725 | if (ret) | ||
2726 | netif_err(tp, probe, tp->netdev, "Unknown Device\n"); | ||
2727 | |||
2728 | return ret; | ||
2729 | } | ||
2730 | |||
2082 | static int rtl8152_probe(struct usb_interface *intf, | 2731 | static int rtl8152_probe(struct usb_interface *intf, |
2083 | const struct usb_device_id *id) | 2732 | const struct usb_device_id *id) |
2084 | { | 2733 | { |
@@ -2092,9 +2741,10 @@ static int rtl8152_probe(struct usb_interface *intf, | |||
2092 | return -ENODEV; | 2741 | return -ENODEV; |
2093 | } | 2742 | } |
2094 | 2743 | ||
2744 | usb_reset_device(udev); | ||
2095 | netdev = alloc_etherdev(sizeof(struct r8152)); | 2745 | netdev = alloc_etherdev(sizeof(struct r8152)); |
2096 | if (!netdev) { | 2746 | if (!netdev) { |
2097 | dev_err(&intf->dev, "Out of memory"); | 2747 | dev_err(&intf->dev, "Out of memory\n"); |
2098 | return -ENOMEM; | 2748 | return -ENOMEM; |
2099 | } | 2749 | } |
2100 | 2750 | ||
@@ -2102,12 +2752,17 @@ static int rtl8152_probe(struct usb_interface *intf, | |||
2102 | tp = netdev_priv(netdev); | 2752 | tp = netdev_priv(netdev); |
2103 | tp->msg_enable = 0x7FFF; | 2753 | tp->msg_enable = 0x7FFF; |
2104 | 2754 | ||
2105 | tasklet_init(&tp->tl, bottom_half, (unsigned long)tp); | ||
2106 | INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t); | ||
2107 | |||
2108 | tp->udev = udev; | 2755 | tp->udev = udev; |
2109 | tp->netdev = netdev; | 2756 | tp->netdev = netdev; |
2110 | tp->intf = intf; | 2757 | tp->intf = intf; |
2758 | |||
2759 | ret = rtl_ops_init(tp, id); | ||
2760 | if (ret) | ||
2761 | goto out; | ||
2762 | |||
2763 | tasklet_init(&tp->tl, bottom_half, (unsigned long)tp); | ||
2764 | INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t); | ||
2765 | |||
2111 | netdev->netdev_ops = &rtl8152_netdev_ops; | 2766 | netdev->netdev_ops = &rtl8152_netdev_ops; |
2112 | netdev->watchdog_timeo = RTL8152_TX_TIMEOUT; | 2767 | netdev->watchdog_timeo = RTL8152_TX_TIMEOUT; |
2113 | 2768 | ||
@@ -2124,7 +2779,7 @@ static int rtl8152_probe(struct usb_interface *intf, | |||
2124 | tp->mii.supports_gmii = 0; | 2779 | tp->mii.supports_gmii = 0; |
2125 | 2780 | ||
2126 | r8152b_get_version(tp); | 2781 | r8152b_get_version(tp); |
2127 | r8152b_init(tp); | 2782 | tp->rtl_ops.init(tp); |
2128 | set_ethernet_addr(tp); | 2783 | set_ethernet_addr(tp); |
2129 | 2784 | ||
2130 | ret = alloc_all_mem(tp); | 2785 | ret = alloc_all_mem(tp); |
@@ -2135,11 +2790,11 @@ static int rtl8152_probe(struct usb_interface *intf, | |||
2135 | 2790 | ||
2136 | ret = register_netdev(netdev); | 2791 | ret = register_netdev(netdev); |
2137 | if (ret != 0) { | 2792 | if (ret != 0) { |
2138 | netif_err(tp, probe, netdev, "couldn't register the device"); | 2793 | netif_err(tp, probe, netdev, "couldn't register the device\n"); |
2139 | goto out1; | 2794 | goto out1; |
2140 | } | 2795 | } |
2141 | 2796 | ||
2142 | netif_info(tp, probe, netdev, "%s", DRIVER_VERSION); | 2797 | netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION); |
2143 | 2798 | ||
2144 | return 0; | 2799 | return 0; |
2145 | 2800 | ||
@@ -2150,21 +2805,6 @@ out: | |||
2150 | return ret; | 2805 | return ret; |
2151 | } | 2806 | } |
2152 | 2807 | ||
2153 | static void rtl8152_unload(struct r8152 *tp) | ||
2154 | { | ||
2155 | u32 ocp_data; | ||
2156 | |||
2157 | if (tp->version != RTL_VER_01) { | ||
2158 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL); | ||
2159 | ocp_data |= POWER_CUT; | ||
2160 | ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data); | ||
2161 | } | ||
2162 | |||
2163 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS); | ||
2164 | ocp_data &= ~RWSUME_INDICATE; | ||
2165 | ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data); | ||
2166 | } | ||
2167 | |||
2168 | static void rtl8152_disconnect(struct usb_interface *intf) | 2808 | static void rtl8152_disconnect(struct usb_interface *intf) |
2169 | { | 2809 | { |
2170 | struct r8152 *tp = usb_get_intfdata(intf); | 2810 | struct r8152 *tp = usb_get_intfdata(intf); |
@@ -2174,7 +2814,7 @@ static void rtl8152_disconnect(struct usb_interface *intf) | |||
2174 | set_bit(RTL8152_UNPLUG, &tp->flags); | 2814 | set_bit(RTL8152_UNPLUG, &tp->flags); |
2175 | tasklet_kill(&tp->tl); | 2815 | tasklet_kill(&tp->tl); |
2176 | unregister_netdev(tp->netdev); | 2816 | unregister_netdev(tp->netdev); |
2177 | rtl8152_unload(tp); | 2817 | tp->rtl_ops.unload(tp); |
2178 | free_all_mem(tp); | 2818 | free_all_mem(tp); |
2179 | free_netdev(tp->netdev); | 2819 | free_netdev(tp->netdev); |
2180 | } | 2820 | } |
@@ -2183,6 +2823,8 @@ static void rtl8152_disconnect(struct usb_interface *intf) | |||
2183 | /* table of devices that work with this driver */ | 2823 | /* table of devices that work with this driver */ |
2184 | static struct usb_device_id rtl8152_table[] = { | 2824 | static struct usb_device_id rtl8152_table[] = { |
2185 | {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)}, | 2825 | {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)}, |
2826 | {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)}, | ||
2827 | {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)}, | ||
2186 | {} | 2828 | {} |
2187 | }; | 2829 | }; |
2188 | 2830 | ||