1 files changed, 46 insertions, 67 deletions

diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index e2f2e91cfdd2..40c6eba775ce 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -65,8 +65,6 @@
 
 static DEFINE_SPINLOCK(ugeth_lock);
 
-static void uec_configure_serdes(struct net_device *dev);
-
 static struct {
         u32 msg_enable;
 } debug = { -1 };
@@ -1536,6 +1534,49 @@ static void adjust_link(struct net_device *dev)
         spin_unlock_irqrestore(&ugeth->lock, flags);
 }
 
+/* Initialize TBI PHY interface for communicating with the
+ * SERDES lynx PHY on the chip.  We communicate with this PHY
+ * through the MDIO bus on each controller, treating it as a
+ * "normal" PHY at the address found in the UTBIPA register.  We assume
+ * that the UTBIPA register is valid.  Either the MDIO bus code will set
+ * it to a value that doesn't conflict with other PHYs on the bus, or the
+ * value doesn't matter, as there are no other PHYs on the bus.
+ */
+static void uec_configure_serdes(struct net_device *dev)
+{
+        struct ucc_geth_private *ugeth = netdev_priv(dev);
+        struct ucc_geth_info *ug_info = ugeth->ug_info;
+        struct phy_device *tbiphy;
+
+        if (!ug_info->tbi_node) {
+                dev_warn(&dev->dev, "SGMII mode requires that the device "
+                        "tree specify a tbi-handle\n");
+                return;
+        }
+
+        tbiphy = of_phy_find_device(ug_info->tbi_node);
+        if (!tbiphy) {
+                dev_err(&dev->dev, "error: Could not get TBI device\n");
+                return;
+        }
+
+        /*
+         * If the link is already up, we must already be ok, and don't need to
+         * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
+         * everything for us?  Resetting it takes the link down and requires
+         * several seconds for it to come back.
+         */
+        if (phy_read(tbiphy, ENET_TBI_MII_SR) & TBISR_LSTATUS)
+                return;
+
+        /* Single clk mode, mii mode off(for serdes communication) */
+        phy_write(tbiphy, ENET_TBI_MII_ANA, TBIANA_SETTINGS);
+
+        phy_write(tbiphy, ENET_TBI_MII_TBICON, TBICON_CLK_SELECT);
+
+        phy_write(tbiphy, ENET_TBI_MII_CR, TBICR_SETTINGS);
+}
+
 /* Configure the PHY for dev.
  * returns 0 if success.  -1 if failure
  */
@@ -1577,41 +1618,7 @@ static int init_phy(struct net_device *dev)
         return 0;
 }
 
-/* Initialize TBI PHY interface for communicating with the
- * SERDES lynx PHY on the chip.  We communicate with this PHY
- * through the MDIO bus on each controller, treating it as a
- * "normal" PHY at the address found in the UTBIPA register.  We assume
- * that the UTBIPA register is valid.  Either the MDIO bus code will set
- * it to a value that doesn't conflict with other PHYs on the bus, or the
- * value doesn't matter, as there are no other PHYs on the bus.
- */
-static void uec_configure_serdes(struct net_device *dev)
-{
-        struct ucc_geth_private *ugeth = netdev_priv(dev);
-
-        if (!ugeth->tbiphy) {
-                printk(KERN_WARNING "SGMII mode requires that the device "
-                        "tree specify a tbi-handle\n");
-        return;
-        }
 
-        /*
-         * If the link is already up, we must already be ok, and don't need to
-         * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
-         * everything for us?  Resetting it takes the link down and requires
-         * several seconds for it to come back.
-         */
-        if (phy_read(ugeth->tbiphy, ENET_TBI_MII_SR) & TBISR_LSTATUS)
-                return;
-
-        /* Single clk mode, mii mode off(for serdes communication) */
-        phy_write(ugeth->tbiphy, ENET_TBI_MII_ANA, TBIANA_SETTINGS);
-
-        phy_write(ugeth->tbiphy, ENET_TBI_MII_TBICON, TBICON_CLK_SELECT);
-
-        phy_write(ugeth->tbiphy, ENET_TBI_MII_CR, TBICR_SETTINGS);
-
-}
 
 static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth)
 {
@@ -3711,6 +3718,9 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
         }
         ug_info->phy_node = phy;
 
+        /* Find the TBI PHY node.  If it's not there, we don't support SGMII */
+        ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
+
         /* get the phy interface type, or default to MII */
         prop = of_get_property(np, "phy-connection-type", NULL);
         if (!prop) {
@@ -3818,37 +3828,6 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
         ugeth->ndev = dev;
         ugeth->node = np;
 
-        /* Find the TBI PHY.  If it's not there, we don't support SGMII */
-        ph = of_get_property(np, "tbi-handle", NULL);
-        if (ph) {
-                struct device_node *tbi = of_find_node_by_phandle(*ph);
-                struct of_device *ofdev;
-                struct mii_bus *bus;
-                const unsigned int *id;
-
-                if (!tbi)
-                        return 0;
-
-                mdio = of_get_parent(tbi);
-                if (!mdio)
-                        return 0;
-
-                ofdev = of_find_device_by_node(mdio);
-
-                of_node_put(mdio);
-
-                id = of_get_property(tbi, "reg", NULL);
-                if (!id)
-                        return 0;
-                of_node_put(tbi);
-
-                bus = dev_get_drvdata(&ofdev->dev);
-                if (!bus)
-                        return 0;
-
-                ugeth->tbiphy = bus->phy_map[*id];
-        }
-
         return 0;
 }