diff options
Diffstat (limited to 'drivers/net/tulip')
-rw-r--r-- | drivers/net/tulip/tulip.h | 7 | ||||
-rw-r--r-- | drivers/net/tulip/tulip_core.c | 19 |
2 files changed, 11 insertions, 15 deletions
diff --git a/drivers/net/tulip/tulip.h b/drivers/net/tulip/tulip.h index 3f69f53d7768..908422f2f320 100644 --- a/drivers/net/tulip/tulip.h +++ b/drivers/net/tulip/tulip.h | |||
@@ -268,7 +268,12 @@ enum t21143_csr6_bits { | |||
268 | #define RX_RING_SIZE 128 | 268 | #define RX_RING_SIZE 128 |
269 | #define MEDIA_MASK 31 | 269 | #define MEDIA_MASK 31 |
270 | 270 | ||
271 | #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */ | 271 | /* The receiver on the DC21143 rev 65 can fail to close the last |
272 | * receive descriptor in certain circumstances (see errata) when | ||
273 | * using MWI. This can only occur if the receive buffer ends on | ||
274 | * a cache line boundary, so the "+ 4" below ensures it doesn't. | ||
275 | */ | ||
276 | #define PKT_BUF_SZ (1536 + 4) /* Size of each temporary Rx buffer. */ | ||
272 | 277 | ||
273 | #define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */ | 278 | #define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */ |
274 | 279 | ||
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index 82f404b76d81..fa1c1c329a2d 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c | |||
@@ -1154,18 +1154,13 @@ static void __devinit tulip_mwi_config (struct pci_dev *pdev, | |||
1154 | 1154 | ||
1155 | tp->csr0 = csr0 = 0; | 1155 | tp->csr0 = csr0 = 0; |
1156 | 1156 | ||
1157 | /* if we have any cache line size at all, we can do MRM */ | 1157 | /* if we have any cache line size at all, we can do MRM and MWI */ |
1158 | csr0 |= MRM; | 1158 | csr0 |= MRM | MWI; |
1159 | 1159 | ||
1160 | /* ...and barring hardware bugs, MWI */ | 1160 | /* Enable MWI in the standard PCI command bit. |
1161 | if (!(tp->chip_id == DC21143 && tp->revision == 65)) | 1161 | * Check for the case where MWI is desired but not available |
1162 | csr0 |= MWI; | ||
1163 | |||
1164 | /* set or disable MWI in the standard PCI command bit. | ||
1165 | * Check for the case where mwi is desired but not available | ||
1166 | */ | 1162 | */ |
1167 | if (csr0 & MWI) pci_try_set_mwi(pdev); | 1163 | pci_try_set_mwi(pdev); |
1168 | else pci_clear_mwi(pdev); | ||
1169 | 1164 | ||
1170 | /* read result from hardware (in case bit refused to enable) */ | 1165 | /* read result from hardware (in case bit refused to enable) */ |
1171 | pci_read_config_word(pdev, PCI_COMMAND, &pci_command); | 1166 | pci_read_config_word(pdev, PCI_COMMAND, &pci_command); |
@@ -1401,10 +1396,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1401 | #ifdef CONFIG_TULIP_MWI | 1396 | #ifdef CONFIG_TULIP_MWI |
1402 | if (!force_csr0 && (tp->flags & HAS_PCI_MWI)) | 1397 | if (!force_csr0 && (tp->flags & HAS_PCI_MWI)) |
1403 | tulip_mwi_config (pdev, dev); | 1398 | tulip_mwi_config (pdev, dev); |
1404 | #else | ||
1405 | /* MWI is broken for DC21143 rev 65... */ | ||
1406 | if (chip_idx == DC21143 && pdev->revision == 65) | ||
1407 | tp->csr0 &= ~MWI; | ||
1408 | #endif | 1399 | #endif |
1409 | 1400 | ||
1410 | /* Stop the chip's Tx and Rx processes. */ | 1401 | /* Stop the chip's Tx and Rx processes. */ |