diff options
Diffstat (limited to 'drivers/net/tulip/de4x5.c')
-rw-r--r-- | drivers/net/tulip/de4x5.c | 87 |
1 files changed, 9 insertions, 78 deletions
diff --git a/drivers/net/tulip/de4x5.c b/drivers/net/tulip/de4x5.c index 09b57193a16a..75a64c88cf7a 100644 --- a/drivers/net/tulip/de4x5.c +++ b/drivers/net/tulip/de4x5.c | |||
@@ -1337,7 +1337,7 @@ de4x5_open(struct net_device *dev) | |||
1337 | } | 1337 | } |
1338 | 1338 | ||
1339 | lp->interrupt = UNMASK_INTERRUPTS; | 1339 | lp->interrupt = UNMASK_INTERRUPTS; |
1340 | dev->trans_start = jiffies; | 1340 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1341 | 1341 | ||
1342 | START_DE4X5; | 1342 | START_DE4X5; |
1343 | 1343 | ||
@@ -1507,7 +1507,6 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev) | |||
1507 | outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ | 1507 | outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ |
1508 | 1508 | ||
1509 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 1509 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
1510 | dev->trans_start = jiffies; | ||
1511 | 1510 | ||
1512 | if (TX_BUFFS_AVAIL) { | 1511 | if (TX_BUFFS_AVAIL) { |
1513 | netif_start_queue(dev); /* Another pkt may be queued */ | 1512 | netif_start_queue(dev); /* Another pkt may be queued */ |
@@ -1884,8 +1883,6 @@ de4x5_local_stats(struct net_device *dev, char *buf, int pkt_len) | |||
1884 | if (lp->pktStats.bins[0] == 0) { /* Reset counters */ | 1883 | if (lp->pktStats.bins[0] == 0) { /* Reset counters */ |
1885 | memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats)); | 1884 | memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats)); |
1886 | } | 1885 | } |
1887 | |||
1888 | return; | ||
1889 | } | 1886 | } |
1890 | 1887 | ||
1891 | /* | 1888 | /* |
@@ -1937,7 +1934,7 @@ set_multicast_list(struct net_device *dev) | |||
1937 | 1934 | ||
1938 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 1935 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
1939 | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ | 1936 | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ |
1940 | dev->trans_start = jiffies; | 1937 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1941 | } | 1938 | } |
1942 | } | 1939 | } |
1943 | } | 1940 | } |
@@ -1951,7 +1948,7 @@ static void | |||
1951 | SetMulticastFilter(struct net_device *dev) | 1948 | SetMulticastFilter(struct net_device *dev) |
1952 | { | 1949 | { |
1953 | struct de4x5_private *lp = netdev_priv(dev); | 1950 | struct de4x5_private *lp = netdev_priv(dev); |
1954 | struct dev_mc_list *dmi; | 1951 | struct netdev_hw_addr *ha; |
1955 | u_long iobase = dev->base_addr; | 1952 | u_long iobase = dev->base_addr; |
1956 | int i, bit, byte; | 1953 | int i, bit, byte; |
1957 | u16 hashcode; | 1954 | u16 hashcode; |
@@ -1966,8 +1963,8 @@ SetMulticastFilter(struct net_device *dev) | |||
1966 | if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 14)) { | 1963 | if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 14)) { |
1967 | omr |= OMR_PM; /* Pass all multicasts */ | 1964 | omr |= OMR_PM; /* Pass all multicasts */ |
1968 | } else if (lp->setup_f == HASH_PERF) { /* Hash Filtering */ | 1965 | } else if (lp->setup_f == HASH_PERF) { /* Hash Filtering */ |
1969 | netdev_for_each_mc_addr(dmi, dev) { | 1966 | netdev_for_each_mc_addr(ha, dev) { |
1970 | addrs = dmi->dmi_addr; | 1967 | addrs = ha->addr; |
1971 | if ((*addrs & 0x01) == 1) { /* multicast address? */ | 1968 | if ((*addrs & 0x01) == 1) { /* multicast address? */ |
1972 | crc = ether_crc_le(ETH_ALEN, addrs); | 1969 | crc = ether_crc_le(ETH_ALEN, addrs); |
1973 | hashcode = crc & HASH_BITS; /* hashcode is 9 LSb of CRC */ | 1970 | hashcode = crc & HASH_BITS; /* hashcode is 9 LSb of CRC */ |
@@ -1983,8 +1980,8 @@ SetMulticastFilter(struct net_device *dev) | |||
1983 | } | 1980 | } |
1984 | } | 1981 | } |
1985 | } else { /* Perfect filtering */ | 1982 | } else { /* Perfect filtering */ |
1986 | netdev_for_each_mc_addr(dmi, dev) { | 1983 | netdev_for_each_mc_addr(ha, dev) { |
1987 | addrs = dmi->dmi_addr; | 1984 | addrs = ha->addr; |
1988 | for (i=0; i<ETH_ALEN; i++) { | 1985 | for (i=0; i<ETH_ALEN; i++) { |
1989 | *(pa + (i&1)) = *addrs++; | 1986 | *(pa + (i&1)) = *addrs++; |
1990 | if (i & 0x01) pa += 4; | 1987 | if (i & 0x01) pa += 4; |
@@ -1992,8 +1989,6 @@ SetMulticastFilter(struct net_device *dev) | |||
1992 | } | 1989 | } |
1993 | } | 1990 | } |
1994 | outl(omr, DE4X5_OMR); | 1991 | outl(omr, DE4X5_OMR); |
1995 | |||
1996 | return; | ||
1997 | } | 1992 | } |
1998 | 1993 | ||
1999 | #ifdef CONFIG_EISA | 1994 | #ifdef CONFIG_EISA |
@@ -2188,8 +2183,6 @@ srom_search(struct net_device *dev, struct pci_dev *pdev) | |||
2188 | return; | 2183 | return; |
2189 | } | 2184 | } |
2190 | } | 2185 | } |
2191 | |||
2192 | return; | ||
2193 | } | 2186 | } |
2194 | 2187 | ||
2195 | /* | 2188 | /* |
@@ -3292,8 +3285,6 @@ de4x5_init_connection(struct net_device *dev) | |||
3292 | outl(POLL_DEMAND, DE4X5_TPD); | 3285 | outl(POLL_DEMAND, DE4X5_TPD); |
3293 | 3286 | ||
3294 | netif_wake_queue(dev); | 3287 | netif_wake_queue(dev); |
3295 | |||
3296 | return; | ||
3297 | } | 3288 | } |
3298 | 3289 | ||
3299 | /* | 3290 | /* |
@@ -3665,8 +3656,6 @@ de4x5_free_rx_buffs(struct net_device *dev) | |||
3665 | lp->rx_ring[i].status = 0; | 3656 | lp->rx_ring[i].status = 0; |
3666 | lp->rx_skb[i] = (struct sk_buff *)1; /* Dummy entry */ | 3657 | lp->rx_skb[i] = (struct sk_buff *)1; /* Dummy entry */ |
3667 | } | 3658 | } |
3668 | |||
3669 | return; | ||
3670 | } | 3659 | } |
3671 | 3660 | ||
3672 | static void | 3661 | static void |
@@ -3709,8 +3698,6 @@ de4x5_save_skbs(struct net_device *dev) | |||
3709 | lp->cache.save_cnt++; | 3698 | lp->cache.save_cnt++; |
3710 | START_DE4X5; | 3699 | START_DE4X5; |
3711 | } | 3700 | } |
3712 | |||
3713 | return; | ||
3714 | } | 3701 | } |
3715 | 3702 | ||
3716 | static void | 3703 | static void |
@@ -3742,8 +3729,6 @@ de4x5_rst_desc_ring(struct net_device *dev) | |||
3742 | lp->cache.save_cnt--; | 3729 | lp->cache.save_cnt--; |
3743 | START_DE4X5; | 3730 | START_DE4X5; |
3744 | } | 3731 | } |
3745 | |||
3746 | return; | ||
3747 | } | 3732 | } |
3748 | 3733 | ||
3749 | static void | 3734 | static void |
@@ -3772,8 +3757,6 @@ de4x5_cache_state(struct net_device *dev, int flag) | |||
3772 | } | 3757 | } |
3773 | break; | 3758 | break; |
3774 | } | 3759 | } |
3775 | |||
3776 | return; | ||
3777 | } | 3760 | } |
3778 | 3761 | ||
3779 | static void | 3762 | static void |
@@ -3846,8 +3829,6 @@ de4x5_setup_intr(struct net_device *dev) | |||
3846 | outl(sts, DE4X5_STS); | 3829 | outl(sts, DE4X5_STS); |
3847 | ENABLE_IRQs; | 3830 | ENABLE_IRQs; |
3848 | } | 3831 | } |
3849 | |||
3850 | return; | ||
3851 | } | 3832 | } |
3852 | 3833 | ||
3853 | /* | 3834 | /* |
@@ -3880,8 +3861,6 @@ reset_init_sia(struct net_device *dev, s32 csr13, s32 csr14, s32 csr15) | |||
3880 | outl(csr13, DE4X5_SICR); | 3861 | outl(csr13, DE4X5_SICR); |
3881 | 3862 | ||
3882 | mdelay(10); | 3863 | mdelay(10); |
3883 | |||
3884 | return; | ||
3885 | } | 3864 | } |
3886 | 3865 | ||
3887 | /* | 3866 | /* |
@@ -3902,8 +3881,6 @@ create_packet(struct net_device *dev, char *frame, int len) | |||
3902 | 3881 | ||
3903 | *buf++ = 0; /* Packet length (2 bytes) */ | 3882 | *buf++ = 0; /* Packet length (2 bytes) */ |
3904 | *buf++ = 1; | 3883 | *buf++ = 1; |
3905 | |||
3906 | return; | ||
3907 | } | 3884 | } |
3908 | 3885 | ||
3909 | /* | 3886 | /* |
@@ -4007,8 +3984,6 @@ DevicePresent(struct net_device *dev, u_long aprom_addr) | |||
4007 | } | 3984 | } |
4008 | de4x5_dbg_srom((struct de4x5_srom *)&lp->srom); | 3985 | de4x5_dbg_srom((struct de4x5_srom *)&lp->srom); |
4009 | } | 3986 | } |
4010 | |||
4011 | return; | ||
4012 | } | 3987 | } |
4013 | 3988 | ||
4014 | /* | 3989 | /* |
@@ -4046,8 +4021,6 @@ enet_addr_rst(u_long aprom_addr) | |||
4046 | } | 4021 | } |
4047 | } | 4022 | } |
4048 | } | 4023 | } |
4049 | |||
4050 | return; | ||
4051 | } | 4024 | } |
4052 | 4025 | ||
4053 | /* | 4026 | /* |
@@ -4187,8 +4160,6 @@ srom_repair(struct net_device *dev, int card) | |||
4187 | lp->useSROM = true; | 4160 | lp->useSROM = true; |
4188 | break; | 4161 | break; |
4189 | } | 4162 | } |
4190 | |||
4191 | return; | ||
4192 | } | 4163 | } |
4193 | 4164 | ||
4194 | /* | 4165 | /* |
@@ -4262,8 +4233,6 @@ srom_latch(u_int command, u_long addr) | |||
4262 | sendto_srom(command, addr); | 4233 | sendto_srom(command, addr); |
4263 | sendto_srom(command | DT_CLK, addr); | 4234 | sendto_srom(command | DT_CLK, addr); |
4264 | sendto_srom(command, addr); | 4235 | sendto_srom(command, addr); |
4265 | |||
4266 | return; | ||
4267 | } | 4236 | } |
4268 | 4237 | ||
4269 | static void | 4238 | static void |
@@ -4272,8 +4241,6 @@ srom_command(u_int command, u_long addr) | |||
4272 | srom_latch(command, addr); | 4241 | srom_latch(command, addr); |
4273 | srom_latch(command, addr); | 4242 | srom_latch(command, addr); |
4274 | srom_latch((command & 0x0000ff00) | DT_CS, addr); | 4243 | srom_latch((command & 0x0000ff00) | DT_CS, addr); |
4275 | |||
4276 | return; | ||
4277 | } | 4244 | } |
4278 | 4245 | ||
4279 | static void | 4246 | static void |
@@ -4288,8 +4255,6 @@ srom_address(u_int command, u_long addr, u_char offset) | |||
4288 | udelay(1); | 4255 | udelay(1); |
4289 | 4256 | ||
4290 | i = (getfrom_srom(addr) >> 3) & 0x01; | 4257 | i = (getfrom_srom(addr) >> 3) & 0x01; |
4291 | |||
4292 | return; | ||
4293 | } | 4258 | } |
4294 | 4259 | ||
4295 | static short | 4260 | static short |
@@ -4323,8 +4288,6 @@ srom_busy(u_int command, u_long addr) | |||
4323 | } | 4288 | } |
4324 | 4289 | ||
4325 | sendto_srom(command & 0x0000ff00, addr); | 4290 | sendto_srom(command & 0x0000ff00, addr); |
4326 | |||
4327 | return; | ||
4328 | } | 4291 | } |
4329 | */ | 4292 | */ |
4330 | 4293 | ||
@@ -4333,8 +4296,6 @@ sendto_srom(u_int command, u_long addr) | |||
4333 | { | 4296 | { |
4334 | outl(command, addr); | 4297 | outl(command, addr); |
4335 | udelay(1); | 4298 | udelay(1); |
4336 | |||
4337 | return; | ||
4338 | } | 4299 | } |
4339 | 4300 | ||
4340 | static int | 4301 | static int |
@@ -4433,8 +4394,6 @@ srom_init(struct net_device *dev) | |||
4433 | p += ((*p & BLOCK_LEN) + 1); | 4394 | p += ((*p & BLOCK_LEN) + 1); |
4434 | } | 4395 | } |
4435 | } | 4396 | } |
4436 | |||
4437 | return; | ||
4438 | } | 4397 | } |
4439 | 4398 | ||
4440 | /* | 4399 | /* |
@@ -4463,8 +4422,6 @@ srom_exec(struct net_device *dev, u_char *p) | |||
4463 | outl(lp->cache.csr14, DE4X5_STRR); | 4422 | outl(lp->cache.csr14, DE4X5_STRR); |
4464 | outl(lp->cache.csr13, DE4X5_SICR); | 4423 | outl(lp->cache.csr13, DE4X5_SICR); |
4465 | } | 4424 | } |
4466 | |||
4467 | return; | ||
4468 | } | 4425 | } |
4469 | 4426 | ||
4470 | /* | 4427 | /* |
@@ -4889,8 +4846,6 @@ mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr) | |||
4889 | mii_ta(MII_STWR, ioaddr); /* Turn around time - 2 MDC */ | 4846 | mii_ta(MII_STWR, ioaddr); /* Turn around time - 2 MDC */ |
4890 | data = mii_swap(data, 16); /* Swap data bit ordering */ | 4847 | data = mii_swap(data, 16); /* Swap data bit ordering */ |
4891 | mii_wdata(data, 16, ioaddr); /* Write data */ | 4848 | mii_wdata(data, 16, ioaddr); /* Write data */ |
4892 | |||
4893 | return; | ||
4894 | } | 4849 | } |
4895 | 4850 | ||
4896 | static int | 4851 | static int |
@@ -4916,8 +4871,6 @@ mii_wdata(int data, int len, u_long ioaddr) | |||
4916 | sendto_mii(MII_MWR | MII_WR, data, ioaddr); | 4871 | sendto_mii(MII_MWR | MII_WR, data, ioaddr); |
4917 | data >>= 1; | 4872 | data >>= 1; |
4918 | } | 4873 | } |
4919 | |||
4920 | return; | ||
4921 | } | 4874 | } |
4922 | 4875 | ||
4923 | static void | 4876 | static void |
@@ -4930,8 +4883,6 @@ mii_address(u_char addr, u_long ioaddr) | |||
4930 | sendto_mii(MII_MWR | MII_WR, addr, ioaddr); | 4883 | sendto_mii(MII_MWR | MII_WR, addr, ioaddr); |
4931 | addr >>= 1; | 4884 | addr >>= 1; |
4932 | } | 4885 | } |
4933 | |||
4934 | return; | ||
4935 | } | 4886 | } |
4936 | 4887 | ||
4937 | static void | 4888 | static void |
@@ -4943,8 +4894,6 @@ mii_ta(u_long rw, u_long ioaddr) | |||
4943 | } else { | 4894 | } else { |
4944 | getfrom_mii(MII_MRD | MII_RD, ioaddr); /* Tri-state MDIO */ | 4895 | getfrom_mii(MII_MRD | MII_RD, ioaddr); /* Tri-state MDIO */ |
4945 | } | 4896 | } |
4946 | |||
4947 | return; | ||
4948 | } | 4897 | } |
4949 | 4898 | ||
4950 | static int | 4899 | static int |
@@ -4971,8 +4920,6 @@ sendto_mii(u32 command, int data, u_long ioaddr) | |||
4971 | udelay(1); | 4920 | udelay(1); |
4972 | outl(command | MII_MDC | j, ioaddr); | 4921 | outl(command | MII_MDC | j, ioaddr); |
4973 | udelay(1); | 4922 | udelay(1); |
4974 | |||
4975 | return; | ||
4976 | } | 4923 | } |
4977 | 4924 | ||
4978 | static int | 4925 | static int |
@@ -5077,7 +5024,7 @@ mii_get_phy(struct net_device *dev) | |||
5077 | lp->phy[k].spd.value = GENERIC_VALUE; /* TX & T4, H/F Duplex */ | 5024 | lp->phy[k].spd.value = GENERIC_VALUE; /* TX & T4, H/F Duplex */ |
5078 | lp->mii_cnt++; | 5025 | lp->mii_cnt++; |
5079 | lp->active++; | 5026 | lp->active++; |
5080 | printk("%s: Using generic MII device control. If the board doesn't operate, \nplease mail the following dump to the author:\n", dev->name); | 5027 | printk("%s: Using generic MII device control. If the board doesn't operate,\nplease mail the following dump to the author:\n", dev->name); |
5081 | j = de4x5_debug; | 5028 | j = de4x5_debug; |
5082 | de4x5_debug |= DEBUG_MII; | 5029 | de4x5_debug |= DEBUG_MII; |
5083 | de4x5_dbg_mii(dev, k); | 5030 | de4x5_dbg_mii(dev, k); |
@@ -5186,8 +5133,6 @@ gep_wr(s32 data, struct net_device *dev) | |||
5186 | } else if ((lp->chipset & ~0x00ff) == DC2114x) { | 5133 | } else if ((lp->chipset & ~0x00ff) == DC2114x) { |
5187 | outl((data<<16) | lp->cache.csr15, DE4X5_SIGR); | 5134 | outl((data<<16) | lp->cache.csr15, DE4X5_SIGR); |
5188 | } | 5135 | } |
5189 | |||
5190 | return; | ||
5191 | } | 5136 | } |
5192 | 5137 | ||
5193 | static int | 5138 | static int |
@@ -5247,8 +5192,6 @@ yawn(struct net_device *dev, int state) | |||
5247 | break; | 5192 | break; |
5248 | } | 5193 | } |
5249 | } | 5194 | } |
5250 | |||
5251 | return; | ||
5252 | } | 5195 | } |
5253 | 5196 | ||
5254 | static void | 5197 | static void |
@@ -5290,8 +5233,6 @@ de4x5_parse_params(struct net_device *dev) | |||
5290 | } | 5233 | } |
5291 | *q = t; | 5234 | *q = t; |
5292 | } | 5235 | } |
5293 | |||
5294 | return; | ||
5295 | } | 5236 | } |
5296 | 5237 | ||
5297 | static void | 5238 | static void |
@@ -5337,12 +5278,10 @@ de4x5_dbg_open(struct net_device *dev) | |||
5337 | } | 5278 | } |
5338 | } | 5279 | } |
5339 | printk("...0x%8.8x\n", le32_to_cpu(lp->tx_ring[i].buf)); | 5280 | printk("...0x%8.8x\n", le32_to_cpu(lp->tx_ring[i].buf)); |
5340 | printk("Ring size: \nRX: %d\nTX: %d\n", | 5281 | printk("Ring size:\nRX: %d\nTX: %d\n", |
5341 | (short)lp->rxRingSize, | 5282 | (short)lp->rxRingSize, |
5342 | (short)lp->txRingSize); | 5283 | (short)lp->txRingSize); |
5343 | } | 5284 | } |
5344 | |||
5345 | return; | ||
5346 | } | 5285 | } |
5347 | 5286 | ||
5348 | static void | 5287 | static void |
@@ -5369,8 +5308,6 @@ de4x5_dbg_mii(struct net_device *dev, int k) | |||
5369 | printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII)); | 5308 | printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII)); |
5370 | } | 5309 | } |
5371 | } | 5310 | } |
5372 | |||
5373 | return; | ||
5374 | } | 5311 | } |
5375 | 5312 | ||
5376 | static void | 5313 | static void |
@@ -5395,8 +5332,6 @@ de4x5_dbg_media(struct net_device *dev) | |||
5395 | } | 5332 | } |
5396 | lp->c_media = lp->media; | 5333 | lp->c_media = lp->media; |
5397 | } | 5334 | } |
5398 | |||
5399 | return; | ||
5400 | } | 5335 | } |
5401 | 5336 | ||
5402 | static void | 5337 | static void |
@@ -5417,8 +5352,6 @@ de4x5_dbg_srom(struct de4x5_srom *p) | |||
5417 | printk("%3d %04x\n", i<<1, (u_short)*((u_short *)p+i)); | 5352 | printk("%3d %04x\n", i<<1, (u_short)*((u_short *)p+i)); |
5418 | } | 5353 | } |
5419 | } | 5354 | } |
5420 | |||
5421 | return; | ||
5422 | } | 5355 | } |
5423 | 5356 | ||
5424 | static void | 5357 | static void |
@@ -5440,8 +5373,6 @@ de4x5_dbg_rx(struct sk_buff *skb, int len) | |||
5440 | printk("\n"); | 5373 | printk("\n"); |
5441 | } | 5374 | } |
5442 | } | 5375 | } |
5443 | |||
5444 | return; | ||
5445 | } | 5376 | } |
5446 | 5377 | ||
5447 | /* | 5378 | /* |