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path: root/drivers/net/tulip/de4x5.c
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Diffstat (limited to 'drivers/net/tulip/de4x5.c')
-rw-r--r--drivers/net/tulip/de4x5.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/net/tulip/de4x5.c b/drivers/net/tulip/de4x5.c
index 1d9fef74b39b..251c6ce15aea 100644
--- a/drivers/net/tulip/de4x5.c
+++ b/drivers/net/tulip/de4x5.c
@@ -3119,7 +3119,7 @@ dc2114x_autoconf(struct net_device *dev)
3119 if (lp->media == _100Mb) { 3119 if (lp->media == _100Mb) {
3120 if ((slnk = test_for_100Mb(dev, 6500)) < 0) { 3120 if ((slnk = test_for_100Mb(dev, 6500)) < 0) {
3121 lp->media = SPD_DET; 3121 lp->media = SPD_DET;
3122 return (slnk & ~TIMER_CB); 3122 return slnk & ~TIMER_CB;
3123 } 3123 }
3124 } else { 3124 } else {
3125 if (wait_for_link(dev) < 0) { 3125 if (wait_for_link(dev) < 0) {
@@ -3484,7 +3484,7 @@ is_spd_100(struct net_device *dev)
3484 spd = ((~gep_rd(dev)) & GEP_SLNK); 3484 spd = ((~gep_rd(dev)) & GEP_SLNK);
3485 } else { 3485 } else {
3486 if ((lp->ibn == 2) || !lp->asBitValid) 3486 if ((lp->ibn == 2) || !lp->asBitValid)
3487 return ((lp->chipset == DC21143)?(~inl(DE4X5_SISR)&SISR_LS100):0); 3487 return (lp->chipset == DC21143) ? (~inl(DE4X5_SISR)&SISR_LS100) : 0;
3488 3488
3489 spd = (lp->asBitValid & (lp->asPolarity ^ (gep_rd(dev) & lp->asBit))) | 3489 spd = (lp->asBitValid & (lp->asPolarity ^ (gep_rd(dev) & lp->asBit))) |
3490 (lp->linkOK & ~lp->asBitValid); 3490 (lp->linkOK & ~lp->asBitValid);
@@ -3502,15 +3502,15 @@ is_100_up(struct net_device *dev)
3502 if (lp->useMII) { 3502 if (lp->useMII) {
3503 /* Double read for sticky bits & temporary drops */ 3503 /* Double read for sticky bits & temporary drops */
3504 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); 3504 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
3505 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS); 3505 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS;
3506 } else if (!lp->useSROM) { /* de500-xa */ 3506 } else if (!lp->useSROM) { /* de500-xa */
3507 return ((~gep_rd(dev)) & GEP_SLNK); 3507 return (~gep_rd(dev)) & GEP_SLNK;
3508 } else { 3508 } else {
3509 if ((lp->ibn == 2) || !lp->asBitValid) 3509 if ((lp->ibn == 2) || !lp->asBitValid)
3510 return ((lp->chipset == DC21143)?(~inl(DE4X5_SISR)&SISR_LS100):0); 3510 return (lp->chipset == DC21143) ? (~inl(DE4X5_SISR)&SISR_LS100) : 0;
3511 3511
3512 return ((lp->asBitValid&(lp->asPolarity^(gep_rd(dev)&lp->asBit))) | 3512 return (lp->asBitValid&(lp->asPolarity^(gep_rd(dev)&lp->asBit))) |
3513 (lp->linkOK & ~lp->asBitValid)); 3513 (lp->linkOK & ~lp->asBitValid);
3514 } 3514 }
3515} 3515}
3516 3516
@@ -3523,17 +3523,17 @@ is_10_up(struct net_device *dev)
3523 if (lp->useMII) { 3523 if (lp->useMII) {
3524 /* Double read for sticky bits & temporary drops */ 3524 /* Double read for sticky bits & temporary drops */
3525 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); 3525 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
3526 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS); 3526 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS;
3527 } else if (!lp->useSROM) { /* de500-xa */ 3527 } else if (!lp->useSROM) { /* de500-xa */
3528 return ((~gep_rd(dev)) & GEP_LNP); 3528 return (~gep_rd(dev)) & GEP_LNP;
3529 } else { 3529 } else {
3530 if ((lp->ibn == 2) || !lp->asBitValid) 3530 if ((lp->ibn == 2) || !lp->asBitValid)
3531 return (((lp->chipset & ~0x00ff) == DC2114x) ? 3531 return ((lp->chipset & ~0x00ff) == DC2114x) ?
3532 (~inl(DE4X5_SISR)&SISR_LS10): 3532 (~inl(DE4X5_SISR)&SISR_LS10):
3533 0); 3533 0;
3534 3534
3535 return ((lp->asBitValid&(lp->asPolarity^(gep_rd(dev)&lp->asBit))) | 3535 return (lp->asBitValid&(lp->asPolarity^(gep_rd(dev)&lp->asBit))) |
3536 (lp->linkOK & ~lp->asBitValid)); 3536 (lp->linkOK & ~lp->asBitValid);
3537 } 3537 }
3538} 3538}
3539 3539
@@ -3544,7 +3544,7 @@ is_anc_capable(struct net_device *dev)
3544 u_long iobase = dev->base_addr; 3544 u_long iobase = dev->base_addr;
3545 3545
3546 if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { 3546 if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) {
3547 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII)); 3547 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
3548 } else if ((lp->chipset & ~0x00ff) == DC2114x) { 3548 } else if ((lp->chipset & ~0x00ff) == DC2114x) {
3549 return (inl(DE4X5_SISR) & SISR_LPN) >> 12; 3549 return (inl(DE4X5_SISR) & SISR_LPN) >> 12;
3550 } else { 3550 } else {
@@ -4930,7 +4930,7 @@ getfrom_mii(u32 command, u_long ioaddr)
4930 outl(command | MII_MDC, ioaddr); 4930 outl(command | MII_MDC, ioaddr);
4931 udelay(1); 4931 udelay(1);
4932 4932
4933 return ((inl(ioaddr) >> 19) & 1); 4933 return (inl(ioaddr) >> 19) & 1;
4934} 4934}
4935 4935
4936/* 4936/*
@@ -4975,8 +4975,8 @@ mii_get_oui(u_char phyaddr, u_long ioaddr)
4975 a.breg[0]=a.breg[1]; 4975 a.breg[0]=a.breg[1];
4976 a.breg[1]=i; 4976 a.breg[1]=i;
4977 4977
4978 return ((a.reg<<8)|ret); */ /* SEEQ and Cypress way */ 4978 return (a.reg<<8)|ret; */ /* SEEQ and Cypress way */
4979/* return ((r2<<6)|(u_int)(r3>>10)); */ /* NATIONAL and BROADCOM way */ 4979/* return (r2<<6)|(u_int)(r3>>10); */ /* NATIONAL and BROADCOM way */
4980 return r2; /* (I did it) My way */ 4980 return r2; /* (I did it) My way */
4981} 4981}
4982 4982
@@ -5144,7 +5144,7 @@ gep_rd(struct net_device *dev)
5144 if (lp->chipset == DC21140) { 5144 if (lp->chipset == DC21140) {
5145 return inl(DE4X5_GEP); 5145 return inl(DE4X5_GEP);
5146 } else if ((lp->chipset & ~0x00ff) == DC2114x) { 5146 } else if ((lp->chipset & ~0x00ff) == DC2114x) {
5147 return (inl(DE4X5_SIGR) & 0x000fffff); 5147 return inl(DE4X5_SIGR) & 0x000fffff;
5148 } 5148 }
5149 5149
5150 return 0; 5150 return 0;