diff options
Diffstat (limited to 'drivers/net/tg3.h')
| -rw-r--r-- | drivers/net/tg3.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index bd9f4f428e5b..d84e75e7365d 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
| @@ -1467,6 +1467,7 @@ | |||
| 1467 | #define FLASH_5755VENDOR_ATMEL_FLASH_2 0x03400002 | 1467 | #define FLASH_5755VENDOR_ATMEL_FLASH_2 0x03400002 |
| 1468 | #define FLASH_5755VENDOR_ATMEL_FLASH_3 0x03400000 | 1468 | #define FLASH_5755VENDOR_ATMEL_FLASH_3 0x03400000 |
| 1469 | #define FLASH_5755VENDOR_ATMEL_FLASH_4 0x00000003 | 1469 | #define FLASH_5755VENDOR_ATMEL_FLASH_4 0x00000003 |
| 1470 | #define FLASH_5755VENDOR_ATMEL_FLASH_5 0x02000003 | ||
| 1470 | #define FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ 0x03c00003 | 1471 | #define FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ 0x03c00003 |
| 1471 | #define FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ 0x03c00002 | 1472 | #define FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ 0x03c00002 |
| 1472 | #define FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ 0x03000003 | 1473 | #define FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ 0x03000003 |
| @@ -1642,6 +1643,11 @@ | |||
| 1642 | 1643 | ||
| 1643 | #define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ | 1644 | #define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ |
| 1644 | 1645 | ||
| 1646 | #define MII_TG3_AUXCTL_MISC_WREN 0x8000 | ||
| 1647 | #define MII_TG3_AUXCTL_MISC_FORCE_AMDIX 0x0200 | ||
| 1648 | #define MII_TG3_AUXCTL_MISC_RDSEL_MISC 0x7000 | ||
| 1649 | #define MII_TG3_AUXCTL_SHDWSEL_MISC 0x0007 | ||
| 1650 | |||
| 1645 | #define MII_TG3_AUX_STAT 0x19 /* auxilliary status register */ | 1651 | #define MII_TG3_AUX_STAT 0x19 /* auxilliary status register */ |
| 1646 | #define MII_TG3_AUX_STAT_LPASS 0x0004 | 1652 | #define MII_TG3_AUX_STAT_LPASS 0x0004 |
| 1647 | #define MII_TG3_AUX_STAT_SPDMASK 0x0700 | 1653 | #define MII_TG3_AUX_STAT_SPDMASK 0x0700 |
| @@ -1667,6 +1673,9 @@ | |||
| 1667 | #define MII_TG3_EPHY_TEST 0x1f /* 5906 PHY register */ | 1673 | #define MII_TG3_EPHY_TEST 0x1f /* 5906 PHY register */ |
| 1668 | #define MII_TG3_EPHY_SHADOW_EN 0x80 | 1674 | #define MII_TG3_EPHY_SHADOW_EN 0x80 |
| 1669 | 1675 | ||
| 1676 | #define MII_TG3_EPHYTST_MISCCTRL 0x10 /* 5906 EPHY misc ctrl shadow register */ | ||
| 1677 | #define MII_TG3_EPHYTST_MISCCTRL_MDIX 0x4000 | ||
| 1678 | |||
| 1670 | #define MII_TG3_TEST1 0x1e | 1679 | #define MII_TG3_TEST1 0x1e |
| 1671 | #define MII_TG3_TEST1_TRIM_EN 0x0010 | 1680 | #define MII_TG3_TEST1_TRIM_EN 0x0010 |
| 1672 | #define MII_TG3_TEST1_CRC_EN 0x8000 | 1681 | #define MII_TG3_TEST1_CRC_EN 0x8000 |