1 files changed, 17 insertions, 2 deletions

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 7e3b613afb29..baa34c4721db 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -138,6 +138,7 @@
 #define   ASIC_REV_5752                  0x06
 #define   ASIC_REV_5780                  0x08
 #define   ASIC_REV_5714                  0x09
+#define   ASIC_REV_5787                  0x0b
 #define  GET_CHIP_REV(CHIP_REV_ID)      ((CHIP_REV_ID) >> 8)
 #define   CHIPREV_5700_AX                0x70
 #define   CHIPREV_5700_BX                0x71
@@ -1393,6 +1394,7 @@
 #define GRC_MDI_CTRL                    0x00006844
 #define GRC_SEEPROM_DELAY               0x00006848
 /* 0x684c --> 0x6c00 unused */
+#define GRC_FASTBOOT_PC                 0x00006894      /* 5752, 5755, 5787 */
 
 /* 0x6c00 --> 0x7000 unused */
 
@@ -1436,6 +1438,13 @@
 #define  FLASH_5752VENDOR_ST_M45PE10     0x02400000
 #define  FLASH_5752VENDOR_ST_M45PE20     0x02400002
 #define  FLASH_5752VENDOR_ST_M45PE40     0x02400001
+#define  FLASH_5755VENDOR_ATMEL_FLASH_1  0x03400001
+#define  FLASH_5755VENDOR_ATMEL_FLASH_2  0x03400002
+#define  FLASH_5755VENDOR_ATMEL_FLASH_3  0x03400000
+#define  FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ     0x03000003
+#define  FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ    0x03000002
+#define  FLASH_5787VENDOR_MICRO_EEPROM_64KHZ     0x03000000
+#define  FLASH_5787VENDOR_MICRO_EEPROM_376KHZ    0x02000000
 #define  NVRAM_CFG1_5752PAGE_SIZE_MASK   0x70000000
 #define  FLASH_5752PAGE_SIZE_256         0x00000000
 #define  FLASH_5752PAGE_SIZE_512         0x10000000
@@ -2185,7 +2194,7 @@ struct tg3 {
 #define TG3_FLG2_PHY_SERDES             0x00002000
 #define TG3_FLG2_CAPACITIVE_COUPLING    0x00004000
 #define TG3_FLG2_FLASH                  0x00008000
-#define TG3_FLG2_HW_TSO                 0x00010000
+#define TG3_FLG2_HW_TSO_1               0x00010000
 #define TG3_FLG2_SERDES_PREEMPHASIS     0x00020000
 #define TG3_FLG2_5705_PLUS              0x00040000
 #define TG3_FLG2_5750_PLUS              0x00080000
@@ -2198,6 +2207,9 @@ struct tg3 {
 #define TG3_FLG2_PARALLEL_DETECT        0x01000000
 #define TG3_FLG2_ICH_WORKAROUND         0x02000000
 #define TG3_FLG2_5780_CLASS             0x04000000
+#define TG3_FLG2_HW_TSO_2               0x08000000
+#define TG3_FLG2_HW_TSO                 (TG3_FLG2_HW_TSO_1 | TG3_FLG2_HW_TSO_2)
+#define TG3_FLG2_1SHOT_MSI              0x10000000
 
         u32                             split_mode_max_reqs;
 #define SPLIT_MODE_5704_MAX_REQ         3
@@ -2247,6 +2259,7 @@ struct tg3 {
 #define PHY_ID_BCM5752                  0x60008100
 #define PHY_ID_BCM5714                  0x60008340
 #define PHY_ID_BCM5780                  0x60008350
+#define PHY_ID_BCM5787                  0xbc050ce0
 #define PHY_ID_BCM8002                  0x60010140
 #define PHY_ID_INVALID                  0xffffffff
 #define PHY_ID_REV_MASK                 0x0000000f
@@ -2258,6 +2271,7 @@ struct tg3 {
         u32                             led_ctrl;
 
         char                            board_part_number[24];
+        char                            fw_ver[16];
         u32                             nic_sram_data_cfg;
         u32                             pci_clock_ctrl;
         struct pci_dev                  *pdev_peer;
@@ -2271,7 +2285,8 @@ struct tg3 {
          (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
          (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
          (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
-         (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM8002)
+         (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
+         (X) == PHY_ID_BCM8002)
 
         struct tg3_hw_stats             *hw_stats;
         dma_addr_t                      stats_mapping;