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-rw-r--r--drivers/net/tg3.h168
1 files changed, 83 insertions, 85 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 6f37d2a23544..ce010cd33895 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2816,6 +2816,86 @@ struct tg3_napi {
2816 unsigned int irq_vec; 2816 unsigned int irq_vec;
2817}; 2817};
2818 2818
2819enum TG3_FLAGS {
2820 TG3_FLAG_TAGGED_STATUS = 0,
2821 TG3_FLAG_TXD_MBOX_HWBUG,
2822 TG3_FLAG_USE_LINKCHG_REG,
2823 TG3_FLAG_ERROR_PROCESSED,
2824 TG3_FLAG_ENABLE_ASF,
2825 TG3_FLAG_ASPM_WORKAROUND,
2826 TG3_FLAG_POLL_SERDES,
2827 TG3_FLAG_MBOX_WRITE_REORDER,
2828 TG3_FLAG_PCIX_TARGET_HWBUG,
2829 TG3_FLAG_WOL_SPEED_100MB,
2830 TG3_FLAG_WOL_ENABLE,
2831 TG3_FLAG_EEPROM_WRITE_PROT,
2832 TG3_FLAG_NVRAM,
2833 TG3_FLAG_NVRAM_BUFFERED,
2834 TG3_FLAG_SUPPORT_MSI,
2835 TG3_FLAG_SUPPORT_MSIX,
2836 TG3_FLAG_PCIX_MODE,
2837 TG3_FLAG_PCI_HIGH_SPEED,
2838 TG3_FLAG_PCI_32BIT,
2839 TG3_FLAG_SRAM_USE_CONFIG,
2840 TG3_FLAG_TX_RECOVERY_PENDING,
2841 TG3_FLAG_WOL_CAP,
2842 TG3_FLAG_JUMBO_RING_ENABLE,
2843 TG3_FLAG_PAUSE_AUTONEG,
2844 TG3_FLAG_CPMU_PRESENT,
2845 TG3_FLAG_40BIT_DMA_BUG,
2846 TG3_FLAG_BROKEN_CHECKSUMS,
2847 TG3_FLAG_JUMBO_CAPABLE,
2848 TG3_FLAG_CHIP_RESETTING,
2849 TG3_FLAG_INIT_COMPLETE,
2850 TG3_FLAG_RESTART_TIMER,
2851 TG3_FLAG_TSO_BUG,
2852 TG3_FLAG_IS_5788,
2853 TG3_FLAG_MAX_RXPEND_64,
2854 TG3_FLAG_TSO_CAPABLE,
2855 TG3_FLAG_PCI_EXPRESS,
2856 TG3_FLAG_ASF_NEW_HANDSHAKE,
2857 TG3_FLAG_HW_AUTONEG,
2858 TG3_FLAG_IS_NIC,
2859 TG3_FLAG_FLASH,
2860 TG3_FLAG_HW_TSO_1,
2861 TG3_FLAG_5705_PLUS,
2862 TG3_FLAG_5750_PLUS,
2863 TG3_FLAG_HW_TSO_3,
2864 TG3_FLAG_USING_MSI,
2865 TG3_FLAG_USING_MSIX,
2866 TG3_FLAG_ICH_WORKAROUND,
2867 TG3_FLAG_5780_CLASS,
2868 TG3_FLAG_HW_TSO_2,
2869 TG3_FLAG_1SHOT_MSI,
2870 TG3_FLAG_NO_FWARE_REPORTED,
2871 TG3_FLAG_NO_NVRAM_ADDR_TRANS,
2872 TG3_FLAG_ENABLE_APE,
2873 TG3_FLAG_PROTECTED_NVRAM,
2874 TG3_FLAG_5701_DMA_BUG,
2875 TG3_FLAG_USE_PHYLIB,
2876 TG3_FLAG_MDIOBUS_INITED,
2877 TG3_FLAG_LRG_PROD_RING_CAP,
2878 TG3_FLAG_RGMII_INBAND_DISABLE,
2879 TG3_FLAG_RGMII_EXT_IBND_RX_EN,
2880 TG3_FLAG_RGMII_EXT_IBND_TX_EN,
2881 TG3_FLAG_CLKREQ_BUG,
2882 TG3_FLAG_5755_PLUS,
2883 TG3_FLAG_NO_NVRAM,
2884 TG3_FLAG_ENABLE_RSS,
2885 TG3_FLAG_ENABLE_TSS,
2886 TG3_FLAG_4G_DMA_BNDRY_BUG,
2887 TG3_FLAG_40BIT_DMA_LIMIT_BUG,
2888 TG3_FLAG_SHORT_DMA_BUG,
2889 TG3_FLAG_USE_JUMBO_BDFLAG,
2890 TG3_FLAG_L1PLLPD_EN,
2891 TG3_FLAG_57765_PLUS,
2892 TG3_FLAG_APE_HAS_NCSI,
2893 TG3_FLAG_5717_PLUS,
2894
2895 /* Add new flags before this comment and TG3_FLAG_NUMBER_OF_FLAGS */
2896 TG3_FLAG_NUMBER_OF_FLAGS, /* Last entry in enum TG3_FLAGS */
2897};
2898
2819struct tg3 { 2899struct tg3 {
2820 /* begin "general, frequently-used members" cacheline section */ 2900 /* begin "general, frequently-used members" cacheline section */
2821 2901
@@ -2839,7 +2919,7 @@ struct tg3 {
2839 /* SMP locking strategy: 2919 /* SMP locking strategy:
2840 * 2920 *
2841 * lock: Held during reset, PHY access, timer, and when 2921 * lock: Held during reset, PHY access, timer, and when
2842 * updating tg3_flags and tg3_flags2. 2922 * updating tg3_flags.
2843 * 2923 *
2844 * netif_tx_lock: Held during tg3_start_xmit. tg3_tx holds 2924 * netif_tx_lock: Held during tg3_start_xmit. tg3_tx holds
2845 * netif_tx_lock when it needs to call 2925 * netif_tx_lock when it needs to call
@@ -2896,95 +2976,13 @@ struct tg3 {
2896 struct tg3_ethtool_stats estats; 2976 struct tg3_ethtool_stats estats;
2897 struct tg3_ethtool_stats estats_prev; 2977 struct tg3_ethtool_stats estats_prev;
2898 2978
2979 DECLARE_BITMAP(tg3_flags, TG3_FLAG_NUMBER_OF_FLAGS);
2980
2899 union { 2981 union {
2900 unsigned long phy_crc_errors; 2982 unsigned long phy_crc_errors;
2901 unsigned long last_event_jiffies; 2983 unsigned long last_event_jiffies;
2902 }; 2984 };
2903 2985
2904 u32 tg3_flags;
2905#define TG3_FLAG_TAGGED_STATUS 0x00000001
2906#define TG3_FLAG_TXD_MBOX_HWBUG 0x00000002
2907#define TG3_FLAG_USE_LINKCHG_REG 0x00000008
2908#define TG3_FLAG_ERROR_PROCESSED 0x00000010
2909#define TG3_FLAG_ENABLE_ASF 0x00000020
2910#define TG3_FLAG_ASPM_WORKAROUND 0x00000040
2911#define TG3_FLAG_POLL_SERDES 0x00000080
2912#define TG3_FLAG_MBOX_WRITE_REORDER 0x00000100
2913#define TG3_FLAG_PCIX_TARGET_HWBUG 0x00000200
2914#define TG3_FLAG_WOL_SPEED_100MB 0x00000400
2915#define TG3_FLAG_WOL_ENABLE 0x00000800
2916#define TG3_FLAG_EEPROM_WRITE_PROT 0x00001000
2917#define TG3_FLAG_NVRAM 0x00002000
2918#define TG3_FLAG_NVRAM_BUFFERED 0x00004000
2919#define TG3_FLAG_SUPPORT_MSI 0x00008000
2920#define TG3_FLAG_SUPPORT_MSIX 0x00010000
2921#define TG3_FLAG_SUPPORT_MSI_OR_MSIX (TG3_FLAG_SUPPORT_MSI | \
2922 TG3_FLAG_SUPPORT_MSIX)
2923#define TG3_FLAG_PCIX_MODE 0x00020000
2924#define TG3_FLAG_PCI_HIGH_SPEED 0x00040000
2925#define TG3_FLAG_PCI_32BIT 0x00080000
2926#define TG3_FLAG_SRAM_USE_CONFIG 0x00100000
2927#define TG3_FLAG_TX_RECOVERY_PENDING 0x00200000
2928#define TG3_FLAG_WOL_CAP 0x00400000
2929#define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000
2930#define TG3_FLAG_PAUSE_AUTONEG 0x02000000
2931#define TG3_FLAG_CPMU_PRESENT 0x04000000
2932#define TG3_FLAG_40BIT_DMA_BUG 0x08000000
2933#define TG3_FLAG_JUMBO_CAPABLE 0x20000000
2934#define TG3_FLAG_CHIP_RESETTING 0x40000000
2935#define TG3_FLAG_INIT_COMPLETE 0x80000000
2936 u32 tg3_flags2;
2937#define TG3_FLG2_RESTART_TIMER 0x00000001
2938#define TG3_FLG2_TSO_BUG 0x00000002
2939#define TG3_FLG2_IS_5788 0x00000008
2940#define TG3_FLG2_MAX_RXPEND_64 0x00000010
2941#define TG3_FLG2_TSO_CAPABLE 0x00000020
2942#define TG3_FLG2_PCI_EXPRESS 0x00000200
2943#define TG3_FLG2_ASF_NEW_HANDSHAKE 0x00000400
2944#define TG3_FLG2_HW_AUTONEG 0x00000800
2945#define TG3_FLG2_IS_NIC 0x00001000
2946#define TG3_FLG2_FLASH 0x00008000
2947#define TG3_FLG2_HW_TSO_1 0x00010000
2948#define TG3_FLG2_5705_PLUS 0x00040000
2949#define TG3_FLG2_5750_PLUS 0x00080000
2950#define TG3_FLG2_HW_TSO_3 0x00100000
2951#define TG3_FLG2_USING_MSI 0x00200000
2952#define TG3_FLG2_USING_MSIX 0x00400000
2953#define TG3_FLG2_USING_MSI_OR_MSIX (TG3_FLG2_USING_MSI | \
2954 TG3_FLG2_USING_MSIX)
2955#define TG3_FLG2_ICH_WORKAROUND 0x02000000
2956#define TG3_FLG2_5780_CLASS 0x04000000
2957#define TG3_FLG2_HW_TSO_2 0x08000000
2958#define TG3_FLG2_HW_TSO (TG3_FLG2_HW_TSO_1 | \
2959 TG3_FLG2_HW_TSO_2 | \
2960 TG3_FLG2_HW_TSO_3)
2961#define TG3_FLG2_1SHOT_MSI 0x10000000
2962#define TG3_FLG2_NO_FWARE_REPORTED 0x40000000
2963 u32 tg3_flags3;
2964#define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001
2965#define TG3_FLG3_ENABLE_APE 0x00000002
2966#define TG3_FLG3_PROTECTED_NVRAM 0x00000004
2967#define TG3_FLG3_5701_DMA_BUG 0x00000008
2968#define TG3_FLG3_USE_PHYLIB 0x00000010
2969#define TG3_FLG3_MDIOBUS_INITED 0x00000020
2970#define TG3_FLG3_LRG_PROD_RING_CAP 0x00000080
2971#define TG3_FLG3_RGMII_INBAND_DISABLE 0x00000100
2972#define TG3_FLG3_RGMII_EXT_IBND_RX_EN 0x00000200
2973#define TG3_FLG3_RGMII_EXT_IBND_TX_EN 0x00000400
2974#define TG3_FLG3_CLKREQ_BUG 0x00000800
2975#define TG3_FLG3_5755_PLUS 0x00002000
2976#define TG3_FLG3_NO_NVRAM 0x00004000
2977#define TG3_FLG3_ENABLE_RSS 0x00020000
2978#define TG3_FLG3_ENABLE_TSS 0x00040000
2979#define TG3_FLG3_4G_DMA_BNDRY_BUG 0x00080000
2980#define TG3_FLG3_40BIT_DMA_LIMIT_BUG 0x00100000
2981#define TG3_FLG3_SHORT_DMA_BUG 0x00200000
2982#define TG3_FLG3_USE_JUMBO_BDFLAG 0x00400000
2983#define TG3_FLG3_L1PLLPD_EN 0x00800000
2984#define TG3_FLG3_57765_PLUS 0x01000000
2985#define TG3_FLG3_APE_HAS_NCSI 0x02000000
2986#define TG3_FLG3_5717_PLUS 0x04000000
2987
2988 struct timer_list timer; 2986 struct timer_list timer;
2989 u16 timer_counter; 2987 u16 timer_counter;
2990 u16 timer_multiplier; 2988 u16 timer_multiplier;